Renesas / mbed-src_GR-PEACH_rev_c

Please use mbed-src instead of this library.mbed-src supports GR-PEACH rev.C. mbed-srcライブラリをご利用ください。mbed-srcはGR-PEACH rev.Cに対応しています。

Fork of mbed-src_GR-PEACH_rev_c by GR-PEACH_producer_meeting

api/I2C.h@10:3bc89ef62ce7, 2013-06-14 (annotated)

Committer:
emilmont
Date:
Fri Jun 14 17:49:17 2013 +0100
Revision:
10:3bc89ef62ce7
Parent:
9:0ce32e54c9a7
Child:
13:0645d8841f51
Unify mbed library sources

Who changed what in which revision?

UserRevisionLine numberNew contents of line
emilmont 10:3bc89ef62ce7 1 /* mbed Microcontroller Library
emilmont 10:3bc89ef62ce7 2 * Copyright (c) 2006-2013 ARM Limited
emilmont 10:3bc89ef62ce7 3 *
emilmont 10:3bc89ef62ce7 4 * Licensed under the Apache License, Version 2.0 (the "License");
emilmont 10:3bc89ef62ce7 5 * you may not use this file except in compliance with the License.
emilmont 10:3bc89ef62ce7 6 * You may obtain a copy of the License at
emilmont 10:3bc89ef62ce7 7 *
emilmont 10:3bc89ef62ce7 8 * http://www.apache.org/licenses/LICENSE-2.0
emilmont 10:3bc89ef62ce7 9 *
emilmont 10:3bc89ef62ce7 10 * Unless required by applicable law or agreed to in writing, software
emilmont 10:3bc89ef62ce7 11 * distributed under the License is distributed on an "AS IS" BASIS,
emilmont 10:3bc89ef62ce7 12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
emilmont 10:3bc89ef62ce7 13 * See the License for the specific language governing permissions and
emilmont 10:3bc89ef62ce7 14 * limitations under the License.
emilmont 10:3bc89ef62ce7 15 */
emilmont 10:3bc89ef62ce7 16 #ifndef MBED_I2C_H
emilmont 10:3bc89ef62ce7 17 #define MBED_I2C_H
emilmont 10:3bc89ef62ce7 18
emilmont 10:3bc89ef62ce7 19 #include "platform.h"
emilmont 10:3bc89ef62ce7 20
emilmont 10:3bc89ef62ce7 21 #if DEVICE_I2C
emilmont 10:3bc89ef62ce7 22
emilmont 10:3bc89ef62ce7 23 #include "i2c_api.h"
emilmont 10:3bc89ef62ce7 24
emilmont 10:3bc89ef62ce7 25 namespace mbed {
emilmont 10:3bc89ef62ce7 26
emilmont 10:3bc89ef62ce7 27 /** An I2C Master, used for communicating with I2C slave devices
emilmont 10:3bc89ef62ce7 28 *
emilmont 10:3bc89ef62ce7 29 * Example:
emilmont 10:3bc89ef62ce7 30 * @code
emilmont 10:3bc89ef62ce7 31 * // Read from I2C slave at address 0x62
emilmont 10:3bc89ef62ce7 32 *
emilmont 10:3bc89ef62ce7 33 * #include "mbed.h"
emilmont 10:3bc89ef62ce7 34 *
emilmont 10:3bc89ef62ce7 35 * I2C i2c(p28, p27);
emilmont 10:3bc89ef62ce7 36 *
emilmont 10:3bc89ef62ce7 37 * int main() {
emilmont 10:3bc89ef62ce7 38 * int address = 0x62;
emilmont 10:3bc89ef62ce7 39 * char data[2];
emilmont 10:3bc89ef62ce7 40 * i2c.read(address, data, 2);
emilmont 10:3bc89ef62ce7 41 * }
emilmont 10:3bc89ef62ce7 42 * @endcode
emilmont 10:3bc89ef62ce7 43 */
emilmont 10:3bc89ef62ce7 44 class I2C {
emilmont 10:3bc89ef62ce7 45
emilmont 10:3bc89ef62ce7 46 public:
emilmont 10:3bc89ef62ce7 47 enum RxStatus {
emilmont 10:3bc89ef62ce7 48 NoData,
emilmont 10:3bc89ef62ce7 49 MasterGeneralCall,
emilmont 10:3bc89ef62ce7 50 MasterWrite,
emilmont 10:3bc89ef62ce7 51 MasterRead
emilmont 10:3bc89ef62ce7 52 };
emilmont 10:3bc89ef62ce7 53
emilmont 10:3bc89ef62ce7 54 enum Acknowledge {
emilmont 10:3bc89ef62ce7 55 NoACK = 0,
emilmont 10:3bc89ef62ce7 56 ACK = 1
emilmont 10:3bc89ef62ce7 57 };
emilmont 10:3bc89ef62ce7 58
emilmont 10:3bc89ef62ce7 59 /** Create an I2C Master interface, connected to the specified pins
emilmont 10:3bc89ef62ce7 60 *
emilmont 10:3bc89ef62ce7 61 * @param sda I2C data line pin
emilmont 10:3bc89ef62ce7 62 * @param scl I2C clock line pin
emilmont 10:3bc89ef62ce7 63 */
emilmont 10:3bc89ef62ce7 64 I2C(PinName sda, PinName scl);
emilmont 10:3bc89ef62ce7 65
emilmont 10:3bc89ef62ce7 66 /** Set the frequency of the I2C interface
emilmont 10:3bc89ef62ce7 67 *
emilmont 10:3bc89ef62ce7 68 * @param hz The bus frequency in hertz
emilmont 10:3bc89ef62ce7 69 */
emilmont 10:3bc89ef62ce7 70 void frequency(int hz);
emilmont 10:3bc89ef62ce7 71
emilmont 10:3bc89ef62ce7 72 /** Read from an I2C slave
emilmont 10:3bc89ef62ce7 73 *
emilmont 10:3bc89ef62ce7 74 * Performs a complete read transaction. The bottom bit of
emilmont 10:3bc89ef62ce7 75 * the address is forced to 1 to indicate a read.
emilmont 10:3bc89ef62ce7 76 *
emilmont 10:3bc89ef62ce7 77 * @param address 8-bit I2C slave address [ addr | 1 ]
emilmont 10:3bc89ef62ce7 78 * @param data Pointer to the byte-array to read data in to
emilmont 10:3bc89ef62ce7 79 * @param length Number of bytes to read
emilmont 10:3bc89ef62ce7 80 * @param repeated Repeated start, true - don't send stop at end
emilmont 10:3bc89ef62ce7 81 *
emilmont 10:3bc89ef62ce7 82 * @returns
emilmont 10:3bc89ef62ce7 83 * 0 on success (ack),
emilmont 10:3bc89ef62ce7 84 * non-0 on failure (nack)
emilmont 10:3bc89ef62ce7 85 */
emilmont 10:3bc89ef62ce7 86 int read(int address, char *data, int length, bool repeated = false);
emilmont 10:3bc89ef62ce7 87
emilmont 10:3bc89ef62ce7 88 /** Read a single byte from the I2C bus
emilmont 10:3bc89ef62ce7 89 *
emilmont 10:3bc89ef62ce7 90 * @param ack indicates if the byte is to be acknowledged (1 = acknowledge)
emilmont 10:3bc89ef62ce7 91 *
emilmont 10:3bc89ef62ce7 92 * @returns
emilmont 10:3bc89ef62ce7 93 * the byte read
emilmont 10:3bc89ef62ce7 94 */
emilmont 10:3bc89ef62ce7 95 int read(int ack);
emilmont 10:3bc89ef62ce7 96
emilmont 10:3bc89ef62ce7 97 /** Write to an I2C slave
emilmont 10:3bc89ef62ce7 98 *
emilmont 10:3bc89ef62ce7 99 * Performs a complete write transaction. The bottom bit of
emilmont 10:3bc89ef62ce7 100 * the address is forced to 0 to indicate a write.
emilmont 10:3bc89ef62ce7 101 *
emilmont 10:3bc89ef62ce7 102 * @param address 8-bit I2C slave address [ addr | 0 ]
emilmont 10:3bc89ef62ce7 103 * @param data Pointer to the byte-array data to send
emilmont 10:3bc89ef62ce7 104 * @param length Number of bytes to send
emilmont 10:3bc89ef62ce7 105 * @param repeated Repeated start, true - do not send stop at end
emilmont 10:3bc89ef62ce7 106 *
emilmont 10:3bc89ef62ce7 107 * @returns
emilmont 10:3bc89ef62ce7 108 * 0 on success (ack),
emilmont 10:3bc89ef62ce7 109 * non-0 on failure (nack)
emilmont 10:3bc89ef62ce7 110 */
emilmont 10:3bc89ef62ce7 111 int write(int address, const char *data, int length, bool repeated = false);
emilmont 10:3bc89ef62ce7 112
emilmont 10:3bc89ef62ce7 113 /** Write single byte out on the I2C bus
emilmont 10:3bc89ef62ce7 114 *
emilmont 10:3bc89ef62ce7 115 * @param data data to write out on bus
emilmont 10:3bc89ef62ce7 116 *
emilmont 10:3bc89ef62ce7 117 * @returns
emilmont 10:3bc89ef62ce7 118 * '1' if an ACK was received,
emilmont 10:3bc89ef62ce7 119 * '0' otherwise
emilmont 10:3bc89ef62ce7 120 */
emilmont 10:3bc89ef62ce7 121 int write(int data);
emilmont 10:3bc89ef62ce7 122
emilmont 10:3bc89ef62ce7 123 /** Creates a start condition on the I2C bus
emilmont 10:3bc89ef62ce7 124 */
emilmont 10:3bc89ef62ce7 125
emilmont 10:3bc89ef62ce7 126 void start(void);
emilmont 10:3bc89ef62ce7 127
emilmont 10:3bc89ef62ce7 128 /** Creates a stop condition on the I2C bus
emilmont 10:3bc89ef62ce7 129 */
emilmont 10:3bc89ef62ce7 130 void stop(void);
emilmont 10:3bc89ef62ce7 131
emilmont 10:3bc89ef62ce7 132 protected:
emilmont 10:3bc89ef62ce7 133 void aquire();
emilmont 10:3bc89ef62ce7 134
emilmont 10:3bc89ef62ce7 135 i2c_t _i2c;
emilmont 10:3bc89ef62ce7 136 static I2C *_owner;
emilmont 10:3bc89ef62ce7 137 int _hz;
emilmont 10:3bc89ef62ce7 138 };
emilmont 10:3bc89ef62ce7 139
emilmont 10:3bc89ef62ce7 140 } // namespace mbed
emilmont 10:3bc89ef62ce7 141
emilmont 10:3bc89ef62ce7 142 #endif
emilmont 10:3bc89ef62ce7 143
emilmont 10:3bc89ef62ce7 144 #endif