Renesas / mbed-src_GR-PEACH_rev_b

mbed library sources for GR-PEACH rev.B.

Fork of mbed-src by mbed official

targets/cmsis/TARGET_NXP/TARGET_LPC176X/TOOLCHAIN_GCC_CS/LPC1768.ld@514:cf59050bad8e, 2015-04-15 (annotated)

Committer:
RyoheiHagimoto
Date:
Wed Apr 15 01:34:29 2015 +0000
Revision:
514:cf59050bad8e
Parent:
13:0645d8841f51 
mbed library sources for GR-PEACH rev.B.

Who changed what in which revision?

UserRevisionLine numberNew contents of line
emilmont 10:3bc89ef62ce7 1 /* Linker script for mbed LPC1768
emilmont 10:3bc89ef62ce7 2 *
emilmont 10:3bc89ef62ce7 3 * Version:CodeSourcery Sourcery G++ Lite 2007q3-53
emilmont 10:3bc89ef62ce7 4 * BugURL:https://support.codesourcery.com/GNUToolchain/
emilmont 10:3bc89ef62ce7 5 *
emilmont 10:3bc89ef62ce7 6 * Copyright 2007 CodeSourcery.
emilmont 10:3bc89ef62ce7 7 *
emilmont 10:3bc89ef62ce7 8 * The authors hereby grant permission to use, copy, modify, distribute,
emilmont 10:3bc89ef62ce7 9 * and license this software and its documentation for any purpose, provided
emilmont 10:3bc89ef62ce7 10 * that existing copyright notices are retained in all copies and that this
emilmont 10:3bc89ef62ce7 11 * notice is included verbatim in any distributions. No written agreement,
emilmont 10:3bc89ef62ce7 12 * license, or royalty fee is required for any of the authorized uses.
emilmont 10:3bc89ef62ce7 13 * Modifications to this software may be copyrighted by their authors
emilmont 10:3bc89ef62ce7 14 * and need not follow the licensing terms described here, provided that
emilmont 10:3bc89ef62ce7 15 * the new terms are clearly indicated on the first page of each file where
emilmont 10:3bc89ef62ce7 16 * they apply. */
emilmont 10:3bc89ef62ce7 17 OUTPUT_FORMAT ("elf32-littlearm", "elf32-bigarm", "elf32-littlearm")
emilmont 10:3bc89ef62ce7 18 ENTRY(__cs3_reset_cortex_m)
emilmont 10:3bc89ef62ce7 19 SEARCH_DIR(.)
emilmont 10:3bc89ef62ce7 20
emilmont 10:3bc89ef62ce7 21 /*
emilmont 10:3bc89ef62ce7 22 ram ORIGIN: 8_byte_aligned(49 vect * 4 bytes) = 8_byte_aligned(0xC4) = 0xC8
emilmont 10:3bc89ef62ce7 23 ram LENGTH: 32KB - 0xC8 = 0x7F38
emilmont 10:3bc89ef62ce7 24 */
emilmont 10:3bc89ef62ce7 25 MEMORY
emilmont 10:3bc89ef62ce7 26 {
emilmont 10:3bc89ef62ce7 27 rom (rx) : ORIGIN = 0x00000000, LENGTH = 512K
emilmont 10:3bc89ef62ce7 28
emilmont 10:3bc89ef62ce7 29 ram (rwx) : ORIGIN = 0x100000C8, LENGTH = 0x7F38
emilmont 10:3bc89ef62ce7 30
emilmont 10:3bc89ef62ce7 31 ram1(rwx) : ORIGIN = 0x2007C000, LENGTH = 16K
emilmont 10:3bc89ef62ce7 32 ram2(rwx) : ORIGIN = 0x20080000, LENGTH = 16K
emilmont 10:3bc89ef62ce7 33 }
emilmont 10:3bc89ef62ce7 34
emilmont 10:3bc89ef62ce7 35 /* These force the linker to search for particular symbols from
emilmont 10:3bc89ef62ce7 36 * the start of the link process and thus ensure the user's
emilmont 10:3bc89ef62ce7 37 * overrides are picked up
emilmont 10:3bc89ef62ce7 38 */
emilmont 10:3bc89ef62ce7 39 EXTERN(__cs3_reset_cortex_m)
emilmont 10:3bc89ef62ce7 40 EXTERN(__cs3_interrupt_vector_cortex_m)
emilmont 10:3bc89ef62ce7 41 EXTERN(__cs3_start_c main __cs3_stack __cs3_stack_size __cs3_heap_end)
emilmont 10:3bc89ef62ce7 42
emilmont 10:3bc89ef62ce7 43 PROVIDE(__cs3_stack = __cs3_region_start_ram + __cs3_region_size_ram);
emilmont 10:3bc89ef62ce7 44 PROVIDE(__cs3_stack_size = __cs3_region_start_ram + __cs3_region_size_ram - _end);
emilmont 10:3bc89ef62ce7 45 PROVIDE(__cs3_heap_start = _end);
emilmont 10:3bc89ef62ce7 46 PROVIDE(__cs3_heap_end = __cs3_region_start_ram + __cs3_region_size_ram);
emilmont 10:3bc89ef62ce7 47
emilmont 10:3bc89ef62ce7 48 SECTIONS
emilmont 10:3bc89ef62ce7 49 {
emilmont 10:3bc89ef62ce7 50 .text :
emilmont 10:3bc89ef62ce7 51 {
emilmont 10:3bc89ef62ce7 52 CREATE_OBJECT_SYMBOLS
emilmont 10:3bc89ef62ce7 53 __cs3_region_start_rom = .;
emilmont 10:3bc89ef62ce7 54 *(.cs3.region-head.rom)
emilmont 10:3bc89ef62ce7 55 __cs3_interrupt_vector = __cs3_interrupt_vector_cortex_m;
emilmont 10:3bc89ef62ce7 56 *(.cs3.interrupt_vector)
emilmont 10:3bc89ef62ce7 57 /* Make sure we pulled in an interrupt vector. */
emilmont 10:3bc89ef62ce7 58 ASSERT (. != __cs3_interrupt_vector_cortex_m, "No interrupt vector");
emilmont 10:3bc89ef62ce7 59 *(.rom)
emilmont 10:3bc89ef62ce7 60 *(.rom.b)
emilmont 10:3bc89ef62ce7 61
emilmont 10:3bc89ef62ce7 62 __cs3_reset = __cs3_reset_cortex_m;
emilmont 10:3bc89ef62ce7 63 *(.cs3.reset)
emilmont 10:3bc89ef62ce7 64 /* Make sure we pulled in some reset code. */
emilmont 10:3bc89ef62ce7 65 ASSERT (. != __cs3_reset, "No reset code");
emilmont 10:3bc89ef62ce7 66
emilmont 10:3bc89ef62ce7 67 *(.text .text.* .gnu.linkonce.t.*)
emilmont 10:3bc89ef62ce7 68 *(.plt)
emilmont 10:3bc89ef62ce7 69 *(.gnu.warning)
emilmont 10:3bc89ef62ce7 70 *(.glue_7t) *(.glue_7) *(.vfp11_veneer)
emilmont 10:3bc89ef62ce7 71
emilmont 10:3bc89ef62ce7 72 *(.rodata .rodata.* .gnu.linkonce.r.*)
emilmont 10:3bc89ef62ce7 73
emilmont 10:3bc89ef62ce7 74 *(.ARM.extab* .gnu.linkonce.armextab.*)
emilmont 10:3bc89ef62ce7 75 *(.gcc_except_table)
emilmont 10:3bc89ef62ce7 76 *(.eh_frame_hdr)
emilmont 10:3bc89ef62ce7 77 *(.eh_frame)
emilmont 10:3bc89ef62ce7 78
emilmont 10:3bc89ef62ce7 79 . = ALIGN(4);
emilmont 10:3bc89ef62ce7 80 KEEP(*(.init))
emilmont 10:3bc89ef62ce7 81
emilmont 10:3bc89ef62ce7 82 . = ALIGN(4);
emilmont 10:3bc89ef62ce7 83 __preinit_array_start = .;
emilmont 10:3bc89ef62ce7 84 KEEP (*(.preinit_array))
emilmont 10:3bc89ef62ce7 85 __preinit_array_end = .;
emilmont 10:3bc89ef62ce7 86
emilmont 10:3bc89ef62ce7 87 . = ALIGN(4);
emilmont 10:3bc89ef62ce7 88 __init_array_start = .;
emilmont 10:3bc89ef62ce7 89 KEEP (*(SORT(.init_array.*)))
emilmont 10:3bc89ef62ce7 90 KEEP (*(.init_array))
emilmont 10:3bc89ef62ce7 91 __init_array_end = .;
emilmont 10:3bc89ef62ce7 92
emilmont 10:3bc89ef62ce7 93 . = ALIGN(0x4);
emilmont 10:3bc89ef62ce7 94 KEEP (*crtbegin.o(.ctors))
emilmont 10:3bc89ef62ce7 95 KEEP (*(EXCLUDE_FILE (*crtend.o) .ctors))
emilmont 10:3bc89ef62ce7 96 KEEP (*(SORT(.ctors.*)))
emilmont 10:3bc89ef62ce7 97 KEEP (*crtend.o(.ctors))
emilmont 10:3bc89ef62ce7 98
emilmont 10:3bc89ef62ce7 99 . = ALIGN(4);
emilmont 10:3bc89ef62ce7 100 KEEP(*(.fini))
emilmont 10:3bc89ef62ce7 101
emilmont 10:3bc89ef62ce7 102 . = ALIGN(4);
emilmont 10:3bc89ef62ce7 103 __fini_array_start = .;
emilmont 10:3bc89ef62ce7 104 KEEP (*(.fini_array))
emilmont 10:3bc89ef62ce7 105 KEEP (*(SORT(.fini_array.*)))
emilmont 10:3bc89ef62ce7 106 __fini_array_end = .;
emilmont 10:3bc89ef62ce7 107
emilmont 10:3bc89ef62ce7 108 KEEP (*crtbegin.o(.dtors))
emilmont 10:3bc89ef62ce7 109 KEEP (*(EXCLUDE_FILE (*crtend.o) .dtors))
emilmont 10:3bc89ef62ce7 110 KEEP (*(SORT(.dtors.*)))
emilmont 10:3bc89ef62ce7 111 KEEP (*crtend.o(.dtors))
emilmont 10:3bc89ef62ce7 112
emilmont 10:3bc89ef62ce7 113 . = ALIGN(4);
emilmont 10:3bc89ef62ce7 114 __cs3_regions = .;
emilmont 10:3bc89ef62ce7 115 LONG (0)
emilmont 10:3bc89ef62ce7 116 LONG (__cs3_region_init_ram)
emilmont 10:3bc89ef62ce7 117 LONG (__cs3_region_start_ram)
emilmont 10:3bc89ef62ce7 118 LONG (__cs3_region_init_size_ram)
emilmont 10:3bc89ef62ce7 119 LONG (__cs3_region_zero_size_ram)
emilmont 10:3bc89ef62ce7 120 }
emilmont 10:3bc89ef62ce7 121
emilmont 10:3bc89ef62ce7 122 /* .ARM.exidx is sorted, so has to go in its own output section. */
emilmont 10:3bc89ef62ce7 123 __exidx_start = .;
emilmont 10:3bc89ef62ce7 124 .ARM.exidx :
emilmont 10:3bc89ef62ce7 125 {
emilmont 10:3bc89ef62ce7 126 *(.ARM.exidx* .gnu.linkonce.armexidx.*)
emilmont 10:3bc89ef62ce7 127 } >rom
emilmont 10:3bc89ef62ce7 128 __exidx_end = .;
emilmont 10:3bc89ef62ce7 129 .text.align :
emilmont 10:3bc89ef62ce7 130 {
emilmont 10:3bc89ef62ce7 131 . = ALIGN(8);
emilmont 10:3bc89ef62ce7 132 _etext = .;
emilmont 10:3bc89ef62ce7 133 } >rom
emilmont 10:3bc89ef62ce7 134 __cs3_region_size_rom = LENGTH(rom);
emilmont 10:3bc89ef62ce7 135 __cs3_region_num = 1;
emilmont 10:3bc89ef62ce7 136
emilmont 10:3bc89ef62ce7 137 .data :
emilmont 10:3bc89ef62ce7 138 {
emilmont 10:3bc89ef62ce7 139 __cs3_region_start_ram = .;
emilmont 10:3bc89ef62ce7 140 *(.cs3.region-head.ram)
emilmont 10:3bc89ef62ce7 141 KEEP(*(.jcr))
emilmont 10:3bc89ef62ce7 142 *(.got.plt) *(.got)
emilmont 10:3bc89ef62ce7 143 *(.shdata)
emilmont 10:3bc89ef62ce7 144 *(.data .data.* .gnu.linkonce.d.*)
emilmont 10:3bc89ef62ce7 145 *(.ram)
emilmont 10:3bc89ef62ce7 146 . = ALIGN (8);
emilmont 10:3bc89ef62ce7 147 _edata = .;
emilmont 10:3bc89ef62ce7 148 } >ram AT>rom
emilmont 10:3bc89ef62ce7 149 .bss :
emilmont 10:3bc89ef62ce7 150 {
emilmont 10:3bc89ef62ce7 151 *(.shbss)
emilmont 10:3bc89ef62ce7 152 *(.bss .bss.* .gnu.linkonce.b.*)
emilmont 10:3bc89ef62ce7 153 *(COMMON)
emilmont 10:3bc89ef62ce7 154 *(.ram.b)
emilmont 10:3bc89ef62ce7 155 . = ALIGN (8);
emilmont 10:3bc89ef62ce7 156 _end = .;
emilmont 10:3bc89ef62ce7 157 __end = .;
emilmont 10:3bc89ef62ce7 158 } >ram AT>rom
emilmont 10:3bc89ef62ce7 159 /* This used for USB RAM section */
emilmont 10:3bc89ef62ce7 160 .usb_ram (NOLOAD):
emilmont 10:3bc89ef62ce7 161 {
emilmont 10:3bc89ef62ce7 162 *.o (USB_RAM)
emilmont 10:3bc89ef62ce7 163 } > ram2
emilmont 10:3bc89ef62ce7 164 .heap (NOLOAD) :
emilmont 10:3bc89ef62ce7 165 {
emilmont 10:3bc89ef62ce7 166 *(.heap)
emilmont 10:3bc89ef62ce7 167 } >ram
emilmont 10:3bc89ef62ce7 168 .stack (__cs3_stack - __cs3_stack_size) (NOLOAD):
emilmont 10:3bc89ef62ce7 169 {
emilmont 10:3bc89ef62ce7 170 *(.stack)
emilmont 10:3bc89ef62ce7 171 _estack = .;
emilmont 10:3bc89ef62ce7 172 PROVIDE(estack = .);
emilmont 10:3bc89ef62ce7 173 } >ram
emilmont 10:3bc89ef62ce7 174
emilmont 10:3bc89ef62ce7 175 __cs3_region_init_ram = LOADADDR (.data);
emilmont 10:3bc89ef62ce7 176 __cs3_region_init_size_ram = _edata - __cs3_region_start_ram;
emilmont 10:3bc89ef62ce7 177 __cs3_region_zero_size_ram = _end - _edata;
emilmont 10:3bc89ef62ce7 178 __cs3_region_size_ram = LENGTH(ram);
emilmont 10:3bc89ef62ce7 179 __cs3_region_num = 1;
emilmont 10:3bc89ef62ce7 180
emilmont 10:3bc89ef62ce7 181 .stab 0 (NOLOAD) : { *(.stab) }
emilmont 10:3bc89ef62ce7 182 .stabstr 0 (NOLOAD) : { *(.stabstr) }
emilmont 10:3bc89ef62ce7 183 /* DWARF debug sections.
emilmont 10:3bc89ef62ce7 184 * Symbols in the DWARF debugging sections are relative to the beginning
emilmont 10:3bc89ef62ce7 185 * of the section so we begin them at 0. */
emilmont 10:3bc89ef62ce7 186 /* DWARF 1 */
emilmont 10:3bc89ef62ce7 187 .debug 0 : { *(.debug) }
emilmont 10:3bc89ef62ce7 188 .line 0 : { *(.line) }
emilmont 10:3bc89ef62ce7 189 /* GNU DWARF 1 extensions */
emilmont 10:3bc89ef62ce7 190 .debug_srcinfo 0 : { *(.debug_srcinfo) }
emilmont 10:3bc89ef62ce7 191 .debug_sfnames 0 : { *(.debug_sfnames) }
emilmont 10:3bc89ef62ce7 192 /* DWARF 1.1 and DWARF 2 */
emilmont 10:3bc89ef62ce7 193 .debug_aranges 0 : { *(.debug_aranges) }
emilmont 10:3bc89ef62ce7 194 .debug_pubnames 0 : { *(.debug_pubnames) }
emilmont 10:3bc89ef62ce7 195 /* DWARF 2 */
emilmont 10:3bc89ef62ce7 196 .debug_info 0 : { *(.debug_info .gnu.linkonce.wi.*) }
emilmont 10:3bc89ef62ce7 197 .debug_abbrev 0 : { *(.debug_abbrev) }
emilmont 10:3bc89ef62ce7 198 .debug_line 0 : { *(.debug_line) }
emilmont 10:3bc89ef62ce7 199 .debug_frame 0 : { *(.debug_frame) }
emilmont 10:3bc89ef62ce7 200 .debug_str 0 : { *(.debug_str) }
emilmont 10:3bc89ef62ce7 201 .debug_loc 0 : { *(.debug_loc) }
emilmont 10:3bc89ef62ce7 202 .debug_macinfo 0 : { *(.debug_macinfo) }
emilmont 10:3bc89ef62ce7 203 /* SGI/MIPS DWARF 2 extensions */
emilmont 10:3bc89ef62ce7 204 .debug_weaknames 0 : { *(.debug_weaknames) }
emilmont 10:3bc89ef62ce7 205 .debug_funcnames 0 : { *(.debug_funcnames) }
emilmont 10:3bc89ef62ce7 206 .debug_typenames 0 : { *(.debug_typenames) }
emilmont 10:3bc89ef62ce7 207 .debug_varnames 0 : { *(.debug_varnames) }
emilmont 10:3bc89ef62ce7 208
emilmont 10:3bc89ef62ce7 209 .note.gnu.arm.ident 0 : { KEEP (*(.note.gnu.arm.ident)) }
emilmont 10:3bc89ef62ce7 210 .ARM.attributes 0 : { KEEP (*(.ARM.attributes)) }
emilmont 10:3bc89ef62ce7 211 /DISCARD/ : { *(.note.GNU-stack) }
emilmont 10:3bc89ef62ce7 212 }