Renesas / mbed-src_GR-PEACH_rev_b

mbed library sources for GR-PEACH rev.B.

Fork of mbed-src by mbed official

targets/cmsis/TARGET_NXP/TARGET_LPC13XX/TOOLCHAIN_GCC_ARM/startup_LPC13xx.s@514:cf59050bad8e, 2015-04-15 (annotated)

Committer:
RyoheiHagimoto
Date:
Wed Apr 15 01:34:29 2015 +0000
Revision:
514:cf59050bad8e
Parent:
66:64ad953ee6c3 
mbed library sources for GR-PEACH rev.B.

Who changed what in which revision?

UserRevisionLine numberNew contents of line
bogdanm 13:0645d8841f51 1 /* File: startup_ARMCM3.s
bogdanm 13:0645d8841f51 2 * Purpose: startup file for Cortex-M3/M4 devices. Should use with
bogdanm 13:0645d8841f51 3 * GNU Tools for ARM Embedded Processors
bogdanm 13:0645d8841f51 4 * Version: V1.1
bogdanm 13:0645d8841f51 5 * Date: 17 June 2011
bogdanm 13:0645d8841f51 6 *
bogdanm 13:0645d8841f51 7 * Copyright (C) 2011 ARM Limited. All rights reserved.
bogdanm 13:0645d8841f51 8 * ARM Limited (ARM) is supplying this software for use with Cortex-M3/M4
bogdanm 13:0645d8841f51 9 * processor based microcontrollers. This file can be freely distributed
bogdanm 13:0645d8841f51 10 * within development tools that are supporting such ARM based processors.
bogdanm 13:0645d8841f51 11 *
bogdanm 13:0645d8841f51 12 * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
bogdanm 13:0645d8841f51 13 * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
bogdanm 13:0645d8841f51 14 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
bogdanm 13:0645d8841f51 15 * ARM SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR
bogdanm 13:0645d8841f51 16 * CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
bogdanm 13:0645d8841f51 17 */
bogdanm 13:0645d8841f51 18 .syntax unified
bogdanm 13:0645d8841f51 19 .arch armv7-m
bogdanm 13:0645d8841f51 20
bogdanm 13:0645d8841f51 21 /* Memory Model
bogdanm 13:0645d8841f51 22 The HEAP starts at the end of the DATA section and grows upward.
bogdanm 13:0645d8841f51 23
bogdanm 13:0645d8841f51 24 The STACK starts at the end of the RAM and grows downward.
bogdanm 13:0645d8841f51 25
bogdanm 13:0645d8841f51 26 The HEAP and stack STACK are only checked at compile time:
bogdanm 13:0645d8841f51 27 (DATA_SIZE + HEAP_SIZE + STACK_SIZE) < RAM_SIZE
bogdanm 13:0645d8841f51 28
bogdanm 13:0645d8841f51 29 This is just a check for the bare minimum for the Heap+Stack area before
bogdanm 13:0645d8841f51 30 aborting compilation, it is not the run time limit:
bogdanm 13:0645d8841f51 31 Heap_Size + Stack_Size = 0x80 + 0x80 = 0x100
bogdanm 13:0645d8841f51 32 */
bogdanm 13:0645d8841f51 33 .section .stack
bogdanm 13:0645d8841f51 34 .align 3
bogdanm 13:0645d8841f51 35 #ifdef __STACK_SIZE
bogdanm 13:0645d8841f51 36 .equ Stack_Size, __STACK_SIZE
bogdanm 13:0645d8841f51 37 #else
bogdanm 13:0645d8841f51 38 .equ Stack_Size, 0xc00
bogdanm 13:0645d8841f51 39 #endif
bogdanm 13:0645d8841f51 40 .globl __StackTop
bogdanm 13:0645d8841f51 41 .globl __StackLimit
bogdanm 13:0645d8841f51 42 __StackLimit:
bogdanm 13:0645d8841f51 43 .space Stack_Size
bogdanm 13:0645d8841f51 44 .size __StackLimit, . - __StackLimit
bogdanm 13:0645d8841f51 45 __StackTop:
bogdanm 13:0645d8841f51 46 .size __StackTop, . - __StackTop
bogdanm 13:0645d8841f51 47
bogdanm 13:0645d8841f51 48 .section .heap
bogdanm 13:0645d8841f51 49 .align 3
bogdanm 13:0645d8841f51 50 #ifdef __HEAP_SIZE
bogdanm 13:0645d8841f51 51 .equ Heap_Size, __HEAP_SIZE
bogdanm 13:0645d8841f51 52 #else
bogdanm 13:0645d8841f51 53 .equ Heap_Size, 0x800
bogdanm 13:0645d8841f51 54 #endif
bogdanm 13:0645d8841f51 55 .globl __HeapBase
bogdanm 13:0645d8841f51 56 .globl __HeapLimit
bogdanm 13:0645d8841f51 57 __HeapBase:
bogdanm 13:0645d8841f51 58 .space Heap_Size
bogdanm 13:0645d8841f51 59 .size __HeapBase, . - __HeapBase
bogdanm 13:0645d8841f51 60 __HeapLimit:
bogdanm 13:0645d8841f51 61 .size __HeapLimit, . - __HeapLimit
bogdanm 13:0645d8841f51 62
bogdanm 13:0645d8841f51 63 .section .isr_vector
bogdanm 13:0645d8841f51 64 .align 2
bogdanm 13:0645d8841f51 65 .globl __isr_vector
bogdanm 13:0645d8841f51 66 __isr_vector:
bogdanm 13:0645d8841f51 67 .long __StackTop /* Top of Stack */
bogdanm 13:0645d8841f51 68 .long Reset_Handler /* Reset Handler */
bogdanm 13:0645d8841f51 69 .long NMI_Handler /* NMI Handler */
bogdanm 13:0645d8841f51 70 .long HardFault_Handler /* Hard Fault Handler */
bogdanm 13:0645d8841f51 71 .long MemManage_Handler /* MPU Fault Handler */
bogdanm 13:0645d8841f51 72 .long BusFault_Handler /* Bus Fault Handler */
bogdanm 13:0645d8841f51 73 .long UsageFault_Handler /* Usage Fault Handler */
bogdanm 13:0645d8841f51 74 .long 0 /* Reserved */
bogdanm 13:0645d8841f51 75 .long 0 /* Reserved */
bogdanm 13:0645d8841f51 76 .long 0 /* Reserved */
bogdanm 13:0645d8841f51 77 .long 0 /* Reserved */
bogdanm 13:0645d8841f51 78 .long SVC_Handler /* SVCall Handler */
bogdanm 13:0645d8841f51 79 .long DebugMon_Handler /* Debug Monitor Handler */
bogdanm 13:0645d8841f51 80 .long 0 /* Reserved */
bogdanm 13:0645d8841f51 81 .long PendSV_Handler /* PendSV Handler */
bogdanm 13:0645d8841f51 82 .long SysTick_Handler /* SysTick Handler */
bogdanm 13:0645d8841f51 83
bogdanm 13:0645d8841f51 84
bogdanm 13:0645d8841f51 85 .long PIN_INT0_Handler /* All GPIO pin can be routed to PIN_INTx */
bogdanm 13:0645d8841f51 86 .long PIN_INT1_Handler
bogdanm 13:0645d8841f51 87 .long PIN_INT2_Handler
bogdanm 13:0645d8841f51 88 .long PIN_INT3_Handler
bogdanm 13:0645d8841f51 89 .long PIN_INT4_Handler
bogdanm 13:0645d8841f51 90 .long PIN_INT5_Handler
bogdanm 13:0645d8841f51 91 .long PIN_INT6_Handler
bogdanm 13:0645d8841f51 92 .long PIN_INT7_Handler
bogdanm 13:0645d8841f51 93 .long GINT0_Handler
bogdanm 13:0645d8841f51 94 .long GINT1_Handler /* PIO0 (0:7) */
bogdanm 13:0645d8841f51 95 .long 0
bogdanm 13:0645d8841f51 96 .long 0
bogdanm 13:0645d8841f51 97 .long OSTIMER_Handler
bogdanm 13:0645d8841f51 98 .long 0
bogdanm 13:0645d8841f51 99 .long SSP1_Handler /* SSP1 */
bogdanm 13:0645d8841f51 100 .long I2C_Handler /* I2C */
bogdanm 13:0645d8841f51 101 .long CT16B0_Handler /* 16-bit Timer0 */
bogdanm 13:0645d8841f51 102 .long CT16B1_Handler /* 16-bit Timer1 */
bogdanm 13:0645d8841f51 103 .long CT32B0_Handler /* 32-bit Timer0 */
bogdanm 13:0645d8841f51 104 .long CT32B1_Handler /* 32-bit Timer1 */
bogdanm 13:0645d8841f51 105 .long SSP0_Handler /* SSP0 */
bogdanm 13:0645d8841f51 106 .long USART_Handler /* USART */
bogdanm 13:0645d8841f51 107 .long USB_Handler /* USB IRQ */
bogdanm 13:0645d8841f51 108 .long USB_FIQHandler /* USB FIQ */
bogdanm 13:0645d8841f51 109 .long ADC_Handler /* A/D Converter */
bogdanm 13:0645d8841f51 110 .long WDT_Handler /* Watchdog timer */
bogdanm 13:0645d8841f51 111 .long BOD_Handler /* Brown Out Detect */
bogdanm 13:0645d8841f51 112 .long FMC_Handler /* IP2111 Flash Memory Controller */
bogdanm 13:0645d8841f51 113 .long OSCFAIL_Handler /* OSC FAIL */
bogdanm 13:0645d8841f51 114 .long PVTCIRCUIT_Handler /* PVT CIRCUIT */
bogdanm 13:0645d8841f51 115 .long USBWakeup_Handler /* USB wake up */
bogdanm 13:0645d8841f51 116 .long 0
bogdanm 13:0645d8841f51 117
bogdanm 13:0645d8841f51 118 .size __isr_vector, . - __isr_vector
bogdanm 13:0645d8841f51 119
bogdanm 13:0645d8841f51 120 .text
bogdanm 13:0645d8841f51 121 .thumb
bogdanm 13:0645d8841f51 122 .thumb_func
bogdanm 13:0645d8841f51 123 .align 2
bogdanm 13:0645d8841f51 124 .globl Reset_Handler
bogdanm 13:0645d8841f51 125 .type Reset_Handler, %function
bogdanm 13:0645d8841f51 126 Reset_Handler:
bogdanm 13:0645d8841f51 127 /* Loop to copy data from read only memory to RAM. The ranges
bogdanm 13:0645d8841f51 128 * of copy from/to are specified by following symbols evaluated in
bogdanm 13:0645d8841f51 129 * linker script.
bogdanm 13:0645d8841f51 130 * _etext: End of code section, i.e., begin of data sections to copy from.
bogdanm 13:0645d8841f51 131 * __data_start__/__data_end__: RAM address range that data should be
bogdanm 13:0645d8841f51 132 * copied to. Both must be aligned to 4 bytes boundary. */
bogdanm 13:0645d8841f51 133
bogdanm 13:0645d8841f51 134 ldr r1, =__etext
bogdanm 13:0645d8841f51 135 ldr r2, =__data_start__
bogdanm 13:0645d8841f51 136 ldr r3, =__data_end__
bogdanm 13:0645d8841f51 137
mbed_official 66:64ad953ee6c3 138 .Lflash_to_ram_loop:
bogdanm 13:0645d8841f51 139 cmp r2, r3
bogdanm 13:0645d8841f51 140 ittt lt
bogdanm 13:0645d8841f51 141 ldrlt r0, [r1], #4
bogdanm 13:0645d8841f51 142 strlt r0, [r2], #4
mbed_official 66:64ad953ee6c3 143 blt .Lflash_to_ram_loop
bogdanm 13:0645d8841f51 144
bogdanm 13:0645d8841f51 145 ldr r0, =SystemInit
bogdanm 13:0645d8841f51 146 blx r0
bogdanm 13:0645d8841f51 147 ldr r0, =_start
bogdanm 13:0645d8841f51 148 bx r0
bogdanm 13:0645d8841f51 149 .pool
bogdanm 13:0645d8841f51 150 .size Reset_Handler, . - Reset_Handler
bogdanm 13:0645d8841f51 151
mbed_official 66:64ad953ee6c3 152 .text
bogdanm 13:0645d8841f51 153 /* Macro to define default handlers. Default handler
bogdanm 13:0645d8841f51 154 * will be weak symbol and just dead loops. They can be
bogdanm 13:0645d8841f51 155 * overwritten by other handlers */
bogdanm 13:0645d8841f51 156 .macro def_default_handler handler_name
bogdanm 13:0645d8841f51 157 .align 1
bogdanm 13:0645d8841f51 158 .thumb_func
bogdanm 13:0645d8841f51 159 .weak \handler_name
bogdanm 13:0645d8841f51 160 .type \handler_name, %function
bogdanm 13:0645d8841f51 161 \handler_name :
bogdanm 13:0645d8841f51 162 b .
bogdanm 13:0645d8841f51 163 .size \handler_name, . - \handler_name
bogdanm 13:0645d8841f51 164 .endm
mbed_official 66:64ad953ee6c3 165
bogdanm 13:0645d8841f51 166 def_default_handler NMI_Handler
bogdanm 13:0645d8841f51 167 def_default_handler HardFault_Handler
bogdanm 13:0645d8841f51 168 def_default_handler MemManage_Handler
bogdanm 13:0645d8841f51 169 def_default_handler BusFault_Handler
bogdanm 13:0645d8841f51 170 def_default_handler UsageFault_Handler
bogdanm 13:0645d8841f51 171 def_default_handler SVC_Handler
bogdanm 13:0645d8841f51 172 def_default_handler DebugMon_Handler
bogdanm 13:0645d8841f51 173 def_default_handler PendSV_Handler
bogdanm 13:0645d8841f51 174 def_default_handler SysTick_Handler
bogdanm 13:0645d8841f51 175 def_default_handler Default_Handler
bogdanm 13:0645d8841f51 176
mbed_official 66:64ad953ee6c3 177 .macro def_irq_default_handler handler_name
mbed_official 66:64ad953ee6c3 178 .weak \handler_name
mbed_official 66:64ad953ee6c3 179 .set \handler_name, Default_Handler
mbed_official 66:64ad953ee6c3 180 .endm
bogdanm 13:0645d8841f51 181
mbed_official 66:64ad953ee6c3 182 def_irq_default_handler PIN_INT0_Handler
mbed_official 66:64ad953ee6c3 183 def_irq_default_handler PIN_INT1_Handler
mbed_official 66:64ad953ee6c3 184 def_irq_default_handler PIN_INT2_Handler
mbed_official 66:64ad953ee6c3 185 def_irq_default_handler PIN_INT3_Handler
mbed_official 66:64ad953ee6c3 186 def_irq_default_handler PIN_INT4_Handler
mbed_official 66:64ad953ee6c3 187 def_irq_default_handler PIN_INT5_Handler
mbed_official 66:64ad953ee6c3 188 def_irq_default_handler PIN_INT6_Handler
mbed_official 66:64ad953ee6c3 189 def_irq_default_handler PIN_INT7_Handler
mbed_official 66:64ad953ee6c3 190 def_irq_default_handler GINT0_Handler
mbed_official 66:64ad953ee6c3 191 def_irq_default_handler GINT1_Handler
mbed_official 66:64ad953ee6c3 192 def_irq_default_handler OSTIMER_Handler
mbed_official 66:64ad953ee6c3 193 def_irq_default_handler SSP1_Handler
mbed_official 66:64ad953ee6c3 194 def_irq_default_handler I2C_Handler
mbed_official 66:64ad953ee6c3 195 def_irq_default_handler CT16B0_Handler
mbed_official 66:64ad953ee6c3 196 def_irq_default_handler CT16B1_Handler
mbed_official 66:64ad953ee6c3 197 def_irq_default_handler CT32B0_Handler
mbed_official 66:64ad953ee6c3 198 def_irq_default_handler CT32B1_Handler
mbed_official 66:64ad953ee6c3 199 def_irq_default_handler SSP0_Handler
mbed_official 66:64ad953ee6c3 200 def_irq_default_handler USART_Handler
mbed_official 66:64ad953ee6c3 201 def_irq_default_handler USB_Handler
mbed_official 66:64ad953ee6c3 202 def_irq_default_handler USB_FIQHandler
mbed_official 66:64ad953ee6c3 203 def_irq_default_handler ADC_Handler
mbed_official 66:64ad953ee6c3 204 def_irq_default_handler WDT_Handler
mbed_official 66:64ad953ee6c3 205 def_irq_default_handler BOD_Handler
mbed_official 66:64ad953ee6c3 206 def_irq_default_handler FMC_Handler
mbed_official 66:64ad953ee6c3 207 def_irq_default_handler OSCFAIL_Handler
mbed_official 66:64ad953ee6c3 208 def_irq_default_handler PVTCIRCUIT_Handler
mbed_official 66:64ad953ee6c3 209 def_irq_default_handler USBWakeup_Handler
mbed_official 66:64ad953ee6c3 210 def_irq_default_handler DEF_IRQHandler
bogdanm 13:0645d8841f51 211
bogdanm 13:0645d8841f51 212 .end
bogdanm 13:0645d8841f51 213