sdg.c

00001 /*******************************************************************************
00002 * DISCLAIMER
00003 * This software is supplied by Renesas Electronics Corporation and is only
00004 * intended for use with Renesas products. No other uses are authorized. This
00005 * software is owned by Renesas Electronics Corporation and is protected under
00006 * all applicable laws, including copyright laws.
00007 * THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING
00008 * THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT
00009 * LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE
00010 * AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.
00011 * TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS
00012 * ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE
00013 * FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR
00014 * ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE
00015 * BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
00016 * Renesas reserves the right, without notice, to make changes to this software
00017 * and to discontinue the availability of this software. By using this software,
00018 * you agree to the additional terms and conditions found by accessing the
00019 * following link:
00020 * http://www.renesas.com/disclaimer
00021 * Copyright (C) 2012 - 2015 Renesas Electronics Corporation. All rights reserved.
00022 *******************************************************************************/
00023 
00024 /******************************************************************************
00025 Includes   <System Includes> , "Project Includes"
00026 ******************************************************************************/
00027 #include <stdint.h>
00028 #include "dev_drv.h"                    /* Device Driver common header */
00029 #include "devdrv_sdg.h"                 /* SDG Driver header */
00030 #include "iodefine.h"
00031 #include "gpio_iobitmask.h"
00032 #include "sdg_iobitmask.h"
00033 #include "rza_io_regrw.h"
00034 
00035 /******************************************************************************
00036 Typedef definitions
00037 ******************************************************************************/
00038 typedef int32_t (*Userdef_Open)(void);
00039 typedef int32_t (*Userdef_Close)(void);
00040 
00041 /******************************************************************************
00042 Macro definitions
00043 ******************************************************************************/
00044 #define REGW8(CH, REG, BIT, VAL) RZA_IO_RegWrite_8(&CH->REG, VAL, SDGn_##REG##_##BIT##_SHIFT, SDGn_##REG##_##BIT)
00045 
00046 /******************************************************************************
00047 Imported global variables and functions (from other files)
00048 ******************************************************************************/
00049 
00050 
00051 /******************************************************************************
00052 Exported global variables and functions (to be accessed by other files)
00053 ******************************************************************************/
00054 
00055 
00056 /******************************************************************************
00057 Private global variables and functions
00058 ******************************************************************************/
00059 static struct st_sdg * const stSDG[SDG_CH_TOTAL] = {
00060     &SDG0,
00061     &SDG1,
00062     &SDG2,
00063     &SDG3,
00064 };
00065 
00066 
00067 /******************************************************************************
00068 * Function Name: R_SDG_Open
00069 * Description  : Start the SDG specified by the argument channel.
00070 * Arguments    : uint32_t channel  : SDG channel (0, 1, 2, or 3)
00071 *              : R_SDG_CLOCK clock : SGCLK
00072 * Return Value : DEVDRV_SUCCESS    : Success to start counting SDG
00073 *              : DEVDRV_ERROR      : Failure
00074 ******************************************************************************/
00075 int32_t R_SDG_Open(uint32_t channel, R_SDG_CLOCK clock)
00076 {
00077     static const Userdef_Open   userdef_open[SDG_CH_TOTAL] = {
00078         &Userdef_SDG0_Open,
00079         &Userdef_SDG1_Open,
00080         &Userdef_SDG2_Open,
00081         &Userdef_SDG3_Open,
00082     };
00083     int32_t ret = DEVDRV_SUCCESS;
00084 
00085 
00086     /* check argument */
00087     if (channel >= SDG_CH_TOTAL) {
00088         return DEVDRV_ERROR;        /* argument error */
00089     }
00090 
00091     /* ==== SDG initialization ==== */
00092     ret = userdef_open[channel]();
00093     if (DEVDRV_SUCCESS == ret) {
00094         /* ==== Start SDG ==== */
00095         REGW8(stSDG[channel], SGCR1, STPM, 1);                /* set SDG deactivate method: none */
00096         REGW8(stSDG[channel], SGCR1, SGCK, (uint8_t)clock);   /* clock */
00097         REGW8(stSDG[channel], SGCSR, SGIE, 0);                /* interrupt: disabled */
00098     }
00099 
00100     return ret;
00101 }
00102 
00103 /******************************************************************************
00104 * Function Name: R_SDG_Close
00105 * Description  : Stop the SDG specified by the argument channel.
00106 * Arguments    : uint32_t channel : SDG channel (0, 1, 2 or 3)
00107 * Return Value : DEVDRV_SUCCESS   : Success to stop counting SDG
00108 *              : DEVDRV_ERROR     : Failure
00109 ******************************************************************************/
00110 int32_t R_SDG_Close(uint32_t channel)
00111 {
00112     static const Userdef_Close    userdef_close[SDG_CH_TOTAL] = {
00113         &Userdef_SDG0_Close,
00114         &Userdef_SDG1_Close,
00115         &Userdef_SDG2_Close,
00116         &Userdef_SDG3_Close,
00117     };
00118     int32_t ret = DEVDRV_SUCCESS;
00119 
00120     /* check argument */
00121     if (channel >= SDG_CH_TOTAL) {
00122         return DEVDRV_ERROR;        /* Argument error */
00123     }
00124 
00125     /* ==== SDG finalization ==== */
00126     ret = userdef_close[channel]();
00127 
00128     return ret;
00129 }
00130 
00131 
00132 /******************************************************************************
00133 * Function Name: R_SDG_Tone
00134 * Description  : Set freqency registers
00135 * Arguments    : uint32_t channel : SDG channel (0, 1, 2 or 3)
00136 *              : NOTE *note       : a note parameters
00137 * Return Value : DEVDRV_SUCCESS   : Success to play a note
00138 *              : DEVDRV_ERROR     : Failure
00139 ******************************************************************************/
00140 int32_t R_SDG_Tone(uint32_t channel, NOTE *note)
00141 {
00142     uint16_t    tone;
00143     uint16_t    sfs;
00144     uint16_t    loud;
00145     uint16_t    att;
00146     int32_t     ret = DEVDRV_SUCCESS;
00147 
00148 
00149     /* check parameter */
00150     if ((channel >= SDG_CH_TOTAL) || (note->tone > SDG_TONE_MAX)) {
00151         return DEVDRV_ERROR;        /* Argument error */
00152     }
00153 
00154     tone = (0 == note->tone) ? (1): (note->tone);
00155     sfs  = (0 == note->sfs ) ? (1): (note->sfs);
00156     loud = note->loud;
00157     att  = note->attenuation;
00158 
00159     /* ==== Set frequency registers ==== */
00160     /* start sgd */
00161     REGW8(stSDG[channel], SGCR1, SGST,  1);         /* start sgd */
00162     REGW8(stSDG[channel], SGCR2, SGEND, 0);         /* stop bit : continue */
00163     /* enable SGTFR / SGSFR register to write */
00164     REGW8(stSDG[channel], SGCR2, TCHG,  1);         /* change : enable */
00165     /* set each parameter */
00166     REGW8(stSDG[channel], SGTFR, TONE,  tone);      /* tone */
00167     REGW8(stSDG[channel], SGSFR, SFS,   sfs);       /* sfs */
00168     REGW8(stSDG[channel], SGLR,  LD,    loud);      /* loud */
00169     REGW8(stSDG[channel], SGCR1, DPF,   att);       /* attenuation */
00170     if (note->attenuation != 0) {
00171         REGW8(stSDG[channel], SGCR1, SGST, 0);      /* stop sgd */
00172     }
00173 
00174     return ret;
00175 }
00176 
00177 /* End of File */