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ssif_cfg.c

00001 /*******************************************************************************
00002 * DISCLAIMER
00003 * This software is supplied by Renesas Electronics Corporation and is only
00004 * intended for use with Renesas products. No other uses are authorized. This
00005 * software is owned by Renesas Electronics Corporation and is protected under
00006 * all applicable laws, including copyright laws.
00007 * THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING
00008 * THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT
00009 * LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE
00010 * AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.
00011 * TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS
00012 * ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE
00013 * FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR
00014 * ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE
00015 * BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
00016 * Renesas reserves the right, without notice, to make changes to this software
00017 * and to discontinue the availability of this software. By using this software,
00018 * you agree to the additional terms and conditions found by accessing the
00019 * following link:
00020 * http://www.renesas.com/disclaimer
00021 * Copyright (C) 2013-2014 Renesas Electronics Corporation. All rights reserved.
00022 *******************************************************************************/
00023 
00024 /*******************************************************************************
00025 * File Name   : ssif_cfg.c
00026 * $Rev: 1674 $
00027 * $Date:: 2015-05-29 16:35:57 +0900#$
00028 * Description : SSIF driver userown functions
00029 ******************************************************************************/
00030 
00031 /*******************************************************************************
00032 Includes <System Includes>, "Project Includes"
00033 *******************************************************************************/
00034 #include "dma_if.h"
00035 #include "ssif_if.h"
00036 #include "iodefine.h"
00037 #include "Renesas_RZ_A1.h"
00038 
00039 /*******************************************************************************
00040 Macro definitions
00041 *******************************************************************************/
00042 
00043 /***** Audio Clock Source Configurations *****/
00044 /* AUDIO_X1 : Connect to CPU Board X8(22579200Hz) */
00045 #define SSIF_AUDIO_X1  (22579200u)
00046 
00047 /* AUDIO_CLK: Connect to option board J7(no clock on board) */
00048 #define SSIF_AUDIO_CLK (0u)
00049 
00050 /* SSICR CKDV divieded value */
00051 #define SSIF_AUDIO_CLK_DIV_1    (1u)
00052 #define SSIF_AUDIO_CLK_DIV_2    (2u)
00053 #define SSIF_AUDIO_CLK_DIV_4    (4u)
00054 #define SSIF_AUDIO_CLK_DIV_8    (8u)
00055 #define SSIF_AUDIO_CLK_DIV_16   (16u)
00056 #define SSIF_AUDIO_CLK_DIV_32   (32u)
00057 #define SSIF_AUDIO_CLK_DIV_64   (64u)
00058 #define SSIF_AUDIO_CLK_DIV_128  (128u)
00059 #define SSIF_AUDIO_CLK_DIV_6    (6u)
00060 #define SSIF_AUDIO_CLK_DIV_12   (12u)
00061 #define SSIF_AUDIO_CLK_DIV_24   (24u)
00062 #define SSIF_AUDIO_CLK_DIV_48   (48u)
00063 #define SSIF_AUDIO_CLK_DIV_96   (96u)
00064 
00065 /* SSIF channel number */
00066 #define SSIF_CHNUM_0    (0u)
00067 #define SSIF_CHNUM_1    (1u)
00068 #define SSIF_CHNUM_2    (2u)
00069 #define SSIF_CHNUM_3    (3u)
00070 #define SSIF_CHNUM_4    (4u)
00071 #define SSIF_CHNUM_5    (5u)
00072 
00073 /* misc constant value */
00074 #define SSIF_I2S_LR_CH  (2u)
00075 
00076 /*******************************************************************************
00077 Exported global variables (to be accessed by other files)
00078 *******************************************************************************/
00079 
00080 /******************************************************************************
00081 * Function Name: R_SSIF_Userdef_InitPinMux
00082 * @brief         This function initialise pin multiplex settings.
00083 *
00084 *                Description:<br>
00085 *                R7S72100 Boards depended pin connections bellow<br>
00086 *                Clock settings<br>
00087 *                  AUDIO_X1 : Private use pin(nothing to do)<br>
00088 *                  AUDIO_X2 : No connection<br>
00089 *                  AUDIO_CLK: Working with SSIF5<br>
00090 *                Channel settings<br>
00091 *                  SSIF0    : Fully connected to WM8978<br>
00092 *                  SSIF1    : Read only (NC:SSITxD1) connected to CD Deck<br>
00093 *                  SSIF2    : No connection<br>
00094 *                  SSIF3    : Write only (NC:SSIRxD3) connected to AK4353<br>
00095 *                  SSIF4    : Fully connected to AK4353<br>
00096 *                  SSIF5    : Fully connected to HCI
00097 * @param[in]     ssif_ch      :channel number.
00098 * @retval        ESUCCESS     :Success.
00099 * @retval        error code   :Failure.
00100 ******************************************************************************/
00101 int_t R_SSIF_Userdef_InitPinMux(const uint32_t ssif_ch)
00102 {
00103 #if(1) /* mbed */
00104     UNUSED_ARG(ssif_ch);
00105 
00106     return ESUCCESS;
00107 #else  /* not mbed */
00108     int_t ercd = ESUCCESS;
00109     int_t was_masked;
00110 
00111 #if defined (__ICCARM__)
00112     was_masked = __disable_irq_iar();
00113 #else
00114     was_masked = __disable_irq();
00115 #endif
00116 
00117     /* -> IPA R2.4.2 : This is implicit type conversion that doesn't have bad effect on writing to 16bit register. */
00118     switch (ssif_ch)
00119     {
00120         case SSIF_CHNUM_0:
00121             /* SSISCK0(P4_4, Alternative Mode 5,InputOutput) */
00122             GPIO.PIBC4  &= (uint16_t)~(GPIO_BIT_N4);
00123             GPIO.PBDC4  &= (uint16_t)~(GPIO_BIT_N4);
00124             GPIO.PM4    |= (uint16_t) (GPIO_BIT_N4);
00125             GPIO.PMC4   &= (uint16_t)~(GPIO_BIT_N4);
00126             GPIO.PIPC4  &= (uint16_t)~(GPIO_BIT_N4);
00127 
00128             GPIO.PBDC4  |= (uint16_t) (GPIO_BIT_N4);
00129             GPIO.PFC4   &= (uint16_t)~(GPIO_BIT_N4);
00130             GPIO.PFCE4  &= (uint16_t)~(GPIO_BIT_N4);
00131             GPIO.PFCAE4 |= (uint16_t) (GPIO_BIT_N4);
00132 
00133             GPIO.PIPC4  |= (uint16_t) (GPIO_BIT_N4);
00134             GPIO.PMC4   |= (uint16_t) (GPIO_BIT_N4);
00135 
00136             /* SSIWS0(P4_5, Alternative Mode 5,InputOutput) */
00137             GPIO.PIBC4  &= (uint16_t)~(GPIO_BIT_N5);
00138             GPIO.PBDC4  &= (uint16_t)~(GPIO_BIT_N5);
00139             GPIO.PM4    |= (uint16_t) (GPIO_BIT_N5);
00140             GPIO.PMC4   &= (uint16_t)~(GPIO_BIT_N5);
00141             GPIO.PIPC4  &= (uint16_t)~(GPIO_BIT_N5);
00142 
00143             GPIO.PBDC4  |= (uint16_t) (GPIO_BIT_N5);
00144             GPIO.PFC4   &= (uint16_t)~(GPIO_BIT_N5);
00145             GPIO.PFCE4  &= (uint16_t)~(GPIO_BIT_N5);
00146             GPIO.PFCAE4 |= (uint16_t) (GPIO_BIT_N5);
00147 
00148             GPIO.PIPC4  |= (uint16_t) (GPIO_BIT_N5);
00149             GPIO.PMC4   |= (uint16_t) (GPIO_BIT_N5);
00150 
00151             /* SSIRxD0(P4_6, Alternative Mode 5,Input) */
00152             GPIO.PIBC4  &= (uint16_t)~(GPIO_BIT_N6);
00153             GPIO.PBDC4  &= (uint16_t)~(GPIO_BIT_N6);
00154             GPIO.PM4    |= (uint16_t) (GPIO_BIT_N6);
00155             GPIO.PMC4   &= (uint16_t)~(GPIO_BIT_N6);
00156             GPIO.PIPC4  &= (uint16_t)~(GPIO_BIT_N6);
00157 
00158             GPIO.PBDC4  &= (uint16_t)~(GPIO_BIT_N6);
00159             GPIO.PFC4   &= (uint16_t)~(GPIO_BIT_N6);
00160             GPIO.PFCE4  &= (uint16_t)~(GPIO_BIT_N6);
00161             GPIO.PFCAE4 |= (uint16_t) (GPIO_BIT_N6);
00162 
00163             GPIO.PIPC4  |= (uint16_t) (GPIO_BIT_N6);
00164             GPIO.PMC4   |= (uint16_t) (GPIO_BIT_N6);
00165 
00166             /* SSITxD0(P4_7, Alternative Mode 5,Output) */
00167             GPIO.PIBC4  &= (uint16_t)~(GPIO_BIT_N7);
00168             GPIO.PBDC4  &= (uint16_t)~(GPIO_BIT_N7);
00169             GPIO.PM4    |= (uint16_t) (GPIO_BIT_N7);
00170             GPIO.PMC4   &= (uint16_t)~(GPIO_BIT_N7);
00171             GPIO.PIPC4  &= (uint16_t)~(GPIO_BIT_N7);
00172 
00173             GPIO.PBDC4  &= (uint16_t)~(GPIO_BIT_N7);
00174             GPIO.PFC4   &= (uint16_t)~(GPIO_BIT_N7);
00175             GPIO.PFCE4  &= (uint16_t)~(GPIO_BIT_N7);
00176             GPIO.PFCAE4 |= (uint16_t) (GPIO_BIT_N7);
00177 
00178             GPIO.PMC4   |= (uint16_t) (GPIO_BIT_N7);
00179             GPIO.PM4    &= (uint16_t)~(GPIO_BIT_N7);
00180             break;
00181 
00182         case SSIF_CHNUM_1:
00183             /* SSISCK1(P3_4, Alternative Mode 3,InputOutput) */
00184             GPIO.PIBC3  &= (uint16_t)~(GPIO_BIT_N4);
00185             GPIO.PBDC3  &= (uint16_t)~(GPIO_BIT_N4);
00186             GPIO.PM3    |= (uint16_t) (GPIO_BIT_N4);
00187             GPIO.PMC3   &= (uint16_t)~(GPIO_BIT_N4);
00188             GPIO.PIPC3  &= (uint16_t)~(GPIO_BIT_N4);
00189 
00190             GPIO.PBDC3  |= (uint16_t) (GPIO_BIT_N4);
00191             GPIO.PFC3   &= (uint16_t)~(GPIO_BIT_N4);
00192             GPIO.PFCE3  |= (uint16_t) (GPIO_BIT_N4);
00193             GPIO.PFCAE3 &= (uint16_t)~(GPIO_BIT_N4);
00194 
00195             GPIO.PIPC3  |= (uint16_t) (GPIO_BIT_N4);
00196             GPIO.PMC3   |= (uint16_t) (GPIO_BIT_N4);
00197 
00198             /* SSIWS1(P3_5, Alternative Mode 3,InputOutput) */
00199             GPIO.PIBC3  &= (uint16_t)~(GPIO_BIT_N5);
00200             GPIO.PBDC3  &= (uint16_t)~(GPIO_BIT_N5);
00201             GPIO.PM3    |= (uint16_t) (GPIO_BIT_N5);
00202             GPIO.PMC3   &= (uint16_t)~(GPIO_BIT_N5);
00203             GPIO.PIPC3  &= (uint16_t)~(GPIO_BIT_N5);
00204 
00205             GPIO.PBDC3  |= (uint16_t) (GPIO_BIT_N5);
00206             GPIO.PFC3   &= (uint16_t)~(GPIO_BIT_N5);
00207             GPIO.PFCE3  |= (uint16_t) (GPIO_BIT_N5);
00208             GPIO.PFCAE3 &= (uint16_t)~(GPIO_BIT_N5);
00209 
00210             GPIO.PIPC3 |=  (uint16_t) (GPIO_BIT_N5);
00211             GPIO.PMC3   |= (uint16_t) (GPIO_BIT_N5);
00212 
00213             /* SSIRxD1(P3_6, Alternative Mode 3,Input) */
00214             GPIO.PIBC3  &= (uint16_t)~(GPIO_BIT_N6);
00215             GPIO.PBDC3  &= (uint16_t)~(GPIO_BIT_N6);
00216             GPIO.PM3    |= (uint16_t) (GPIO_BIT_N6);
00217             GPIO.PMC3   &= (uint16_t)~(GPIO_BIT_N6);
00218             GPIO.PIPC3  &= (uint16_t)~(GPIO_BIT_N6);
00219 
00220             GPIO.PBDC3  &= (uint16_t)~(GPIO_BIT_N6);
00221             GPIO.PFC3   &= (uint16_t)~(GPIO_BIT_N6);
00222             GPIO.PFCE3  |= (uint16_t) (GPIO_BIT_N6);
00223             GPIO.PFCAE3 &= (uint16_t)~(GPIO_BIT_N6);
00224 
00225             GPIO.PIPC3  |= (uint16_t) (GPIO_BIT_N6);
00226             GPIO.PMC3   |= (uint16_t) (GPIO_BIT_N6);
00227 
00228             /* SSITxD1:  no connection */
00229             break;
00230 
00231         case SSIF_CHNUM_2:
00232             /* SSISCK2:  no connection */
00233             /* SSIWS2:   no connection */
00234             /* SSIDATA2: no connection */
00235             break;
00236 
00237         case SSIF_CHNUM_3:
00238             /* SSISCK3(P4_12, Alternative Mode 6,InputOutput) */
00239             GPIO.PIBC4  &= (uint16_t)~(GPIO_BIT_N12);
00240             GPIO.PBDC4  &= (uint16_t)~(GPIO_BIT_N12);
00241             GPIO.PM4    |= (uint16_t) (GPIO_BIT_N12);
00242             GPIO.PMC4   &= (uint16_t)~(GPIO_BIT_N12);
00243             GPIO.PIPC4  &= (uint16_t)~(GPIO_BIT_N12);
00244 
00245             GPIO.PBDC4  |= (uint16_t) (GPIO_BIT_N12);
00246             GPIO.PFC4   |= (uint16_t) (GPIO_BIT_N12);
00247             GPIO.PFCE4  &= (uint16_t)~(GPIO_BIT_N12);
00248             GPIO.PFCAE4 |= (uint16_t) (GPIO_BIT_N12);
00249 
00250             GPIO.PIPC4  |= (uint16_t) GPIO_BIT_N12;
00251             GPIO.PMC4   |= (uint16_t) (GPIO_BIT_N12);
00252 
00253             /* SSIWS3(P4_13, Alternative Mode 6,InputOutput) */
00254             GPIO.PIBC4  &= (uint16_t)~(GPIO_BIT_N13);
00255             GPIO.PBDC4  &= (uint16_t)~(GPIO_BIT_N13);
00256             GPIO.PM4    |= (uint16_t) (GPIO_BIT_N13);
00257             GPIO.PMC4   &= (uint16_t)~(GPIO_BIT_N13);
00258             GPIO.PIPC4  &= (uint16_t)~(GPIO_BIT_N13);
00259 
00260             GPIO.PBDC4  |= (uint16_t) (GPIO_BIT_N13);
00261             GPIO.PFC4   |= (uint16_t) (GPIO_BIT_N13);
00262             GPIO.PFCE4  &= (uint16_t)~(GPIO_BIT_N13);
00263             GPIO.PFCAE4 |= (uint16_t) (GPIO_BIT_N13);
00264 
00265             GPIO.PIPC4  |= (uint16_t) (GPIO_BIT_N13);
00266             GPIO.PMC4   |= (uint16_t) (GPIO_BIT_N13);
00267 
00268             /* SSIRxD3:  no connection */
00269 
00270             /* SSITxD3(P4_15, Alternative Mode 6,Output) */
00271             GPIO.PIBC4  &= (uint16_t)~(GPIO_BIT_N15);
00272             GPIO.PBDC4  &= (uint16_t)~(GPIO_BIT_N15);
00273             GPIO.PM4    |= (uint16_t) (GPIO_BIT_N15);
00274             GPIO.PMC4   &= (uint16_t)~(GPIO_BIT_N15);
00275             GPIO.PIPC4  &= (uint16_t)~(GPIO_BIT_N15);
00276 
00277             GPIO.PBDC4  &= (uint16_t)~(GPIO_BIT_N15);
00278             GPIO.PFC4   |= (uint16_t) (GPIO_BIT_N15);
00279             GPIO.PFCE4  &= (uint16_t)~(GPIO_BIT_N15);
00280             GPIO.PFCAE4 |= (uint16_t) (GPIO_BIT_N15);
00281 
00282             GPIO.PMC4   |= (uint16_t) (GPIO_BIT_N15);
00283             GPIO.PM4    &= (uint16_t)~(GPIO_BIT_N15);
00284             break;
00285 
00286         case SSIF_CHNUM_4:
00287             /* SSISCK4(P11_4, Alternative Mode 3,InputOutput) */
00288             GPIO.PIBC11  &= (uint16_t)~(GPIO_BIT_N4);
00289             GPIO.PBDC11  &= (uint16_t)~(GPIO_BIT_N4);
00290             GPIO.PM11    |= (uint16_t) (GPIO_BIT_N4);
00291             GPIO.PMC11   &= (uint16_t)~(GPIO_BIT_N4);
00292             GPIO.PIPC11  &= (uint16_t)~(GPIO_BIT_N4);
00293 
00294             GPIO.PBDC11  |= (uint16_t) (GPIO_BIT_N4);
00295             GPIO.PFC11   &= (uint16_t)~(GPIO_BIT_N4);
00296             GPIO.PFCE11  |= (uint16_t) (GPIO_BIT_N4);
00297             GPIO.PFCAE11 &= (uint16_t)~(GPIO_BIT_N4);
00298 
00299             GPIO.PIPC11  |= (uint16_t) (GPIO_BIT_N4);
00300             GPIO.PMC11   |= (uint16_t) (GPIO_BIT_N4);
00301 
00302             /* SSIWS4(P11_5, Alternative Mode 3,InputOutput) */
00303             GPIO.PIBC11  &= (uint16_t)~(GPIO_BIT_N5);
00304             GPIO.PBDC11  &= (uint16_t)~(GPIO_BIT_N5);
00305             GPIO.PM11    |= (uint16_t) (GPIO_BIT_N5);
00306             GPIO.PMC11   &= (uint16_t)~(GPIO_BIT_N5);
00307             GPIO.PIPC11  &= (uint16_t)~(GPIO_BIT_N5);
00308 
00309             GPIO.PBDC11  |= (uint16_t) (GPIO_BIT_N5);
00310             GPIO.PFC11   &= (uint16_t)~(GPIO_BIT_N5);
00311             GPIO.PFCE11  |= (uint16_t) (GPIO_BIT_N5);
00312             GPIO.PFCAE11 &= (uint16_t)~(GPIO_BIT_N5);
00313 
00314             GPIO.PIPC11  |= (uint16_t) GPIO_BIT_N5;
00315             GPIO.PMC11   |= (uint16_t) (GPIO_BIT_N5);
00316 
00317             /* SSIDATA4(P11_6, Alternative Mode 3,InputOutput) */
00318             GPIO.PIBC11  &= (uint16_t)~(GPIO_BIT_N6);
00319             GPIO.PBDC11  &= (uint16_t)~(GPIO_BIT_N6);
00320             GPIO.PM11    |= (uint16_t) (GPIO_BIT_N6);
00321             GPIO.PMC11   &= (uint16_t)~(GPIO_BIT_N6);
00322             GPIO.PIPC11  &= (uint16_t)~(GPIO_BIT_N6);
00323 
00324             GPIO.PBDC11  |= (uint16_t) (GPIO_BIT_N6);
00325             GPIO.PFC11   &= (uint16_t)~(GPIO_BIT_N6);
00326             GPIO.PFCE11  |= (uint16_t) (GPIO_BIT_N6);
00327             GPIO.PFCAE11 &= (uint16_t)~(GPIO_BIT_N6);
00328 
00329             GPIO.PIPC11  |= (uint16_t) (GPIO_BIT_N6);
00330             GPIO.PMC11   |= (uint16_t) (GPIO_BIT_N6);
00331             break;
00332 
00333         case SSIF_CHNUM_5:
00334             /* SSISCK5(P2_4, Alternative Mode 4,InputOutput) */
00335             GPIO.PIBC2  &= (uint16_t)~(GPIO_BIT_N4);
00336             GPIO.PBDC2  &= (uint16_t)~(GPIO_BIT_N4);
00337             GPIO.PM2    |= (uint16_t) (GPIO_BIT_N4);
00338             GPIO.PMC2   &= (uint16_t)~(GPIO_BIT_N4);
00339             GPIO.PIPC2  &= (uint16_t)~(GPIO_BIT_N4);
00340 
00341             GPIO.PBDC2  |= (uint16_t) (GPIO_BIT_N4);
00342             GPIO.PFC2   |= (uint16_t) (GPIO_BIT_N4);
00343             GPIO.PFCE2  |= (uint16_t) (GPIO_BIT_N4);
00344             GPIO.PFCAE2 &= (uint16_t)~(GPIO_BIT_N4);
00345 
00346             GPIO.PIPC2  |= (uint16_t) (GPIO_BIT_N4);
00347             GPIO.PMC2   |= (uint16_t) (GPIO_BIT_N4);
00348 
00349             /* SSIWS5(P2_5, Alternative Mode 4,InputOutput) */
00350             GPIO.PIBC2  &= (uint16_t)~(GPIO_BIT_N5);
00351             GPIO.PBDC2  &= (uint16_t)~(GPIO_BIT_N5);
00352             GPIO.PM2    |= (uint16_t) (GPIO_BIT_N5);
00353             GPIO.PMC2   &= (uint16_t)~(GPIO_BIT_N5);
00354             GPIO.PIPC2  &= (uint16_t)~(GPIO_BIT_N5);
00355 
00356             GPIO.PBDC2  |= (uint16_t) (GPIO_BIT_N5);
00357             GPIO.PFC2   |= (uint16_t) (GPIO_BIT_N5);
00358             GPIO.PFCE2  |= (uint16_t) (GPIO_BIT_N5);
00359             GPIO.PFCAE2 &= (uint16_t)~(GPIO_BIT_N5);
00360 
00361             GPIO.PIPC2  |= (uint16_t) (GPIO_BIT_N5);
00362             GPIO.PMC2   |= (uint16_t) (GPIO_BIT_N5);
00363 
00364             /* SSIRxD5(P2_6, Alternative Mode 4,Input) */
00365             GPIO.PIBC2  &= (uint16_t)~(GPIO_BIT_N6);
00366             GPIO.PBDC2  &= (uint16_t)~(GPIO_BIT_N6);
00367             GPIO.PM2    |= (uint16_t) (GPIO_BIT_N6);
00368             GPIO.PMC2   &= (uint16_t)~(GPIO_BIT_N6);
00369             GPIO.PIPC2  &= (uint16_t)~(GPIO_BIT_N6);
00370 
00371             GPIO.PBDC2  &= (uint16_t)~(GPIO_BIT_N6);
00372             GPIO.PFC2   |= (uint16_t) (GPIO_BIT_N6);
00373             GPIO.PFCE2  |= (uint16_t) (GPIO_BIT_N6);
00374             GPIO.PFCAE2 &= (uint16_t)~(GPIO_BIT_N6);
00375 
00376             GPIO.PIPC2  |= (uint16_t) (GPIO_BIT_N6);
00377             GPIO.PMC2   |= (uint16_t) (GPIO_BIT_N6);
00378 
00379             /* SSITxD5(P2_7, Alternative Mode 4,Output) */
00380             GPIO.PIBC2  &= (uint16_t)~(GPIO_BIT_N7);
00381             GPIO.PBDC2  &= (uint16_t)~(GPIO_BIT_N7);
00382             GPIO.PM2    |= (uint16_t) (GPIO_BIT_N7);
00383             GPIO.PMC2   &= (uint16_t)~(GPIO_BIT_N7);
00384             GPIO.PIPC2  &= (uint16_t)~(GPIO_BIT_N7);
00385 
00386             GPIO.PBDC2  &= (uint16_t)~(GPIO_BIT_N7);
00387             GPIO.PFC2   |= (uint16_t) (GPIO_BIT_N7);
00388             GPIO.PFCE2  |= (uint16_t) (GPIO_BIT_N7);
00389             GPIO.PFCAE2 &= (uint16_t)~(GPIO_BIT_N7);
00390 
00391             GPIO.PMC2   |= (uint16_t) (GPIO_BIT_N7);
00392             GPIO.PM2    &= (uint16_t)~(GPIO_BIT_N7);
00393 
00394             /* AUDIO_CLK(P3_1, Alternative Mode 6,Input) */
00395             GPIO.PIBC3  &= (uint16_t)~(GPIO_BIT_N1);
00396             GPIO.PBDC3  &= (uint16_t)~(GPIO_BIT_N1);
00397             GPIO.PM3    |= (uint16_t) (GPIO_BIT_N1);
00398             GPIO.PMC3   &= (uint16_t)~(GPIO_BIT_N1);
00399             GPIO.PIPC3  &= (uint16_t)~(GPIO_BIT_N1);
00400 
00401             GPIO.PBDC3  &= (uint16_t)~(GPIO_BIT_N1);
00402             GPIO.PFC3   |= (uint16_t) (GPIO_BIT_N1);
00403             GPIO.PFCE3  &= (uint16_t)~(GPIO_BIT_N1);
00404             GPIO.PFCAE3 |= (uint16_t) (GPIO_BIT_N1);
00405 
00406             GPIO.PIPC3  |= (uint16_t) (GPIO_BIT_N1);
00407             GPIO.PMC3   |= (uint16_t) (GPIO_BIT_N1);
00408             break;
00409 
00410         default:
00411             ercd = EINVAL;
00412             break;
00413     }
00414     /* <- IPA R2.4.2 */
00415 
00416     if (0 == was_masked)
00417     {
00418         __enable_irq();
00419     }
00420 
00421     return ercd;
00422 #endif /* end mbed */
00423 }
00424 
00425 /******************************************************************************
00426 * Function Name: R_SSIF_Userdef_SetClockDiv
00427 * @brief         This function make a value of divieded audio clock.
00428 *
00429 *                Description:<br>
00430 *
00431 * @param[in]     p_ch_cfg     :pointer of channel configuration parameter.
00432 * @param[in,out] p_clk_div    :pointer of SSICR register CKDV value
00433 * @retval        ESUCCESS     :Success.
00434 * @retval        error code   :Failure.
00435 ******************************************************************************/
00436 int_t R_SSIF_Userdef_SetClockDiv(const ssif_channel_cfg_t* const p_ch_cfg, ssif_chcfg_ckdv_t* const p_clk_div)
00437 {
00438     uint32_t input_clk;
00439     uint32_t dot_clk;
00440     uint32_t n_syswd_per_smp;
00441     uint32_t syswd_len;
00442     uint32_t smp_freq;
00443     uint32_t result;
00444     uint32_t division;
00445     int_t ret = ESUCCESS;
00446 
00447     if ((NULL == p_ch_cfg) || (NULL == p_clk_div))
00448     {
00449         ret = EFAULT;
00450     }
00451     else
00452     {
00453         if (SSIF_CFG_CKS_AUDIO_X1 == p_ch_cfg->clk_select)
00454         {
00455             input_clk = SSIF_AUDIO_X1;
00456         }
00457         else if (SSIF_CFG_CKS_AUDIO_CLK == p_ch_cfg->clk_select)
00458         {
00459             input_clk = SSIF_AUDIO_CLK;
00460         }
00461         else
00462         {
00463             input_clk = 0u;
00464         }
00465 
00466         if (0u == input_clk)
00467         {
00468             ret = EINVAL;
00469         }
00470      
00471         if (ESUCCESS == ret)
00472         {
00473             syswd_len = (uint32_t)R_SSIF_SWLtoLen(p_ch_cfg->system_word);
00474             smp_freq = p_ch_cfg->sample_freq;
00475 
00476             if (SSIF_CFG_DISABLE_TDM == p_ch_cfg->tdm_mode)
00477             {
00478                 /* I2S format has 2 system_words */
00479                 n_syswd_per_smp = SSIF_I2S_LR_CH;
00480             }
00481             else
00482             {
00483                 /* TDM frame has [(CHNL+1) * 2] system_words */
00484                 n_syswd_per_smp = (((uint32_t)p_ch_cfg->multi_ch) + 1) * SSIF_I2S_LR_CH;
00485             }
00486 
00487             dot_clk = syswd_len * n_syswd_per_smp * smp_freq;
00488 
00489             if (0u == dot_clk)
00490             {
00491                 ret = EINVAL;
00492             }
00493             else
00494             {
00495                 /* check if input audio clock can be divided by dotclock */
00496                 result = input_clk % dot_clk;
00497 
00498                 if (0u != result)
00499                 {
00500                     /* cannot create dotclock from input audio clock */
00501                     ret = EINVAL;
00502                 }
00503                 else
00504                 {
00505                     division = input_clk / dot_clk;
00506 
00507                     switch (division)
00508                     {
00509                     case SSIF_AUDIO_CLK_DIV_1:
00510                         *p_clk_div = SSIF_CFG_CKDV_BITS_1;
00511                         break;
00512                     case SSIF_AUDIO_CLK_DIV_2:
00513                         *p_clk_div = SSIF_CFG_CKDV_BITS_2;
00514                         break;
00515                     case SSIF_AUDIO_CLK_DIV_4:
00516                         *p_clk_div = SSIF_CFG_CKDV_BITS_4;
00517                         break;
00518                     case SSIF_AUDIO_CLK_DIV_8:
00519                         *p_clk_div = SSIF_CFG_CKDV_BITS_8;
00520                         break;
00521                     case SSIF_AUDIO_CLK_DIV_16:
00522                         *p_clk_div = SSIF_CFG_CKDV_BITS_16;
00523                         break;
00524                     case SSIF_AUDIO_CLK_DIV_32:
00525                         *p_clk_div = SSIF_CFG_CKDV_BITS_32;
00526                         break;
00527                     case SSIF_AUDIO_CLK_DIV_64:
00528                         *p_clk_div = SSIF_CFG_CKDV_BITS_64;
00529                         break;
00530                     case SSIF_AUDIO_CLK_DIV_128:
00531                         *p_clk_div = SSIF_CFG_CKDV_BITS_128;
00532                         break;
00533                     case SSIF_AUDIO_CLK_DIV_6:
00534                         *p_clk_div = SSIF_CFG_CKDV_BITS_6;
00535                         break;
00536                     case SSIF_AUDIO_CLK_DIV_12:
00537                         *p_clk_div = SSIF_CFG_CKDV_BITS_12;
00538                         break;
00539                     case SSIF_AUDIO_CLK_DIV_24:
00540                         *p_clk_div = SSIF_CFG_CKDV_BITS_24;
00541                         break;
00542                     case SSIF_AUDIO_CLK_DIV_48:
00543                         *p_clk_div = SSIF_CFG_CKDV_BITS_48;
00544                         break;
00545                     case SSIF_AUDIO_CLK_DIV_96:
00546                         *p_clk_div = SSIF_CFG_CKDV_BITS_96;
00547                         break;
00548                     default:
00549                         ret = EINVAL;
00550                         break;
00551                     }
00552                 }
00553             }
00554         }
00555     }
00556 
00557     return ret;
00558 }
00559