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Video library for GR-PEACH
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r_vdc5_shared_param.c
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00001 /******************************************************************************* 00002 * DISCLAIMER 00003 * This software is supplied by Renesas Electronics Corporation and is only 00004 * intended for use with Renesas products. No other uses are authorized. This 00005 * software is owned by Renesas Electronics Corporation and is protected under 00006 * all applicable laws, including copyright laws. 00007 * THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING 00008 * THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT 00009 * LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE 00010 * AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED. 00011 * TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS 00012 * ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE 00013 * FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR 00014 * ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE 00015 * BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. 00016 * Renesas reserves the right, without notice, to make changes to this software 00017 * and to discontinue the availability of this software. By using this software, 00018 * you agree to the additional terms and conditions found by accessing the 00019 * following link: 00020 * http://www.renesas.com/disclaimer 00021 * Copyright (C) 2012 - 2015 Renesas Electronics Corporation. All rights reserved. 00022 *******************************************************************************/ 00023 /**************************************************************************//** 00024 * @file r_vdc5_shared_param.c 00025 * @version 1.00 00026 * $Rev: 199 $ 00027 * $Date:: 2014-05-23 16:33:52 +0900#$ 00028 * @brief VDC5 driver shared parameter processing 00029 ******************************************************************************/ 00030 00031 /****************************************************************************** 00032 Includes <System Includes> , "Project Includes" 00033 ******************************************************************************/ 00034 #include <string.h> 00035 00036 #include "r_vdc5.h" 00037 #include "r_vdc5_user.h" 00038 #include "r_vdc5_shared_param.h" 00039 00040 00041 /****************************************************************************** 00042 Macro definitions 00043 ******************************************************************************/ 00044 /*! Two to the power of eleven */ 00045 #define TWO_POWER_ELEVEN (2048) 00046 00047 #define VDC5_SPARA_DIV_2 (2) 00048 #define VDC5_SPARA_DIV_256 (256) 00049 00050 /* Color Conversion Value */ 00051 #define VDC5_SPARA_COLOR_CONV_RANGE (255) 00052 #define VDC5_SPARA_COLOR_CONV_OFFSET (128) 00053 00054 /* Color mask data */ 00055 #define VDC5_SPARA_COLOR_8BIT_MASK (0x000000FFu) 00056 00057 /* shift value */ 00058 #define VDC5_SPARA_SHIFT_16 (16u) 00059 #define VDC5_SPARA_SHIFT_8 (8u) 00060 00061 /****************************************************************************** 00062 Typedef definitions 00063 ******************************************************************************/ 00064 typedef struct { 00065 vdc5_panel_clksel_t panel_icksel; /*!< Panel clock select */ 00066 vdc5_onoff_t lvds_ref; /*!< Reference to the LVDS PLL clock */ 00067 vdc5_color_space_t color_sp_in; /*!< Color space of the input video image signal */ 00068 vdc5_input_sel_t inp_sel; /*!< Input select */ 00069 vdc5_res_vs_in_sel_t res_vs_in_sel; /*!< Horizontal/vertical sync signal output and 00070 full-screen enable signal select */ 00071 vdc5_onoff_t cascade; /*!< Cascaded connection */ 00072 vdc5_onoff_t und_sel; /*!< Selection of lower-layer plane in scaler */ 00073 uint32_t bg_color_rgb; /*!< Background color in 24-bit RGB color format */ 00074 uint32_t bg_color_crycb; /*!< Background color in 24-bit CrYCb format */ 00075 } vdc5_shared_param_common_t; 00076 00077 typedef struct { 00078 vdc5_wr_md_t res_ds_wr_md; /*!< Frame buffer writing mode for image processing */ 00079 vdc5_res_inter_t res_inter; /*!< Field operating mode select */ 00080 vdc5_color_space_t color_sp_fb_wr; /*!< Color space of the frame buffer writing format */ 00081 void * btm_base; /*!< Frame buffer base address for bottom */ 00082 vdc5_width_read_fb_t width_wr_fb; /*!< Size of the image output by scaling-down control block */ 00083 } vdc5_shared_param_scaling_t; 00084 00085 typedef struct { 00086 vdc5_gr_ln_off_dir_t gr_ln_off_dir; /*!< Line offset address direction of the frame buffer */ 00087 vdc5_gr_flm_sel_t gr_flm_sel; /*!< Frame buffer address setting signal */ 00088 vdc5_gr_format_t gr_format; /*!< Format of the frame buffer read signal */ 00089 vdc5_color_space_t color_sp_fb_rd; /*!< Color space of the frame buffer reading format */ 00090 vdc5_onoff_t adj_sel; /*!< Folding handling (on/off) */ 00091 vdc5_period_rect_t gr_grc; /*!< Graphics display area */ 00092 vdc5_width_read_fb_t width_read_fb; /*!< Size of the frame buffer to be read */ 00093 } vdc5_shared_param_graphics_t; 00094 00095 typedef struct { 00096 vdc5_resource_state_t rsrc_panel_clock; 00097 vdc5_resource_state_t rsrc_video_input; 00098 vdc5_resource_state_t rsrc_vsync_signal; 00099 vdc5_resource_state_t rsrc_lcd_panel; 00100 } vdc5_shared_param_resource_t; 00101 00102 /*! Read/write process state */ 00103 typedef enum { 00104 VDC5_RW_PROC_STATE_DISABLE = 0, 00105 VDC5_RW_PROC_STATE_ENABLE = 1 00106 } vdc5_rw_proc_state_t ; 00107 00108 00109 /****************************************************************************** 00110 Private global variables and functions 00111 ******************************************************************************/ 00112 static vdc5_resource_state_t * GetResourceStatePointer(const vdc5_channel_t ch, const vdc5_resource_type_t rsrc_type); 00113 static uint32_t SumProduct( 00114 const int32_t red, 00115 const int32_t green, 00116 const int32_t blue, 00117 int32_t coeff_r, 00118 int32_t coeff_g, 00119 int32_t coeff_b, 00120 const int32_t offset); 00121 00122 static vdc5_shared_param_common_t param_common[VDC5_CHANNEL_NUM ]; 00123 static vdc5_shared_param_scaling_t param_scaling[VDC5_CHANNEL_NUM ][VDC5_SC_TYPE_NUM ]; 00124 static vdc5_shared_param_graphics_t param_graphics[VDC5_CHANNEL_NUM ][VDC5_GR_TYPE_NUM ]; 00125 /*! A channel in VDC5 whose data is to be output through the LVDS */ 00126 static vdc5_channel_t lvds_vdc_sel_ch ; 00127 00128 static vdc5_resource_state_t layer_resource[VDC5_CHANNEL_NUM ][VDC5_LAYER_ID_NUM ]; 00129 static vdc5_rw_proc_state_t rw_proc_state[VDC5_CHANNEL_NUM ][VDC5_LAYER_ID_NUM ]; 00130 00131 static vdc5_onoff_t video_input_flag[VDC5_CHANNEL_NUM ] = {VDC5_OFF , VDC5_OFF }; 00132 00133 00134 /**************************************************************************//** 00135 * @brief Initializes variables of the VDC5 driver 00136 * @param[in] ch : Channel 00137 * @retval None 00138 *****************************************************************************/ 00139 void VDC5_ShrdPrmInit (const vdc5_channel_t ch) 00140 { 00141 int32_t layer_id_num; 00142 vdc5_shared_param_common_t * shared_param_common; 00143 vdc5_shared_param_scaling_t * shared_param_scaling; 00144 vdc5_scaling_type_t scaling_id; 00145 vdc5_shared_param_graphics_t * shared_param_graphics; 00146 vdc5_graphics_type_t graphics_id; 00147 00148 for (layer_id_num = 0; layer_id_num < VDC5_LAYER_ID_NUM ; layer_id_num++) { 00149 layer_resource[ch][layer_id_num] = VDC5_RESOURCE_ST_INVALID ; 00150 rw_proc_state[ch][layer_id_num] = VDC5_RW_PROC_STATE_DISABLE; 00151 } 00152 00153 shared_param_common = ¶m_common[ch]; 00154 00155 shared_param_common->panel_icksel = VDC5_PANEL_ICKSEL_PERI ; /* Panel clock select */ 00156 shared_param_common->lvds_ref = VDC5_OFF ; /* Reference to the LVDS PLL clock */ 00157 shared_param_common->res_vs_in_sel = VDC5_RES_VS_IN_SEL_SC0 ; /* Horizontal/vertical sync signal output and 00158 full-screen enable signal select */ 00159 shared_param_common->cascade = VDC5_ON ; /* Cascaded connection */ 00160 shared_param_common->und_sel = VDC5_OFF ; /* Selection of lower-layer plane in scaler */ 00161 shared_param_common->bg_color_rgb = (uint32_t)0u; /* Background color in 24-bit RGB color format */ 00162 shared_param_common->bg_color_crycb = (uint32_t)0u; /* Background color in 24-bit CrYCb format */ 00163 00164 if (video_input_flag[ch] == VDC5_OFF ) { 00165 shared_param_common->color_sp_in = VDC5_COLOR_SPACE_GBR ; /* Color space of the input video image signal */ 00166 shared_param_common->inp_sel = VDC5_INPUT_SEL_VDEC ; /* Input select */ 00167 } 00168 00169 for (scaling_id = VDC5_SC_TYPE_SC0 ; scaling_id < VDC5_SC_TYPE_NUM ; scaling_id++) { 00170 shared_param_scaling = ¶m_scaling[ch][scaling_id]; 00171 00172 /* Frame buffer writing mode for image processing */ 00173 shared_param_scaling->res_ds_wr_md = VDC5_WR_MD_NORMAL ; 00174 shared_param_scaling->res_inter = VDC5_RES_INTER_PROGRESSIVE ; /* Field operating mode select */ 00175 /* Color space of the frame buffer writing format */ 00176 shared_param_scaling->color_sp_fb_wr = VDC5_COLOR_SPACE_GBR ; 00177 /* Frame buffer base address for bottom */ 00178 shared_param_scaling->btm_base = NULL; 00179 /* Size of the image output by scaling-down control block */ 00180 shared_param_scaling->width_wr_fb.in_vw = (uint16_t)0; 00181 shared_param_scaling->width_wr_fb.in_hw = (uint16_t)0; 00182 } 00183 00184 for (graphics_id = VDC5_GR_TYPE_GR0 ; graphics_id < VDC5_GR_TYPE_NUM ; graphics_id++) { 00185 shared_param_graphics = ¶m_graphics[ch][graphics_id]; 00186 00187 /* Line offset address direction of the frame buffer */ 00188 shared_param_graphics->gr_ln_off_dir = VDC5_GR_LN_OFF_DIR_INC ; 00189 /* Frame buffer address setting signal */ 00190 shared_param_graphics->gr_flm_sel = VDC5_GR_FLM_SEL_FLM_NUM ; 00191 /* Format of the frame buffer read signal */ 00192 shared_param_graphics->gr_format = VDC5_GR_FORMAT_RGB565 ; 00193 /* Color space of the frame buffer reading format */ 00194 shared_param_graphics->color_sp_fb_rd = VDC5_COLOR_SPACE_GBR ; 00195 /* Folding handling (on/off) */ 00196 shared_param_graphics->adj_sel = VDC5_OFF ; 00197 /* Graphics display area */ 00198 shared_param_graphics->gr_grc.vs = (uint16_t)0; 00199 shared_param_graphics->gr_grc.vw = (uint16_t)0; 00200 shared_param_graphics->gr_grc.hs = (uint16_t)0; 00201 shared_param_graphics->gr_grc.hw = (uint16_t)0; 00202 /* Size of the frame buffer to be read */ 00203 shared_param_graphics->width_read_fb.in_vw = (uint16_t)0; 00204 shared_param_graphics->width_read_fb.in_hw = (uint16_t)0; 00205 } 00206 /* A channel in VDC5 whose data is to be output through the LVDS */ 00207 lvds_vdc_sel_ch = VDC5_CHANNEL_NUM ; /* Initialized with invalid channel */ 00208 } /* End of function VDC5_ShrdPrmInit() */ 00209 00210 /**************************************************************************//** 00211 * @brief Sets the initialization parameter 00212 * @param[in] ch : Channel 00213 * @param[in] param : Initialization parameter 00214 * @retval None 00215 *****************************************************************************/ 00216 void VDC5_ShrdPrmSetInitParam (const vdc5_channel_t ch, const vdc5_init_t * const param) 00217 { 00218 vdc5_shared_param_common_t * shared_param_common; 00219 00220 shared_param_common = ¶m_common[ch]; 00221 00222 /* Panel clock select */ 00223 shared_param_common->panel_icksel = param->panel_icksel ; 00224 /* Reference to the LVDS PLL clock */ 00225 if ((param->panel_icksel == VDC5_PANEL_ICKSEL_LVDS ) || (param->panel_icksel == VDC5_PANEL_ICKSEL_LVDS_DIV7 )) { 00226 shared_param_common->lvds_ref = VDC5_ON ; 00227 } 00228 if (param->lvds != NULL) { 00229 /* A channel in VDC5 whose data is to be output through the LVDS */ 00230 lvds_vdc_sel_ch = param->lvds ->lvds_vdc_sel ; 00231 } 00232 } /* End of function VDC5_ShrdPrmSetInitParam() */ 00233 00234 /**************************************************************************//** 00235 * @brief Sets the termination parameter 00236 * @param[in] ch : Channel 00237 * @retval None 00238 *****************************************************************************/ 00239 void VDC5_ShrdPrmSetTerminate (const vdc5_channel_t ch) 00240 { 00241 vdc5_shared_param_common_t * shared_param_common; 00242 00243 shared_param_common = ¶m_common[ch]; 00244 00245 /* Reference to the LVDS PLL clock */ 00246 shared_param_common->lvds_ref = VDC5_OFF ; 00247 } /* End of function VDC5_ShrdPrmSetTerminate() */ 00248 00249 /**************************************************************************//** 00250 * @brief Sets the video input setup parameter 00251 * @param[in] ch : Channel 00252 * @param[in] param : Video input setup parameter 00253 * @retval None 00254 *****************************************************************************/ 00255 void VDC5_ShrdPrmSetInputParam (const vdc5_channel_t ch, const vdc5_input_t * const param) 00256 { 00257 vdc5_shared_param_common_t * shared_param_common; 00258 00259 video_input_flag[ch] = VDC5_ON ; 00260 00261 shared_param_common = ¶m_common[ch]; 00262 00263 /* Color space */ 00264 if (param->inp_sel == VDC5_INPUT_SEL_VDEC ) { 00265 /* Video decoder output signals */ 00266 shared_param_common->color_sp_in = VDC5_COLOR_SPACE_YCBCR ; 00267 } else { 00268 /* Signals supplied via the external input pins */ 00269 if ((param->ext_sig ->inp_format == VDC5_EXTIN_FORMAT_RGB888 ) || 00270 (param->ext_sig ->inp_format == VDC5_EXTIN_FORMAT_RGB666 ) || 00271 (param->ext_sig ->inp_format == VDC5_EXTIN_FORMAT_RGB565 )) { 00272 shared_param_common->color_sp_in = VDC5_COLOR_SPACE_GBR ; 00273 } else { 00274 shared_param_common->color_sp_in = VDC5_COLOR_SPACE_YCBCR ; 00275 } 00276 } 00277 /* Input select */ 00278 shared_param_common->inp_sel = param->inp_sel ; 00279 } /* End of function VDC5_ShrdPrmSetInputParam() */ 00280 00281 /**************************************************************************//** 00282 * @brief Sets the sync control parameter 00283 * @param[in] ch : Channel 00284 * @param[in] param : Sync control parameter 00285 * @retval None 00286 *****************************************************************************/ 00287 void VDC5_ShrdPrmSetSyncParam (const vdc5_channel_t ch, const vdc5_sync_ctrl_t * const param) 00288 { 00289 vdc5_shared_param_common_t * shared_param_common; 00290 00291 shared_param_common = ¶m_common[ch]; 00292 00293 shared_param_common->res_vs_in_sel = param->res_vs_in_sel ; 00294 } /* End of function VDC5_ShrdPrmSetSyncParam() */ 00295 00296 /**************************************************************************//** 00297 * @brief Sets the display output configuration parameter 00298 * @param[in] ch : Channel 00299 * @param[in] param : Display output configuration parameter 00300 * @retval None 00301 *****************************************************************************/ 00302 void VDC5_ShrdPrmSetOutputParam (const vdc5_channel_t ch, const vdc5_output_t * const param) 00303 { 00304 vdc5_shared_param_common_t * shared_param_common; 00305 int32_t red; 00306 int32_t green; 00307 int32_t blue; 00308 uint32_t y_val; 00309 uint32_t cb_val; 00310 uint32_t cr_val; 00311 00312 shared_param_common = ¶m_common[ch]; 00313 00314 /* Background color in 24-bit RGB color format */ 00315 shared_param_common->bg_color_rgb = param->bg_color ; 00316 00317 red = (int32_t)((param->bg_color >> VDC5_SPARA_SHIFT_16) & (uint32_t)VDC5_SPARA_COLOR_8BIT_MASK); 00318 green = (int32_t)((param->bg_color >> VDC5_SPARA_SHIFT_8) & (uint32_t)VDC5_SPARA_COLOR_8BIT_MASK); 00319 blue = (int32_t)( param->bg_color & (uint32_t)VDC5_SPARA_COLOR_8BIT_MASK); 00320 /* Y */ 00321 y_val = SumProduct( 00322 red, 00323 green, 00324 blue, 00325 (int32_t)VDC5_COLORCONV_Y_R, 00326 (int32_t)VDC5_COLORCONV_Y_G, 00327 (int32_t)VDC5_COLORCONV_Y_B, 00328 0); 00329 /* Cb */ 00330 cb_val = SumProduct( 00331 red, 00332 green, 00333 blue, 00334 (int32_t)VDC5_COLORCONV_CB_R, 00335 (int32_t)VDC5_COLORCONV_CB_G, 00336 (int32_t)VDC5_COLORCONV_CB_B, 00337 (int32_t)VDC5_SPARA_COLOR_CONV_OFFSET); 00338 /* Cr */ 00339 cr_val = SumProduct( 00340 red, 00341 green, 00342 blue, 00343 (int32_t)VDC5_COLORCONV_CR_R, 00344 (int32_t)VDC5_COLORCONV_CR_G, 00345 (int32_t)VDC5_COLORCONV_CR_B, 00346 (int32_t)VDC5_SPARA_COLOR_CONV_OFFSET); 00347 /* Background color in 24-bit CrYCb format */ 00348 shared_param_common->bg_color_crycb = (uint32_t)((cr_val << VDC5_SPARA_SHIFT_16) | (y_val << VDC5_SPARA_SHIFT_8) | cb_val); 00349 } /* End of function VDC5_ShrdPrmSetOutputParam() */ 00350 00351 /**************************************************************************//** 00352 * @brief Sets the data write control parameter 00353 * @param[in] ch : Channel 00354 * @param[in] scaling_id : Scaling type ID 00355 * @param[in] param : Data write control parameter 00356 * @retval None 00357 *****************************************************************************/ 00358 void VDC5_ShrdPrmSetWriteParam ( 00359 const vdc5_channel_t ch, 00360 const vdc5_scaling_type_t scaling_id, 00361 const vdc5_write_t * const param) 00362 { 00363 vdc5_shared_param_scaling_t * shared_param_scaling; 00364 00365 shared_param_scaling = ¶m_scaling[ch][scaling_id]; 00366 00367 if (scaling_id == VDC5_SC_TYPE_OIR ) { 00368 /* Frame buffer writing mode for image processing */ 00369 shared_param_scaling->res_ds_wr_md = VDC5_WR_MD_NORMAL ; 00370 /* Field operating mode select */ 00371 shared_param_scaling->res_inter = VDC5_RES_INTER_PROGRESSIVE ; 00372 } else { 00373 /* Frame buffer writing mode for image processing */ 00374 shared_param_scaling->res_ds_wr_md = param->scalingdown_rot .res_ds_wr_md ; 00375 /* Field operating mode select */ 00376 shared_param_scaling->res_inter = param->res_inter ; 00377 } 00378 00379 /* Color space of the frame buffer */ 00380 if ((param->res_md == VDC5_RES_MD_YCBCR422 ) || (param->res_md == VDC5_RES_MD_YCBCR444 )) { 00381 shared_param_scaling->color_sp_fb_wr = VDC5_COLOR_SPACE_YCBCR ; 00382 } else { 00383 shared_param_scaling->color_sp_fb_wr = VDC5_COLOR_SPACE_GBR ; 00384 } 00385 00386 /* Frame buffer base address for bottom */ 00387 shared_param_scaling->btm_base = param->btm_base ; 00388 /* Size of the image output by scaling-down control block */ 00389 if (scaling_id == VDC5_SC_TYPE_OIR ) { 00390 /* OIR */ 00391 shared_param_scaling->width_wr_fb.in_vw = param->scalingdown_rot .res .vw ; 00392 shared_param_scaling->width_wr_fb.in_hw = param->scalingdown_rot .res .hw ; 00393 } else { 00394 shared_param_scaling->width_wr_fb.in_vw = param->scalingdown_rot .res_out_vw ; 00395 shared_param_scaling->width_wr_fb.in_hw = param->scalingdown_rot .res_out_hw ; 00396 } 00397 } /* End of function VDC5_ShrdPrmSetWriteParam() */ 00398 00399 /**************************************************************************//** 00400 * @brief Sets the data write change parameter 00401 * @param[in] ch : Channel 00402 * @param[in] scaling_id : Scaling type ID 00403 * @param[in] param : Data write change parameter 00404 * @retval None 00405 *****************************************************************************/ 00406 void VDC5_ShrdPrmSetChgWriteParam ( 00407 const vdc5_channel_t ch, 00408 const vdc5_scaling_type_t scaling_id, 00409 const vdc5_write_chg_t * const param) 00410 { 00411 vdc5_shared_param_scaling_t * shared_param_scaling; 00412 00413 shared_param_scaling = ¶m_scaling[ch][scaling_id]; 00414 00415 if (scaling_id != VDC5_SC_TYPE_OIR ) { 00416 /* Frame buffer writing mode for image processing */ 00417 shared_param_scaling->res_ds_wr_md = param->scalingdown_rot .res_ds_wr_md ; 00418 } 00419 00420 /* Size of the image output by scaling-down control block */ 00421 if (scaling_id == VDC5_SC_TYPE_OIR ) { 00422 /* OIR */ 00423 shared_param_scaling->width_wr_fb.in_vw = param->scalingdown_rot .res .vw ; 00424 shared_param_scaling->width_wr_fb.in_hw = param->scalingdown_rot .res .hw ; 00425 } else { 00426 shared_param_scaling->width_wr_fb.in_vw = param->scalingdown_rot .res_out_vw ; 00427 shared_param_scaling->width_wr_fb.in_hw = param->scalingdown_rot .res_out_hw ; 00428 } 00429 } /* End of function VDC5_ShrdPrmSetChgWriteParam() */ 00430 00431 /**************************************************************************//** 00432 * @brief Sets the data read control parameter 00433 * @param[in] ch : Channel 00434 * @param[in] graphics_id : Graphics type ID 00435 * @param[in] param : Data read control parameter 00436 * @retval None 00437 *****************************************************************************/ 00438 void VDC5_ShrdPrmSetReadParam ( 00439 const vdc5_channel_t ch, 00440 const vdc5_graphics_type_t graphics_id, 00441 const vdc5_read_t * const param) 00442 { 00443 vdc5_shared_param_graphics_t * shared_param_graphics; 00444 00445 shared_param_graphics = ¶m_graphics[ch][graphics_id]; 00446 00447 /* Line offset address direction of the frame buffer */ 00448 shared_param_graphics->gr_ln_off_dir = param->gr_ln_off_dir ; 00449 00450 /* Frame buffer address setting signal */ 00451 shared_param_graphics->gr_flm_sel = param->gr_flm_sel ; 00452 00453 /* Format of the frame buffer read signal */ 00454 shared_param_graphics->gr_format = param->gr_format ; 00455 00456 /* Color space of the frame buffer */ 00457 if ((param->gr_format == VDC5_GR_FORMAT_YCBCR422 ) || (param->gr_format == VDC5_GR_FORMAT_YCBCR444 )) { 00458 shared_param_graphics->color_sp_fb_rd = VDC5_COLOR_SPACE_YCBCR ; 00459 } else { 00460 shared_param_graphics->color_sp_fb_rd = VDC5_COLOR_SPACE_GBR ; 00461 } 00462 00463 /* Folding handling (on/off) */ 00464 shared_param_graphics->adj_sel = param->adj_sel ; 00465 00466 /* Graphics display area */ 00467 shared_param_graphics->gr_grc = param->gr_grc ; 00468 /* Size of the frame buffer to be read */ 00469 if (param->width_read_fb != NULL) { 00470 shared_param_graphics->width_read_fb.in_vw = param->width_read_fb ->in_vw ; 00471 shared_param_graphics->width_read_fb.in_hw = param->width_read_fb ->in_hw ; 00472 } else { 00473 /* If not specified, ... */ 00474 if ((param->gr_flm_sel == VDC5_GR_FLM_SEL_FLM_NUM ) || (graphics_id == VDC5_GR_TYPE_OIR )) { 00475 /* The size of the frame buffer to be read is assumed that it is the same as 00476 the width of the graphics display area. */ 00477 shared_param_graphics->width_read_fb.in_vw = param->gr_grc .vw ; 00478 shared_param_graphics->width_read_fb.in_hw = param->gr_grc .hw ; 00479 } else { 00480 /* The size of the image output by scaling-down control block is used for the size of the frame buffer 00481 to be read when a frame buffer address setting signal links to the video image signals. */ 00482 if (graphics_id == VDC5_GR_TYPE_GR0 ) { 00483 /* Scaler 0 */ 00484 shared_param_graphics->width_read_fb = param_scaling[ch][VDC5_SC_TYPE_SC0 ].width_wr_fb; 00485 } else { /* Scaler 1 */ 00486 shared_param_graphics->width_read_fb = param_scaling[ch][VDC5_SC_TYPE_SC1 ].width_wr_fb; 00487 } 00488 } 00489 } 00490 } /* End of function VDC5_ShrdPrmSetReadParam() */ 00491 00492 /**************************************************************************//** 00493 * @brief Sets the data read change parameter 00494 * @param[in] ch : Channel 00495 * @param[in] graphics_id : Graphics type ID 00496 * @param[in] param : Data read change parameter 00497 * @retval None 00498 *****************************************************************************/ 00499 void VDC5_ShrdPrmSetChgReadParam ( 00500 const vdc5_channel_t ch, 00501 const vdc5_graphics_type_t graphics_id, 00502 const vdc5_read_chg_t * const param) 00503 { 00504 vdc5_shared_param_graphics_t * shared_param_graphics; 00505 00506 shared_param_graphics = ¶m_graphics[ch][graphics_id]; 00507 00508 /* Graphics display area */ 00509 if (param->gr_grc != NULL) { 00510 shared_param_graphics->gr_grc = *(param->gr_grc ); 00511 } 00512 00513 /* Size of the frame buffer to be read */ 00514 if (param->width_read_fb != NULL) { 00515 shared_param_graphics->width_read_fb.in_vw = param->width_read_fb ->in_vw ; 00516 shared_param_graphics->width_read_fb.in_hw = param->width_read_fb ->in_hw ; 00517 } 00518 } /* End of function VDC5_ShrdPrmSetChgReadParam() */ 00519 00520 /**************************************************************************//** 00521 * @brief Sets the cascaded connection 00522 * @param[in] ch : Channel 00523 * @param[in] cascade : Cascaded connection 00524 * @retval None 00525 *****************************************************************************/ 00526 void VDC5_ShrdPrmSetCascade (const vdc5_channel_t ch, const vdc5_onoff_t cascade) 00527 { 00528 param_common[ch].cascade = cascade; 00529 } /* End of function VDC5_ShrdPrmSetCascade() */ 00530 00531 /**************************************************************************//** 00532 * @brief Sets the selection of lower-layer plane in scaler 00533 * @param[in] ch : Channel 00534 * @param[in] und_sel : Selection of lower-layer plane in scaler 00535 * @retval None 00536 *****************************************************************************/ 00537 void VDC5_ShrdPrmSetUndSel (const vdc5_channel_t ch, const vdc5_onoff_t und_sel) 00538 { 00539 param_common[ch].und_sel = und_sel; 00540 } /* End of function VDC5_ShrdPrmSetUndSel() */ 00541 00542 /**************************************************************************//** 00543 * @brief Gets the panel clock select 00544 * @param[in] ch : Channel 00545 * @retval Panel clock select 00546 *****************************************************************************/ 00547 vdc5_panel_clksel_t VDC5_ShrdPrmGetPanelClkSel (const vdc5_channel_t ch) 00548 { 00549 return param_common[ch].panel_icksel; 00550 } /* End of function VDC5_ShrdPrmGetPanelClkSel() */ 00551 00552 /**************************************************************************//** 00553 * @brief Gets the reference to the LVDS PLL clock 00554 * @param[in] void 00555 * @retval Reference to the LVDS PLL clock 00556 *****************************************************************************/ 00557 vdc5_onoff_t VDC5_ShrdPrmGetLvdsClkRef (void) 00558 { 00559 vdc5_onoff_t onoff; 00560 00561 if ((param_common[VDC5_CHANNEL_0 ].lvds_ref == VDC5_OFF ) && (param_common[VDC5_CHANNEL_1 ].lvds_ref == VDC5_OFF )) { 00562 onoff = VDC5_OFF ; 00563 } else { 00564 onoff = VDC5_ON ; 00565 } 00566 return onoff; 00567 } /* End of function VDC5_ShrdPrmGetLvdsClkRef() */ 00568 00569 /**************************************************************************//** 00570 * @brief Gets the color space of the input video image signal 00571 * @param[in] ch : Channel 00572 * @retval Color space of the input video image signal 00573 *****************************************************************************/ 00574 vdc5_color_space_t VDC5_ShrdPrmGetColorSpace (const vdc5_channel_t ch) 00575 { 00576 return param_common[ch].color_sp_in; 00577 } /* End of function VDC5_ShrdPrmGetColorSpace() */ 00578 00579 /**************************************************************************//** 00580 * @brief Gets the input select 00581 * @param[in] ch : Channel 00582 * @retval Input select 00583 *****************************************************************************/ 00584 vdc5_input_sel_t VDC5_ShrdPrmGetInputSelect (const vdc5_channel_t ch) 00585 { 00586 return param_common[ch].inp_sel; 00587 } /* End of function VDC5_ShrdPrmGetInputSelect() */ 00588 00589 /**************************************************************************//** 00590 * @brief Gets the sync signal output and full-screen enable signal select 00591 * @param[in] ch : Channel 00592 * @retval Horizontal/vertical sync signal output and full-screen enable signal select 00593 * - VDC5_RES_VS_IN_SEL_SC0: Sync signal output and full-screen enable signal from scaler 0 00594 * - VDC5_RES_VS_IN_SEL_SC1: Sync signal output and full-screen enable signal from scaler 1 00595 *****************************************************************************/ 00596 vdc5_res_vs_in_sel_t VDC5_ShrdPrmGetVsInSel (const vdc5_channel_t ch) 00597 { 00598 return param_common[ch].res_vs_in_sel; 00599 } /* End of function VDC5_ShrdPrmGetVsInSel() */ 00600 00601 /**************************************************************************//** 00602 * @brief Gets the cascaded connection 00603 * @param[in] ch : Channel 00604 * @retval Cascaded connection (on/off) 00605 *****************************************************************************/ 00606 vdc5_onoff_t VDC5_ShrdPrmGetCascade (const vdc5_channel_t ch) 00607 { 00608 return param_common[ch].cascade; 00609 } /* End of function VDC5_ShrdPrmGetCascade() */ 00610 00611 /**************************************************************************//** 00612 * @brief Gets the selection of lower-layer plane in scaler 00613 * @param[in] ch : Channel 00614 * @retval Selection of lower-layer plane in scaler 00615 * - VDC5_OFF: Selects graphics 0 as lower-layer graphics and graphics 1 as current graphics 00616 * - VDC5_ON: Selects graphics 1 as lower-layer graphics and graphics 0 as current graphics 00617 *****************************************************************************/ 00618 vdc5_onoff_t VDC5_ShrdPrmGetUndSel (const vdc5_channel_t ch) 00619 { 00620 return param_common[ch].und_sel; 00621 } /* End of function VDC5_ShrdPrmGetUndSel() */ 00622 00623 /**************************************************************************//** 00624 * @brief Get the background color 00625 * @param[in] ch : Channel 00626 * @param[in] color_space : Color space 00627 * @retval Background color in 24-bit RGB color format or CrYCb format 00628 *****************************************************************************/ 00629 uint32_t VDC5_ShrdPrmGetBgColor (const vdc5_channel_t ch, const vdc5_color_space_t color_space) 00630 { 00631 return (color_space == VDC5_COLOR_SPACE_GBR ) ? param_common[ch].bg_color_rgb : param_common[ch].bg_color_crycb; 00632 } /* End of function VDC5_ShrdPrmGetBgColor() */ 00633 00634 /**************************************************************************//** 00635 * @brief Get the frame buffer writing mode for image processing 00636 * @param[in] ch : Channel 00637 * @param[in] scaling_id : Scaling type ID 00638 * @retval Frame buffer writing mode for image processing 00639 *****************************************************************************/ 00640 vdc5_wr_md_t VDC5_ShrdPrmGetWritingMode (const vdc5_channel_t ch, const vdc5_scaling_type_t scaling_id) 00641 { 00642 return param_scaling[ch][scaling_id].res_ds_wr_md; 00643 } /* End of function VDC5_ShrdPrmGetWritingMode() */ 00644 00645 /**************************************************************************//** 00646 * @brief Gets the field operating mode select 00647 * @param[in] ch : Channel 00648 * @param[in] scaling_id : Scaling type ID 00649 * @retval Field operating mode select 00650 *****************************************************************************/ 00651 vdc5_res_inter_t VDC5_ShrdPrmGetInterlace (const vdc5_channel_t ch, const vdc5_scaling_type_t scaling_id) 00652 { 00653 return param_scaling[ch][scaling_id].res_inter; 00654 } /* End of function VDC5_ShrdPrmGetInterlace() */ 00655 00656 /**************************************************************************//** 00657 * @brief Gets the color space of the frame buffer writing format 00658 * @param[in] ch : Channel 00659 * @param[in] scaling_id : Scaling type ID 00660 * @retval Color space of the frame buffer writing format 00661 *****************************************************************************/ 00662 vdc5_color_space_t VDC5_ShrdPrmGetColorSpaceFbWr (const vdc5_channel_t ch, const vdc5_scaling_type_t scaling_id) 00663 { 00664 return param_scaling[ch][scaling_id].color_sp_fb_wr; 00665 } /* End of function VDC5_ShrdPrmGetColorSpaceFbWr() */ 00666 00667 /**************************************************************************//** 00668 * @brief Gets the frame buffer base address for bottom 00669 * @param[in] ch : Channel 00670 * @param[in] scaling_id : Scaling type ID 00671 * @retval Frame buffer base address for bottom 00672 *****************************************************************************/ 00673 void * VDC5_ShrdPrmGetFrBuffBtm (const vdc5_channel_t ch, const vdc5_scaling_type_t scaling_id) 00674 { 00675 return param_scaling[ch][scaling_id].btm_base; 00676 } /* End of function VDC5_ShrdPrmGetFrBuffBtm() */ 00677 00678 /**************************************************************************//** 00679 * @brief Gets the line offset address direction of the frame buffer 00680 * @param[in] ch : Channel 00681 * @param[in] graphics_id : Graphics type ID 00682 * @retval Line offset address direction of the frame buffer 00683 *****************************************************************************/ 00684 vdc5_gr_ln_off_dir_t VDC5_ShrdPrmGetLineOfsAddrDir (const vdc5_channel_t ch, const vdc5_graphics_type_t graphics_id) 00685 { 00686 return param_graphics[ch][graphics_id].gr_ln_off_dir; 00687 } /* End of function VDC5_ShrdPrmGetLineOfsAddrDir() */ 00688 00689 /**************************************************************************//** 00690 * @brief Gets the frame buffer address setting signal 00691 * @param[in] ch : Channel 00692 * @param[in] graphics_id : Graphics type ID 00693 * @retval Frame buffer address setting signal 00694 *****************************************************************************/ 00695 vdc5_gr_flm_sel_t VDC5_ShrdPrmGetSelFbAddrSig (const vdc5_channel_t ch, const vdc5_graphics_type_t graphics_id) 00696 { 00697 return param_graphics[ch][graphics_id].gr_flm_sel; 00698 } /* End of function VDC5_ShrdPrmGetSelFbAddrSig() */ 00699 00700 /**************************************************************************//** 00701 * @brief Gets the format of the frame buffer read signal 00702 * @param[in] ch : Channel 00703 * @param[in] graphics_id : Graphics type ID 00704 * @retval Format of the frame buffer read signal 00705 *****************************************************************************/ 00706 vdc5_gr_format_t VDC5_ShrdPrmGetGraphicsFormat (const vdc5_channel_t ch, const vdc5_graphics_type_t graphics_id) 00707 { 00708 return param_graphics[ch][graphics_id].gr_format; 00709 } /* End of function VDC5_ShrdPrmGetGraphicsFormat() */ 00710 00711 /**************************************************************************//** 00712 * @brief Gets the color space of the frame buffer reading format 00713 * @param[in] ch : Channel 00714 * @param[in] graphics_id : Graphics type ID 00715 * @retval Color space of the frame buffer reading format 00716 *****************************************************************************/ 00717 vdc5_color_space_t VDC5_ShrdPrmGetColorSpaceFbRd (const vdc5_channel_t ch, const vdc5_graphics_type_t graphics_id) 00718 { 00719 return param_graphics[ch][graphics_id].color_sp_fb_rd; 00720 } /* End of function VDC5_ShrdPrmGetColorSpaceFbRd() */ 00721 00722 /**************************************************************************//** 00723 * @brief Gets the folding handling 00724 * @param[in] ch : Channel 00725 * @param[in] graphics_id : Graphics type ID 00726 * @retval Folding handling (on/off) 00727 *****************************************************************************/ 00728 vdc5_onoff_t VDC5_ShrdPrmGetMeasureFolding (const vdc5_channel_t ch, const vdc5_graphics_type_t graphics_id) 00729 { 00730 return param_graphics[ch][graphics_id].adj_sel; 00731 } /* End of function VDC5_ShrdPrmGetMeasureFolding() */ 00732 00733 /**************************************************************************//** 00734 * @brief Gets the graphics display area 00735 * @param[in] ch : Channel 00736 * @param[in] graphics_id : Graphics type ID 00737 * @retval Graphics display area 00738 *****************************************************************************/ 00739 vdc5_period_rect_t * VDC5_ShrdPrmGetDisplayArea (const vdc5_channel_t ch, const vdc5_graphics_type_t graphics_id) 00740 { 00741 return ¶m_graphics[ch][graphics_id].gr_grc; 00742 } /* End of function VDC5_ShrdPrmGetDisplayArea() */ 00743 00744 /**************************************************************************//** 00745 * @brief Gets the size of the frame buffer to be read 00746 * @param[in] ch : Channel 00747 * @param[in] graphics_id : Graphics type ID 00748 * @retval Size of the frame buffer to be read 00749 *****************************************************************************/ 00750 vdc5_width_read_fb_t * VDC5_ShrdPrmGetFrBuffWidth_Rd ( 00751 const vdc5_channel_t ch, 00752 const vdc5_graphics_type_t graphics_id) 00753 { 00754 return ¶m_graphics[ch][graphics_id].width_read_fb; 00755 } /* End of function VDC5_ShrdPrmGetFrBuffWidth_Rd() */ 00756 00757 /**************************************************************************//** 00758 * @brief Gets the VDC5 channel whose data is to be output through the LVDS 00759 * @param[in] void 00760 * @retval A channel in VDC5 whose data is to be output through the LVDS 00761 *****************************************************************************/ 00762 vdc5_channel_t VDC5_ShrdPrmGetLvdsCh (void) 00763 { 00764 /* This value is valid only when LVDS PLL clock resource (VDC5_RESOURCE_LVDS_CLK) is valid. */ 00765 return lvds_vdc_sel_ch ; 00766 } /* End of function VDC5_ShrdPrmGetLvdsCh() */ 00767 00768 /**************************************************************************//** 00769 * @brief Updates the resource state 00770 * @param[in] ch : Channel 00771 * @param[in] rsrc_type : Resource type 00772 * @param[in] rsrc_state : Resource state 00773 * @retval None 00774 *****************************************************************************/ 00775 void VDC5_ShrdPrmSetResource ( 00776 const vdc5_channel_t ch, 00777 const vdc5_resource_type_t rsrc_type, 00778 const vdc5_resource_state_t rsrc_state) 00779 { 00780 vdc5_resource_state_t * resource_state; 00781 00782 resource_state = GetResourceStatePointer(ch, rsrc_type); 00783 if (resource_state != NULL) { 00784 *resource_state = rsrc_state; 00785 } 00786 } /* End of function VDC5_ShrdPrmSetResource() */ 00787 00788 /**************************************************************************//** 00789 * @brief Updates the layer resource state 00790 * @param[in] ch : Channel 00791 * @param[in] layer_id : Layer ID 00792 * @param[in] rsrc_state : Resource state 00793 * @retval None 00794 *****************************************************************************/ 00795 void VDC5_ShrdPrmSetLayerResource ( 00796 const vdc5_channel_t ch, 00797 const vdc5_layer_id_t layer_id, 00798 const vdc5_resource_state_t rsrc_state) 00799 { 00800 uint32_t layer_id_num; 00801 00802 if (layer_id != VDC5_LAYER_ID_ALL ) { 00803 layer_resource[ch][layer_id] = rsrc_state; 00804 } else { 00805 for (layer_id_num = 0; layer_id_num < (uint32_t)VDC5_LAYER_ID_NUM ; layer_id_num++) { 00806 if (rw_proc_state[ch][layer_id_num] == VDC5_RW_PROC_STATE_DISABLE) { 00807 layer_resource[ch][layer_id_num] = rsrc_state; 00808 } 00809 } 00810 } 00811 } /* End of function VDC5_ShrdPrmSetLayerResource() */ 00812 00813 /**************************************************************************//** 00814 * @brief Gets the resource state 00815 * @param[in] ch : Channel 00816 * @param[in] rsrc_type : Resource type 00817 * @retval Resource state 00818 *****************************************************************************/ 00819 vdc5_resource_state_t VDC5_ShrdPrmGetResource (const vdc5_channel_t ch, const vdc5_resource_type_t rsrc_type) 00820 { 00821 vdc5_resource_state_t * resource_state; 00822 vdc5_resource_state_t rsrc_state; 00823 00824 rsrc_state = VDC5_RESOURCE_ST_INVALID ; 00825 00826 resource_state = GetResourceStatePointer(ch, rsrc_type); 00827 if (resource_state != NULL) { 00828 rsrc_state = *resource_state; 00829 } 00830 return rsrc_state; 00831 } /* End of function VDC5_ShrdPrmGetResource() */ 00832 00833 /**************************************************************************//** 00834 * @brief Gets the layer resource state 00835 * @param[in] ch : Channel 00836 * @param[in] layer_id : Layer ID 00837 * @retval Layer resource state 00838 *****************************************************************************/ 00839 vdc5_resource_state_t VDC5_ShrdPrmGetLayerResource (const vdc5_channel_t ch, const vdc5_layer_id_t layer_id) 00840 { 00841 return layer_resource[ch][layer_id]; 00842 } /* End of function VDC5_ShrdPrmGetLayerResource() */ 00843 00844 /**************************************************************************//** 00845 * @brief Makes the data write/read processing enabled 00846 * @param[in] ch : Channel 00847 * @param[in] layer_id : Layer ID 00848 * @retval None 00849 *****************************************************************************/ 00850 void VDC5_ShrdPrmSetRwProcEnable (const vdc5_channel_t ch, const vdc5_layer_id_t layer_id) 00851 { 00852 if (layer_id != VDC5_LAYER_ID_ALL ) { 00853 if (layer_resource[ch][layer_id] != VDC5_RESOURCE_ST_INVALID ) { 00854 rw_proc_state[ch][layer_id] = VDC5_RW_PROC_STATE_ENABLE; 00855 } 00856 } 00857 } /* End of function VDC5_ShrdPrmSetRwProcEnable() */ 00858 00859 /**************************************************************************//** 00860 * @brief Makes the data write/read processing disabled 00861 * @param[in] ch : Channel 00862 * @param[in] layer_id : Layer ID 00863 * @retval None 00864 *****************************************************************************/ 00865 void VDC5_ShrdPrmSetRwProcDisable (const vdc5_channel_t ch, const vdc5_layer_id_t layer_id) 00866 { 00867 if (layer_id != VDC5_LAYER_ID_ALL ) { 00868 if (layer_resource[ch][layer_id] != VDC5_RESOURCE_ST_INVALID ) { 00869 rw_proc_state[ch][layer_id] = VDC5_RW_PROC_STATE_DISABLE; 00870 } 00871 } 00872 } /* End of function VDC5_ShrdPrmSetRwProcDisable() */ 00873 00874 /**************************************************************************//** 00875 * @brief Gets the state whether the specified layer is ready or not 00876 * @param[in] ch : Channel 00877 * @param[in] layer_id : Layer ID 00878 * @retval Resource state 00879 * - VDC5_RESOURCE_ST_VALID: The layer resource state of the specified layer is valid and 00880 * the data write/read processing in the layer is disabled. 00881 * - VDC5_RESOURCE_ST_INVALID: The specified layer is not ready. 00882 *****************************************************************************/ 00883 vdc5_resource_state_t VDC5_ShrdPrmGetRwProcReady (const vdc5_channel_t ch, const vdc5_layer_id_t layer_id) 00884 { 00885 vdc5_resource_state_t state; 00886 00887 if ((layer_resource[ch][layer_id] != VDC5_RESOURCE_ST_INVALID ) && 00888 (rw_proc_state[ch][layer_id] == VDC5_RW_PROC_STATE_DISABLE)) { 00889 state = VDC5_RESOURCE_ST_VALID ; 00890 } else { 00891 state = VDC5_RESOURCE_ST_INVALID ; 00892 } 00893 return state; 00894 } /* End of function VDC5_ShrdPrmGetRwProcReady() */ 00895 00896 /**************************************************************************//** 00897 * @brief Gets the state whether the specified layer is already run or not 00898 * @param[in] ch : Channel 00899 * @param[in] layer_id : Layer ID 00900 * @retval Resource state 00901 * - VDC5_RESOURCE_ST_VALID: The layer resource state of the specified layer is valid and 00902 * the data write/read processing in the layer is enabled. 00903 * - VDC5_RESOURCE_ST_INVALID: The specified layer is not enabled. 00904 *****************************************************************************/ 00905 vdc5_resource_state_t VDC5_ShrdPrmGetRwProcEnabled (const vdc5_channel_t ch, const vdc5_layer_id_t layer_id) 00906 { 00907 vdc5_resource_state_t state; 00908 00909 if ((layer_resource[ch][layer_id] != VDC5_RESOURCE_ST_INVALID ) && 00910 (rw_proc_state[ch][layer_id] != VDC5_RW_PROC_STATE_DISABLE)) { 00911 state = VDC5_RESOURCE_ST_VALID ; 00912 } else { 00913 state = VDC5_RESOURCE_ST_INVALID ; 00914 } 00915 return state; 00916 } /* End of function VDC5_ShrdPrmGetRwProcEnabled() */ 00917 00918 /**************************************************************************//** 00919 * @brief Gets the state whether the OIR is already run or not 00920 * @param[in] ch : Channel 00921 * @retval Resource state 00922 * - VDC5_RESOURCE_ST_VALID: The layer resource state of the OIR is valid and 00923 * the data write/read processing in the OIR is enabled. 00924 * - VDC5_RESOURCE_ST_INVALID: The OIR is not enabled. 00925 *****************************************************************************/ 00926 vdc5_resource_state_t VDC5_ShrdPrmGetOirRwProcEnabled (const vdc5_channel_t ch) 00927 { 00928 vdc5_resource_state_t state; 00929 00930 state = VDC5_RESOURCE_ST_INVALID ; 00931 00932 if ((layer_resource[ch][VDC5_LAYER_ID_OIR_WR ] != VDC5_RESOURCE_ST_INVALID ) && 00933 (rw_proc_state[ch][VDC5_LAYER_ID_OIR_WR ] != VDC5_RW_PROC_STATE_DISABLE)) { 00934 state = VDC5_RESOURCE_ST_VALID ; 00935 } 00936 if ((layer_resource[ch][VDC5_LAYER_ID_OIR_RD ] != VDC5_RESOURCE_ST_INVALID ) && 00937 (rw_proc_state[ch][VDC5_LAYER_ID_OIR_RD ] != VDC5_RW_PROC_STATE_DISABLE)) { 00938 state = VDC5_RESOURCE_ST_VALID ; 00939 } 00940 return state; 00941 } /* End of function VDC5_ShrdPrmGetOirRwProcEnabled() */ 00942 00943 /****************************************************************************** 00944 Local Functions 00945 ******************************************************************************/ 00946 /**************************************************************************//** 00947 * @brief Gets the pointer to the resource state 00948 * @param[in] ch : Channel 00949 * @param[in] rsrc_type : Resource type 00950 * @retval Pointer to the resource state 00951 *****************************************************************************/ 00952 static vdc5_resource_state_t * GetResourceStatePointer (const vdc5_channel_t ch, const vdc5_resource_type_t rsrc_type) 00953 { 00954 vdc5_resource_state_t * resource_state; 00955 static vdc5_shared_param_resource_t param_resource[VDC5_CHANNEL_NUM ] = { 00956 {VDC5_RESOURCE_ST_INVALID , VDC5_RESOURCE_ST_INVALID , VDC5_RESOURCE_ST_INVALID , VDC5_RESOURCE_ST_INVALID}, 00957 {VDC5_RESOURCE_ST_INVALID , VDC5_RESOURCE_ST_INVALID , VDC5_RESOURCE_ST_INVALID , VDC5_RESOURCE_ST_INVALID} 00958 }; 00959 static vdc5_resource_state_t lvds_resource = VDC5_RESOURCE_ST_INVALID ; 00960 00961 switch (rsrc_type) { 00962 case VDC5_RESOURCE_PANEL_CLK : 00963 resource_state = ¶m_resource[ch].rsrc_panel_clock; 00964 break; 00965 case VDC5_RESOURCE_VIDEO_IN : 00966 resource_state = ¶m_resource[ch].rsrc_video_input; 00967 break; 00968 case VDC5_RESOURCE_VSYNC : 00969 resource_state = ¶m_resource[ch].rsrc_vsync_signal; 00970 break; 00971 case VDC5_RESOURCE_LCD_PANEL : 00972 resource_state = ¶m_resource[ch].rsrc_lcd_panel; 00973 break; 00974 case VDC5_RESOURCE_LVDS_CLK : 00975 resource_state = &lvds_resource; 00976 break; 00977 00978 default: 00979 resource_state = NULL; 00980 break; 00981 } 00982 return resource_state; 00983 } /* End of function GetResourceStatePointer() */ 00984 00985 /**************************************************************************//** 00986 * @brief Product-sum operation 00987 * @param[in] red : 8 bits for red 00988 * @param[in] green : 8 bits for green 00989 * @param[in] blue : 8 bits for blue 00990 * @param[in] coeff_r : Coefficient value for Cr/R signal gain adjustment 00991 * @param[in] coeff_g : Coefficient value for Y/G signal gain adjustment 00992 * @param[in] coeff_b : Coefficient value for Cb/B signal gain adjustment 00993 * @param[in] offset : Coefficient value for offset adjustment 00994 * @retval Answer 00995 *****************************************************************************/ 00996 static uint32_t SumProduct ( 00997 const int32_t red, 00998 const int32_t green, 00999 const int32_t blue, 01000 int32_t coeff_r, 01001 int32_t coeff_g, 01002 int32_t coeff_b, 01003 const int32_t offset) 01004 { 01005 int32_t color_val; 01006 01007 /* Coefficient values are represented in 11-bit two's complement integer. */ 01008 if (coeff_r >= (TWO_POWER_ELEVEN / VDC5_SPARA_DIV_2)) { 01009 coeff_r -= (int32_t)TWO_POWER_ELEVEN; 01010 } 01011 if (coeff_g >= (TWO_POWER_ELEVEN / VDC5_SPARA_DIV_2)) { 01012 coeff_g -= (int32_t)TWO_POWER_ELEVEN; 01013 } 01014 if (coeff_b >= (TWO_POWER_ELEVEN / VDC5_SPARA_DIV_2)) { 01015 coeff_b -= (int32_t)TWO_POWER_ELEVEN; 01016 } 01017 01018 color_val = (red * coeff_r) + (green * coeff_g) + (blue * coeff_b); 01019 color_val /= (int32_t)VDC5_SPARA_DIV_256; 01020 color_val += offset; 01021 if (color_val < 0) { 01022 color_val = 0; 01023 } else if (color_val > (int32_t)VDC5_SPARA_COLOR_CONV_RANGE) { 01024 color_val = (int32_t)VDC5_SPARA_COLOR_CONV_RANGE; 01025 } else { 01026 } 01027 return (uint32_t)color_val; 01028 } /* End of function SumProduct() */ 01029
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