Video library for GR-PEACH

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r_vdc5_shared_param.h

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00001 /*******************************************************************************
00002 * DISCLAIMER
00003 * This software is supplied by Renesas Electronics Corporation and is only
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00005 * software is owned by Renesas Electronics Corporation and is protected under
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00009 * LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE
00010 * AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.
00011 * TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS
00012 * ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE
00013 * FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR
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00015 * BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
00016 * Renesas reserves the right, without notice, to make changes to this software
00017 * and to discontinue the availability of this software. By using this software,
00018 * you agree to the additional terms and conditions found by accessing the
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00020 * http://www.renesas.com/disclaimer
00021 * Copyright (C) 2012 - 2015 Renesas Electronics Corporation. All rights reserved.
00022 *******************************************************************************/
00023 /**************************************************************************//**
00024 * @file         r_vdc5_shared_param.h
00025 * @version      1.00
00026 * $Rev: 199 $
00027 * $Date:: 2014-05-23 16:33:52 +0900#$
00028 * @brief        VDC5 driver shared parameter definitions
00029 ******************************************************************************/
00030 
00031 #ifndef R_VDC5_SHARED_PARAM_H
00032 #define R_VDC5_SHARED_PARAM_H
00033 
00034 /******************************************************************************
00035 Includes   <System Includes> , "Project Includes"
00036 ******************************************************************************/
00037 #include    "r_vdc5.h"
00038 #include    "r_vdc5_user.h"
00039 
00040 
00041 /******************************************************************************
00042 Macro definitions
00043 ******************************************************************************/
00044 
00045 /******************************************************************************
00046 Typedef definitions
00047 ******************************************************************************/
00048 /*! Color space */
00049 typedef enum {
00050     VDC5_COLOR_SPACE_GBR     = 0,        /*!< GBR */
00051     VDC5_COLOR_SPACE_YCBCR   = 1         /*!< YCbCr */
00052 } vdc5_color_space_t ;
00053 
00054 /*! Resource state */
00055 typedef enum {
00056     VDC5_RESOURCE_ST_INVALID     = 0,    /*!< Invalid */
00057     VDC5_RESOURCE_ST_VALID       = 1     /*!< Valid */
00058 } vdc5_resource_state_t ;
00059 
00060 /*! Resource type */
00061 typedef enum {
00062     VDC5_RESOURCE_PANEL_CLK  = 0,        /*!< Panel clock */
00063     VDC5_RESOURCE_VIDEO_IN ,             /*!< Input video */
00064     VDC5_RESOURCE_VSYNC ,                /*!< Vsync signal */
00065     VDC5_RESOURCE_LCD_PANEL ,            /*!< LCD panel (output video) */
00066     VDC5_RESOURCE_LVDS_CLK ,             /*!< LVDS PLL clock */
00067     VDC5_RESOURCE_NUM
00068 } vdc5_resource_type_t ;
00069 
00070 
00071 /******************************************************************************
00072 Functions Prototypes
00073 ******************************************************************************/
00074 void VDC5_ShrdPrmInit(const vdc5_channel_t  ch);
00075 
00076 void VDC5_ShrdPrmSetInitParam(const vdc5_channel_t  ch, const vdc5_init_t  * const param);
00077 void VDC5_ShrdPrmSetTerminate(const vdc5_channel_t  ch);
00078 void VDC5_ShrdPrmSetInputParam(const vdc5_channel_t  ch, const vdc5_input_t  * const param);
00079 void VDC5_ShrdPrmSetSyncParam(const vdc5_channel_t  ch, const vdc5_sync_ctrl_t  * const param);
00080 void VDC5_ShrdPrmSetOutputParam(const vdc5_channel_t  ch, const vdc5_output_t  * const param);
00081 void VDC5_ShrdPrmSetWriteParam(
00082     const vdc5_channel_t         ch,
00083     const vdc5_scaling_type_t    scaling_id,
00084     const vdc5_write_t   * const param);
00085 void VDC5_ShrdPrmSetChgWriteParam(
00086     const vdc5_channel_t             ch,
00087     const vdc5_scaling_type_t        scaling_id,
00088     const vdc5_write_chg_t   * const param);
00089 void VDC5_ShrdPrmSetReadParam(
00090     const vdc5_channel_t         ch,
00091     const vdc5_graphics_type_t   graphics_id,
00092     const vdc5_read_t    * const param);
00093 void VDC5_ShrdPrmSetChgReadParam(
00094     const vdc5_channel_t             ch,
00095     const vdc5_graphics_type_t       graphics_id,
00096     const vdc5_read_chg_t    * const param);
00097 void VDC5_ShrdPrmSetCascade(const vdc5_channel_t  ch, const vdc5_onoff_t  cascade);
00098 void VDC5_ShrdPrmSetUndSel(const vdc5_channel_t  ch, const vdc5_onoff_t  und_sel);
00099 
00100 vdc5_panel_clksel_t  VDC5_ShrdPrmGetPanelClkSel(const vdc5_channel_t  ch);
00101 vdc5_onoff_t  VDC5_ShrdPrmGetLvdsClkRef(void);
00102 vdc5_color_space_t  VDC5_ShrdPrmGetColorSpace(const vdc5_channel_t  ch);
00103 vdc5_input_sel_t  VDC5_ShrdPrmGetInputSelect(const vdc5_channel_t  ch);
00104 vdc5_res_vs_in_sel_t  VDC5_ShrdPrmGetVsInSel(const vdc5_channel_t  ch);
00105 vdc5_onoff_t  VDC5_ShrdPrmGetCascade(const vdc5_channel_t  ch);
00106 vdc5_onoff_t  VDC5_ShrdPrmGetUndSel(const vdc5_channel_t  ch);
00107 uint32_t VDC5_ShrdPrmGetBgColor(const vdc5_channel_t  ch, const vdc5_color_space_t  color_space);
00108 vdc5_wr_md_t  VDC5_ShrdPrmGetWritingMode(const vdc5_channel_t  ch, const vdc5_scaling_type_t  scaling_id);
00109 vdc5_res_inter_t  VDC5_ShrdPrmGetInterlace(const vdc5_channel_t  ch, const vdc5_scaling_type_t  scaling_id);
00110 vdc5_color_space_t  VDC5_ShrdPrmGetColorSpaceFbWr(const vdc5_channel_t  ch, const vdc5_scaling_type_t  scaling_id);
00111 void * VDC5_ShrdPrmGetFrBuffBtm(const vdc5_channel_t  ch, const vdc5_scaling_type_t  scaling_id);
00112 
00113 vdc5_gr_ln_off_dir_t  VDC5_ShrdPrmGetLineOfsAddrDir(const vdc5_channel_t  ch, const vdc5_graphics_type_t  graphics_id);
00114 vdc5_gr_flm_sel_t  VDC5_ShrdPrmGetSelFbAddrSig(const vdc5_channel_t  ch, const vdc5_graphics_type_t  graphics_id);
00115 vdc5_gr_format_t  VDC5_ShrdPrmGetGraphicsFormat(const vdc5_channel_t  ch, const vdc5_graphics_type_t  graphics_id);
00116 vdc5_color_space_t  VDC5_ShrdPrmGetColorSpaceFbRd(const vdc5_channel_t  ch, const vdc5_graphics_type_t  graphics_id);
00117 vdc5_onoff_t  VDC5_ShrdPrmGetMeasureFolding(const vdc5_channel_t  ch, const vdc5_graphics_type_t  graphics_id);
00118 vdc5_period_rect_t  * VDC5_ShrdPrmGetDisplayArea(const vdc5_channel_t  ch, const vdc5_graphics_type_t  graphics_id);
00119 vdc5_width_read_fb_t  * VDC5_ShrdPrmGetFrBuffWidth_Rd(
00120     const vdc5_channel_t         ch,
00121     const vdc5_graphics_type_t   graphics_id);
00122 vdc5_channel_t  VDC5_ShrdPrmGetLvdsCh(void);
00123 
00124 void VDC5_ShrdPrmSetResource(
00125     const vdc5_channel_t         ch,
00126     const vdc5_resource_type_t   rsrc_type,
00127     const vdc5_resource_state_t  rsrc_state);
00128 void VDC5_ShrdPrmSetLayerResource(
00129     const vdc5_channel_t         ch,
00130     const vdc5_layer_id_t        layer_id,
00131     const vdc5_resource_state_t  rsrc_state);
00132 vdc5_resource_state_t  VDC5_ShrdPrmGetResource(const vdc5_channel_t  ch, const vdc5_resource_type_t  rsrc_type);
00133 vdc5_resource_state_t  VDC5_ShrdPrmGetLayerResource(const vdc5_channel_t  ch, const vdc5_layer_id_t  layer_id);
00134 
00135 void VDC5_ShrdPrmSetRwProcEnable(const vdc5_channel_t  ch, const vdc5_layer_id_t  layer_id);
00136 void VDC5_ShrdPrmSetRwProcDisable(const vdc5_channel_t  ch, const vdc5_layer_id_t  layer_id);
00137 vdc5_resource_state_t  VDC5_ShrdPrmGetRwProcReady(const vdc5_channel_t  ch, const vdc5_layer_id_t  layer_id);
00138 vdc5_resource_state_t  VDC5_ShrdPrmGetRwProcEnabled(const vdc5_channel_t  ch, const vdc5_layer_id_t  layer_id);
00139 vdc5_resource_state_t  VDC5_ShrdPrmGetOirRwProcEnabled(const vdc5_channel_t  ch);
00140 
00141 
00142 #endif  /* R_VDC5_SHARED_PARAM_H */
00143