Renesas / GR-PEACH_video

Video library for GR-PEACH

Dependents:   Trace_Program2 GR-PEACH_Camera_in_barcode GR-PEACH_LCD_sample GR-PEACH_LCD_4_3inch_sample ... more

Video ｌibrary for GR-PEACH.

Hello World!

Import programGR-PEACH_Camera_in

Camera in sample for GR-PEACH. This sample works on GR-LYCHEE besides GR-PEACH.

Last commit 28 Dec 2018 by Renesas

API

Import library
GR-PEACH_video - DisplayBase Class Reference

Data Structures

struct lcd_config_t
LCD configuration. More...
struct rect_t
The relative position within the graphics display area. More...
struct video_ext_in_config_t
Digital Video Input configuration. More...

Public Types

enum video_input_channel_t { VIDEO_INPUT_CHANNEL_0 = 0, VIDEO_INPUT_CHANNEL_1 }

Video input channel select.

More...
enum graphics_layer_t { GRAPHICS_LAYER_0 = 0, GRAPHICS_LAYER_1 , GRAPHICS_LAYER_2 , GRAPHICS_LAYER_3 }

Graphics layer select.

More...
enum graphics_error_t {
GRAPHICS_OK = 0, GRAPHICS_VDC5_ERR = -1, GRAPHICS_FORMA_ERR = -2, GRAPHICS_LAYER_ERR = -3,
GRAPHICS_CHANNLE_ERR = -4, GRAPHICS_VIDEO_NTSC_SIZE_ERR = -5, GRAPHICS_VIDEO_PAL_SIZE_ERR = -6, GRAPHICS_PARAM_RANGE_ERR = -7
}

Error codes.

More...
enum graphics_format_t { GRAPHICS_FORMAT_YCBCR422 = 0, GRAPHICS_FORMAT_RGB565 , GRAPHICS_FORMAT_RGB888 , GRAPHICS_FORMAT_ARGB8888 }

Graphics layer read format selects.

More...
enum video_format_t { VIDEO_FORMAT_YCBCR422 = 0, VIDEO_FORMAT_RGB565 , VIDEO_FORMAT_RGB888 }

Video writing format selects.

More...
enum wr_rd_swa_t {
WR_RD_WRSWA_NON = 0, WR_RD_WRSWA_8BIT , WR_RD_WRSWA_16BIT , WR_RD_WRSWA_16_8BIT ,
WR_RD_WRSWA_32BIT , WR_RD_WRSWA_32_8BIT , WR_RD_WRSWA_32_16BIT , WR_RD_WRSWA_32_16_8BIT
}

Frame buffer swap setting.

More...
enum lcd_tcon_pin_t { LCD_TCON_PIN_NON = -1, LCD_TCON_PIN_0 , LCD_TCON_PIN_1 , LCD_TCON_PIN_2 }

LCD tcon output pin selects.

More...
enum lcd_outformat_t { LCD_OUTFORMAT_RGB888 = 0, LCD_OUTFORMAT_RGB666 , LCD_OUTFORMAT_RGB565 }

LCD output format selects.

More...
enum edge_t { EDGE_RISING = 0, EDGE_FALLING = 1 }

Edge of a signal.

More...
enum lcd_type_t { LCD_TYPE_LVDS = 0, LCD_TYPE_PARALLEL_RGB }

LCD type.

More...
enum sig_pol_t { SIG_POL_NOT_INVERTED = 0, SIG_POL_INVERTED }

Polarity of a signal.

More...
enum int_type_t {
INT_TYPE_S0_VI_VSYNC = 0, INT_TYPE_S0_LO_VSYNC , INT_TYPE_S0_VSYNCERR , INT_TYPE_VLINE ,
INT_TYPE_S0_VFIELD , INT_TYPE_IV1_VBUFERR , INT_TYPE_IV3_VBUFERR , INT_TYPE_IV5_VBUFERR ,
INT_TYPE_IV6_VBUFERR , INT_TYPE_S0_WLINE , INT_TYPE_S1_VI_VSYNC , INT_TYPE_S1_LO_VSYNC ,
INT_TYPE_S1_VSYNCERR , INT_TYPE_S1_VFIELD , INT_TYPE_IV2_VBUFERR , INT_TYPE_IV4_VBUFERR ,
INT_TYPE_S1_WLINE , INT_TYPE_OIR_VI_VSYNC , INT_TYPE_OIR_LO_VSYNC , INT_TYPE_OIR_VLINE ,
INT_TYPE_OIR_VFIELD , INT_TYPE_IV7_VBUFERR , INT_TYPE_IV8_VBUFERR , INT_TYPE_NUM
}

Interrupt type.

More...
enum graphics_video_col_sys_t {
COL_SYS_NTSC_358 = 0, COL_SYS_NTSC_443 = 1, COL_SYS_PAL_443 = 2, COL_SYS_PAL_M = 3,
COL_SYS_PAL_N = 4, COL_SYS_SECAM = 5, COL_SYS_NTSC_443_60 = 6, COL_SYS_PAL_60 = 7
}

Video color system.

More...
enum video_input_sel_t { INPUT_SEL_VDEC = 0, INPUT_SEL_EXT = 1 }

External Input select.

More...
enum video_extin_format_t {
VIDEO_EXTIN_FORMAT_RGB888 = 0, VIDEO_EXTIN_FORMAT_RGB666 , VIDEO_EXTIN_FORMAT_RGB565 , VIDEO_EXTIN_FORMAT_BT656 ,
VIDEO_EXTIN_FORMAT_BT601 , VIDEO_EXTIN_FORMAT_YCBCR422 , VIDEO_EXTIN_FORMAT_YCBCR444
}

External input format select.

More...
enum onoff_t { OFF = 0, ON = 1 }

On/off.

More...
enum extin_input_line_t { EXTIN_LINE_525 = 0, EXTIN_LINE_625 = 1 }

Number of lines for BT.656 external input.

More...
enum extin_h_pos_t { EXTIN_H_POS_CBYCRY = 0, EXTIN_H_POS_YCRYCB , EXTIN_H_POS_CRYCBY , EXTIN_H_POS_YCBYCR }

Y/Cb/Y/Cr data string start timing.

More...

Public Member Functions

DisplayBase (void)
Constructor method of display base object.
graphics_error_t Graphics_init ( lcd_config_t *lcd_config)
Graphics initialization processing
If not using display, set NULL in parameter.
graphics_error_t Graphics_Video_init ( video_input_sel_t video_input_sel, video_ext_in_config_t *video_ext_in_config)
Graphics Video initialization processing
If setting INPUT_SEL_VDEC in video_input_sel parameter, set NULL in video_ext_in_config parameter.
graphics_error_t Graphics_Lcd_Port_Init (PinName *pin, unsigned int pin_count)
LCD output port initialization processing.
graphics_error_t Graphics_Lvds_Port_Init (PinName *pin, unsigned int pin_count)
LVDS output port initialization processing.
graphics_error_t Graphics_Dvinput_Port_Init (PinName *pin, unsigned int pin_count)
Digital video input port initialization processing.
graphics_error_t Graphics_Irq_Handler_Set ( int_type_t Graphics_Irq_Handler_Set, unsigned short num, void(*callback)( int_type_t ))
Interrupt callback setup This function performs the following processing:

  • Enables the interrupt when the pointer to the corresponding interrupt callback function is specified.

graphics_error_t Graphics_Start ( graphics_layer_t layer_id)
Start the graphics surface read process.
graphics_error_t Graphics_Stop ( graphics_layer_t layer_id)
Stop the graphics surface read process.
graphics_error_t Video_Start ( video_input_channel_t video_input_channel)
Start the video surface write process.
graphics_error_t Video_Stop ( video_input_channel_t video_input_channel)
Stop the video surface write process.
graphics_error_t Graphics_Read_Setting ( graphics_layer_t layer_id, void *framebuff, unsigned int fb_stride, graphics_format_t gr_format, wr_rd_swa_t wr_rd_swa, rect_t *gr_rect)
Graphics surface read process setting.
graphics_error_t Graphics_Read_Change ( graphics_layer_t layer_id, void *framebuff)
Graphics surface read buffer change process.
graphics_error_t Video_Write_Setting ( video_input_channel_t video_input_channel, graphics_video_col_sys_t col_sys, void *framebuff, unsigned int fb_stride, video_format_t video_format, wr_rd_swa_t wr_rd_swa, unsigned short video_write_buff_vw, unsigned short video_write_buff_hw)
Video surface write process setting.
graphics_error_t Video_Write_Change ( video_input_channel_t video_input_channel, void *framebuff, uint32_t fb_stride)
Video surface write buffer change process.

Interface

See the Pinout page for more details

video_decoder/video_decoder.c@4:aeefe5171463, 2016-06-30 (annotated)

Committer:
dkato
Date:
Thu Jun 30 11:00:37 2016 +0000
Revision:
4:aeefe5171463
Parent:
0:853f5b7408a7 
Add ARGB4444 to graphics layer read format.

Who changed what in which revision?

UserRevisionLine numberNew contents of line
dkato 0:853f5b7408a7 1 /*******************************************************************************
dkato 0:853f5b7408a7 2 * DISCLAIMER
dkato 0:853f5b7408a7 3 * This software is supplied by Renesas Electronics Corporation and is only
dkato 0:853f5b7408a7 4 * intended for use with Renesas products. No other uses are authorized. This
dkato 0:853f5b7408a7 5 * software is owned by Renesas Electronics Corporation and is protected under
dkato 0:853f5b7408a7 6 * all applicable laws, including copyright laws.
dkato 0:853f5b7408a7 7 * THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING
dkato 0:853f5b7408a7 8 * THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT
dkato 0:853f5b7408a7 9 * LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE
dkato 0:853f5b7408a7 10 * AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.
dkato 0:853f5b7408a7 11 * TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS
dkato 0:853f5b7408a7 12 * ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE
dkato 0:853f5b7408a7 13 * FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR
dkato 0:853f5b7408a7 14 * ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE
dkato 0:853f5b7408a7 15 * BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
dkato 0:853f5b7408a7 16 * Renesas reserves the right, without notice, to make changes to this software
dkato 0:853f5b7408a7 17 * and to discontinue the availability of this software. By using this software,
dkato 0:853f5b7408a7 18 * you agree to the additional terms and conditions found by accessing the
dkato 0:853f5b7408a7 19 * following link:
dkato 0:853f5b7408a7 20 * http://www.renesas.com/disclaimer
dkato 0:853f5b7408a7 21 * Copyright (C) 2012 - 2015 Renesas Electronics Corporation. All rights reserved.
dkato 0:853f5b7408a7 22 *******************************************************************************/
dkato 0:853f5b7408a7 23 /**************************************************************************//**
dkato 0:853f5b7408a7 24 * @file video_decoder.c
dkato 0:853f5b7408a7 25 * @version 1.00
dkato 0:853f5b7408a7 26 * $Rev: 199 $
dkato 0:853f5b7408a7 27 * $Date:: 2014-05-23 16:33:52 +0900#$
dkato 0:853f5b7408a7 28 * @brief Video decoder function
dkato 0:853f5b7408a7 29 ******************************************************************************/
dkato 0:853f5b7408a7 30
dkato 0:853f5b7408a7 31 /******************************************************************************
dkato 0:853f5b7408a7 32 Includes <System Includes> , "Project Includes"
dkato 0:853f5b7408a7 33 ******************************************************************************/
dkato 0:853f5b7408a7 34 #include <stdlib.h>
dkato 0:853f5b7408a7 35 #include <string.h>
dkato 0:853f5b7408a7 36
dkato 0:853f5b7408a7 37 #include "r_typedefs.h"
dkato 0:853f5b7408a7 38 #include "iodefine.h"
dkato 0:853f5b7408a7 39
dkato 0:853f5b7408a7 40 #include "r_vdec.h"
dkato 0:853f5b7408a7 41 #include "r_vdec_user.h"
dkato 0:853f5b7408a7 42
dkato 0:853f5b7408a7 43 #include "video_decoder.h"
dkato 0:853f5b7408a7 44
dkato 0:853f5b7408a7 45
dkato 0:853f5b7408a7 46 /******************************************************************************
dkato 0:853f5b7408a7 47 Macro definitions
dkato 0:853f5b7408a7 48 ******************************************************************************/
dkato 0:853f5b7408a7 49 #define STBCR7_BIT7 (0x80u)
dkato 0:853f5b7408a7 50 #define STBCR7_BIT6 (0x40u)
dkato 0:853f5b7408a7 51
dkato 0:853f5b7408a7 52 /*! Video decoder recommended value */
dkato 0:853f5b7408a7 53 #define SRCLEFT_NTSC_3_58 ((uint16_t)256u)
dkato 0:853f5b7408a7 54 #define SRCLEFT_NTSC_4_43 ((uint16_t)256u)
dkato 0:853f5b7408a7 55 #define SRCLEFT_PAL_4_43 ((uint16_t)256u)
dkato 0:853f5b7408a7 56 #define SRCLEFT_PAL_M ((uint16_t)256u)
dkato 0:853f5b7408a7 57 #define SRCLEFT_PAL_N ((uint16_t)256u)
dkato 0:853f5b7408a7 58 #define SRCLEFT_SECAM ((uint16_t)256u)
dkato 0:853f5b7408a7 59 #define SRCLEFT_NTSC_443_60 ((uint16_t)256u)
dkato 0:853f5b7408a7 60 #define SRCLEFT_PAL_60 ((uint16_t)256u)
dkato 0:853f5b7408a7 61
dkato 0:853f5b7408a7 62 #define SRCTOP_NTSC_3_58 ((uint16_t)16u)
dkato 0:853f5b7408a7 63 #define SRCTOP_NTSC_4_43 ((uint16_t)19u)
dkato 0:853f5b7408a7 64 #define SRCTOP_PAL_4_43 ((uint16_t)19u)
dkato 0:853f5b7408a7 65 #define SRCTOP_PAL_M ((uint16_t)16u)
dkato 0:853f5b7408a7 66 #define SRCTOP_PAL_N ((uint16_t)19u)
dkato 0:853f5b7408a7 67 #define SRCTOP_SECAM ((uint16_t)19u)
dkato 0:853f5b7408a7 68 #define SRCTOP_NTSC_443_60 ((uint16_t)16u)
dkato 0:853f5b7408a7 69 #define SRCTOP_PAL_60 ((uint16_t)16u)
dkato 0:853f5b7408a7 70
dkato 0:853f5b7408a7 71 #define SRCHEIGHT_NTSC_3_58 ((uint16_t)241u)
dkato 0:853f5b7408a7 72 #define SRCHEIGHT_NTSC_4_43 ((uint16_t)288u)
dkato 0:853f5b7408a7 73 #define SRCHEIGHT_PAL_4_43 ((uint16_t)288u)
dkato 0:853f5b7408a7 74 #define SRCHEIGHT_PAL_M ((uint16_t)241u)
dkato 0:853f5b7408a7 75 #define SRCHEIGHT_PAL_N ((uint16_t)288u)
dkato 0:853f5b7408a7 76 #define SRCHEIGHT_SECAM ((uint16_t)288u)
dkato 0:853f5b7408a7 77 #define SRCHEIGHT_NTSC_443_60 ((uint16_t)241u)
dkato 0:853f5b7408a7 78 #define SRCHEIGHT_PAL_60 ((uint16_t)241u)
dkato 0:853f5b7408a7 79
dkato 0:853f5b7408a7 80 #define SRCWIDTH_NTSC_3_58 ((uint16_t)1428u)
dkato 0:853f5b7408a7 81 #define SRCWIDTH_NTSC_4_43 ((uint16_t)1412u)
dkato 0:853f5b7408a7 82 #define SRCWIDTH_PAL_4_43 ((uint16_t)1412u)
dkato 0:853f5b7408a7 83 #define SRCWIDTH_PAL_M ((uint16_t)1428u)
dkato 0:853f5b7408a7 84 #define SRCWIDTH_PAL_N ((uint16_t)1412u)
dkato 0:853f5b7408a7 85 #define SRCWIDTH_SECAM ((uint16_t)1412u)
dkato 0:853f5b7408a7 86 #define SRCWIDTH_NTSC_443_60 ((uint16_t)1428u)
dkato 0:853f5b7408a7 87 #define SRCWIDTH_PAL_60 ((uint16_t)1428u)
dkato 0:853f5b7408a7 88
dkato 0:853f5b7408a7 89 #define HAFCTYP_NTSC_3_58 ((uint16_t)692u)
dkato 0:853f5b7408a7 90 #define HAFCTYP_NTSC_4_43 ((uint16_t)704u)
dkato 0:853f5b7408a7 91 #define HAFCTYP_PAL_4_43 ((uint16_t)704u)
dkato 0:853f5b7408a7 92 #define HAFCTYP_PAL_M ((uint16_t)692u)
dkato 0:853f5b7408a7 93 #define HAFCTYP_PAL_N ((uint16_t)704u)
dkato 0:853f5b7408a7 94 #define HAFCTYP_SECAM ((uint16_t)704u)
dkato 0:853f5b7408a7 95 #define HAFCTYP_NTSC_443_60 ((uint16_t)692u)
dkato 0:853f5b7408a7 96 #define HAFCTYP_PAL_60 ((uint16_t)692u)
dkato 0:853f5b7408a7 97
dkato 0:853f5b7408a7 98 #define HAFCMAX_NTSC_3_58 ((uint16_t)792u)
dkato 0:853f5b7408a7 99 #define HAFCMAX_NTSC_4_43 ((uint16_t)785u)
dkato 0:853f5b7408a7 100 #define HAFCMAX_PAL_4_43 ((uint16_t)785u)
dkato 0:853f5b7408a7 101 #define HAFCMAX_PAL_M ((uint16_t)792u)
dkato 0:853f5b7408a7 102 #define HAFCMAX_PAL_N ((uint16_t)785u)
dkato 0:853f5b7408a7 103 #define HAFCMAX_SECAM ((uint16_t)785u)
dkato 0:853f5b7408a7 104 #define HAFCMAX_NTSC_443_60 ((uint16_t)792u)
dkato 0:853f5b7408a7 105 #define HAFCMAX_PAL_60 ((uint16_t)792u)
dkato 0:853f5b7408a7 106
dkato 0:853f5b7408a7 107 #define HAFCMIN_NTSC_3_58 ((uint16_t)592u)
dkato 0:853f5b7408a7 108 #define HAFCMIN_NTSC_4_43 ((uint16_t)630u)
dkato 0:853f5b7408a7 109 #define HAFCMIN_PAL_4_43 ((uint16_t)630u)
dkato 0:853f5b7408a7 110 #define HAFCMIN_PAL_M ((uint16_t)592u)
dkato 0:853f5b7408a7 111 #define HAFCMIN_PAL_N ((uint16_t)630u)
dkato 0:853f5b7408a7 112 #define HAFCMIN_SECAM ((uint16_t)630u)
dkato 0:853f5b7408a7 113 #define HAFCMIN_NTSC_443_60 ((uint16_t)592u)
dkato 0:853f5b7408a7 114 #define HAFCMIN_PAL_60 ((uint16_t)592u)
dkato 0:853f5b7408a7 115
dkato 0:853f5b7408a7 116 #define VCDWINDOW_NTSC_3_58 ((uint16_t)30u)
dkato 0:853f5b7408a7 117 #define VCDWINDOW_NTSC_4_43 ((uint16_t)30u)
dkato 0:853f5b7408a7 118 #define VCDWINDOW_PAL_4_43 ((uint16_t)30u)
dkato 0:853f5b7408a7 119 #define VCDWINDOW_PAL_M ((uint16_t)30u)
dkato 0:853f5b7408a7 120 #define VCDWINDOW_PAL_N ((uint16_t)30u)
dkato 0:853f5b7408a7 121 #define VCDWINDOW_SECAM ((uint16_t)30u)
dkato 0:853f5b7408a7 122 #define VCDWINDOW_NTSC_443_60 ((uint16_t)30u)
dkato 0:853f5b7408a7 123 #define VCDWINDOW_PAL_60 ((uint16_t)30u)
dkato 0:853f5b7408a7 124
dkato 0:853f5b7408a7 125 #define VCDOFFSET_NTSC_3_58 ((uint16_t)15u)
dkato 0:853f5b7408a7 126 #define VCDOFFSET_NTSC_4_43 ((uint16_t)15u)
dkato 0:853f5b7408a7 127 #define VCDOFFSET_PAL_4_43 ((uint16_t)15u)
dkato 0:853f5b7408a7 128 #define VCDOFFSET_PAL_M ((uint16_t)15u)
dkato 0:853f5b7408a7 129 #define VCDOFFSET_PAL_N ((uint16_t)15u)
dkato 0:853f5b7408a7 130 #define VCDOFFSET_SECAM ((uint16_t)15u)
dkato 0:853f5b7408a7 131 #define VCDOFFSET_NTSC_443_60 ((uint16_t)15u)
dkato 0:853f5b7408a7 132 #define VCDOFFSET_PAL_60 ((uint16_t)15u)
dkato 0:853f5b7408a7 133
dkato 0:853f5b7408a7 134 #define ACCLEVEL_NTSC_3_58 ((uint16_t)220u)
dkato 0:853f5b7408a7 135 #define ACCLEVEL_NTSC_4_43 ((uint16_t)220u)
dkato 0:853f5b7408a7 136 #define ACCLEVEL_PAL_4_43 ((uint16_t)220u)
dkato 0:853f5b7408a7 137 #define ACCLEVEL_PAL_M ((uint16_t)230u)
dkato 0:853f5b7408a7 138 #define ACCLEVEL_PAL_N ((uint16_t)230u)
dkato 0:853f5b7408a7 139 #define ACCLEVEL_SECAM ((uint16_t)220u)
dkato 0:853f5b7408a7 140 #define ACCLEVEL_NTSC_443_60 ((uint16_t)220u)
dkato 0:853f5b7408a7 141 #define ACCLEVEL_PAL_60 ((uint16_t)230u)
dkato 0:853f5b7408a7 142
dkato 0:853f5b7408a7 143 #define AGCLEVEL_NTSC_3_58 ((uint16_t)230u)
dkato 0:853f5b7408a7 144 #define AGCLEVEL_NTSC_4_43 ((uint16_t)230u)
dkato 0:853f5b7408a7 145 #define AGCLEVEL_PAL_4_43 ((uint16_t)242u)
dkato 0:853f5b7408a7 146 #define AGCLEVEL_PAL_M ((uint16_t)242u)
dkato 0:853f5b7408a7 147 #define AGCLEVEL_PAL_N ((uint16_t)242u)
dkato 0:853f5b7408a7 148 #define AGCLEVEL_SECAM ((uint16_t)242u)
dkato 0:853f5b7408a7 149 #define AGCLEVEL_NTSC_443_60 ((uint16_t)230u)
dkato 0:853f5b7408a7 150 #define AGCLEVEL_PAL_60 ((uint16_t)242u)
dkato 0:853f5b7408a7 151
dkato 0:853f5b7408a7 152 #define K15_NTSC_3_58 ((uint16_t)2u)
dkato 0:853f5b7408a7 153 #define K15_NTSC_4_43 ((uint16_t)2u)
dkato 0:853f5b7408a7 154 #define K15_PAL_4_43 ((uint16_t)2u)
dkato 0:853f5b7408a7 155 #define K15_PAL_M ((uint16_t)2u)
dkato 0:853f5b7408a7 156 #define K15_PAL_N ((uint16_t)2u)
dkato 0:853f5b7408a7 157 #define K15_SECAM ((uint16_t)2u)
dkato 0:853f5b7408a7 158 #define K15_NTSC_443_60 ((uint16_t)2u)
dkato 0:853f5b7408a7 159 #define K15_PAL_60 ((uint16_t)2u)
dkato 0:853f5b7408a7 160
dkato 0:853f5b7408a7 161 #define K13_NTSC_3_58 ((uint16_t)8u)
dkato 0:853f5b7408a7 162 #define K13_NTSC_4_43 ((uint16_t)8u)
dkato 0:853f5b7408a7 163 #define K13_PAL_4_43 ((uint16_t)8u)
dkato 0:853f5b7408a7 164 #define K13_PAL_M ((uint16_t)8u)
dkato 0:853f5b7408a7 165 #define K13_PAL_N ((uint16_t)8u)
dkato 0:853f5b7408a7 166 #define K13_SECAM ((uint16_t)8u)
dkato 0:853f5b7408a7 167 #define K13_NTSC_443_60 ((uint16_t)8u)
dkato 0:853f5b7408a7 168 #define K13_PAL_60 ((uint16_t)8u)
dkato 0:853f5b7408a7 169
dkato 0:853f5b7408a7 170 #define K11_NTSC_3_58 ((uint16_t)4u)
dkato 0:853f5b7408a7 171 #define K11_NTSC_4_43 ((uint16_t)4u)
dkato 0:853f5b7408a7 172 #define K11_PAL_4_43 ((uint16_t)3u)
dkato 0:853f5b7408a7 173 #define K11_PAL_M ((uint16_t)3u)
dkato 0:853f5b7408a7 174 #define K11_PAL_N ((uint16_t)3u)
dkato 0:853f5b7408a7 175 #define K11_SECAM ((uint16_t)4u)
dkato 0:853f5b7408a7 176 #define K11_NTSC_443_60 ((uint16_t)4u)
dkato 0:853f5b7408a7 177 #define K11_PAL_60 ((uint16_t)3u)
dkato 0:853f5b7408a7 178
dkato 0:853f5b7408a7 179 #define K16_NTSC_3_58 ((uint16_t)3u)
dkato 0:853f5b7408a7 180 #define K16_NTSC_4_43 ((uint16_t)3u)
dkato 0:853f5b7408a7 181 #define K16_PAL_4_43 ((uint16_t)4u)
dkato 0:853f5b7408a7 182 #define K16_PAL_M ((uint16_t)4u)
dkato 0:853f5b7408a7 183 #define K16_PAL_N ((uint16_t)4u)
dkato 0:853f5b7408a7 184 #define K16_SECAM ((uint16_t)3u)
dkato 0:853f5b7408a7 185 #define K16_NTSC_443_60 ((uint16_t)3u)
dkato 0:853f5b7408a7 186 #define K16_PAL_60 ((uint16_t)4u)
dkato 0:853f5b7408a7 187
dkato 0:853f5b7408a7 188 #define K14_NTSC_3_58 ((uint16_t)16u)
dkato 0:853f5b7408a7 189 #define K14_NTSC_4_43 ((uint16_t)16u)
dkato 0:853f5b7408a7 190 #define K14_PAL_4_43 ((uint16_t)63u)
dkato 0:853f5b7408a7 191 #define K14_PAL_M ((uint16_t)63u)
dkato 0:853f5b7408a7 192 #define K14_PAL_N ((uint16_t)63u)
dkato 0:853f5b7408a7 193 #define K14_SECAM ((uint16_t)16u)
dkato 0:853f5b7408a7 194 #define K14_NTSC_443_60 ((uint16_t)16u)
dkato 0:853f5b7408a7 195 #define K14_PAL_60 ((uint16_t)63u)
dkato 0:853f5b7408a7 196
dkato 0:853f5b7408a7 197 #define K12_NTSC_3_58 ((uint16_t)8u)
dkato 0:853f5b7408a7 198 #define K12_NTSC_4_43 ((uint16_t)8u)
dkato 0:853f5b7408a7 199 #define K12_PAL_4_43 ((uint16_t)2u)
dkato 0:853f5b7408a7 200 #define K12_PAL_M ((uint16_t)2u)
dkato 0:853f5b7408a7 201 #define K12_PAL_N ((uint16_t)2u)
dkato 0:853f5b7408a7 202 #define K12_SECAM ((uint16_t)1u)
dkato 0:853f5b7408a7 203 #define K12_NTSC_443_60 ((uint16_t)8u)
dkato 0:853f5b7408a7 204 #define K12_PAL_60 ((uint16_t)2u)
dkato 0:853f5b7408a7 205
dkato 0:853f5b7408a7 206 #define K22A_NTSC_3_58 ((uint16_t)32u)
dkato 0:853f5b7408a7 207 #define K22A_NTSC_4_43 ((uint16_t)32u)
dkato 0:853f5b7408a7 208 #define K22A_PAL_4_43 ((uint16_t)32u)
dkato 0:853f5b7408a7 209 #define K22A_PAL_M ((uint16_t)32u)
dkato 0:853f5b7408a7 210 #define K22A_PAL_N ((uint16_t)32u)
dkato 0:853f5b7408a7 211 #define K22A_SECAM ((uint16_t)32u)
dkato 0:853f5b7408a7 212 #define K22A_NTSC_443_60 ((uint16_t)32u)
dkato 0:853f5b7408a7 213 #define K22A_PAL_60 ((uint16_t)32u)
dkato 0:853f5b7408a7 214
dkato 0:853f5b7408a7 215 #define K21A_NTSC_3_58 ((uint16_t)6u)
dkato 0:853f5b7408a7 216 #define K21A_NTSC_4_43 ((uint16_t)6u)
dkato 0:853f5b7408a7 217 #define K21A_PAL_4_43 ((uint16_t)10u)
dkato 0:853f5b7408a7 218 #define K21A_PAL_M ((uint16_t)10u)
dkato 0:853f5b7408a7 219 #define K21A_PAL_N ((uint16_t)10u)
dkato 0:853f5b7408a7 220 #define K21A_SECAM ((uint16_t)10u)
dkato 0:853f5b7408a7 221 #define K21A_NTSC_443_60 ((uint16_t)6u)
dkato 0:853f5b7408a7 222 #define K21A_PAL_60 ((uint16_t)10u)
dkato 0:853f5b7408a7 223
dkato 0:853f5b7408a7 224 #define K22B_NTSC_3_58 ((uint16_t)8u)
dkato 0:853f5b7408a7 225 #define K22B_NTSC_4_43 ((uint16_t)8u)
dkato 0:853f5b7408a7 226 #define K22B_PAL_4_43 ((uint16_t)15u)
dkato 0:853f5b7408a7 227 #define K22B_PAL_M ((uint16_t)15u)
dkato 0:853f5b7408a7 228 #define K22B_PAL_N ((uint16_t)15u)
dkato 0:853f5b7408a7 229 #define K22B_SECAM ((uint16_t)15u)
dkato 0:853f5b7408a7 230 #define K22B_NTSC_443_60 ((uint16_t)8u)
dkato 0:853f5b7408a7 231 #define K22B_PAL_60 ((uint16_t)15u)
dkato 0:853f5b7408a7 232
dkato 0:853f5b7408a7 233 #define K21B_NTSC_3_58 ((uint16_t)6u)
dkato 0:853f5b7408a7 234 #define K21B_NTSC_4_43 ((uint16_t)6u)
dkato 0:853f5b7408a7 235 #define K21B_PAL_4_43 ((uint16_t)10u)
dkato 0:853f5b7408a7 236 #define K21B_PAL_M ((uint16_t)10u)
dkato 0:853f5b7408a7 237 #define K21B_PAL_N ((uint16_t)10u)
dkato 0:853f5b7408a7 238 #define K21B_SECAM ((uint16_t)6u)
dkato 0:853f5b7408a7 239 #define K21B_NTSC_443_60 ((uint16_t)6u)
dkato 0:853f5b7408a7 240 #define K21B_PAL_60 ((uint16_t)10u)
dkato 0:853f5b7408a7 241
dkato 0:853f5b7408a7 242 #define K23B_NTSC_3_58 ((uint16_t)6u)
dkato 0:853f5b7408a7 243 #define K23B_NTSC_4_43 ((uint16_t)6u)
dkato 0:853f5b7408a7 244 #define K23B_PAL_4_43 ((uint16_t)3u)
dkato 0:853f5b7408a7 245 #define K23B_PAL_M ((uint16_t)3u)
dkato 0:853f5b7408a7 246 #define K23B_PAL_N ((uint16_t)3u)
dkato 0:853f5b7408a7 247 #define K23B_SECAM ((uint16_t)3u)
dkato 0:853f5b7408a7 248 #define K23B_NTSC_443_60 ((uint16_t)6u)
dkato 0:853f5b7408a7 249 #define K23B_PAL_60 ((uint16_t)3u)
dkato 0:853f5b7408a7 250
dkato 0:853f5b7408a7 251 #define K23A_NTSC_3_58 ((uint16_t)3u)
dkato 0:853f5b7408a7 252 #define K23A_NTSC_4_43 ((uint16_t)3u)
dkato 0:853f5b7408a7 253 #define K23A_PAL_4_43 ((uint16_t)3u)
dkato 0:853f5b7408a7 254 #define K23A_PAL_M ((uint16_t)3u)
dkato 0:853f5b7408a7 255 #define K23A_PAL_N ((uint16_t)3u)
dkato 0:853f5b7408a7 256 #define K23A_SECAM ((uint16_t)3u)
dkato 0:853f5b7408a7 257 #define K23A_NTSC_443_60 ((uint16_t)3u)
dkato 0:853f5b7408a7 258 #define K23A_PAL_60 ((uint16_t)3u)
dkato 0:853f5b7408a7 259
dkato 0:853f5b7408a7 260 #define K24_NTSC_3_58 ((uint16_t)5u)
dkato 0:853f5b7408a7 261 #define K24_NTSC_4_43 ((uint16_t)5u)
dkato 0:853f5b7408a7 262 #define K24_PAL_4_43 ((uint16_t)8u)
dkato 0:853f5b7408a7 263 #define K24_PAL_M ((uint16_t)8u)
dkato 0:853f5b7408a7 264 #define K24_PAL_N ((uint16_t)8u)
dkato 0:853f5b7408a7 265 #define K24_SECAM ((uint16_t)8u)
dkato 0:853f5b7408a7 266 #define K24_NTSC_443_60 ((uint16_t)5u)
dkato 0:853f5b7408a7 267 #define K24_PAL_60 ((uint16_t)8u)
dkato 0:853f5b7408a7 268
dkato 0:853f5b7408a7 269 /* SyncSep */
dkato 0:853f5b7408a7 270 #define SYNCMAXDUTY_H_VALUE ((uint16_t)15u)
dkato 0:853f5b7408a7 271 #define SYNCMINDUTY_H_VALUE ((uint16_t)10u)
dkato 0:853f5b7408a7 272 #define CSYNCSLICE_H_VALUE ((uint16_t)146u)
dkato 0:853f5b7408a7 273 #define SYNCMAXDUTY_V_VALUE ((uint16_t)15u)
dkato 0:853f5b7408a7 274 #define SYNCMINDUTY_V_VALUE ((uint16_t)9u)
dkato 0:853f5b7408a7 275 #define VSYNCSLICE_VALUE ((uint16_t)10u)
dkato 0:853f5b7408a7 276 #define CSYNCSLICE_V_VALUE ((uint16_t)146u)
dkato 0:853f5b7408a7 277 #define HAFCGAIN_VALUE ((uint16_t)12u)
dkato 0:853f5b7408a7 278 #define HAFCSTART_VALUE ((uint16_t)0u)
dkato 0:853f5b7408a7 279 #define HAFCEND_VALUE ((uint16_t)8u)
dkato 0:853f5b7408a7 280 #define AGCRESPONSE_VALUE ((uint16_t)4u)
dkato 0:853f5b7408a7 281 #define AGCPRECIS_VALUE ((uint16_t)10u)
dkato 0:853f5b7408a7 282 #define PGA_GAIN_VALUE ((uint16_t)0u)
dkato 0:853f5b7408a7 283 #define PEAKATTACK_VALUE ((uint16_t)2u)
dkato 0:853f5b7408a7 284 #define PEAKRELEASE_VALUE ((uint16_t)3u)
dkato 0:853f5b7408a7 285 #define MAXPEAKSAMPLES_VALUE ((uint16_t)20u)
dkato 0:853f5b7408a7 286
dkato 0:853f5b7408a7 287 /* YcSep */
dkato 0:853f5b7408a7 288 #define RADJ_O_LEVEL0_VALUE ((uint16_t)928u)
dkato 0:853f5b7408a7 289 #define RADJ_U_LEVEL0_VALUE ((uint16_t)32u)
dkato 0:853f5b7408a7 290 #define RADJ_O_LEVEL1_VALUE ((uint16_t)960u)
dkato 0:853f5b7408a7 291 #define RADJ_U_LEVEL1_VALUE ((uint16_t)48u)
dkato 0:853f5b7408a7 292 #define RADJ_O_LEVEL2_VALUE ((uint16_t)992u)
dkato 0:853f5b7408a7 293 #define RADJ_U_LEVEL2_VALUE ((uint16_t)64u)
dkato 0:853f5b7408a7 294 #define V_Y_LEVEL_VALUE ((uint16_t)0u)
dkato 0:853f5b7408a7 295
dkato 0:853f5b7408a7 296 /* ChromaDec */
dkato 0:853f5b7408a7 297 #define LUMADELAY_VALUE ((uint16_t)0u)
dkato 0:853f5b7408a7 298 #define LOOPGAIN_VALUE ((uint16_t)3u)
dkato 0:853f5b7408a7 299 #define LOCKLIMIT_VALUE ((uint16_t)1u)
dkato 0:853f5b7408a7 300 #define BGPCHECK_VALUE ((uint16_t)0u)
dkato 0:853f5b7408a7 301 #define BGPWIDTH_VALUE ((uint16_t)54u)
dkato 0:853f5b7408a7 302 #define BGPSTART_VALUE ((uint16_t)110u)
dkato 0:853f5b7408a7 303 #define CHROMAMAINGAIN_VALUE ((uint16_t)210u)
dkato 0:853f5b7408a7 304 #define ACCRESPONSE_VALUE ((uint16_t)1u)
dkato 0:853f5b7408a7 305 #define ACCPRECIS_VALUE ((uint16_t)8u)
dkato 0:853f5b7408a7 306 #define KILLERLEVEL_VALUE ((uint16_t)4u)
dkato 0:853f5b7408a7 307 #define KILLEROFFSET_VALUE ((uint16_t)5u)
dkato 0:853f5b7408a7 308
dkato 0:853f5b7408a7 309 /* DigitalClamp */
dkato 0:853f5b7408a7 310 #define BLANKLEVEL_Y_VALUE ((uint16_t)984u)
dkato 0:853f5b7408a7 311 #define DCPPOS_Y_VALUE ((uint16_t)162u)
dkato 0:853f5b7408a7 312 #define BLANKLEVEL_CB_VALUE ((uint16_t)0u)
dkato 0:853f5b7408a7 313 #define BLANKLEVEL_CR_VALUE ((uint16_t)0u)
dkato 0:853f5b7408a7 314 #define DCPPOS_C_VALUE ((uint16_t)54u)
dkato 0:853f5b7408a7 315 #define ACFLAGTIME_VALUE ((uint16_t)0u)
dkato 0:853f5b7408a7 316 #define ACFFILTER_VALUE ((uint16_t)3u)
dkato 0:853f5b7408a7 317 #define DCPRESPONSE_VALUE ((uint16_t)0u)
dkato 0:853f5b7408a7 318 #define DCPSTART_VALUE ((uint16_t)16u)
dkato 0:853f5b7408a7 319 #define DCPEND_VALUE ((uint16_t)16u)
dkato 0:853f5b7408a7 320 #define DCPWIDTH_VALUE ((uint16_t)27u)
dkato 0:853f5b7408a7 321
dkato 0:853f5b7408a7 322 /* Output */
dkato 0:853f5b7408a7 323 #define Y_GAIN2_VALUE ((uint16_t)816u)
dkato 0:853f5b7408a7 324 #define CB_GAIN2_VALUE ((uint16_t)663u)
dkato 0:853f5b7408a7 325 #define CR_GAIN2_VALUE ((uint16_t)663u)
dkato 0:853f5b7408a7 326
dkato 0:853f5b7408a7 327
dkato 0:853f5b7408a7 328 /******************************************************************************
dkato 0:853f5b7408a7 329 Typedef definitions
dkato 0:853f5b7408a7 330 ******************************************************************************/
dkato 0:853f5b7408a7 331 /*! Video decoder recommended value */
dkato 0:853f5b7408a7 332 typedef struct {
dkato 0:853f5b7408a7 333 /* Capturing position setting */
dkato 0:853f5b7408a7 334 uint16_t srcleft;
dkato 0:853f5b7408a7 335 uint16_t srctop;
dkato 0:853f5b7408a7 336 uint16_t srcheight;
dkato 0:853f5b7408a7 337 uint16_t srcwidth;
dkato 0:853f5b7408a7 338 /* Horizontal AFC setting */
dkato 0:853f5b7408a7 339 uint16_t hafctyp;
dkato 0:853f5b7408a7 340 uint16_t hafcmax;
dkato 0:853f5b7408a7 341 uint16_t hafcmin;
dkato 0:853f5b7408a7 342 /* Vertical countdown setting */
dkato 0:853f5b7408a7 343 vdec_onoff_t novcd50_;
dkato 0:853f5b7408a7 344 vdec_onoff_t novcd60_;
dkato 0:853f5b7408a7 345 vdec_vcddefault_t vcddefault;
dkato 0:853f5b7408a7 346 uint16_t vcdwindow;
dkato 0:853f5b7408a7 347 uint16_t vcdoffset;
dkato 0:853f5b7408a7 348 /* BCO setting */
dkato 0:853f5b7408a7 349 vdec_color_sys_t defaultsys;
dkato 0:853f5b7408a7 350 vdec_onoff_t nontsc358_;
dkato 0:853f5b7408a7 351 vdec_onoff_t nontsc443_;
dkato 0:853f5b7408a7 352 vdec_onoff_t nopalm_;
dkato 0:853f5b7408a7 353 vdec_onoff_t nopaln_;
dkato 0:853f5b7408a7 354 vdec_onoff_t nopal443_;
dkato 0:853f5b7408a7 355 vdec_onoff_t nosecam_;
dkato 0:853f5b7408a7 356 /* ACC level setting */
dkato 0:853f5b7408a7 357 uint16_t acclevel;
dkato 0:853f5b7408a7 358 /* AGC level setting */
dkato 0:853f5b7408a7 359 uint16_t agclevel;
dkato 0:853f5b7408a7 360 /* Y/C separation setting */
dkato 0:853f5b7408a7 361 uint16_t k15;
dkato 0:853f5b7408a7 362 uint16_t k13;
dkato 0:853f5b7408a7 363 uint16_t k11;
dkato 0:853f5b7408a7 364 uint16_t k16;
dkato 0:853f5b7408a7 365 uint16_t k14;
dkato 0:853f5b7408a7 366 uint16_t k12;
dkato 0:853f5b7408a7 367 uint16_t k22A;
dkato 0:853f5b7408a7 368 uint16_t k21A;
dkato 0:853f5b7408a7 369 uint16_t k22B;
dkato 0:853f5b7408a7 370 uint16_t k21B;
dkato 0:853f5b7408a7 371 uint16_t k23B;
dkato 0:853f5b7408a7 372 uint16_t k23A;
dkato 0:853f5b7408a7 373 uint16_t k24;
dkato 0:853f5b7408a7 374 vdec_onoff_t det2_on;
dkato 0:853f5b7408a7 375 vdec_filmix_ratio_t hsel_mix_y;
dkato 0:853f5b7408a7 376 vdec_filmix_ratio_t vsel_mix_y;
dkato 0:853f5b7408a7 377 vdec_filmix_ratio_t hvsel_mix_y;
dkato 0:853f5b7408a7 378 vdec_filmix_ratio_t det2_mix_c;
dkato 0:853f5b7408a7 379 vdec_filmix_ratio_t det2_mix_y;
dkato 0:853f5b7408a7 380 vdec_2dfil_mdsel_t fil2_mode_2d;
dkato 0:853f5b7408a7 381 vdec_2d_fil_sel_t fil2_narrow_2d;
dkato 0:853f5b7408a7 382 } video_recmd_val_t;
dkato 0:853f5b7408a7 383
dkato 0:853f5b7408a7 384
dkato 0:853f5b7408a7 385 /******************************************************************************
dkato 0:853f5b7408a7 386 Imported global variables and functions (from other files)
dkato 0:853f5b7408a7 387 ******************************************************************************/
dkato 0:853f5b7408a7 388
dkato 0:853f5b7408a7 389 /******************************************************************************
dkato 0:853f5b7408a7 390 Exported global variables and functions (to be accessed by other files)
dkato 0:853f5b7408a7 391 ******************************************************************************/
dkato 0:853f5b7408a7 392
dkato 0:853f5b7408a7 393 /******************************************************************************
dkato 0:853f5b7408a7 394 Private global variables and functions
dkato 0:853f5b7408a7 395 ******************************************************************************/
dkato 0:853f5b7408a7 396 static void Input(const graphics_col_sys_t color_system, const vdec_channel_t channel);
dkato 0:853f5b7408a7 397 static void SyncSep(const graphics_col_sys_t color_system, const vdec_channel_t channel);
dkato 0:853f5b7408a7 398 static void YcSep(const graphics_col_sys_t color_system, const vdec_channel_t channel);
dkato 0:853f5b7408a7 399 static void ChromaDec(const graphics_col_sys_t color_system, const vdec_channel_t channel);
dkato 0:853f5b7408a7 400 static void DigitalClamp(const vdec_channel_t channel);
dkato 0:853f5b7408a7 401 static void Output(const vdec_channel_t channel);
dkato 0:853f5b7408a7 402
dkato 0:853f5b7408a7 403 static void init_func(const uint32_t user_num);
dkato 0:853f5b7408a7 404
dkato 0:853f5b7408a7 405 static const video_recmd_val_t RecommendedValue[GRPH_COL_SYS_NUM] = {
dkato 0:853f5b7408a7 406 { /* NTSC-3.58 */
dkato 0:853f5b7408a7 407 /* Capturing position setting */
dkato 0:853f5b7408a7 408 SRCLEFT_NTSC_3_58, SRCTOP_NTSC_3_58, SRCHEIGHT_NTSC_3_58, SRCWIDTH_NTSC_3_58,
dkato 0:853f5b7408a7 409 /* Horizontal AFC setting */
dkato 0:853f5b7408a7 410 HAFCTYP_NTSC_3_58, HAFCMAX_NTSC_3_58, HAFCMIN_NTSC_3_58,
dkato 0:853f5b7408a7 411 /* Vertical countdown setting */
dkato 0:853f5b7408a7 412 VDEC_OFF, VDEC_ON, VDEC_VCD_FRQ_59_94HZ, VCDWINDOW_NTSC_3_58, VCDOFFSET_NTSC_3_58,
dkato 0:853f5b7408a7 413 /* BCO setting */
dkato 0:853f5b7408a7 414 VDEC_COL_SYS_NTSC, VDEC_ON, VDEC_OFF, VDEC_OFF, VDEC_OFF, VDEC_OFF, VDEC_OFF,
dkato 0:853f5b7408a7 415 /* ACC level setting */
dkato 0:853f5b7408a7 416 ACCLEVEL_NTSC_3_58,
dkato 0:853f5b7408a7 417 /* AGC level setting */
dkato 0:853f5b7408a7 418 AGCLEVEL_NTSC_3_58,
dkato 0:853f5b7408a7 419 /* Y/C separation setting */
dkato 0:853f5b7408a7 420 K15_NTSC_3_58, K13_NTSC_3_58, K11_NTSC_3_58, K16_NTSC_3_58, K14_NTSC_3_58, K12_NTSC_3_58,
dkato 0:853f5b7408a7 421 K22A_NTSC_3_58, K21A_NTSC_3_58, K22B_NTSC_3_58, K21B_NTSC_3_58, K23B_NTSC_3_58, K23A_NTSC_3_58, K24_NTSC_3_58,
dkato 0:853f5b7408a7 422 VDEC_ON, VDEC_FILMIX_RATIO_75, VDEC_FILMIX_RATIO_75, VDEC_FILMIX_RATIO_0,
dkato 0:853f5b7408a7 423 VDEC_FILMIX_RATIO_0, VDEC_FILMIX_RATIO_25, VDEC_2DFIL_MDSEL_CASCADE, VDEC_2D_FIL_SEL_17TAP
dkato 0:853f5b7408a7 424 },
dkato 0:853f5b7408a7 425 { /* NTSC-4.43 */
dkato 0:853f5b7408a7 426 /* Capturing position setting */
dkato 0:853f5b7408a7 427 SRCLEFT_NTSC_4_43, SRCTOP_NTSC_4_43, SRCHEIGHT_NTSC_4_43, SRCWIDTH_NTSC_4_43,
dkato 0:853f5b7408a7 428 /* Horizontal AFC setting */
dkato 0:853f5b7408a7 429 HAFCTYP_NTSC_4_43, HAFCMAX_NTSC_4_43, HAFCMIN_NTSC_4_43,
dkato 0:853f5b7408a7 430 /* Vertical countdown setting */
dkato 0:853f5b7408a7 431 VDEC_ON, VDEC_OFF, VDEC_VCD_FRQ_50HZ, VCDWINDOW_NTSC_4_43, VCDOFFSET_NTSC_4_43,
dkato 0:853f5b7408a7 432 /* BCO setting */
dkato 0:853f5b7408a7 433 VDEC_COL_SYS_NTSC, VDEC_OFF, VDEC_ON, VDEC_OFF, VDEC_OFF, VDEC_OFF, VDEC_OFF,
dkato 0:853f5b7408a7 434 /* ACC level setting */
dkato 0:853f5b7408a7 435 ACCLEVEL_NTSC_4_43,
dkato 0:853f5b7408a7 436 /* AGC level setting */
dkato 0:853f5b7408a7 437 AGCLEVEL_NTSC_4_43,
dkato 0:853f5b7408a7 438 /* Y/C separation setting */
dkato 0:853f5b7408a7 439 K15_NTSC_4_43, K13_NTSC_4_43, K11_NTSC_4_43, K16_NTSC_4_43, K14_NTSC_4_43, K12_NTSC_4_43,
dkato 0:853f5b7408a7 440 K22A_NTSC_4_43, K21A_NTSC_4_43, K22B_NTSC_4_43, K21B_NTSC_4_43, K23B_NTSC_4_43, K23A_NTSC_4_43, K24_NTSC_4_43,
dkato 0:853f5b7408a7 441 VDEC_ON, VDEC_FILMIX_RATIO_75, VDEC_FILMIX_RATIO_75, VDEC_FILMIX_RATIO_0,
dkato 0:853f5b7408a7 442 VDEC_FILMIX_RATIO_0, VDEC_FILMIX_RATIO_25, VDEC_2DFIL_MDSEL_CASCADE, VDEC_2D_FIL_SEL_17TAP
dkato 0:853f5b7408a7 443 },
dkato 0:853f5b7408a7 444 { /* PAL-4.43 */
dkato 0:853f5b7408a7 445 /* Capturing position setting */
dkato 0:853f5b7408a7 446 SRCLEFT_PAL_4_43, SRCTOP_PAL_4_43, SRCHEIGHT_PAL_4_43, SRCWIDTH_PAL_4_43,
dkato 0:853f5b7408a7 447 /* Horizontal AFC setting */
dkato 0:853f5b7408a7 448 HAFCTYP_PAL_4_43, HAFCMAX_PAL_4_43, HAFCMIN_PAL_4_43,
dkato 0:853f5b7408a7 449 /* Vertical countdown setting */
dkato 0:853f5b7408a7 450 VDEC_ON, VDEC_OFF, VDEC_VCD_FRQ_50HZ, VCDWINDOW_PAL_4_43, VCDOFFSET_PAL_4_43,
dkato 0:853f5b7408a7 451 /* BCO setting */
dkato 0:853f5b7408a7 452 VDEC_COL_SYS_PAL, VDEC_OFF, VDEC_OFF, VDEC_OFF, VDEC_OFF, VDEC_ON, VDEC_OFF,
dkato 0:853f5b7408a7 453 /* ACC level setting */
dkato 0:853f5b7408a7 454 ACCLEVEL_PAL_4_43,
dkato 0:853f5b7408a7 455 /* AGC level setting */
dkato 0:853f5b7408a7 456 AGCLEVEL_PAL_4_43,
dkato 0:853f5b7408a7 457 /* Y/C separation setting */
dkato 0:853f5b7408a7 458 K15_PAL_4_43, K13_PAL_4_43, K11_PAL_4_43, K16_PAL_4_43, K14_PAL_4_43, K12_PAL_4_43,
dkato 0:853f5b7408a7 459 K22A_PAL_4_43, K21A_PAL_4_43, K22B_PAL_4_43, K21B_PAL_4_43, K23B_PAL_4_43, K23A_PAL_4_43, K24_PAL_4_43,
dkato 0:853f5b7408a7 460 VDEC_OFF, VDEC_FILMIX_RATIO_0, VDEC_FILMIX_RATIO_0, VDEC_FILMIX_RATIO_0,
dkato 0:853f5b7408a7 461 VDEC_FILMIX_RATIO_0, VDEC_FILMIX_RATIO_0, VDEC_2DFIL_MDSEL_BYPASS, VDEC_2D_FIL_SEL_17TAP
dkato 0:853f5b7408a7 462 },
dkato 0:853f5b7408a7 463 { /* PAL-M */
dkato 0:853f5b7408a7 464 /* Capturing position setting */
dkato 0:853f5b7408a7 465 SRCLEFT_PAL_M, SRCTOP_PAL_M, SRCHEIGHT_PAL_M, SRCWIDTH_PAL_M,
dkato 0:853f5b7408a7 466 /* Horizontal AFC setting */
dkato 0:853f5b7408a7 467 HAFCTYP_PAL_M, HAFCMAX_PAL_M, HAFCMIN_PAL_M,
dkato 0:853f5b7408a7 468 /* Vertical countdown setting */
dkato 0:853f5b7408a7 469 VDEC_OFF, VDEC_ON, VDEC_VCD_FRQ_59_94HZ, VCDWINDOW_PAL_M, VCDOFFSET_PAL_M,
dkato 0:853f5b7408a7 470 /* BCO setting */
dkato 0:853f5b7408a7 471 VDEC_COL_SYS_PAL, VDEC_OFF, VDEC_OFF, VDEC_ON, VDEC_OFF, VDEC_OFF, VDEC_OFF,
dkato 0:853f5b7408a7 472 /* ACC level setting */
dkato 0:853f5b7408a7 473 ACCLEVEL_PAL_M,
dkato 0:853f5b7408a7 474 /* AGC level setting */
dkato 0:853f5b7408a7 475 AGCLEVEL_PAL_M,
dkato 0:853f5b7408a7 476 /* Y/C separation setting */
dkato 0:853f5b7408a7 477 K15_PAL_M, K13_PAL_M, K11_PAL_M, K16_PAL_M, K14_PAL_M, K12_PAL_M,
dkato 0:853f5b7408a7 478 K22A_PAL_M, K21A_PAL_M, K22B_PAL_M, K21B_PAL_M, K23B_PAL_M, K23A_PAL_M, K24_PAL_M,
dkato 0:853f5b7408a7 479 VDEC_OFF, VDEC_FILMIX_RATIO_0, VDEC_FILMIX_RATIO_0, VDEC_FILMIX_RATIO_0,
dkato 0:853f5b7408a7 480 VDEC_FILMIX_RATIO_0, VDEC_FILMIX_RATIO_0, VDEC_2DFIL_MDSEL_BYPASS, VDEC_2D_FIL_SEL_17TAP
dkato 0:853f5b7408a7 481 },
dkato 0:853f5b7408a7 482 { /* PAL-N */
dkato 0:853f5b7408a7 483 /* Capturing position setting */
dkato 0:853f5b7408a7 484 SRCLEFT_PAL_N, SRCTOP_PAL_N, SRCHEIGHT_PAL_N, SRCWIDTH_PAL_N,
dkato 0:853f5b7408a7 485 /* Horizontal AFC setting */
dkato 0:853f5b7408a7 486 HAFCTYP_PAL_N, HAFCMAX_PAL_N, HAFCMIN_PAL_N,
dkato 0:853f5b7408a7 487 /* Vertical countdown setting */
dkato 0:853f5b7408a7 488 VDEC_ON, VDEC_OFF, VDEC_VCD_FRQ_50HZ, VCDWINDOW_PAL_N, VCDOFFSET_PAL_N,
dkato 0:853f5b7408a7 489 /* BCO setting */
dkato 0:853f5b7408a7 490 VDEC_COL_SYS_PAL, VDEC_OFF, VDEC_OFF, VDEC_OFF, VDEC_ON, VDEC_OFF, VDEC_OFF,
dkato 0:853f5b7408a7 491 /* ACC level setting */
dkato 0:853f5b7408a7 492 ACCLEVEL_PAL_N,
dkato 0:853f5b7408a7 493 /* AGC level setting */
dkato 0:853f5b7408a7 494 AGCLEVEL_PAL_N,
dkato 0:853f5b7408a7 495 /* Y/C separation setting */
dkato 0:853f5b7408a7 496 K15_PAL_N, K13_PAL_N, K11_PAL_N, K16_PAL_N, K14_PAL_N, K12_PAL_N,
dkato 0:853f5b7408a7 497 K22A_PAL_N, K21A_PAL_N, K22B_PAL_N, K21B_PAL_N, K23B_PAL_N, K23A_PAL_N, K24_PAL_N,
dkato 0:853f5b7408a7 498 VDEC_OFF, VDEC_FILMIX_RATIO_0, VDEC_FILMIX_RATIO_0, VDEC_FILMIX_RATIO_0,
dkato 0:853f5b7408a7 499 VDEC_FILMIX_RATIO_0, VDEC_FILMIX_RATIO_0, VDEC_2DFIL_MDSEL_BYPASS, VDEC_2D_FIL_SEL_17TAP
dkato 0:853f5b7408a7 500 },
dkato 0:853f5b7408a7 501 { /* SECAM */
dkato 0:853f5b7408a7 502 /* Capturing position setting */
dkato 0:853f5b7408a7 503 SRCLEFT_SECAM, SRCTOP_SECAM, SRCHEIGHT_SECAM, SRCWIDTH_SECAM,
dkato 0:853f5b7408a7 504 /* Horizontal AFC setting */
dkato 0:853f5b7408a7 505 HAFCTYP_SECAM, HAFCMAX_SECAM, HAFCMIN_SECAM,
dkato 0:853f5b7408a7 506 /* Vertical countdown setting */
dkato 0:853f5b7408a7 507 VDEC_ON, VDEC_OFF, VDEC_VCD_FRQ_50HZ, VCDWINDOW_SECAM, VCDOFFSET_SECAM,
dkato 0:853f5b7408a7 508 /* BCO setting */
dkato 0:853f5b7408a7 509 VDEC_COL_SYS_SECAM, VDEC_OFF, VDEC_OFF, VDEC_OFF, VDEC_OFF, VDEC_OFF, VDEC_ON,
dkato 0:853f5b7408a7 510 /* ACC level setting */
dkato 0:853f5b7408a7 511 ACCLEVEL_SECAM,
dkato 0:853f5b7408a7 512 /* AGC level setting */
dkato 0:853f5b7408a7 513 AGCLEVEL_SECAM,
dkato 0:853f5b7408a7 514 /* Y/C separation setting */
dkato 0:853f5b7408a7 515 K15_SECAM, K13_SECAM, K11_SECAM, K16_SECAM, K14_SECAM, K12_SECAM,
dkato 0:853f5b7408a7 516 K22A_SECAM, K21A_SECAM, K22B_SECAM, K21B_SECAM, K23B_SECAM, K23A_SECAM, K24_SECAM,
dkato 0:853f5b7408a7 517 VDEC_ON, VDEC_FILMIX_RATIO_75, VDEC_FILMIX_RATIO_75, VDEC_FILMIX_RATIO_0,
dkato 0:853f5b7408a7 518 VDEC_FILMIX_RATIO_0, VDEC_FILMIX_RATIO_0, VDEC_2DFIL_MDSEL_CASCADE, VDEC_2D_FIL_SEL_17TAP
dkato 0:853f5b7408a7 519 },
dkato 0:853f5b7408a7 520 { /* NTSC-4.43 (60Hz) */
dkato 0:853f5b7408a7 521 /* Capturing position setting */
dkato 0:853f5b7408a7 522 SRCLEFT_NTSC_443_60, SRCTOP_NTSC_443_60, SRCHEIGHT_NTSC_443_60, SRCWIDTH_NTSC_443_60,
dkato 0:853f5b7408a7 523 /* Horizontal AFC setting */
dkato 0:853f5b7408a7 524 HAFCTYP_NTSC_443_60, HAFCMAX_NTSC_443_60, HAFCMIN_NTSC_443_60,
dkato 0:853f5b7408a7 525 /* Vertical countdown setting */
dkato 0:853f5b7408a7 526 VDEC_OFF, VDEC_ON, VDEC_VCD_FRQ_59_94HZ, VCDWINDOW_NTSC_443_60, VCDOFFSET_NTSC_443_60,
dkato 0:853f5b7408a7 527 /* BCO setting */
dkato 0:853f5b7408a7 528 VDEC_COL_SYS_NTSC, VDEC_OFF, VDEC_ON, VDEC_OFF, VDEC_OFF, VDEC_OFF, VDEC_OFF,
dkato 0:853f5b7408a7 529 /* ACC level setting */
dkato 0:853f5b7408a7 530 ACCLEVEL_NTSC_443_60,
dkato 0:853f5b7408a7 531 /* AGC level setting */
dkato 0:853f5b7408a7 532 AGCLEVEL_NTSC_443_60,
dkato 0:853f5b7408a7 533 /* Y/C separation setting */
dkato 0:853f5b7408a7 534 K15_NTSC_443_60, K13_NTSC_443_60, K11_NTSC_443_60, K16_NTSC_443_60, K14_NTSC_443_60, K12_NTSC_443_60,
dkato 0:853f5b7408a7 535 K22A_NTSC_443_60, K21A_NTSC_443_60, K22B_NTSC_443_60, K21B_NTSC_443_60, K23B_NTSC_443_60, K23A_NTSC_443_60,
dkato 0:853f5b7408a7 536 K24_NTSC_443_60,
dkato 0:853f5b7408a7 537 VDEC_ON, VDEC_FILMIX_RATIO_75, VDEC_FILMIX_RATIO_75, VDEC_FILMIX_RATIO_0,
dkato 0:853f5b7408a7 538 VDEC_FILMIX_RATIO_0, VDEC_FILMIX_RATIO_25, VDEC_2DFIL_MDSEL_CASCADE, VDEC_2D_FIL_SEL_17TAP
dkato 0:853f5b7408a7 539 },
dkato 0:853f5b7408a7 540 { /* PAL-60 */
dkato 0:853f5b7408a7 541 /* Capturing position setting */
dkato 0:853f5b7408a7 542 SRCLEFT_PAL_60, SRCTOP_PAL_60, SRCHEIGHT_PAL_60, SRCWIDTH_PAL_60,
dkato 0:853f5b7408a7 543 /* Horizontal AFC setting */
dkato 0:853f5b7408a7 544 HAFCTYP_PAL_60, HAFCMAX_PAL_60, HAFCMIN_PAL_60,
dkato 0:853f5b7408a7 545 /* Vertical countdown setting */
dkato 0:853f5b7408a7 546 VDEC_OFF, VDEC_ON, VDEC_VCD_FRQ_59_94HZ, VCDWINDOW_PAL_60, VCDOFFSET_PAL_60,
dkato 0:853f5b7408a7 547 /* BCO setting */
dkato 0:853f5b7408a7 548 VDEC_COL_SYS_PAL, VDEC_OFF, VDEC_OFF, VDEC_OFF, VDEC_OFF, VDEC_ON, VDEC_OFF,
dkato 0:853f5b7408a7 549 /* ACC level setting */
dkato 0:853f5b7408a7 550 ACCLEVEL_PAL_60,
dkato 0:853f5b7408a7 551 /* AGC level setting */
dkato 0:853f5b7408a7 552 AGCLEVEL_PAL_60,
dkato 0:853f5b7408a7 553 /* Y/C separation setting */
dkato 0:853f5b7408a7 554 K15_PAL_60, K13_PAL_60, K11_PAL_60, K16_PAL_60, K14_PAL_60, K12_PAL_60,
dkato 0:853f5b7408a7 555 K22A_PAL_60, K21A_PAL_60, K22B_PAL_60, K21B_PAL_60, K23B_PAL_60, K23A_PAL_60, K24_PAL_60,
dkato 0:853f5b7408a7 556 VDEC_OFF, VDEC_FILMIX_RATIO_0, VDEC_FILMIX_RATIO_0, VDEC_FILMIX_RATIO_0,
dkato 0:853f5b7408a7 557 VDEC_FILMIX_RATIO_0, VDEC_FILMIX_RATIO_0, VDEC_2DFIL_MDSEL_BYPASS, VDEC_2D_FIL_SEL_17TAP
dkato 0:853f5b7408a7 558 }
dkato 0:853f5b7408a7 559 };
dkato 0:853f5b7408a7 560 /* Two-Dimensional Cascade Broadband and Narrowband (3.58/4.43) Filter TAP Coefficient */
dkato 0:853f5b7408a7 561 static const vdec_chrfil_tap_t wana_ntsc = {
dkato 0:853f5b7408a7 562 {
dkato 0:853f5b7408a7 563 (uint16_t)24u, (uint16_t)44u, (uint16_t)20u, (uint16_t)(0x1000u | 52u), (uint16_t)(0x1000u | 128u),
dkato 0:853f5b7408a7 564 (uint16_t)(0x1000u | 128u), (uint16_t)(0x1000u | 12u), (uint16_t)132u, (uint16_t)200u
dkato 0:853f5b7408a7 565 }
dkato 0:853f5b7408a7 566 };
dkato 0:853f5b7408a7 567 /* Two-Dimensional Cascade Broadband (SECAM-DR) Filter TAP Coefficient */
dkato 0:853f5b7408a7 568 static const vdec_chrfil_tap_t wa_secam = {
dkato 0:853f5b7408a7 569 {
dkato 0:853f5b7408a7 570 (uint16_t)(0x1000u | 20u), (uint16_t)24u, (uint16_t)64u, (uint16_t)40u, (uint16_t)(0x1000u | 76u),
dkato 0:853f5b7408a7 571 (uint16_t)(0x1000u | 164u), (uint16_t)(0x1000u | 84u), (uint16_t)108u, (uint16_t)216u
dkato 0:853f5b7408a7 572 }
dkato 0:853f5b7408a7 573 };
dkato 0:853f5b7408a7 574 /* Two-Dimensional Cascade Broadband (SECAM-DB) Filter TAP Coefficient */
dkato 0:853f5b7408a7 575 static const vdec_chrfil_tap_t wb_secam = {
dkato 0:853f5b7408a7 576 {
dkato 0:853f5b7408a7 577 (uint16_t)(0x1000u | 12u), (uint16_t)40u, (uint16_t)60u, (uint16_t)12u, (uint16_t)(0x1000u | 104u),
dkato 0:853f5b7408a7 578 (uint16_t)(0x1000u | 156u), (uint16_t)(0x1000u | 64u), (uint16_t)120u, (uint16_t)208u
dkato 0:853f5b7408a7 579 }
dkato 0:853f5b7408a7 580 };
dkato 0:853f5b7408a7 581 /* Two-Dimensional Cascade Narrowband (SECAM-DR) Filter TAP Coefficient */
dkato 0:853f5b7408a7 582 static const vdec_chrfil_tap_t na_secam = {
dkato 0:853f5b7408a7 583 {
dkato 0:853f5b7408a7 584 (uint16_t)(0x1000u | 1008u), (uint16_t)1976u, (uint16_t)(0x1000u | 2024u), (uint16_t)444u, (uint16_t)1868u,
dkato 0:853f5b7408a7 585 (uint16_t)(0x1000u | 2864u), (uint16_t)1352u, (uint16_t)1376u, (uint16_t)(0x1000u | 2240u)
dkato 0:853f5b7408a7 586 }
dkato 0:853f5b7408a7 587 };
dkato 0:853f5b7408a7 588 /* Two-Dimensional Cascade Narrowband (SECAM-DB) Filter TAP Coefficient */
dkato 0:853f5b7408a7 589 static const vdec_chrfil_tap_t nb_secam = {
dkato 0:853f5b7408a7 590 {
dkato 0:853f5b7408a7 591 (uint16_t)(0x1000u | 1080u), (uint16_t)2800u, (uint16_t)(0x1000u | 3308u), (uint16_t)1628u, (uint16_t)1444u,
dkato 0:853f5b7408a7 592 (uint16_t)(0x1000u | 3308u), (uint16_t)2140u, (uint16_t)376u, (uint16_t)(0x1000u | 1384u)
dkato 0:853f5b7408a7 593 }
dkato 0:853f5b7408a7 594 };
dkato 0:853f5b7408a7 595
dkato 0:853f5b7408a7 596
dkato 0:853f5b7408a7 597 /**************************************************************************//**
dkato 0:853f5b7408a7 598 * @brief Video decoder initialization
dkato 0:853f5b7408a7 599 * @param [in]adc_vinsel : Input pin control
dkato 0:853f5b7408a7 600 * @param [in]channel : Channel
dkato 0:853f5b7408a7 601 * @retval Detected color system
dkato 0:853f5b7408a7 602 *****************************************************************************/
dkato 0:853f5b7408a7 603 vdec_error_t GRAPHICS_VideoDecoderInit (const vdec_adc_vinsel_t adc_vinsel, const vdec_channel_t channel, graphics_col_sys_t col_sys)
dkato 0:853f5b7408a7 604 {
dkato 0:853f5b7408a7 605 vdec_error_t error = VDEC_OK;
dkato 0:853f5b7408a7 606
dkato 0:853f5b7408a7 607 /* Video Decoder Driver Initialization */
dkato 0:853f5b7408a7 608 error = R_VDEC_Initialize(channel, adc_vinsel, &init_func, (uint32_t)channel);
dkato 0:853f5b7408a7 609 if (error == VDEC_OK) {
dkato 0:853f5b7408a7 610 if (col_sys != GRPH_COL_SYS_UNKNOWN) {
dkato 0:853f5b7408a7 611 /* Input */
dkato 0:853f5b7408a7 612 Input(col_sys, channel);
dkato 0:853f5b7408a7 613 /* Sync separation */
dkato 0:853f5b7408a7 614 SyncSep(col_sys, channel);
dkato 0:853f5b7408a7 615 /* Y/C separation */
dkato 0:853f5b7408a7 616 YcSep(col_sys, channel);
dkato 0:853f5b7408a7 617 /* Chroma decoding */
dkato 0:853f5b7408a7 618 ChromaDec(col_sys, channel);
dkato 0:853f5b7408a7 619 /* Digital clamp */
dkato 0:853f5b7408a7 620 DigitalClamp(channel);
dkato 0:853f5b7408a7 621 /* Output */
dkato 0:853f5b7408a7 622 Output(channel);
dkato 0:853f5b7408a7 623 } else {
dkato 0:853f5b7408a7 624 error = VDEC_ERR_PARAM;
dkato 0:853f5b7408a7 625 }
dkato 0:853f5b7408a7 626 }
dkato 0:853f5b7408a7 627 return error;
dkato 0:853f5b7408a7 628 } /* End of function GRAPHICS_VideoDecoderInit() */
dkato 0:853f5b7408a7 629
dkato 0:853f5b7408a7 630
dkato 0:853f5b7408a7 631 /**************************************************************************//**
dkato 0:853f5b7408a7 632 * @brief User-defined function
dkato 0:853f5b7408a7 633 * @param [in]user_num
dkato 0:853f5b7408a7 634 * @retval None
dkato 0:853f5b7408a7 635 *****************************************************************************/
dkato 0:853f5b7408a7 636 static void init_func (const uint32_t user_num)
dkato 0:853f5b7408a7 637 {
dkato 0:853f5b7408a7 638 uint32_t reg_data;
dkato 0:853f5b7408a7 639 volatile uint8_t dummy_read;
dkato 0:853f5b7408a7 640
dkato 0:853f5b7408a7 641 reg_data = (uint32_t)CPG.STBCR7;
dkato 0:853f5b7408a7 642 if ((vdec_channel_t)user_num == VDEC_CHANNEL_0) {
dkato 0:853f5b7408a7 643 /* Standby control register 7 (STBCR7)
dkato 0:853f5b7408a7 644 b7 0-------; MSTP77 : 0 : Video decoder channel 0 enable */
dkato 0:853f5b7408a7 645 reg_data &= (uint32_t)~STBCR7_BIT7;
dkato 0:853f5b7408a7 646 } else {
dkato 0:853f5b7408a7 647 /* Standby control register 7 (STBCR7)
dkato 0:853f5b7408a7 648 b6 -0------; MSTP76 : 0 : Video decoder channel 1 enable */
dkato 0:853f5b7408a7 649 reg_data &= (uint32_t)~STBCR7_BIT6;
dkato 0:853f5b7408a7 650 }
dkato 0:853f5b7408a7 651 CPG.STBCR7 = (uint8_t)reg_data;
dkato 0:853f5b7408a7 652 /* In order to reflect the change, a dummy read should be done. */
dkato 0:853f5b7408a7 653 dummy_read = CPG.STBCR7;
dkato 0:853f5b7408a7 654 } /* End of function init_func() */
dkato 0:853f5b7408a7 655
dkato 0:853f5b7408a7 656 /**************************************************************************//**
dkato 0:853f5b7408a7 657 * @brief Video decoder input setup
dkato 0:853f5b7408a7 658 * @param [in]color_system : Color system
dkato 0:853f5b7408a7 659 * @param [in]channel : Channel
dkato 0:853f5b7408a7 660 * @retval None
dkato 0:853f5b7408a7 661 *****************************************************************************/
dkato 0:853f5b7408a7 662 static void Input (const graphics_col_sys_t color_system, const vdec_channel_t channel)
dkato 0:853f5b7408a7 663 {
dkato 0:853f5b7408a7 664 vdec_error_t error;
dkato 0:853f5b7408a7 665 vdec_active_period_t param;
dkato 0:853f5b7408a7 666 const video_recmd_val_t * RecommendValTbl;
dkato 0:853f5b7408a7 667
dkato 0:853f5b7408a7 668 RecommendValTbl = &RecommendedValue[color_system];
dkato 0:853f5b7408a7 669
dkato 0:853f5b7408a7 670 param.srcleft = RecommendValTbl->srcleft; /* Left end of input video signal capturing area */
dkato 0:853f5b7408a7 671 param.srctop = RecommendValTbl->srctop; /* Top end of input video signal capturing area */
dkato 0:853f5b7408a7 672 param.srcheight = RecommendValTbl->srcheight; /* Height of input video signal capturing area */
dkato 0:853f5b7408a7 673 param.srcwidth = RecommendValTbl->srcwidth; /* Width of input video signal capturing area */
dkato 0:853f5b7408a7 674 /* Video decoder driver input */
dkato 0:853f5b7408a7 675 error = R_VDEC_ActivePeriod(channel, &param);
dkato 0:853f5b7408a7 676 if (error != VDEC_OK) {
dkato 0:853f5b7408a7 677 }
dkato 0:853f5b7408a7 678 } /* End of function Input() */
dkato 0:853f5b7408a7 679
dkato 0:853f5b7408a7 680 /**************************************************************************//**
dkato 0:853f5b7408a7 681 * @brief Video decoder sync separation setup
dkato 0:853f5b7408a7 682 * @param [in]color_system : Color system
dkato 0:853f5b7408a7 683 * @param [in]channel : Channel
dkato 0:853f5b7408a7 684 * @retval None
dkato 0:853f5b7408a7 685 *****************************************************************************/
dkato 0:853f5b7408a7 686 static void SyncSep (const graphics_col_sys_t color_system, const vdec_channel_t channel)
dkato 0:853f5b7408a7 687 {
dkato 0:853f5b7408a7 688 vdec_error_t error;
dkato 0:853f5b7408a7 689 vdec_sync_separation_t param;
dkato 0:853f5b7408a7 690 vdec_noise_rd_lpf_t noise_rd_lpf_tmp;
dkato 0:853f5b7408a7 691 vdec_sync_slicer_t sync_slicer_tmp;
dkato 0:853f5b7408a7 692 vdec_horizontal_afc_t horizontal_afc_tmp;
dkato 0:853f5b7408a7 693 vdec_vcount_down_t vcount_down_tmp;
dkato 0:853f5b7408a7 694 vdec_agc_t agc_tmp;
dkato 0:853f5b7408a7 695 vdec_peak_limiter_t peak_limiter_tmp;
dkato 0:853f5b7408a7 696 const video_recmd_val_t * RecommendValTbl;
dkato 0:853f5b7408a7 697
dkato 0:853f5b7408a7 698 RecommendValTbl = &RecommendedValue[color_system];
dkato 0:853f5b7408a7 699
dkato 0:853f5b7408a7 700 /* Noise reduction LPF */
dkato 0:853f5b7408a7 701 noise_rd_lpf_tmp.lpfvsync = VDEC_LPF_VSYNC_0_54; /* LPF cutoff frequency before vertical sync separation */
dkato 0:853f5b7408a7 702 noise_rd_lpf_tmp.lpfhsync = VDEC_LPF_HSYNC_0_94; /* LPF cutoff frequency before horizontal sync separation */
dkato 0:853f5b7408a7 703 /* Sync slicer */
dkato 0:853f5b7408a7 704 sync_slicer_tmp.velocityshift_h = VDEC_VELOCITY_SHIFT_4; /* Reference level operation speed control for
dkato 0:853f5b7408a7 705 composite sync separation (for Hsync signal) */
dkato 0:853f5b7408a7 706 sync_slicer_tmp.slicermode_h = VDEC_SLICE_MODE_AUTO_50; /* Auto-slice level setting for composite sync
dkato 0:853f5b7408a7 707 separator circuit (for Hsync signal) */
dkato 0:853f5b7408a7 708 sync_slicer_tmp.slicermode_v = VDEC_SLICE_MODE_AUTO_50; /* Auto-slice level setting for composite sync
dkato 0:853f5b7408a7 709 separation circuit (for Vsync signal) */
dkato 0:853f5b7408a7 710 sync_slicer_tmp.syncmaxduty_h = SYNCMAXDUTY_H_VALUE; /* Max ratio of horizontal cycle to horizontal sync
dkato 0:853f5b7408a7 711 signal pulse width (for Hsync signal) */
dkato 0:853f5b7408a7 712 sync_slicer_tmp.syncminduty_h = SYNCMINDUTY_H_VALUE; /* Min ratio of horizontal cycle to horizontal sync
dkato 0:853f5b7408a7 713 signal pulse width (for Hsync signal) */
dkato 0:853f5b7408a7 714 sync_slicer_tmp.ssclipsel = VDEC_CLIP_LV_1023; /* Clipping level */
dkato 0:853f5b7408a7 715 sync_slicer_tmp.csyncslice_h = CSYNCSLICE_H_VALUE; /* Slice level for composite sync
dkato 0:853f5b7408a7 716 signal separation (for Hsync signal) */
dkato 0:853f5b7408a7 717 sync_slicer_tmp.syncmaxduty_v = SYNCMAXDUTY_V_VALUE; /* Max ratio of horizontal cycle to horizontal sync
dkato 0:853f5b7408a7 718 signal pulse width (for Vsync signal) */
dkato 0:853f5b7408a7 719 sync_slicer_tmp.syncminduty_v = SYNCMINDUTY_V_VALUE; /* Min ratio of horizontal cycle to horizontal sync
dkato 0:853f5b7408a7 720 signal pulse width (for Vsync signal) */
dkato 0:853f5b7408a7 721 sync_slicer_tmp.vsyncdelay = VDEC_OFF; /* Delays the separated vertical sync signal for
dkato 0:853f5b7408a7 722 1/4 horizontal cycle */
dkato 0:853f5b7408a7 723 sync_slicer_tmp.vsyncslice = VSYNCSLICE_VALUE; /* Threshold for vertical sync separation */
dkato 0:853f5b7408a7 724 sync_slicer_tmp.csyncslice_v = CSYNCSLICE_V_VALUE; /* Slice level for composite sync
dkato 0:853f5b7408a7 725 signal separation (for Vsync signal) */
dkato 0:853f5b7408a7 726 /* Horizontal AFC */
dkato 0:853f5b7408a7 727 horizontal_afc_tmp.hafcgain = HAFCGAIN_VALUE; /* Horizontal AFC loop gain */
dkato 0:853f5b7408a7 728 horizontal_afc_tmp.hafctyp = RecommendValTbl->hafctyp; /* Horizontal AFC center oscillation frequency */
dkato 0:853f5b7408a7 729 horizontal_afc_tmp.hafcstart = HAFCSTART_VALUE; /* Start line of horizontal AFC normal operation */
dkato 0:853f5b7408a7 730 horizontal_afc_tmp.nox2hosc = VDEC_ON; /* Disable of horizontal AFC double speed detection */
dkato 0:853f5b7408a7 731 horizontal_afc_tmp.hafcmax = RecommendValTbl->hafcmax; /* Maximum oscillation frequency of horizontal AFC */
dkato 0:853f5b7408a7 732 horizontal_afc_tmp.hafcend = HAFCEND_VALUE; /* End line of horizontal AFC normal operation */
dkato 0:853f5b7408a7 733 horizontal_afc_tmp.hafcmode = VDEC_HAFCMD_AUTO_PHST; /* Horizontal AFC VBI period operating mode */
dkato 0:853f5b7408a7 734 horizontal_afc_tmp.hafcmin = RecommendValTbl->hafcmin; /* Min oscillation frequency of horizontal AFC */
dkato 0:853f5b7408a7 735 horizontal_afc_tmp.phdet_fix = VDEC_OFF; /* Forcible or LOWGAIN control */
dkato 0:853f5b7408a7 736 horizontal_afc_tmp.phdet_div = VDEC_PHDET_DIV_1_32; /* Phase comparator feedback adjust for
dkato 0:853f5b7408a7 737 low sync signal lock stability */
dkato 0:853f5b7408a7 738 /* Vertical countdown */
dkato 0:853f5b7408a7 739 vcount_down_tmp.novcd50_ = RecommendValTbl->novcd50_; /* Vertical countdown 50-Hz oscillation mode */
dkato 0:853f5b7408a7 740 vcount_down_tmp.novcd60_ = RecommendValTbl->novcd60_; /* Vertical countdown 60-Hz (59.94-Hz)
dkato 0:853f5b7408a7 741 oscillation mode */
dkato 0:853f5b7408a7 742 vcount_down_tmp.vcddefault = RecommendValTbl->vcddefault; /* Vertical countdown center oscillation frequency */
dkato 0:853f5b7408a7 743 vcount_down_tmp.vcdwindow = RecommendValTbl->vcdwindow; /* Vertical countdown sync area */
dkato 0:853f5b7408a7 744 vcount_down_tmp.vcdoffset = RecommendValTbl->vcdoffset; /* Vertical countdown minimum oscillation frequency */
dkato 0:853f5b7408a7 745 /* AGC / PGA */
dkato 0:853f5b7408a7 746 agc_tmp.agcmode = VDEC_ON; /* A/D converter AGC ON/OFF control & PGA gain select */
dkato 0:853f5b7408a7 747 agc_tmp.doreduce = VDEC_OFF; /* Manual control of sync signal amplitude detection
dkato 0:853f5b7408a7 748 during VBI period */
dkato 0:853f5b7408a7 749 agc_tmp.noreduce_ = VDEC_ON; /* Control of sync signal amplitude detection during VBI period */
dkato 0:853f5b7408a7 750 agc_tmp.agcresponse = AGCRESPONSE_VALUE; /* AGC response speed */
dkato 0:853f5b7408a7 751 agc_tmp.agclevel = RecommendValTbl->agclevel;/* Sync signal reference amplitude */
dkato 0:853f5b7408a7 752 agc_tmp.agcprecis = AGCPRECIS_VALUE; /* AGC gain adjustment accuracy */
dkato 0:853f5b7408a7 753 agc_tmp.pga_gain = PGA_GAIN_VALUE; /* PGA gain */
dkato 0:853f5b7408a7 754 /* Peak limiter control */
dkato 0:853f5b7408a7 755 peak_limiter_tmp.peaklevel = VDEC_PEAKLV_992; /* Peak luminance value to operate peak limiter */
dkato 0:853f5b7408a7 756 peak_limiter_tmp.peakattack = PEAKATTACK_VALUE; /* Response speed with peak limiter gain decreased */
dkato 0:853f5b7408a7 757 peak_limiter_tmp.peakrelease = PEAKRELEASE_VALUE; /* Response speed with peak limiter gain increased */
dkato 0:853f5b7408a7 758 peak_limiter_tmp.peakratio = VDEC_PEAKRATIO_50; /* Maximum compression rate of peak limiter */
dkato 0:853f5b7408a7 759 peak_limiter_tmp.maxpeaksamples = MAXPEAKSAMPLES_VALUE; /* Allowable number of overflowing pixels */
dkato 0:853f5b7408a7 760
dkato 0:853f5b7408a7 761 param.noise_rd_lpf = &noise_rd_lpf_tmp; /* Noise reduction LPF */
dkato 0:853f5b7408a7 762 param.sync_slicer = &sync_slicer_tmp; /* Sync slicer */
dkato 0:853f5b7408a7 763 param.horizontal_afc = &horizontal_afc_tmp; /* Horizontal AFC */
dkato 0:853f5b7408a7 764 param.vcount_down = &vcount_down_tmp; /* Vertical countdown */
dkato 0:853f5b7408a7 765 param.agc = &agc_tmp; /* AGC / PGA */
dkato 0:853f5b7408a7 766 param.peak_limiter = &peak_limiter_tmp; /* Peak limiter control */
dkato 0:853f5b7408a7 767 /* Video decoder driver sync separation */
dkato 0:853f5b7408a7 768 error = R_VDEC_SyncSeparation(channel, &param);
dkato 0:853f5b7408a7 769 if (error != VDEC_OK) {
dkato 0:853f5b7408a7 770 }
dkato 0:853f5b7408a7 771 } /* End of function SyncSep() */
dkato 0:853f5b7408a7 772
dkato 0:853f5b7408a7 773 /**************************************************************************//**
dkato 0:853f5b7408a7 774 * @brief Video decoder Y/C separation setup
dkato 0:853f5b7408a7 775 * @param [in]color_system : Color system
dkato 0:853f5b7408a7 776 * @param [in]channel : Channel
dkato 0:853f5b7408a7 777 * @retval None
dkato 0:853f5b7408a7 778 *****************************************************************************/
dkato 0:853f5b7408a7 779 static void YcSep (const graphics_col_sys_t color_system, const vdec_channel_t channel)
dkato 0:853f5b7408a7 780 {
dkato 0:853f5b7408a7 781 vdec_error_t error;
dkato 0:853f5b7408a7 782 vdec_yc_separation_t param;
dkato 0:853f5b7408a7 783 vdec_over_range_t over_range_tmp;
dkato 0:853f5b7408a7 784 vdec_yc_sep_ctrl_t yc_sep_ctrl_tmp;
dkato 0:853f5b7408a7 785 const video_recmd_val_t * RecommendValTbl;
dkato 0:853f5b7408a7 786
dkato 0:853f5b7408a7 787 RecommendValTbl = &RecommendedValue[color_system];
dkato 0:853f5b7408a7 788
dkato 0:853f5b7408a7 789 /* Over-range control */
dkato 0:853f5b7408a7 790 over_range_tmp.radj_o_level0 = RADJ_O_LEVEL0_VALUE; /* A/D over-threshold level (between levels 0 and 1) */
dkato 0:853f5b7408a7 791 over_range_tmp.radj_u_level0 = RADJ_U_LEVEL0_VALUE; /* A/D under-threshold level (between levels 2 and 3) */
dkato 0:853f5b7408a7 792 over_range_tmp.radj_o_level1 = RADJ_O_LEVEL1_VALUE; /* A/D over-threshold level (between levels 1 and 2) */
dkato 0:853f5b7408a7 793 over_range_tmp.radj_u_level1 = RADJ_U_LEVEL1_VALUE; /* A/D under-threshold level (between levels 1 and 2) */
dkato 0:853f5b7408a7 794 over_range_tmp.radj_o_level2 = RADJ_O_LEVEL2_VALUE; /* A/D over-threshold level (between levels 2 and 3) */
dkato 0:853f5b7408a7 795 over_range_tmp.radj_u_level2 = RADJ_U_LEVEL2_VALUE; /* A/D under-threshold level (between levels 0 and 1) */
dkato 0:853f5b7408a7 796 over_range_tmp.ucmp_sw = VDEC_ON; /* Over-range detection */
dkato 0:853f5b7408a7 797 over_range_tmp.dcmp_sw = VDEC_ON; /* Under-range detection */
dkato 0:853f5b7408a7 798 over_range_tmp.hwide_sw = VDEC_ON; /* Horizontal enlargement of over/under-range level */
dkato 0:853f5b7408a7 799 /* Y/C separation control */
dkato 0:853f5b7408a7 800 /* Two-dimensional Y/C separation filter select coefficient */
dkato 0:853f5b7408a7 801 yc_sep_ctrl_tmp.k15 = RecommendValTbl->k15; /* K15 */
dkato 0:853f5b7408a7 802 yc_sep_ctrl_tmp.k13 = RecommendValTbl->k13; /* K13 */
dkato 0:853f5b7408a7 803 yc_sep_ctrl_tmp.k11 = RecommendValTbl->k11; /* K11 */
dkato 0:853f5b7408a7 804 yc_sep_ctrl_tmp.k16 = RecommendValTbl->k16; /* K16 */
dkato 0:853f5b7408a7 805 yc_sep_ctrl_tmp.k14 = RecommendValTbl->k14; /* K14 */
dkato 0:853f5b7408a7 806 yc_sep_ctrl_tmp.k12 = RecommendValTbl->k12; /* K12 */
dkato 0:853f5b7408a7 807 yc_sep_ctrl_tmp.k22a = RecommendValTbl->k22A; /* K22A */
dkato 0:853f5b7408a7 808 yc_sep_ctrl_tmp.k21a = RecommendValTbl->k21A; /* K21A */
dkato 0:853f5b7408a7 809 yc_sep_ctrl_tmp.k22b = RecommendValTbl->k22B; /* K22B */
dkato 0:853f5b7408a7 810 yc_sep_ctrl_tmp.k21b = RecommendValTbl->k21B; /* K21B */
dkato 0:853f5b7408a7 811 yc_sep_ctrl_tmp.k23b = RecommendValTbl->k23B; /* K23B */
dkato 0:853f5b7408a7 812 yc_sep_ctrl_tmp.k23a = RecommendValTbl->k23A; /* K23A */
dkato 0:853f5b7408a7 813 yc_sep_ctrl_tmp.k24 = RecommendValTbl->k24; /* K24 */
dkato 0:853f5b7408a7 814 yc_sep_ctrl_tmp.hbpf_narrow = VDEC_LSTG_BPFSEL_BYPASS; /* Latter-stage horizontal BPF select */
dkato 0:853f5b7408a7 815 yc_sep_ctrl_tmp.hvbpf_narrow = VDEC_LSTG_BPFSEL_BYPASS; /* Latter-stage horizontal/vertical BPF select */
dkato 0:853f5b7408a7 816 yc_sep_ctrl_tmp.hbpf1_9tap_on = VDEC_FSTG_BPFSEL_17TAP; /* Former-stage horizontal BPF select */
dkato 0:853f5b7408a7 817 yc_sep_ctrl_tmp.hvbpf1_9tap_on = VDEC_FSTG_BPFSEL_17TAP; /* Former-stage horizontal/vertical BPF select */
dkato 0:853f5b7408a7 818 yc_sep_ctrl_tmp.hfil_tap_sel = VDEC_HFIL_TAP_SEL_17TAP; /* Horizontal filter and horizontal/vertical filter
dkato 0:853f5b7408a7 819 bandwidth switch signal */
dkato 0:853f5b7408a7 820 yc_sep_ctrl_tmp.det2_on = RecommendValTbl->det2_on; /* Two-dimensional filter mixing select */
dkato 0:853f5b7408a7 821 yc_sep_ctrl_tmp.hsel_mix_y = RecommendValTbl->hsel_mix_y; /* Mixing ratio of signal after passing
dkato 0:853f5b7408a7 822 horizontal filter to signal after passing
dkato 0:853f5b7408a7 823 former-stage horizontal filter */
dkato 0:853f5b7408a7 824 yc_sep_ctrl_tmp.vsel_mix_y = RecommendValTbl->vsel_mix_y; /* Mixing ratio of signal after passing
dkato 0:853f5b7408a7 825 vertical filter to signal after passing
dkato 0:853f5b7408a7 826 former-stage horizontal/vertical filter */
dkato 0:853f5b7408a7 827 yc_sep_ctrl_tmp.hvsel_mix_y = RecommendValTbl->hvsel_mix_y; /* Mixing ratio of signal after passing
dkato 0:853f5b7408a7 828 horizontal/vertical filter to signal
dkato 0:853f5b7408a7 829 after passing former-stage
dkato 0:853f5b7408a7 830 horizontal/vertical filter */
dkato 0:853f5b7408a7 831 yc_sep_ctrl_tmp.v_y_level = V_Y_LEVEL_VALUE; /* Vertical luminance detection level
dkato 0:853f5b7408a7 832 for correlation detection filter */
dkato 0:853f5b7408a7 833 yc_sep_ctrl_tmp.det2_mix_c = RecommendValTbl->det2_mix_c; /* Mixing ratio of c signal after passing
dkato 0:853f5b7408a7 834 horizontal/vertical adaptive filter
dkato 0:853f5b7408a7 835 to signal after passing correlation detection
dkato 0:853f5b7408a7 836 filter */
dkato 0:853f5b7408a7 837 yc_sep_ctrl_tmp.det2_mix_y = RecommendValTbl->det2_mix_y; /* Mixing ratio of c signal for y generation after
dkato 0:853f5b7408a7 838 passing horizontal/vertical adaptive filter to
dkato 0:853f5b7408a7 839 signal after passing correlation */
dkato 0:853f5b7408a7 840 yc_sep_ctrl_tmp.fil2_mode_2d = RecommendValTbl->fil2_mode_2d;/* Two-dimensional cascade/TAKE-OFF
dkato 0:853f5b7408a7 841 filter mode select */
dkato 0:853f5b7408a7 842 yc_sep_ctrl_tmp.fil2_narrow_2d = RecommendValTbl->fil2_narrow_2d; /* Two-dimensional cascade filter select */
dkato 0:853f5b7408a7 843
dkato 0:853f5b7408a7 844 param.over_range = &over_range_tmp; /* Over-range control */
dkato 0:853f5b7408a7 845 param.yc_sep_ctrl = &yc_sep_ctrl_tmp; /* Y/C separation control */
dkato 0:853f5b7408a7 846 param.fil2_2d_wa = NULL; /* Two-dimensional cascade broadband
dkato 0:853f5b7408a7 847 (3.58/4.43/SECAM-DR)/TAKE-OFF filter TAP coefficient */
dkato 0:853f5b7408a7 848 param.fil2_2d_wb = NULL; /* Two-dimensional cascade broadband (SECAM-DB) filter TAP coefficient */
dkato 0:853f5b7408a7 849 param.fil2_2d_na = NULL; /* Two-dimensional cascade narrowband
dkato 0:853f5b7408a7 850 (3.58/4.43/SECAM-DR) filter TAP coefficient */
dkato 0:853f5b7408a7 851 param.fil2_2d_nb = NULL; /* Two-dimensional cascade narrowband (SECAMDB) filter TAP coefficient */
dkato 0:853f5b7408a7 852 if ((color_system == GRPH_COL_SYS_NTSC_358) ||
dkato 0:853f5b7408a7 853 (color_system == GRPH_COL_SYS_NTSC_443) ||
dkato 0:853f5b7408a7 854 (color_system == GRPH_COL_SYS_NTSC_443_60)) {
dkato 0:853f5b7408a7 855 param.fil2_2d_wa = &wana_ntsc;
dkato 0:853f5b7408a7 856 param.fil2_2d_na = &wana_ntsc;
dkato 0:853f5b7408a7 857 } else if (color_system == GRPH_COL_SYS_SECAM) {
dkato 0:853f5b7408a7 858 param.fil2_2d_wa = &wa_secam;
dkato 0:853f5b7408a7 859 param.fil2_2d_wb = &wb_secam;
dkato 0:853f5b7408a7 860 param.fil2_2d_na = &na_secam;
dkato 0:853f5b7408a7 861 param.fil2_2d_nb = &nb_secam;
dkato 0:853f5b7408a7 862 } else {
dkato 0:853f5b7408a7 863 /* Do nothing */
dkato 0:853f5b7408a7 864 }
dkato 0:853f5b7408a7 865 /* Video decoder driver y/c separation */
dkato 0:853f5b7408a7 866 error = R_VDEC_YcSeparation(channel, &param);
dkato 0:853f5b7408a7 867 if (error != VDEC_OK) {
dkato 0:853f5b7408a7 868 }
dkato 0:853f5b7408a7 869 } /* End of function YcSep() */
dkato 0:853f5b7408a7 870
dkato 0:853f5b7408a7 871 /**************************************************************************//**
dkato 0:853f5b7408a7 872 * @brief Video decoder chroma decoding setup
dkato 0:853f5b7408a7 873 * @param [in]color_system : Color system
dkato 0:853f5b7408a7 874 * @param [in]channel : Channel
dkato 0:853f5b7408a7 875 * @retval None
dkato 0:853f5b7408a7 876 *****************************************************************************/
dkato 0:853f5b7408a7 877 static void ChromaDec (const graphics_col_sys_t color_system, const vdec_channel_t channel)
dkato 0:853f5b7408a7 878 {
dkato 0:853f5b7408a7 879 vdec_error_t error;
dkato 0:853f5b7408a7 880 vdec_chroma_decoding_t param;
dkato 0:853f5b7408a7 881 vdec_chrmdec_ctrl_t chrmdec_ctrl_tmp;
dkato 0:853f5b7408a7 882 vdec_burst_lock_t burst_lock_tmp;
dkato 0:853f5b7408a7 883 vdec_acc_t acc_tmp;
dkato 0:853f5b7408a7 884 const video_recmd_val_t * RecommendValTbl;
dkato 0:853f5b7408a7 885
dkato 0:853f5b7408a7 886 RecommendValTbl = &RecommendedValue[color_system];
dkato 0:853f5b7408a7 887
dkato 0:853f5b7408a7 888 /* Chroma decoding control */
dkato 0:853f5b7408a7 889 chrmdec_ctrl_tmp.defaultsys = RecommendValTbl->defaultsys; /* Default color system */
dkato 0:853f5b7408a7 890 chrmdec_ctrl_tmp.nontsc358_ = RecommendValTbl->nontsc358_; /* NTSC-M detection control */
dkato 0:853f5b7408a7 891 chrmdec_ctrl_tmp.nontsc443_ = RecommendValTbl->nontsc443_; /* NTSC-4.43 detection control */
dkato 0:853f5b7408a7 892 chrmdec_ctrl_tmp.nopalm_ = RecommendValTbl->nopalm_; /* PAL-M detection control */
dkato 0:853f5b7408a7 893 chrmdec_ctrl_tmp.nopaln_ = RecommendValTbl->nopaln_; /* PAL-N detection control */
dkato 0:853f5b7408a7 894 chrmdec_ctrl_tmp.nopal443_ = RecommendValTbl->nopal443_; /* PAL-B, G, H, I, D detection control */
dkato 0:853f5b7408a7 895 chrmdec_ctrl_tmp.nosecam_ = RecommendValTbl->nosecam_; /* SECAM detection control */
dkato 0:853f5b7408a7 896 chrmdec_ctrl_tmp.lumadelay = LUMADELAY_VALUE; /* Luminance signal delay adjustment */
dkato 0:853f5b7408a7 897 chrmdec_ctrl_tmp.chromalpf = VDEC_OFF; /* LPF for demodulated chroma */
dkato 0:853f5b7408a7 898 chrmdec_ctrl_tmp.demodmode = VDEC_DEMOD_MD_PAL; /* Averaging processing for pre-demodulated line */
dkato 0:853f5b7408a7 899 /* Burst lock */
dkato 0:853f5b7408a7 900 burst_lock_tmp.lockrange = VDEC_LOCK_RANGE_800HZ;/* Burst lock PLL lock range */
dkato 0:853f5b7408a7 901 burst_lock_tmp.loopgain = LOOPGAIN_VALUE; /* Burst lock PLL loop gain */
dkato 0:853f5b7408a7 902 burst_lock_tmp.locklimit = LOCKLIMIT_VALUE; /* Level for burst lock PLL to re-search free-run frequency */
dkato 0:853f5b7408a7 903 burst_lock_tmp.bgpcheck = BGPCHECK_VALUE; /* burst gate pulse position check */
dkato 0:853f5b7408a7 904 burst_lock_tmp.bgpwidth = BGPWIDTH_VALUE; /* burst gate pulse width */
dkato 0:853f5b7408a7 905 burst_lock_tmp.bgpstart = BGPSTART_VALUE; /* burst gate pulse start position */
dkato 0:853f5b7408a7 906 /* ACC / color killer */
dkato 0:853f5b7408a7 907 acc_tmp.accmode = VDEC_ACC_MD_AUTO; /* ACC operating mode */
dkato 0:853f5b7408a7 908 acc_tmp.accmaxgain = VDEC_ACC_MAX_GAIN_6; /* Maximum ACC Gain */
dkato 0:853f5b7408a7 909 acc_tmp.acclevel = RecommendValTbl->acclevel;/* ACC reference color burst amplitude */
dkato 0:853f5b7408a7 910 acc_tmp.chromasubgain = VDEC_CHRM_SB_GAIN_1; /* Chroma manual gain (sub) */
dkato 0:853f5b7408a7 911 acc_tmp.chromamaingain = CHROMAMAINGAIN_VALUE; /* Chroma manual gain (main) */
dkato 0:853f5b7408a7 912 acc_tmp.accresponse = ACCRESPONSE_VALUE; /* ACC response speed */
dkato 0:853f5b7408a7 913 acc_tmp.accprecis = ACCPRECIS_VALUE; /* ACC gain adjustment accuracy */
dkato 0:853f5b7408a7 914 acc_tmp.killermode = VDEC_OFF; /* Forced color killer mode ON/OFF */
dkato 0:853f5b7408a7 915 acc_tmp.killerlevel = KILLERLEVEL_VALUE; /* Color killer operation start point */
dkato 0:853f5b7408a7 916 acc_tmp.killeroffset = KILLEROFFSET_VALUE; /* The offset level to turn off the color killer */
dkato 0:853f5b7408a7 917
dkato 0:853f5b7408a7 918 param.chrmdec_ctrl = &chrmdec_ctrl_tmp; /* Chroma decoding control */
dkato 0:853f5b7408a7 919 param.burst_lock = &burst_lock_tmp; /* Burst lock */
dkato 0:853f5b7408a7 920 param.acc = &acc_tmp; /* ACC/color killer */
dkato 0:853f5b7408a7 921 param.tint_ry = NULL; /* TINT/R-Y axis correction (only valid for NTSC/PAL) */
dkato 0:853f5b7408a7 922 /* Video decoder driver chroma decoding */
dkato 0:853f5b7408a7 923 error = R_VDEC_ChromaDecoding(channel, &param);
dkato 0:853f5b7408a7 924 if (error != VDEC_OK) {
dkato 0:853f5b7408a7 925 }
dkato 0:853f5b7408a7 926 } /* End of function ChromaDec() */
dkato 0:853f5b7408a7 927
dkato 0:853f5b7408a7 928 /**************************************************************************//**
dkato 0:853f5b7408a7 929 * @brief Video decoder digital clamp setup
dkato 0:853f5b7408a7 930 * @param [in]channel : Channel
dkato 0:853f5b7408a7 931 * @retval None
dkato 0:853f5b7408a7 932 *****************************************************************************/
dkato 0:853f5b7408a7 933 static void DigitalClamp (const vdec_channel_t channel)
dkato 0:853f5b7408a7 934 {
dkato 0:853f5b7408a7 935 vdec_error_t error;
dkato 0:853f5b7408a7 936 vdec_degital_clamp_t param;
dkato 0:853f5b7408a7 937 vdec_pedestal_clamp_t pedestal_clamp_tmp;
dkato 0:853f5b7408a7 938 vdec_center_clamp_t center_clamp_tmp;
dkato 0:853f5b7408a7 939 vdec_noise_det_t noise_det_tmp;
dkato 0:853f5b7408a7 940
dkato 0:853f5b7408a7 941 /* Pedestal clamp */
dkato 0:853f5b7408a7 942 pedestal_clamp_tmp.dcpmode_y = VDEC_DCPMODE_AUTO; /* Clamp level setting mode */
dkato 0:853f5b7408a7 943 pedestal_clamp_tmp.blanklevel_y = BLANKLEVEL_Y_VALUE; /* Clamp offset level (Y signal) */
dkato 0:853f5b7408a7 944 pedestal_clamp_tmp.dcppos_y = DCPPOS_Y_VALUE; /* Digital clamp pulse horizontal start position (Y signal) */
dkato 0:853f5b7408a7 945 /* Center clamp */
dkato 0:853f5b7408a7 946 center_clamp_tmp.dcpmode_c = VDEC_DCPMODE_MANUAL; /* Clamp level setting mode */
dkato 0:853f5b7408a7 947 center_clamp_tmp.blanklevel_cb = BLANKLEVEL_CB_VALUE; /* Clamp offset level (Cb signal) */
dkato 0:853f5b7408a7 948 center_clamp_tmp.blanklevel_cr = BLANKLEVEL_CR_VALUE; /* Clamp offset level (Cr signal) */
dkato 0:853f5b7408a7 949 center_clamp_tmp.dcppos_c = DCPPOS_C_VALUE; /* Digital clamp pulse
dkato 0:853f5b7408a7 950 horizontal start position (Cb/Cr signal) */
dkato 0:853f5b7408a7 951 /* Noise detection */
dkato 0:853f5b7408a7 952 noise_det_tmp.acfinput = VDEC_ACFINPUT_Y; /* Video signal for autocorrelation function */
dkato 0:853f5b7408a7 953 noise_det_tmp.acflagtime = ACFLAGTIME_VALUE; /* Delay time for autocorrelation function calculation */
dkato 0:853f5b7408a7 954 noise_det_tmp.acffilter = ACFFILTER_VALUE; /* Smoothing parameter of autocorrelation function data */
dkato 0:853f5b7408a7 955
dkato 0:853f5b7408a7 956 param.dcpcheck = VDEC_OFF; /* Digital clamp pulse position check */
dkato 0:853f5b7408a7 957 param.dcpresponse = DCPRESPONSE_VALUE; /* Digital clamp response speed */
dkato 0:853f5b7408a7 958 param.dcpstart = DCPSTART_VALUE; /* Digital clamp start line (in 1-line units) */
dkato 0:853f5b7408a7 959 param.dcpend = DCPEND_VALUE; /* Digital clamp end line (in 1-line units) */
dkato 0:853f5b7408a7 960 param.dcpwidth = DCPWIDTH_VALUE; /* Digital clamp pulse width */
dkato 0:853f5b7408a7 961 param.pedestal_clamp = &pedestal_clamp_tmp; /* Pedestal clamp */
dkato 0:853f5b7408a7 962 param.center_clamp = &center_clamp_tmp; /* Center clamp */
dkato 0:853f5b7408a7 963 param.noise_det = &noise_det_tmp; /* Noise detection */
dkato 0:853f5b7408a7 964 /* Video decoder driver digital clamp */
dkato 0:853f5b7408a7 965 error = R_VDEC_DigitalClamp(channel, &param);
dkato 0:853f5b7408a7 966 if (error != VDEC_OK) {
dkato 0:853f5b7408a7 967 }
dkato 0:853f5b7408a7 968 } /* End of function DigitalClamp() */
dkato 0:853f5b7408a7 969
dkato 0:853f5b7408a7 970 /**************************************************************************//**
dkato 0:853f5b7408a7 971 * @brief Video decoder output adjustment setup
dkato 0:853f5b7408a7 972 * @param [in]channel : Channel
dkato 0:853f5b7408a7 973 * @retval None
dkato 0:853f5b7408a7 974 *****************************************************************************/
dkato 0:853f5b7408a7 975 static void Output (const vdec_channel_t channel)
dkato 0:853f5b7408a7 976 {
dkato 0:853f5b7408a7 977 vdec_error_t error;
dkato 0:853f5b7408a7 978 vdec_output_t param;
dkato 0:853f5b7408a7 979
dkato 0:853f5b7408a7 980 param.y_gain2 = Y_GAIN2_VALUE; /* Y signal gain coefficient */
dkato 0:853f5b7408a7 981 param.cb_gain2 = CB_GAIN2_VALUE; /* Cb signal gain coefficient */
dkato 0:853f5b7408a7 982 param.cr_gain2 = CR_GAIN2_VALUE; /* Cr signal gain coefficient */
dkato 0:853f5b7408a7 983 /* Video decoder driver output */
dkato 0:853f5b7408a7 984 error = R_VDEC_Output(channel, &param);
dkato 0:853f5b7408a7 985 if (error != VDEC_OK) {
dkato 0:853f5b7408a7 986 }
dkato 0:853f5b7408a7 987 } /* End of function Output() */