Renesas / GR-PEACH_video

Video library for GR-PEACH

Dependents:   Trace_Program2 GR-PEACH_Camera_in_barcode GR-PEACH_LCD_sample GR-PEACH_LCD_4_3inch_sample ... more

Video ｌibrary for GR-PEACH.

Hello World!

Import programGR-PEACH_Camera_in

Camera in sample for GR-PEACH. This sample works on GR-LYCHEE besides GR-PEACH.

Last commit 28 Dec 2018 by Renesas

API

Import library
GR-PEACH_video - DisplayBase Class Reference

Data Structures

struct lcd_config_t
LCD configuration. More...
struct rect_t
The relative position within the graphics display area. More...
struct video_ext_in_config_t
Digital Video Input configuration. More...

Public Types

enum video_input_channel_t { VIDEO_INPUT_CHANNEL_0 = 0, VIDEO_INPUT_CHANNEL_1 }

Video input channel select.

More...
enum graphics_layer_t { GRAPHICS_LAYER_0 = 0, GRAPHICS_LAYER_1 , GRAPHICS_LAYER_2 , GRAPHICS_LAYER_3 }

Graphics layer select.

More...
enum graphics_error_t {
GRAPHICS_OK = 0, GRAPHICS_VDC5_ERR = -1, GRAPHICS_FORMA_ERR = -2, GRAPHICS_LAYER_ERR = -3,
GRAPHICS_CHANNLE_ERR = -4, GRAPHICS_VIDEO_NTSC_SIZE_ERR = -5, GRAPHICS_VIDEO_PAL_SIZE_ERR = -6, GRAPHICS_PARAM_RANGE_ERR = -7
}

Error codes.

More...
enum graphics_format_t { GRAPHICS_FORMAT_YCBCR422 = 0, GRAPHICS_FORMAT_RGB565 , GRAPHICS_FORMAT_RGB888 , GRAPHICS_FORMAT_ARGB8888 }

Graphics layer read format selects.

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enum video_format_t { VIDEO_FORMAT_YCBCR422 = 0, VIDEO_FORMAT_RGB565 , VIDEO_FORMAT_RGB888 }

Video writing format selects.

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enum wr_rd_swa_t {
WR_RD_WRSWA_NON = 0, WR_RD_WRSWA_8BIT , WR_RD_WRSWA_16BIT , WR_RD_WRSWA_16_8BIT ,
WR_RD_WRSWA_32BIT , WR_RD_WRSWA_32_8BIT , WR_RD_WRSWA_32_16BIT , WR_RD_WRSWA_32_16_8BIT
}

Frame buffer swap setting.

More...
enum lcd_tcon_pin_t { LCD_TCON_PIN_NON = -1, LCD_TCON_PIN_0 , LCD_TCON_PIN_1 , LCD_TCON_PIN_2 }

LCD tcon output pin selects.

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enum lcd_outformat_t { LCD_OUTFORMAT_RGB888 = 0, LCD_OUTFORMAT_RGB666 , LCD_OUTFORMAT_RGB565 }

LCD output format selects.

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enum edge_t { EDGE_RISING = 0, EDGE_FALLING = 1 }

Edge of a signal.

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enum lcd_type_t { LCD_TYPE_LVDS = 0, LCD_TYPE_PARALLEL_RGB }

LCD type.

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enum sig_pol_t { SIG_POL_NOT_INVERTED = 0, SIG_POL_INVERTED }

Polarity of a signal.

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enum int_type_t {
INT_TYPE_S0_VI_VSYNC = 0, INT_TYPE_S0_LO_VSYNC , INT_TYPE_S0_VSYNCERR , INT_TYPE_VLINE ,
INT_TYPE_S0_VFIELD , INT_TYPE_IV1_VBUFERR , INT_TYPE_IV3_VBUFERR , INT_TYPE_IV5_VBUFERR ,
INT_TYPE_IV6_VBUFERR , INT_TYPE_S0_WLINE , INT_TYPE_S1_VI_VSYNC , INT_TYPE_S1_LO_VSYNC ,
INT_TYPE_S1_VSYNCERR , INT_TYPE_S1_VFIELD , INT_TYPE_IV2_VBUFERR , INT_TYPE_IV4_VBUFERR ,
INT_TYPE_S1_WLINE , INT_TYPE_OIR_VI_VSYNC , INT_TYPE_OIR_LO_VSYNC , INT_TYPE_OIR_VLINE ,
INT_TYPE_OIR_VFIELD , INT_TYPE_IV7_VBUFERR , INT_TYPE_IV8_VBUFERR , INT_TYPE_NUM
}

Interrupt type.

More...
enum graphics_video_col_sys_t {
COL_SYS_NTSC_358 = 0, COL_SYS_NTSC_443 = 1, COL_SYS_PAL_443 = 2, COL_SYS_PAL_M = 3,
COL_SYS_PAL_N = 4, COL_SYS_SECAM = 5, COL_SYS_NTSC_443_60 = 6, COL_SYS_PAL_60 = 7
}

Video color system.

More...
enum video_input_sel_t { INPUT_SEL_VDEC = 0, INPUT_SEL_EXT = 1 }

External Input select.

More...
enum video_extin_format_t {
VIDEO_EXTIN_FORMAT_RGB888 = 0, VIDEO_EXTIN_FORMAT_RGB666 , VIDEO_EXTIN_FORMAT_RGB565 , VIDEO_EXTIN_FORMAT_BT656 ,
VIDEO_EXTIN_FORMAT_BT601 , VIDEO_EXTIN_FORMAT_YCBCR422 , VIDEO_EXTIN_FORMAT_YCBCR444
}

External input format select.

More...
enum onoff_t { OFF = 0, ON = 1 }

On/off.

More...
enum extin_input_line_t { EXTIN_LINE_525 = 0, EXTIN_LINE_625 = 1 }

Number of lines for BT.656 external input.

More...
enum extin_h_pos_t { EXTIN_H_POS_CBYCRY = 0, EXTIN_H_POS_YCRYCB , EXTIN_H_POS_CRYCBY , EXTIN_H_POS_YCBYCR }

Y/Cb/Y/Cr data string start timing.

More...

Public Member Functions

DisplayBase (void)
Constructor method of display base object.
graphics_error_t Graphics_init ( lcd_config_t *lcd_config)
Graphics initialization processing
If not using display, set NULL in parameter.
graphics_error_t Graphics_Video_init ( video_input_sel_t video_input_sel, video_ext_in_config_t *video_ext_in_config)
Graphics Video initialization processing
If setting INPUT_SEL_VDEC in video_input_sel parameter, set NULL in video_ext_in_config parameter.
graphics_error_t Graphics_Lcd_Port_Init (PinName *pin, unsigned int pin_count)
LCD output port initialization processing.
graphics_error_t Graphics_Lvds_Port_Init (PinName *pin, unsigned int pin_count)
LVDS output port initialization processing.
graphics_error_t Graphics_Dvinput_Port_Init (PinName *pin, unsigned int pin_count)
Digital video input port initialization processing.
graphics_error_t Graphics_Irq_Handler_Set ( int_type_t Graphics_Irq_Handler_Set, unsigned short num, void(*callback)( int_type_t ))
Interrupt callback setup This function performs the following processing:

  • Enables the interrupt when the pointer to the corresponding interrupt callback function is specified.

graphics_error_t Graphics_Start ( graphics_layer_t layer_id)
Start the graphics surface read process.
graphics_error_t Graphics_Stop ( graphics_layer_t layer_id)
Stop the graphics surface read process.
graphics_error_t Video_Start ( video_input_channel_t video_input_channel)
Start the video surface write process.
graphics_error_t Video_Stop ( video_input_channel_t video_input_channel)
Stop the video surface write process.
graphics_error_t Graphics_Read_Setting ( graphics_layer_t layer_id, void *framebuff, unsigned int fb_stride, graphics_format_t gr_format, wr_rd_swa_t wr_rd_swa, rect_t *gr_rect)
Graphics surface read process setting.
graphics_error_t Graphics_Read_Change ( graphics_layer_t layer_id, void *framebuff)
Graphics surface read buffer change process.
graphics_error_t Video_Write_Setting ( video_input_channel_t video_input_channel, graphics_video_col_sys_t col_sys, void *framebuff, unsigned int fb_stride, video_format_t video_format, wr_rd_swa_t wr_rd_swa, unsigned short video_write_buff_vw, unsigned short video_write_buff_hw)
Video surface write process setting.
graphics_error_t Video_Write_Change ( video_input_channel_t video_input_channel, void *framebuff, uint32_t fb_stride)
Video surface write buffer change process.

Interface

See the Pinout page for more details

lvds/lvds_pll_main.c@4:aeefe5171463, 2016-06-30 (annotated)

Committer:
dkato
Date:
Thu Jun 30 11:00:37 2016 +0000
Revision:
4:aeefe5171463
Parent:
0:853f5b7408a7 
Add ARGB4444 to graphics layer read format.

Who changed what in which revision?

UserRevisionLine numberNew contents of line
dkato 0:853f5b7408a7 1 /*******************************************************************************
dkato 0:853f5b7408a7 2 * DISCLAIMER
dkato 0:853f5b7408a7 3 * This software is supplied by Renesas Electronics Corporation and is only
dkato 0:853f5b7408a7 4 * intended for use with Renesas products. No other uses are authorized. This
dkato 0:853f5b7408a7 5 * software is owned by Renesas Electronics Corporation and is protected under
dkato 0:853f5b7408a7 6 * all applicable laws, including copyright laws.
dkato 0:853f5b7408a7 7 * THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING
dkato 0:853f5b7408a7 8 * THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT
dkato 0:853f5b7408a7 9 * LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE
dkato 0:853f5b7408a7 10 * AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.
dkato 0:853f5b7408a7 11 * TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS
dkato 0:853f5b7408a7 12 * ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE
dkato 0:853f5b7408a7 13 * FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR
dkato 0:853f5b7408a7 14 * ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE
dkato 0:853f5b7408a7 15 * BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
dkato 0:853f5b7408a7 16 * Renesas reserves the right, without notice, to make changes to this software
dkato 0:853f5b7408a7 17 * and to discontinue the availability of this software. By using this software,
dkato 0:853f5b7408a7 18 * you agree to the additional terms and conditions found by accessing the
dkato 0:853f5b7408a7 19 * following link:
dkato 0:853f5b7408a7 20 * http://www.renesas.com/disclaimer
dkato 0:853f5b7408a7 21 * Copyright (C) 2012 - 2015 Renesas Electronics Corporation. All rights reserved.
dkato 0:853f5b7408a7 22 *******************************************************************************/
dkato 0:853f5b7408a7 23 /**************************************************************************//**
dkato 0:853f5b7408a7 24 * @file lvds_pll_main.c
dkato 0:853f5b7408a7 25 * @version 1.00
dkato 0:853f5b7408a7 26 * $Rev: 199 $
dkato 0:853f5b7408a7 27 * $Date:: 2014-05-23 16:33:52 +0900#$
dkato 0:853f5b7408a7 28 * @brief lvds pll setting value
dkato 0:853f5b7408a7 29 ******************************************************************************/
dkato 0:853f5b7408a7 30
dkato 0:853f5b7408a7 31 /******************************************************************************
dkato 0:853f5b7408a7 32 Includes <System Includes> , "Project Includes"
dkato 0:853f5b7408a7 33 ******************************************************************************/
dkato 0:853f5b7408a7 34 #include <stdio.h>
dkato 0:853f5b7408a7 35 #include <stdlib.h>
dkato 0:853f5b7408a7 36 #include <math.h>
dkato 0:853f5b7408a7 37
dkato 0:853f5b7408a7 38 #include "r_typedefs.h"
dkato 0:853f5b7408a7 39 #include "lvds_pll_calc.h"
dkato 0:853f5b7408a7 40
dkato 0:853f5b7408a7 41 /******************************************************************************
dkato 0:853f5b7408a7 42 Macro definitions
dkato 0:853f5b7408a7 43 ******************************************************************************/
dkato 0:853f5b7408a7 44 /* FIN: LVDS PLL input frequency */
dkato 0:853f5b7408a7 45 #define FIN_MIN (9.0) /*!< The lower limit of the FIN */
dkato 0:853f5b7408a7 46 #define FIN_MAX (30.0) /*!< The upper limit of the FIN */
dkato 0:853f5b7408a7 47 /* FREF */
dkato 0:853f5b7408a7 48 #define FREF_MIN (2.5) /*!< The lower limit of the FREF */
dkato 0:853f5b7408a7 49 #define FREF_MAX (30.0) /*!< The upper limit of the FREF */
dkato 0:853f5b7408a7 50 /* FVCO: VCO output frequency */
dkato 0:853f5b7408a7 51 #define FVCO_MIN (750.0) /*!< The lower limit of the FVCO */
dkato 0:853f5b7408a7 52 #define FVCO_MAX (1630.0) /*!< The upper limit of the FVCO */
dkato 0:853f5b7408a7 53 /* FOUT: LVDS PLL output frequency */
dkato 0:853f5b7408a7 54 #define FOUT_MIN (0.0) /*!< The lower limit of the FOUT */
dkato 0:853f5b7408a7 55 #define FOUT_MAX (609.0) /*!< The upper limit of the FOUT */
dkato 0:853f5b7408a7 56
dkato 0:853f5b7408a7 57 #define DIVIDER_3 (7.0) /*!< The frequency dividing value for frequency divider 3 */
dkato 0:853f5b7408a7 58
dkato 0:853f5b7408a7 59
dkato 0:853f5b7408a7 60 /******************************************************************************
dkato 0:853f5b7408a7 61 Typedef definitions
dkato 0:853f5b7408a7 62 ******************************************************************************/
dkato 0:853f5b7408a7 63
dkato 0:853f5b7408a7 64
dkato 0:853f5b7408a7 65 /******************************************************************************
dkato 0:853f5b7408a7 66 Variable Externs
dkato 0:853f5b7408a7 67 ******************************************************************************/
dkato 0:853f5b7408a7 68 extern const double NIDIV_data[];
dkato 0:853f5b7408a7 69 extern const double NRD_data[];
dkato 0:853f5b7408a7 70 extern const double NFD_data[];
dkato 0:853f5b7408a7 71 extern const double NOD_data[];
dkato 0:853f5b7408a7 72 extern const double NODIV_data[];
dkato 0:853f5b7408a7 73
dkato 0:853f5b7408a7 74
dkato 0:853f5b7408a7 75 /******************************************************************************
dkato 0:853f5b7408a7 76 Private global variables and functions
dkato 0:853f5b7408a7 77 ******************************************************************************/
dkato 0:853f5b7408a7 78 static double InputClock;
dkato 0:853f5b7408a7 79 static double OutputClock;
dkato 0:853f5b7408a7 80 static int LvdsUsed;
dkato 0:853f5b7408a7 81
dkato 0:853f5b7408a7 82
dkato 0:853f5b7408a7 83
dkato 0:853f5b7408a7 84 /**************************************************************************//**
dkato 0:853f5b7408a7 85 * @brief
dkato 0:853f5b7408a7 86 * @param [in,out]param
dkato 0:853f5b7408a7 87 * @param [in]fout
dkato 0:853f5b7408a7 88 * @retval int
dkato 0:853f5b7408a7 89 *****************************************************************************/
dkato 0:853f5b7408a7 90 static int compare_nodiv (pll_parameter_t * param, double fout)
dkato 0:853f5b7408a7 91 {
dkato 0:853f5b7408a7 92 int change;
dkato 0:853f5b7408a7 93 const double * nodiv_list;
dkato 0:853f5b7408a7 94 double diff_freq;
dkato 0:853f5b7408a7 95
dkato 0:853f5b7408a7 96 change = 0;
dkato 0:853f5b7408a7 97 nodiv_list = NODIV_data;
dkato 0:853f5b7408a7 98 while (*nodiv_list != 0.0) {
dkato 0:853f5b7408a7 99 diff_freq = fabs(OutputClock - (fout / *nodiv_list));
dkato 0:853f5b7408a7 100 if (param->comparison_freq > diff_freq) {
dkato 0:853f5b7408a7 101 param->comparison_freq = diff_freq;
dkato 0:853f5b7408a7 102 param->output_freq = fout / *nodiv_list;
dkato 0:853f5b7408a7 103 param->nodiv = *nodiv_list;
dkato 0:853f5b7408a7 104 change = 1;
dkato 0:853f5b7408a7 105 }
dkato 0:853f5b7408a7 106 nodiv_list++;
dkato 0:853f5b7408a7 107 }
dkato 0:853f5b7408a7 108 return change;
dkato 0:853f5b7408a7 109 }
dkato 0:853f5b7408a7 110
dkato 0:853f5b7408a7 111 /**************************************************************************//**
dkato 0:853f5b7408a7 112 * @brief
dkato 0:853f5b7408a7 113 * @param [in,out]param
dkato 0:853f5b7408a7 114 * @param [in]fout
dkato 0:853f5b7408a7 115 * @retval int
dkato 0:853f5b7408a7 116 *****************************************************************************/
dkato 0:853f5b7408a7 117 static int compare_div3 (pll_parameter_t * param, double fout)
dkato 0:853f5b7408a7 118 {
dkato 0:853f5b7408a7 119 double diff_freq;
dkato 0:853f5b7408a7 120 int change;
dkato 0:853f5b7408a7 121
dkato 0:853f5b7408a7 122 change = 0;
dkato 0:853f5b7408a7 123 diff_freq = fabs(OutputClock - (fout / DIVIDER_3));
dkato 0:853f5b7408a7 124
dkato 0:853f5b7408a7 125 if (param->comparison_freq > diff_freq) {
dkato 0:853f5b7408a7 126 param->comparison_freq = diff_freq;
dkato 0:853f5b7408a7 127 param->output_freq = fout / DIVIDER_3;
dkato 0:853f5b7408a7 128 change = 1;
dkato 0:853f5b7408a7 129 }
dkato 0:853f5b7408a7 130 return change;
dkato 0:853f5b7408a7 131 }
dkato 0:853f5b7408a7 132
dkato 0:853f5b7408a7 133 /**************************************************************************//**
dkato 0:853f5b7408a7 134 * @brief
dkato 0:853f5b7408a7 135 * @param [out]param
dkato 0:853f5b7408a7 136 * @retval None
dkato 0:853f5b7408a7 137 *****************************************************************************/
dkato 0:853f5b7408a7 138 static void SeekValue (pll_parameter_t * param)
dkato 0:853f5b7408a7 139 {
dkato 0:853f5b7408a7 140 const double * nidiv_list;
dkato 0:853f5b7408a7 141 const double * nrd_list;
dkato 0:853f5b7408a7 142 const double * nfd_list;
dkato 0:853f5b7408a7 143 const double * nod_list;
dkato 0:853f5b7408a7 144
dkato 0:853f5b7408a7 145 double fin;
dkato 0:853f5b7408a7 146 double fref;
dkato 0:853f5b7408a7 147 double fvco;
dkato 0:853f5b7408a7 148 double fout;
dkato 0:853f5b7408a7 149 int ret;
dkato 0:853f5b7408a7 150
dkato 0:853f5b7408a7 151 nidiv_list = NIDIV_data;
dkato 0:853f5b7408a7 152 while (*nidiv_list != 0.0) {
dkato 0:853f5b7408a7 153 fin = InputClock / *nidiv_list;
dkato 0:853f5b7408a7 154 if ((fin < FIN_MIN) || (FIN_MAX < fin)) {
dkato 0:853f5b7408a7 155 nidiv_list++;
dkato 0:853f5b7408a7 156 continue;
dkato 0:853f5b7408a7 157 }
dkato 0:853f5b7408a7 158 nrd_list = NRD_data;
dkato 0:853f5b7408a7 159 while (*nrd_list != 0.0) {
dkato 0:853f5b7408a7 160 fref = fin / *nrd_list;
dkato 0:853f5b7408a7 161 if ((fref < FREF_MIN) || (FREF_MAX < fref)) {
dkato 0:853f5b7408a7 162 nrd_list++;
dkato 0:853f5b7408a7 163 continue;
dkato 0:853f5b7408a7 164 }
dkato 0:853f5b7408a7 165 nfd_list = NFD_data;
dkato 0:853f5b7408a7 166 while (*nfd_list != 0.0) {
dkato 0:853f5b7408a7 167 fvco = fref * (*nfd_list);
dkato 0:853f5b7408a7 168 if ((fvco < FVCO_MIN) || (FVCO_MAX < fvco)) {
dkato 0:853f5b7408a7 169 nfd_list++;
dkato 0:853f5b7408a7 170 continue;
dkato 0:853f5b7408a7 171 }
dkato 0:853f5b7408a7 172 nod_list = NOD_data;
dkato 0:853f5b7408a7 173 while (*nod_list != 0.0) {
dkato 0:853f5b7408a7 174 fout = fvco / *nod_list;
dkato 0:853f5b7408a7 175 if ((fout < FOUT_MIN) || (FOUT_MAX < fout)) {
dkato 0:853f5b7408a7 176 nod_list++;
dkato 0:853f5b7408a7 177 continue;
dkato 0:853f5b7408a7 178 }
dkato 0:853f5b7408a7 179
dkato 0:853f5b7408a7 180 if (LvdsUsed == 0) {
dkato 0:853f5b7408a7 181 ret = compare_nodiv(param, fout);
dkato 0:853f5b7408a7 182 } else {
dkato 0:853f5b7408a7 183 ret = compare_div3(param, fout);
dkato 0:853f5b7408a7 184 }
dkato 0:853f5b7408a7 185 if (ret != 0) {
dkato 0:853f5b7408a7 186 param->nidiv = *nidiv_list;
dkato 0:853f5b7408a7 187 param->nrd = *nrd_list;
dkato 0:853f5b7408a7 188 param->nfd = *nfd_list;
dkato 0:853f5b7408a7 189 param->nod = *nod_list;
dkato 0:853f5b7408a7 190 }
dkato 0:853f5b7408a7 191 nod_list++;
dkato 0:853f5b7408a7 192 }
dkato 0:853f5b7408a7 193 nfd_list++;
dkato 0:853f5b7408a7 194 }
dkato 0:853f5b7408a7 195 nrd_list++;
dkato 0:853f5b7408a7 196 }
dkato 0:853f5b7408a7 197 nidiv_list++;
dkato 0:853f5b7408a7 198 }
dkato 0:853f5b7408a7 199 }
dkato 0:853f5b7408a7 200 /**************************************************************************//**
dkato 0:853f5b7408a7 201 * @brief PLL value Calculation function
dkato 0:853f5b7408a7 202 * @param[in] InClock : Input clock frequency [MHz]
dkato 0:853f5b7408a7 203 * @param[in] OuClock : Output clock frequency [MHz]
dkato 0:853f5b7408a7 204 * @param[in] Lvds : The LVDS output interface is used (=1) or not (=0)
dkato 0:853f5b7408a7 205 * @param[out] result : pll_parameter_t
dkato 0:853f5b7408a7 206 * @retval error (-1)
dkato 0:853f5b7408a7 207 ******************************************************************************/
dkato 0:853f5b7408a7 208 int32_t lvds_pll_calc(
dkato 0:853f5b7408a7 209 const double InClock,
dkato 0:853f5b7408a7 210 const double OuClock,
dkato 0:853f5b7408a7 211 const uint32_t Lvds,
dkato 0:853f5b7408a7 212 pll_parameter_t * result )
dkato 0:853f5b7408a7 213 {
dkato 0:853f5b7408a7 214 result->comparison_freq = 1000.0;
dkato 0:853f5b7408a7 215 result->output_freq = 0.0;
dkato 0:853f5b7408a7 216 result->nidiv = 0.0;
dkato 0:853f5b7408a7 217 result->nrd = 0.0;
dkato 0:853f5b7408a7 218 result->nfd = 0.0;
dkato 0:853f5b7408a7 219 result->nod = 0.0;
dkato 0:853f5b7408a7 220 result->nodiv = 0.0;
dkato 0:853f5b7408a7 221
dkato 0:853f5b7408a7 222 InputClock = InClock;
dkato 0:853f5b7408a7 223 OutputClock = OuClock;
dkato 0:853f5b7408a7 224 LvdsUsed = Lvds;
dkato 0:853f5b7408a7 225
dkato 0:853f5b7408a7 226 /* Calculation */
dkato 0:853f5b7408a7 227 SeekValue(result);
dkato 0:853f5b7408a7 228
dkato 0:853f5b7408a7 229 result->nidiv = result->nidiv/2;
dkato 0:853f5b7408a7 230 result->nodiv = result->nodiv/2;
dkato 0:853f5b7408a7 231 if( result->nod <= 4 ) {
dkato 0:853f5b7408a7 232 result->nod = result->nod/2;
dkato 0:853f5b7408a7 233 } else if( result->nod == 8 ) {
dkato 0:853f5b7408a7 234 result->nod = 3;
dkato 0:853f5b7408a7 235 } else {
dkato 0:853f5b7408a7 236 }
dkato 0:853f5b7408a7 237 result->nrd -=1; /* nrd-1 */
dkato 0:853f5b7408a7 238 return 0;
dkato 0:853f5b7408a7 239 }