spi_api.h

00001 
00002 /** \addtogroup hal */
00003 /** @{*/
00004 /* mbed Microcontroller Library
00005  * Copyright (c) 2006-2013 ARM Limited
00006  *
00007  * Licensed under the Apache License, Version 2.0 (the "License");
00008  * you may not use this file except in compliance with the License.
00009  * You may obtain a copy of the License at
00010  *
00011  *     http://www.apache.org/licenses/LICENSE-2.0
00012  *
00013  * Unless required by applicable law or agreed to in writing, software
00014  * distributed under the License is distributed on an "AS IS" BASIS,
00015  * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
00016  * See the License for the specific language governing permissions and
00017  * limitations under the License.
00018  */
00019 #ifndef MBED_SPI_API_H
00020 #define MBED_SPI_API_H
00021 
00022 #include "device.h"
00023 #include "hal/dma_api.h"
00024 #include "hal/buffer.h"
00025 
00026 #if DEVICE_SPI
00027 
00028 #define SPI_EVENT_ERROR       (1 << 1)
00029 #define SPI_EVENT_COMPLETE    (1 << 2)
00030 #define SPI_EVENT_RX_OVERFLOW (1 << 3)
00031 #define SPI_EVENT_ALL         (SPI_EVENT_ERROR | SPI_EVENT_COMPLETE | SPI_EVENT_RX_OVERFLOW)
00032 
00033 #define SPI_EVENT_INTERNAL_TRANSFER_COMPLETE (1 << 30) // Internal flag to report that an event occurred
00034 
00035 #define SPI_FILL_WORD         (0xFFFF)
00036 
00037 #if DEVICE_SPI_ASYNCH
00038 /** Asynch SPI HAL structure
00039  */
00040 typedef struct {
00041     struct spi_s spi;        /**< Target specific SPI structure */
00042     struct buffer_s tx_buff; /**< Tx buffer */
00043     struct buffer_s rx_buff; /**< Rx buffer */
00044 } spi_t;
00045 
00046 #else
00047 /** Non-asynch SPI HAL structure
00048  */
00049 typedef struct spi_s spi_t;
00050 
00051 #endif
00052 
00053 #ifdef __cplusplus
00054 extern "C" {
00055 #endif
00056 
00057 /**
00058  * \defgroup hal_GeneralSPI SPI Configuration Functions
00059  * @{
00060  */
00061 
00062 /** Initialize the SPI peripheral
00063  *
00064  * Configures the pins used by SPI, sets a default format and frequency, and enables the peripheral
00065  * @param[out] obj  The SPI object to initialize
00066  * @param[in]  mosi The pin to use for MOSI
00067  * @param[in]  miso The pin to use for MISO
00068  * @param[in]  sclk The pin to use for SCLK
00069  * @param[in]  ssel The pin to use for SSEL
00070  */
00071 void spi_init(spi_t *obj, PinName mosi, PinName miso, PinName sclk, PinName ssel);
00072 
00073 /** Release a SPI object
00074  *
00075  * TODO: spi_free is currently unimplemented
00076  * This will require reference counting at the C++ level to be safe
00077  *
00078  * Return the pins owned by the SPI object to their reset state
00079  * Disable the SPI peripheral
00080  * Disable the SPI clock
00081  * @param[in] obj The SPI object to deinitialize
00082  */
00083 void spi_free(spi_t *obj);
00084 
00085 /** Configure the SPI format
00086  *
00087  * Set the number of bits per frame, configure clock polarity and phase, shift order and master/slave mode.
00088  * The default bit order is MSB.
00089  * @param[in,out] obj   The SPI object to configure
00090  * @param[in]     bits  The number of bits per frame
00091  * @param[in]     mode  The SPI mode (clock polarity, phase, and shift direction)
00092  * @param[in]     slave Zero for master mode or non-zero for slave mode
00093  */
00094 void spi_format(spi_t *obj, int bits, int mode, int slave);
00095 
00096 /** Set the SPI baud rate
00097  *
00098  * Actual frequency may differ from the desired frequency due to available dividers and bus clock
00099  * Configures the SPI peripheral's baud rate
00100  * @param[in,out] obj The SPI object to configure
00101  * @param[in]     hz  The baud rate in Hz
00102  */
00103 void spi_frequency(spi_t *obj, int hz);
00104 
00105 /**@}*/
00106 /**
00107  * \defgroup SynchSPI Synchronous SPI Hardware Abstraction Layer
00108  * @{
00109  */
00110 
00111 /** Write a byte out in master mode and receive a value
00112  *
00113  * @param[in] obj   The SPI peripheral to use for sending
00114  * @param[in] value The value to send
00115  * @return Returns the value received during send
00116  */
00117 int  spi_master_write(spi_t *obj, int value);
00118 
00119 /** Write a block out in master mode and receive a value
00120  *
00121  *  The total number of bytes sent and recieved will be the maximum of
00122  *  tx_length and rx_length. The bytes written will be padded with the
00123  *  value 0xff.
00124  *
00125  * @param[in] obj       The SPI peripheral to use for sending
00126  * @param[in] tx_buffer Pointer to the byte-array of data to write to the device
00127  * @param[in] tx_length Number of bytes to write, may be zero
00128  * @param[in] rx_buffer Pointer to the byte-array of data to read from the device
00129  * @param[in] rx_length Number of bytes to read, may be zero
00130  * @returns
00131  *      The number of bytes written and read from the device. This is
00132  *      maximum of tx_length and rx_length.
00133  */
00134 int spi_master_block_write(spi_t *obj, const char *tx_buffer, int tx_length, char *rx_buffer, int rx_length);
00135 
00136 /** Check if a value is available to read
00137  *
00138  * @param[in] obj The SPI peripheral to check
00139  * @return non-zero if a value is available
00140  */
00141 int  spi_slave_receive(spi_t *obj);
00142 
00143 /** Get a received value out of the SPI receive buffer in slave mode
00144  *
00145  * Blocks until a value is available
00146  * @param[in] obj The SPI peripheral to read
00147  * @return The value received
00148  */
00149 int  spi_slave_read(spi_t *obj);
00150 
00151 /** Write a value to the SPI peripheral in slave mode
00152  *
00153  * Blocks until the SPI peripheral can be written to
00154  * @param[in] obj   The SPI peripheral to write
00155  * @param[in] value The value to write
00156  */
00157 void spi_slave_write(spi_t *obj, int value);
00158 
00159 /** Checks if the specified SPI peripheral is in use
00160  *
00161  * @param[in] obj The SPI peripheral to check
00162  * @return non-zero if the peripheral is currently transmitting
00163  */
00164 int  spi_busy(spi_t *obj);
00165 
00166 /** Get the module number
00167  *
00168  * @param[in] obj The SPI peripheral to check
00169  * @return The module number
00170  */
00171 uint8_t spi_get_module(spi_t *obj);
00172 
00173 /**@}*/
00174 
00175 #if DEVICE_SPI_ASYNCH
00176 /**
00177  * \defgroup AsynchSPI Asynchronous SPI Hardware Abstraction Layer
00178  * @{
00179  */
00180 
00181 /** Begin the SPI transfer. Buffer pointers and lengths are specified in tx_buff and rx_buff
00182  *
00183  * @param[in] obj       The SPI object that holds the transfer information
00184  * @param[in] tx        The transmit buffer
00185  * @param[in] tx_length The number of bytes to transmit
00186  * @param[in] rx        The receive buffer
00187  * @param[in] rx_length The number of bytes to receive
00188  * @param[in] bit_width The bit width of buffer words
00189  * @param[in] event     The logical OR of events to be registered
00190  * @param[in] handler   SPI interrupt handler
00191  * @param[in] hint      A suggestion for how to use DMA with this transfer
00192  */
00193 void spi_master_transfer(spi_t *obj, const void *tx, size_t tx_length, void *rx, size_t rx_length, uint8_t bit_width, uint32_t handler, uint32_t event, DMAUsage hint);
00194 
00195 /** The asynchronous IRQ handler
00196  *
00197  * Reads the received values out of the RX FIFO, writes values into the TX FIFO and checks for transfer termination
00198  * conditions, such as buffer overflows or transfer complete.
00199  * @param[in] obj     The SPI object that holds the transfer information
00200  * @return Event flags if a transfer termination condition was met; otherwise 0.
00201  */
00202 uint32_t spi_irq_handler_asynch(spi_t *obj);
00203 
00204 /** Attempts to determine if the SPI peripheral is already in use
00205  *
00206  * If a temporary DMA channel has been allocated, peripheral is in use.
00207  * If a permanent DMA channel has been allocated, check if the DMA channel is in use.  If not, proceed as though no DMA
00208  * channel were allocated.
00209  * If no DMA channel is allocated, check whether tx and rx buffers have been assigned.  For each assigned buffer, check
00210  * if the corresponding buffer position is less than the buffer length.  If buffers do not indicate activity, check if
00211  * there are any bytes in the FIFOs.
00212  * @param[in] obj The SPI object to check for activity
00213  * @return Non-zero if the SPI port is active or zero if it is not.
00214  */
00215 uint8_t spi_active(spi_t *obj);
00216 
00217 /** Abort an SPI transfer
00218  *
00219  * @param obj The SPI peripheral to stop
00220  */
00221 void spi_abort_asynch(spi_t *obj);
00222 
00223 
00224 #endif
00225 
00226 /**@}*/
00227 
00228 #ifdef __cplusplus
00229 }
00230 #endif // __cplusplus
00231 
00232 #endif // SPI_DEVICE
00233 
00234 #endif // MBED_SPI_API_H
00235 
00236 /** @}*/
00237