Renesas GR-PEACH OpenCV Development / gr-peach-opencv-project-sd-card_update

Fork of gr-peach-opencv-project-sd-card by the do

Committer:
<>
Date:
Fri Oct 28 11:17:30 2016 +0100
Revision:
149:156823d33999
Parent:
targets/cmsis/TARGET_RENESAS/TARGET_RZ_A1H/inc/iodefines/lvds_iodefine.h@144:ef7eb2e8f9f7
This updates the lib to the mbed lib v128

NOTE: This release includes a restructuring of the file and directory locations and thus some
include paths in your code may need updating accordingly.

Who changed what in which revision?

UserRevisionLine numberNew contents of line
<> 144:ef7eb2e8f9f7 1 /*******************************************************************************
<> 144:ef7eb2e8f9f7 2 * DISCLAIMER
<> 144:ef7eb2e8f9f7 3 * This software is supplied by Renesas Electronics Corporation and is only
<> 144:ef7eb2e8f9f7 4 * intended for use with Renesas products. No other uses are authorized. This
<> 144:ef7eb2e8f9f7 5 * software is owned by Renesas Electronics Corporation and is protected under
<> 144:ef7eb2e8f9f7 6 * all applicable laws, including copyright laws.
<> 144:ef7eb2e8f9f7 7 * THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING
<> 144:ef7eb2e8f9f7 8 * THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT
<> 144:ef7eb2e8f9f7 9 * LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE
<> 144:ef7eb2e8f9f7 10 * AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.
<> 144:ef7eb2e8f9f7 11 * TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS
<> 144:ef7eb2e8f9f7 12 * ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE
<> 144:ef7eb2e8f9f7 13 * FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR
<> 144:ef7eb2e8f9f7 14 * ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE
<> 144:ef7eb2e8f9f7 15 * BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
<> 144:ef7eb2e8f9f7 16 * Renesas reserves the right, without notice, to make changes to this software
<> 144:ef7eb2e8f9f7 17 * and to discontinue the availability of this software. By using this software,
<> 144:ef7eb2e8f9f7 18 * you agree to the additional terms and conditions found by accessing the
<> 144:ef7eb2e8f9f7 19 * following link:
<> 144:ef7eb2e8f9f7 20 * http://www.renesas.com/disclaimer*
<> 144:ef7eb2e8f9f7 21 * Copyright (C) 2013-2014 Renesas Electronics Corporation. All rights reserved.
<> 144:ef7eb2e8f9f7 22 *******************************************************************************/
<> 144:ef7eb2e8f9f7 23 /*******************************************************************************
<> 144:ef7eb2e8f9f7 24 * File Name : lvds_iodefine.h
<> 144:ef7eb2e8f9f7 25 * $Rev: $
<> 144:ef7eb2e8f9f7 26 * $Date:: $
<> 144:ef7eb2e8f9f7 27 * Description : Definition of I/O Register (V1.01a)
<> 144:ef7eb2e8f9f7 28 ******************************************************************************/
<> 144:ef7eb2e8f9f7 29 #ifndef LVDS_IODEFINE_H
<> 144:ef7eb2e8f9f7 30 #define LVDS_IODEFINE_H
<> 144:ef7eb2e8f9f7 31 /* ->SEC M1.10.1 : Not magic number */
<> 144:ef7eb2e8f9f7 32
<> 144:ef7eb2e8f9f7 33 struct st_lvds
<> 144:ef7eb2e8f9f7 34 { /* LVDS */
<> 144:ef7eb2e8f9f7 35 volatile uint32_t LVDS_UPDATE; /* LVDS_UPDATE */
<> 144:ef7eb2e8f9f7 36 volatile uint32_t LVDSFCL; /* LVDSFCL */
<> 144:ef7eb2e8f9f7 37 volatile uint8_t dummy608[24]; /* */
<> 144:ef7eb2e8f9f7 38 volatile uint32_t LCLKSELR; /* LCLKSELR */
<> 144:ef7eb2e8f9f7 39 volatile uint32_t LPLLSETR; /* LPLLSETR */
<> 144:ef7eb2e8f9f7 40 volatile uint8_t dummy609[4]; /* */
<> 144:ef7eb2e8f9f7 41 volatile uint32_t LPHYACC; /* LPHYACC */
<> 144:ef7eb2e8f9f7 42 };
<> 144:ef7eb2e8f9f7 43
<> 144:ef7eb2e8f9f7 44
<> 144:ef7eb2e8f9f7 45 #define LVDS (*(struct st_lvds *)0xFCFF7A30uL) /* LVDS */
<> 144:ef7eb2e8f9f7 46
<> 144:ef7eb2e8f9f7 47
<> 144:ef7eb2e8f9f7 48 #define LVDSLVDS_UPDATE LVDS.LVDS_UPDATE
<> 144:ef7eb2e8f9f7 49 #define LVDSLVDSFCL LVDS.LVDSFCL
<> 144:ef7eb2e8f9f7 50 #define LVDSLCLKSELR LVDS.LCLKSELR
<> 144:ef7eb2e8f9f7 51 #define LVDSLPLLSETR LVDS.LPLLSETR
<> 144:ef7eb2e8f9f7 52 #define LVDSLPHYACC LVDS.LPHYACC
<> 144:ef7eb2e8f9f7 53 /* <-SEC M1.10.1 */
<> 144:ef7eb2e8f9f7 54 #endif