ROME2 - TI / Mbed 2 deprecated ROME2 - Praktikum

Dependencies:   mbed

Committer:
solcager
Date:
Fri Mar 31 11:00:19 2017 +0000
Revision:
1:08ca9b208045
P3

Who changed what in which revision?

UserRevisionLine numberNew contents of line
solcager 1:08ca9b208045 1 /*
solcager 1:08ca9b208045 2 * EncoderCounter.cpp
solcager 1:08ca9b208045 3 * Copyright (c) 2017, ZHAW
solcager 1:08ca9b208045 4 * All rights reserved.
solcager 1:08ca9b208045 5 */
solcager 1:08ca9b208045 6
solcager 1:08ca9b208045 7 #include "EncoderCounter.h"
solcager 1:08ca9b208045 8
solcager 1:08ca9b208045 9 using namespace std;
solcager 1:08ca9b208045 10
solcager 1:08ca9b208045 11 /**
solcager 1:08ca9b208045 12 * Creates and initializes the driver to read the quadrature
solcager 1:08ca9b208045 13 * encoder counter of the STM32 microcontroller.
solcager 1:08ca9b208045 14 * @param a the input pin for the channel A.
solcager 1:08ca9b208045 15 * @param b the input pin for the channel B.
solcager 1:08ca9b208045 16 */
solcager 1:08ca9b208045 17 EncoderCounter::EncoderCounter(PinName a, PinName b) {
solcager 1:08ca9b208045 18
solcager 1:08ca9b208045 19 // check pins
solcager 1:08ca9b208045 20
solcager 1:08ca9b208045 21 if ((a == PA_6) && (b == PC_7)) {
solcager 1:08ca9b208045 22
solcager 1:08ca9b208045 23 // pinmap OK for TIM3 CH1 and CH2
solcager 1:08ca9b208045 24
solcager 1:08ca9b208045 25 TIM = TIM3;
solcager 1:08ca9b208045 26
solcager 1:08ca9b208045 27 // configure reset and clock control registers
solcager 1:08ca9b208045 28
solcager 1:08ca9b208045 29 RCC->AHB1ENR |= RCC_AHB1ENR_GPIOCEN; // manually enable port C (port A enabled by mbed library)
solcager 1:08ca9b208045 30
solcager 1:08ca9b208045 31 // configure general purpose I/O registers
solcager 1:08ca9b208045 32
solcager 1:08ca9b208045 33 GPIOA->MODER &= ~GPIO_MODER_MODER6; // reset port A6
solcager 1:08ca9b208045 34 GPIOA->MODER |= GPIO_MODER_MODER6_1; // set alternate mode of port A6
solcager 1:08ca9b208045 35 GPIOA->PUPDR &= ~GPIO_PUPDR_PUPDR6; // reset pull-up/pull-down on port A6
solcager 1:08ca9b208045 36 GPIOA->PUPDR |= GPIO_PUPDR_PUPDR6_1; // set input as pull-down
solcager 1:08ca9b208045 37 GPIOA->AFR[0] &= ~(0xF << 4*6); // reset alternate function of port A6
solcager 1:08ca9b208045 38 GPIOA->AFR[0] |= 2 << 4*6; // set alternate funtion 2 of port A6
solcager 1:08ca9b208045 39
solcager 1:08ca9b208045 40 GPIOC->MODER &= ~GPIO_MODER_MODER7; // reset port C7
solcager 1:08ca9b208045 41 GPIOC->MODER |= GPIO_MODER_MODER7_1; // set alternate mode of port C7
solcager 1:08ca9b208045 42 GPIOC->PUPDR &= ~GPIO_PUPDR_PUPDR7; // reset pull-up/pull-down on port C7
solcager 1:08ca9b208045 43 GPIOC->PUPDR |= GPIO_PUPDR_PUPDR7_1; // set input as pull-down
solcager 1:08ca9b208045 44 GPIOC->AFR[0] &= ~0xF0000000; // reset alternate function of port C7
solcager 1:08ca9b208045 45 GPIOC->AFR[0] |= 2 << 4*7; // set alternate funtion 2 of port C7
solcager 1:08ca9b208045 46
solcager 1:08ca9b208045 47 // configure reset and clock control registers
solcager 1:08ca9b208045 48
solcager 1:08ca9b208045 49 RCC->APB1RSTR |= RCC_APB1RSTR_TIM3RST; //reset TIM3 controller
solcager 1:08ca9b208045 50 RCC->APB1RSTR &= ~RCC_APB1RSTR_TIM3RST;
solcager 1:08ca9b208045 51
solcager 1:08ca9b208045 52 RCC->APB1ENR |= RCC_APB1ENR_TIM3EN; // TIM3 clock enable
solcager 1:08ca9b208045 53
solcager 1:08ca9b208045 54 } else if ((a == PB_6) && (b == PB_7)) {
solcager 1:08ca9b208045 55
solcager 1:08ca9b208045 56 // pinmap OK for TIM4 CH1 and CH2
solcager 1:08ca9b208045 57
solcager 1:08ca9b208045 58 TIM = TIM4;
solcager 1:08ca9b208045 59
solcager 1:08ca9b208045 60 // configure reset and clock control registers
solcager 1:08ca9b208045 61
solcager 1:08ca9b208045 62 RCC->AHB1ENR |= RCC_AHB1ENR_GPIOBEN; // manually enable port B (port A enabled by mbed library)
solcager 1:08ca9b208045 63
solcager 1:08ca9b208045 64 // configure general purpose I/O registers
solcager 1:08ca9b208045 65
solcager 1:08ca9b208045 66 GPIOB->MODER &= ~GPIO_MODER_MODER6; // reset port B6
solcager 1:08ca9b208045 67 GPIOB->MODER |= GPIO_MODER_MODER6_1; // set alternate mode of port B6
solcager 1:08ca9b208045 68 GPIOB->PUPDR &= ~GPIO_PUPDR_PUPDR6; // reset pull-up/pull-down on port B6
solcager 1:08ca9b208045 69 GPIOB->PUPDR |= GPIO_PUPDR_PUPDR6_1; // set input as pull-down
solcager 1:08ca9b208045 70 GPIOB->AFR[0] &= ~(0xF << 4*6); // reset alternate function of port B6
solcager 1:08ca9b208045 71 GPIOB->AFR[0] |= 2 << 4*6; // set alternate funtion 2 of port B6
solcager 1:08ca9b208045 72
solcager 1:08ca9b208045 73 GPIOB->MODER &= ~GPIO_MODER_MODER7; // reset port B7
solcager 1:08ca9b208045 74 GPIOB->MODER |= GPIO_MODER_MODER7_1; // set alternate mode of port B7
solcager 1:08ca9b208045 75 GPIOB->PUPDR &= ~GPIO_PUPDR_PUPDR7; // reset pull-up/pull-down on port B7
solcager 1:08ca9b208045 76 GPIOB->PUPDR |= GPIO_PUPDR_PUPDR7_1; // set input as pull-down
solcager 1:08ca9b208045 77 GPIOB->AFR[0] &= ~0xF0000000; // reset alternate function of port B7
solcager 1:08ca9b208045 78 GPIOB->AFR[0] |= 2 << 4*7; // set alternate funtion 2 of port B7
solcager 1:08ca9b208045 79
solcager 1:08ca9b208045 80 // configure reset and clock control registers
solcager 1:08ca9b208045 81
solcager 1:08ca9b208045 82 RCC->APB1RSTR |= RCC_APB1RSTR_TIM4RST; //reset TIM4 controller
solcager 1:08ca9b208045 83 RCC->APB1RSTR &= ~RCC_APB1RSTR_TIM4RST;
solcager 1:08ca9b208045 84
solcager 1:08ca9b208045 85 RCC->APB1ENR |= RCC_APB1ENR_TIM4EN; // TIM4 clock enable
solcager 1:08ca9b208045 86
solcager 1:08ca9b208045 87 } else {
solcager 1:08ca9b208045 88
solcager 1:08ca9b208045 89 printf("pinmap not found for peripheral\n");
solcager 1:08ca9b208045 90 }
solcager 1:08ca9b208045 91
solcager 1:08ca9b208045 92 // configure general purpose timer 3 or 4
solcager 1:08ca9b208045 93
solcager 1:08ca9b208045 94 TIM->CR1 = 0x0000; // counter disable
solcager 1:08ca9b208045 95 TIM->CR2 = 0x0000; // reset master mode selection
solcager 1:08ca9b208045 96 TIM->SMCR = TIM_SMCR_SMS_1 | TIM_SMCR_SMS_0; // counting on both TI1 & TI2 edges
solcager 1:08ca9b208045 97 TIM->CCMR1 = TIM_CCMR1_CC2S_0 | TIM_CCMR1_CC1S_0;
solcager 1:08ca9b208045 98 TIM->CCMR2 = 0x0000; // reset capture mode register 2
solcager 1:08ca9b208045 99 TIM->CCER = TIM_CCER_CC2E | TIM_CCER_CC1E;
solcager 1:08ca9b208045 100 TIM->CNT = 0x0000; // reset counter value
solcager 1:08ca9b208045 101 TIM->ARR = 0xFFFF; // auto reload register
solcager 1:08ca9b208045 102 TIM->CR1 = TIM_CR1_CEN; // counter enable
solcager 1:08ca9b208045 103 }
solcager 1:08ca9b208045 104
solcager 1:08ca9b208045 105 EncoderCounter::~EncoderCounter() {}
solcager 1:08ca9b208045 106
solcager 1:08ca9b208045 107 /**
solcager 1:08ca9b208045 108 * Resets the counter value to zero.
solcager 1:08ca9b208045 109 */
solcager 1:08ca9b208045 110 void EncoderCounter::reset() {
solcager 1:08ca9b208045 111
solcager 1:08ca9b208045 112 TIM->CNT = 0x0000;
solcager 1:08ca9b208045 113 }
solcager 1:08ca9b208045 114
solcager 1:08ca9b208045 115 /**
solcager 1:08ca9b208045 116 * Resets the counter value to a given offset value.
solcager 1:08ca9b208045 117 * @param offset the offset value to reset the counter to.
solcager 1:08ca9b208045 118 */
solcager 1:08ca9b208045 119 void EncoderCounter::reset(short offset) {
solcager 1:08ca9b208045 120
solcager 1:08ca9b208045 121 TIM->CNT = -offset;
solcager 1:08ca9b208045 122 }
solcager 1:08ca9b208045 123
solcager 1:08ca9b208045 124 /**
solcager 1:08ca9b208045 125 * Reads the quadrature encoder counter value.
solcager 1:08ca9b208045 126 * @return the quadrature encoder counter as a signed 16-bit integer value.
solcager 1:08ca9b208045 127 */
solcager 1:08ca9b208045 128 short EncoderCounter::read() {
solcager 1:08ca9b208045 129
solcager 1:08ca9b208045 130 return (short)(-TIM->CNT);
solcager 1:08ca9b208045 131 }
solcager 1:08ca9b208045 132
solcager 1:08ca9b208045 133 /**
solcager 1:08ca9b208045 134 * The empty operator is a shorthand notation of the <code>read()</code> method.
solcager 1:08ca9b208045 135 */
solcager 1:08ca9b208045 136 EncoderCounter::operator short() {
solcager 1:08ca9b208045 137
solcager 1:08ca9b208045 138 return read();
solcager 1:08ca9b208045 139 }
solcager 1:08ca9b208045 140