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targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_tim_ex.h@144:ef7eb2e8f9f7, 2016-09-02 (annotated)

Committer:
<>
Date:
Fri Sep 02 15:07:44 2016 +0100
Revision:
144:ef7eb2e8f9f7
Parent:
19:112740acecfa 
This updates the lib to the mbed lib v125

Who changed what in which revision?

UserRevisionLine numberNew contents of line
<> 144:ef7eb2e8f9f7 1 /**
<> 144:ef7eb2e8f9f7 2 ******************************************************************************
<> 144:ef7eb2e8f9f7 3 * @file stm32f4xx_hal_tim_ex.h
<> 144:ef7eb2e8f9f7 4 * @author MCD Application Team
<> 144:ef7eb2e8f9f7 5 * @version V1.5.0
<> 144:ef7eb2e8f9f7 6 * @date 06-May-2016
<> 144:ef7eb2e8f9f7 7 * @brief Header file of TIM HAL Extension module.
<> 144:ef7eb2e8f9f7 8 ******************************************************************************
<> 144:ef7eb2e8f9f7 9 * @attention
<> 144:ef7eb2e8f9f7 10 *
<> 144:ef7eb2e8f9f7 11 * <h2><center>&copy; COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
<> 144:ef7eb2e8f9f7 12 *
<> 144:ef7eb2e8f9f7 13 * Redistribution and use in source and binary forms, with or without modification,
<> 144:ef7eb2e8f9f7 14 * are permitted provided that the following conditions are met:
<> 144:ef7eb2e8f9f7 15 * 1. Redistributions of source code must retain the above copyright notice,
<> 144:ef7eb2e8f9f7 16 * this list of conditions and the following disclaimer.
<> 144:ef7eb2e8f9f7 17 * 2. Redistributions in binary form must reproduce the above copyright notice,
<> 144:ef7eb2e8f9f7 18 * this list of conditions and the following disclaimer in the documentation
<> 144:ef7eb2e8f9f7 19 * and/or other materials provided with the distribution.
<> 144:ef7eb2e8f9f7 20 * 3. Neither the name of STMicroelectronics nor the names of its contributors
<> 144:ef7eb2e8f9f7 21 * may be used to endorse or promote products derived from this software
<> 144:ef7eb2e8f9f7 22 * without specific prior written permission.
<> 144:ef7eb2e8f9f7 23 *
<> 144:ef7eb2e8f9f7 24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
<> 144:ef7eb2e8f9f7 25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
<> 144:ef7eb2e8f9f7 26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
<> 144:ef7eb2e8f9f7 27 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
<> 144:ef7eb2e8f9f7 28 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
<> 144:ef7eb2e8f9f7 29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
<> 144:ef7eb2e8f9f7 30 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
<> 144:ef7eb2e8f9f7 31 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
<> 144:ef7eb2e8f9f7 32 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
<> 144:ef7eb2e8f9f7 33 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
<> 144:ef7eb2e8f9f7 34 *
<> 144:ef7eb2e8f9f7 35 ******************************************************************************
<> 144:ef7eb2e8f9f7 36 */
<> 144:ef7eb2e8f9f7 37
<> 144:ef7eb2e8f9f7 38 /* Define to prevent recursive inclusion -------------------------------------*/
<> 144:ef7eb2e8f9f7 39 #ifndef __STM32F4xx_HAL_TIM_EX_H
<> 144:ef7eb2e8f9f7 40 #define __STM32F4xx_HAL_TIM_EX_H
<> 144:ef7eb2e8f9f7 41
<> 144:ef7eb2e8f9f7 42 #ifdef __cplusplus
<> 144:ef7eb2e8f9f7 43 extern "C" {
<> 144:ef7eb2e8f9f7 44 #endif
<> 144:ef7eb2e8f9f7 45
<> 144:ef7eb2e8f9f7 46 /* Includes ------------------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 47 #include "stm32f4xx_hal_def.h"
<> 144:ef7eb2e8f9f7 48
<> 144:ef7eb2e8f9f7 49 /** @addtogroup STM32F4xx_HAL_Driver
<> 144:ef7eb2e8f9f7 50 * @{
<> 144:ef7eb2e8f9f7 51 */
<> 144:ef7eb2e8f9f7 52
<> 144:ef7eb2e8f9f7 53 /** @addtogroup TIMEx
<> 144:ef7eb2e8f9f7 54 * @{
<> 144:ef7eb2e8f9f7 55 */
<> 144:ef7eb2e8f9f7 56
<> 144:ef7eb2e8f9f7 57 /* Exported types ------------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 58 /** @defgroup TIMEx_Exported_Types TIM Exported Types
<> 144:ef7eb2e8f9f7 59 * @{
<> 144:ef7eb2e8f9f7 60 */
<> 144:ef7eb2e8f9f7 61
<> 144:ef7eb2e8f9f7 62 /**
<> 144:ef7eb2e8f9f7 63 * @brief TIM Hall sensor Configuration Structure definition
<> 144:ef7eb2e8f9f7 64 */
<> 144:ef7eb2e8f9f7 65
<> 144:ef7eb2e8f9f7 66 typedef struct
<> 144:ef7eb2e8f9f7 67 {
<> 144:ef7eb2e8f9f7 68
<> 144:ef7eb2e8f9f7 69 uint32_t IC1Polarity; /*!< Specifies the active edge of the input signal.
<> 144:ef7eb2e8f9f7 70 This parameter can be a value of @ref TIM_Input_Capture_Polarity */
<> 144:ef7eb2e8f9f7 71
<> 144:ef7eb2e8f9f7 72 uint32_t IC1Prescaler; /*!< Specifies the Input Capture Prescaler.
<> 144:ef7eb2e8f9f7 73 This parameter can be a value of @ref TIM_Input_Capture_Prescaler */
<> 144:ef7eb2e8f9f7 74
<> 144:ef7eb2e8f9f7 75 uint32_t IC1Filter; /*!< Specifies the input capture filter.
<> 144:ef7eb2e8f9f7 76 This parameter can be a number between Min_Data = 0x0 and Max_Data = 0xF */
<> 144:ef7eb2e8f9f7 77
<> 144:ef7eb2e8f9f7 78 uint32_t Commutation_Delay; /*!< Specifies the pulse value to be loaded into the Capture Compare Register.
<> 144:ef7eb2e8f9f7 79 This parameter can be a number between Min_Data = 0x0000U and Max_Data = 0xFFFFU */
<> 144:ef7eb2e8f9f7 80 } TIM_HallSensor_InitTypeDef;
<> 144:ef7eb2e8f9f7 81
<> 144:ef7eb2e8f9f7 82 /**
<> 144:ef7eb2e8f9f7 83 * @brief TIM Master configuration Structure definition
<> 144:ef7eb2e8f9f7 84 */
<> 144:ef7eb2e8f9f7 85 typedef struct {
<> 144:ef7eb2e8f9f7 86 uint32_t MasterOutputTrigger; /*!< Trigger output (TRGO) selection.
<> 144:ef7eb2e8f9f7 87 This parameter can be a value of @ref TIM_Master_Mode_Selection */
<> 144:ef7eb2e8f9f7 88
<> 144:ef7eb2e8f9f7 89 uint32_t MasterSlaveMode; /*!< Master/slave mode selection.
<> 144:ef7eb2e8f9f7 90 This parameter can be a value of @ref TIM_Master_Slave_Mode */
<> 144:ef7eb2e8f9f7 91 }TIM_MasterConfigTypeDef;
<> 144:ef7eb2e8f9f7 92
<> 144:ef7eb2e8f9f7 93 /**
<> 144:ef7eb2e8f9f7 94 * @brief TIM Break and Dead time configuration Structure definition
<> 144:ef7eb2e8f9f7 95 */
<> 144:ef7eb2e8f9f7 96 typedef struct
<> 144:ef7eb2e8f9f7 97 {
<> 144:ef7eb2e8f9f7 98 uint32_t OffStateRunMode; /*!< TIM off state in run mode.
<> 144:ef7eb2e8f9f7 99 This parameter can be a value of @ref TIM_OSSR_Off_State_Selection_for_Run_mode_state */
<> 144:ef7eb2e8f9f7 100 uint32_t OffStateIDLEMode; /*!< TIM off state in IDLE mode.
<> 144:ef7eb2e8f9f7 101 This parameter can be a value of @ref TIM_OSSI_Off_State_Selection_for_Idle_mode_state */
<> 144:ef7eb2e8f9f7 102 uint32_t LockLevel; /*!< TIM Lock level.
<> 144:ef7eb2e8f9f7 103 This parameter can be a value of @ref TIM_Lock_level */
<> 144:ef7eb2e8f9f7 104 uint32_t DeadTime; /*!< TIM dead Time.
<> 144:ef7eb2e8f9f7 105 This parameter can be a number between Min_Data = 0x00 and Max_Data = 0xFF */
<> 144:ef7eb2e8f9f7 106 uint32_t BreakState; /*!< TIM Break State.
<> 144:ef7eb2e8f9f7 107 This parameter can be a value of @ref TIM_Break_Input_enable_disable */
<> 144:ef7eb2e8f9f7 108 uint32_t BreakPolarity; /*!< TIM Break input polarity.
<> 144:ef7eb2e8f9f7 109 This parameter can be a value of @ref TIM_Break_Polarity */
<> 144:ef7eb2e8f9f7 110 uint32_t AutomaticOutput; /*!< TIM Automatic Output Enable state.
<> 144:ef7eb2e8f9f7 111 This parameter can be a value of @ref TIM_AOE_Bit_Set_Reset */
<> 144:ef7eb2e8f9f7 112 }TIM_BreakDeadTimeConfigTypeDef;
<> 144:ef7eb2e8f9f7 113 /**
<> 144:ef7eb2e8f9f7 114 * @}
<> 144:ef7eb2e8f9f7 115 */
<> 144:ef7eb2e8f9f7 116
<> 144:ef7eb2e8f9f7 117 /* Exported constants --------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 118 /** @defgroup TIMEx_Exported_Constants TIM Exported Constants
<> 144:ef7eb2e8f9f7 119 * @{
<> 144:ef7eb2e8f9f7 120 */
<> 144:ef7eb2e8f9f7 121
<> 144:ef7eb2e8f9f7 122 /** @defgroup TIMEx_Remap TIM Remap
<> 144:ef7eb2e8f9f7 123 * @{
<> 144:ef7eb2e8f9f7 124 */
<> 144:ef7eb2e8f9f7 125 #define TIM_TIM2_TIM8_TRGO (0x00000000U)
<> 144:ef7eb2e8f9f7 126 #define TIM_TIM2_ETH_PTP (0x00000400U)
<> 144:ef7eb2e8f9f7 127 #define TIM_TIM2_USBFS_SOF (0x00000800U)
<> 144:ef7eb2e8f9f7 128 #define TIM_TIM2_USBHS_SOF (0x00000C00U)
<> 144:ef7eb2e8f9f7 129 #define TIM_TIM5_GPIO (0x00000000U)
<> 144:ef7eb2e8f9f7 130 #define TIM_TIM5_LSI (0x00000040U)
<> 144:ef7eb2e8f9f7 131 #define TIM_TIM5_LSE (0x00000080U)
<> 144:ef7eb2e8f9f7 132 #define TIM_TIM5_RTC (0x000000C0U)
<> 144:ef7eb2e8f9f7 133 #define TIM_TIM11_GPIO (0x00000000U)
<> 144:ef7eb2e8f9f7 134 #define TIM_TIM11_HSE (0x00000002U)
<> 144:ef7eb2e8f9f7 135
<> 144:ef7eb2e8f9f7 136 #if defined (STM32F446xx)
<> 144:ef7eb2e8f9f7 137 #define TIM_TIM11_SPDIFRX (0x00000001U)
<> 144:ef7eb2e8f9f7 138 #endif /* STM32F446xx */
<> 144:ef7eb2e8f9f7 139 /**
<> 144:ef7eb2e8f9f7 140 * @}
<> 144:ef7eb2e8f9f7 141 */
<> 144:ef7eb2e8f9f7 142
<> 144:ef7eb2e8f9f7 143 #if defined(STM32F410Tx) || defined(STM32F410Cx) || defined(STM32F410Rx)
<> 144:ef7eb2e8f9f7 144 /** @defgroup TIMEx_SystemBreakInput TIM System Break Input
<> 144:ef7eb2e8f9f7 145 * @{
<> 144:ef7eb2e8f9f7 146 */
<> 144:ef7eb2e8f9f7 147 #define TIM_SYSTEMBREAKINPUT_HARDFAULT ((uint32_t)0x00000001U) /* Core Lockup lock output(Hardfault) is connected to Break Input of TIM1 and TIM8 */
<> 144:ef7eb2e8f9f7 148 #define TIM_SYSTEMBREAKINPUT_PVD ((uint32_t)0x00000004U) /* PVD Interrupt is connected to Break Input of TIM1 and TIM8 */
<> 144:ef7eb2e8f9f7 149 #define TIM_SYSTEMBREAKINPUT_HARDFAULT_PVD ((uint32_t)0x00000005U) /* Core Lockup lock output(Hardfault) and PVD Interrupt are connected to Break Input of TIM1 and TIM8 */
<> 144:ef7eb2e8f9f7 150 /**
<> 144:ef7eb2e8f9f7 151 * @}
<> 144:ef7eb2e8f9f7 152 */
<> 144:ef7eb2e8f9f7 153 #endif /* STM32F410Tx || STM32F410Cx || STM32F410Rx */
<> 144:ef7eb2e8f9f7 154
<> 144:ef7eb2e8f9f7 155 /**
<> 144:ef7eb2e8f9f7 156 * @}
<> 144:ef7eb2e8f9f7 157 */
<> 144:ef7eb2e8f9f7 158 /* Exported macro ------------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 159 /* Exported functions --------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 160 /** @addtogroup TIMEx_Exported_Functions
<> 144:ef7eb2e8f9f7 161 * @{
<> 144:ef7eb2e8f9f7 162 */
<> 144:ef7eb2e8f9f7 163
<> 144:ef7eb2e8f9f7 164 /** @addtogroup TIMEx_Exported_Functions_Group1
<> 144:ef7eb2e8f9f7 165 * @{
<> 144:ef7eb2e8f9f7 166 */
<> 144:ef7eb2e8f9f7 167 /* Timer Hall Sensor functions **********************************************/
<> 144:ef7eb2e8f9f7 168 HAL_StatusTypeDef HAL_TIMEx_HallSensor_Init(TIM_HandleTypeDef* htim, TIM_HallSensor_InitTypeDef* sConfig);
<> 144:ef7eb2e8f9f7 169 HAL_StatusTypeDef HAL_TIMEx_HallSensor_DeInit(TIM_HandleTypeDef* htim);
<> 144:ef7eb2e8f9f7 170
<> 144:ef7eb2e8f9f7 171 void HAL_TIMEx_HallSensor_MspInit(TIM_HandleTypeDef* htim);
<> 144:ef7eb2e8f9f7 172 void HAL_TIMEx_HallSensor_MspDeInit(TIM_HandleTypeDef* htim);
<> 144:ef7eb2e8f9f7 173
<> 144:ef7eb2e8f9f7 174 /* Blocking mode: Polling */
<> 144:ef7eb2e8f9f7 175 HAL_StatusTypeDef HAL_TIMEx_HallSensor_Start(TIM_HandleTypeDef* htim);
<> 144:ef7eb2e8f9f7 176 HAL_StatusTypeDef HAL_TIMEx_HallSensor_Stop(TIM_HandleTypeDef* htim);
<> 144:ef7eb2e8f9f7 177 /* Non-Blocking mode: Interrupt */
<> 144:ef7eb2e8f9f7 178 HAL_StatusTypeDef HAL_TIMEx_HallSensor_Start_IT(TIM_HandleTypeDef* htim);
<> 144:ef7eb2e8f9f7 179 HAL_StatusTypeDef HAL_TIMEx_HallSensor_Stop_IT(TIM_HandleTypeDef* htim);
<> 144:ef7eb2e8f9f7 180 /* Non-Blocking mode: DMA */
<> 144:ef7eb2e8f9f7 181 HAL_StatusTypeDef HAL_TIMEx_HallSensor_Start_DMA(TIM_HandleTypeDef* htim, uint32_t *pData, uint16_t Length);
<> 144:ef7eb2e8f9f7 182 HAL_StatusTypeDef HAL_TIMEx_HallSensor_Stop_DMA(TIM_HandleTypeDef* htim);
<> 144:ef7eb2e8f9f7 183 /**
<> 144:ef7eb2e8f9f7 184 * @}
<> 144:ef7eb2e8f9f7 185 */
<> 144:ef7eb2e8f9f7 186
<> 144:ef7eb2e8f9f7 187 /** @addtogroup TIMEx_Exported_Functions_Group2
<> 144:ef7eb2e8f9f7 188 * @{
<> 144:ef7eb2e8f9f7 189 */
<> 144:ef7eb2e8f9f7 190 /* Timer Complementary Output Compare functions *****************************/
<> 144:ef7eb2e8f9f7 191 /* Blocking mode: Polling */
<> 144:ef7eb2e8f9f7 192 HAL_StatusTypeDef HAL_TIMEx_OCN_Start(TIM_HandleTypeDef* htim, uint32_t Channel);
<> 144:ef7eb2e8f9f7 193 HAL_StatusTypeDef HAL_TIMEx_OCN_Stop(TIM_HandleTypeDef* htim, uint32_t Channel);
<> 144:ef7eb2e8f9f7 194
<> 144:ef7eb2e8f9f7 195 /* Non-Blocking mode: Interrupt */
<> 144:ef7eb2e8f9f7 196 HAL_StatusTypeDef HAL_TIMEx_OCN_Start_IT(TIM_HandleTypeDef* htim, uint32_t Channel);
<> 144:ef7eb2e8f9f7 197 HAL_StatusTypeDef HAL_TIMEx_OCN_Stop_IT(TIM_HandleTypeDef* htim, uint32_t Channel);
<> 144:ef7eb2e8f9f7 198
<> 144:ef7eb2e8f9f7 199 /* Non-Blocking mode: DMA */
<> 144:ef7eb2e8f9f7 200 HAL_StatusTypeDef HAL_TIMEx_OCN_Start_DMA(TIM_HandleTypeDef* htim, uint32_t Channel, uint32_t *pData, uint16_t Length);
<> 144:ef7eb2e8f9f7 201 HAL_StatusTypeDef HAL_TIMEx_OCN_Stop_DMA(TIM_HandleTypeDef* htim, uint32_t Channel);
<> 144:ef7eb2e8f9f7 202 /**
<> 144:ef7eb2e8f9f7 203 * @}
<> 144:ef7eb2e8f9f7 204 */
<> 144:ef7eb2e8f9f7 205
<> 144:ef7eb2e8f9f7 206 /** @addtogroup TIMEx_Exported_Functions_Group3
<> 144:ef7eb2e8f9f7 207 * @{
<> 144:ef7eb2e8f9f7 208 */
<> 144:ef7eb2e8f9f7 209 /* Timer Complementary PWM functions ****************************************/
<> 144:ef7eb2e8f9f7 210 /* Blocking mode: Polling */
<> 144:ef7eb2e8f9f7 211 HAL_StatusTypeDef HAL_TIMEx_PWMN_Start(TIM_HandleTypeDef* htim, uint32_t Channel);
<> 144:ef7eb2e8f9f7 212 HAL_StatusTypeDef HAL_TIMEx_PWMN_Stop(TIM_HandleTypeDef* htim, uint32_t Channel);
<> 144:ef7eb2e8f9f7 213
<> 144:ef7eb2e8f9f7 214 /* Non-Blocking mode: Interrupt */
<> 144:ef7eb2e8f9f7 215 HAL_StatusTypeDef HAL_TIMEx_PWMN_Start_IT(TIM_HandleTypeDef* htim, uint32_t Channel);
<> 144:ef7eb2e8f9f7 216 HAL_StatusTypeDef HAL_TIMEx_PWMN_Stop_IT(TIM_HandleTypeDef* htim, uint32_t Channel);
<> 144:ef7eb2e8f9f7 217 /* Non-Blocking mode: DMA */
<> 144:ef7eb2e8f9f7 218 HAL_StatusTypeDef HAL_TIMEx_PWMN_Start_DMA(TIM_HandleTypeDef* htim, uint32_t Channel, uint32_t *pData, uint16_t Length);
<> 144:ef7eb2e8f9f7 219 HAL_StatusTypeDef HAL_TIMEx_PWMN_Stop_DMA(TIM_HandleTypeDef* htim, uint32_t Channel);
<> 144:ef7eb2e8f9f7 220 /**
<> 144:ef7eb2e8f9f7 221 * @}
<> 144:ef7eb2e8f9f7 222 */
<> 144:ef7eb2e8f9f7 223
<> 144:ef7eb2e8f9f7 224 /** @addtogroup TIMEx_Exported_Functions_Group4
<> 144:ef7eb2e8f9f7 225 * @{
<> 144:ef7eb2e8f9f7 226 */
<> 144:ef7eb2e8f9f7 227 /* Timer Complementary One Pulse functions **********************************/
<> 144:ef7eb2e8f9f7 228 /* Blocking mode: Polling */
<> 144:ef7eb2e8f9f7 229 HAL_StatusTypeDef HAL_TIMEx_OnePulseN_Start(TIM_HandleTypeDef* htim, uint32_t OutputChannel);
<> 144:ef7eb2e8f9f7 230 HAL_StatusTypeDef HAL_TIMEx_OnePulseN_Stop(TIM_HandleTypeDef* htim, uint32_t OutputChannel);
<> 144:ef7eb2e8f9f7 231
<> 144:ef7eb2e8f9f7 232 /* Non-Blocking mode: Interrupt */
<> 144:ef7eb2e8f9f7 233 HAL_StatusTypeDef HAL_TIMEx_OnePulseN_Start_IT(TIM_HandleTypeDef* htim, uint32_t OutputChannel);
<> 144:ef7eb2e8f9f7 234 HAL_StatusTypeDef HAL_TIMEx_OnePulseN_Stop_IT(TIM_HandleTypeDef* htim, uint32_t OutputChannel);
<> 144:ef7eb2e8f9f7 235 /**
<> 144:ef7eb2e8f9f7 236 * @}
<> 144:ef7eb2e8f9f7 237 */
<> 144:ef7eb2e8f9f7 238
<> 144:ef7eb2e8f9f7 239 /** @addtogroup TIMEx_Exported_Functions_Group5
<> 144:ef7eb2e8f9f7 240 * @{
<> 144:ef7eb2e8f9f7 241 */
<> 144:ef7eb2e8f9f7 242 /* Extension Control functions ************************************************/
<> 144:ef7eb2e8f9f7 243 HAL_StatusTypeDef HAL_TIMEx_ConfigCommutationEvent(TIM_HandleTypeDef* htim, uint32_t InputTrigger, uint32_t CommutationSource);
<> 144:ef7eb2e8f9f7 244 HAL_StatusTypeDef HAL_TIMEx_ConfigCommutationEvent_IT(TIM_HandleTypeDef* htim, uint32_t InputTrigger, uint32_t CommutationSource);
<> 144:ef7eb2e8f9f7 245 HAL_StatusTypeDef HAL_TIMEx_ConfigCommutationEvent_DMA(TIM_HandleTypeDef* htim, uint32_t InputTrigger, uint32_t CommutationSource);
<> 144:ef7eb2e8f9f7 246 HAL_StatusTypeDef HAL_TIMEx_MasterConfigSynchronization(TIM_HandleTypeDef* htim, TIM_MasterConfigTypeDef * sMasterConfig);
<> 144:ef7eb2e8f9f7 247 HAL_StatusTypeDef HAL_TIMEx_ConfigBreakDeadTime(TIM_HandleTypeDef* htim, TIM_BreakDeadTimeConfigTypeDef *sBreakDeadTimeConfig);
<> 144:ef7eb2e8f9f7 248 HAL_StatusTypeDef HAL_TIMEx_RemapConfig(TIM_HandleTypeDef* htim, uint32_t Remap);
<> 144:ef7eb2e8f9f7 249 /**
<> 144:ef7eb2e8f9f7 250 * @}
<> 144:ef7eb2e8f9f7 251 */
<> 144:ef7eb2e8f9f7 252
<> 144:ef7eb2e8f9f7 253 /** @addtogroup TIMEx_Exported_Functions_Group6
<> 144:ef7eb2e8f9f7 254 * @{
<> 144:ef7eb2e8f9f7 255 */
<> 144:ef7eb2e8f9f7 256 /* Extension Callback *********************************************************/
<> 144:ef7eb2e8f9f7 257 void HAL_TIMEx_CommutationCallback(TIM_HandleTypeDef* htim);
<> 144:ef7eb2e8f9f7 258 void HAL_TIMEx_BreakCallback(TIM_HandleTypeDef* htim);
<> 144:ef7eb2e8f9f7 259 void TIMEx_DMACommutationCplt(DMA_HandleTypeDef *hdma);
<> 144:ef7eb2e8f9f7 260 /**
<> 144:ef7eb2e8f9f7 261 * @}
<> 144:ef7eb2e8f9f7 262 */
<> 144:ef7eb2e8f9f7 263
<> 144:ef7eb2e8f9f7 264 /** @addtogroup TIMEx_Exported_Functions_Group7
<> 144:ef7eb2e8f9f7 265 * @{
<> 144:ef7eb2e8f9f7 266 */
<> 144:ef7eb2e8f9f7 267 /* Extension Peripheral State functions **************************************/
<> 144:ef7eb2e8f9f7 268 HAL_TIM_StateTypeDef HAL_TIMEx_HallSensor_GetState(TIM_HandleTypeDef* htim);
<> 144:ef7eb2e8f9f7 269 /**
<> 144:ef7eb2e8f9f7 270 * @}
<> 144:ef7eb2e8f9f7 271 */
<> 144:ef7eb2e8f9f7 272
<> 144:ef7eb2e8f9f7 273 /**
<> 144:ef7eb2e8f9f7 274 * @}
<> 144:ef7eb2e8f9f7 275 */
<> 144:ef7eb2e8f9f7 276
<> 144:ef7eb2e8f9f7 277 /* Private types -------------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 278 /* Private variables ---------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 279 /* Private constants ---------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 280 /* Private macros ------------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 281 /** @defgroup TIMEx_Private_Macros TIM Private Macros
<> 144:ef7eb2e8f9f7 282 * @{
<> 144:ef7eb2e8f9f7 283 */
<> 144:ef7eb2e8f9f7 284 #if defined (STM32F446xx)
<> 144:ef7eb2e8f9f7 285 #define IS_TIM_REMAP(TIM_REMAP) (((TIM_REMAP) == TIM_TIM2_TIM8_TRGO)||\
<> 144:ef7eb2e8f9f7 286 ((TIM_REMAP) == TIM_TIM2_ETH_PTP)||\
<> 144:ef7eb2e8f9f7 287 ((TIM_REMAP) == TIM_TIM2_USBFS_SOF)||\
<> 144:ef7eb2e8f9f7 288 ((TIM_REMAP) == TIM_TIM2_USBHS_SOF)||\
<> 144:ef7eb2e8f9f7 289 ((TIM_REMAP) == TIM_TIM5_GPIO)||\
<> 144:ef7eb2e8f9f7 290 ((TIM_REMAP) == TIM_TIM5_LSI)||\
<> 144:ef7eb2e8f9f7 291 ((TIM_REMAP) == TIM_TIM5_LSE)||\
<> 144:ef7eb2e8f9f7 292 ((TIM_REMAP) == TIM_TIM5_RTC)||\
<> 144:ef7eb2e8f9f7 293 ((TIM_REMAP) == TIM_TIM11_GPIO)||\
<> 144:ef7eb2e8f9f7 294 ((TIM_REMAP) == TIM_TIM11_SPDIFRX)||\
<> 144:ef7eb2e8f9f7 295 ((TIM_REMAP) == TIM_TIM11_HSE))
<> 144:ef7eb2e8f9f7 296 #else
<> 144:ef7eb2e8f9f7 297 #define IS_TIM_REMAP(TIM_REMAP) (((TIM_REMAP) == TIM_TIM2_TIM8_TRGO)||\
<> 144:ef7eb2e8f9f7 298 ((TIM_REMAP) == TIM_TIM2_ETH_PTP)||\
<> 144:ef7eb2e8f9f7 299 ((TIM_REMAP) == TIM_TIM2_USBFS_SOF)||\
<> 144:ef7eb2e8f9f7 300 ((TIM_REMAP) == TIM_TIM2_USBHS_SOF)||\
<> 144:ef7eb2e8f9f7 301 ((TIM_REMAP) == TIM_TIM5_GPIO)||\
<> 144:ef7eb2e8f9f7 302 ((TIM_REMAP) == TIM_TIM5_LSI)||\
<> 144:ef7eb2e8f9f7 303 ((TIM_REMAP) == TIM_TIM5_LSE)||\
<> 144:ef7eb2e8f9f7 304 ((TIM_REMAP) == TIM_TIM5_RTC)||\
<> 144:ef7eb2e8f9f7 305 ((TIM_REMAP) == TIM_TIM11_GPIO)||\
<> 144:ef7eb2e8f9f7 306 ((TIM_REMAP) == TIM_TIM11_HSE))
<> 144:ef7eb2e8f9f7 307 #endif /* STM32F446xx */
<> 144:ef7eb2e8f9f7 308
<> 144:ef7eb2e8f9f7 309 #if defined(STM32F410Tx) || defined(STM32F410Cx) || defined(STM32F410Rx)
<> 144:ef7eb2e8f9f7 310 #define IS_TIM_SYSTEMBREAKINPUT(BREAKINPUT) (((BREAKINPUT) == TIM_SYSTEMBREAKINPUT_HARDFAULT)||\
<> 144:ef7eb2e8f9f7 311 ((BREAKINPUT) == TIM_SYSTEMBREAKINPUT_PVD)||\
<> 144:ef7eb2e8f9f7 312 ((BREAKINPUT) == TIM_SYSTEMBREAKINPUT_HARDFAULT_PVD))
<> 144:ef7eb2e8f9f7 313
<> 144:ef7eb2e8f9f7 314 #endif /* STM32F410Tx || STM32F410Cx || STM32F410Rx */
<> 144:ef7eb2e8f9f7 315
<> 144:ef7eb2e8f9f7 316 #define IS_TIM_DEADTIME(DEADTIME) ((DEADTIME) <= 0xFFU)
<> 144:ef7eb2e8f9f7 317 /**
<> 144:ef7eb2e8f9f7 318 * @}
<> 144:ef7eb2e8f9f7 319 */
<> 144:ef7eb2e8f9f7 320
<> 144:ef7eb2e8f9f7 321 /* Private functions ---------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 322 /** @defgroup TIMEx_Private_Functions TIM Private Functions
<> 144:ef7eb2e8f9f7 323 * @{
<> 144:ef7eb2e8f9f7 324 */
<> 144:ef7eb2e8f9f7 325
<> 144:ef7eb2e8f9f7 326 /**
<> 144:ef7eb2e8f9f7 327 * @}
<> 144:ef7eb2e8f9f7 328 */
<> 144:ef7eb2e8f9f7 329
<> 144:ef7eb2e8f9f7 330 /**
<> 144:ef7eb2e8f9f7 331 * @}
<> 144:ef7eb2e8f9f7 332 */
<> 144:ef7eb2e8f9f7 333
<> 144:ef7eb2e8f9f7 334 /**
<> 144:ef7eb2e8f9f7 335 * @}
<> 144:ef7eb2e8f9f7 336 */
<> 144:ef7eb2e8f9f7 337
<> 144:ef7eb2e8f9f7 338 #ifdef __cplusplus
<> 144:ef7eb2e8f9f7 339 }
<> 144:ef7eb2e8f9f7 340 #endif
<> 144:ef7eb2e8f9f7 341
<> 144:ef7eb2e8f9f7 342 #endif /* __STM32F4xx_HAL_TIM_EX_H */
<> 144:ef7eb2e8f9f7 343
<> 144:ef7eb2e8f9f7 344 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/