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targets/cmsis/TARGET_Silicon_Labs/TARGET_EFM32/TARGET_EFM32ZG_STK3200/efm32zg_vcmp.h@50:a417edff4437, 2016-01-15 (annotated)

Committer:
mbed_official
Date:
Fri Jan 15 07:45:16 2016 +0000
Revision:
50:a417edff4437
Parent:
0:9b334a45a8ff
Child:
144:ef7eb2e8f9f7
Synchronized with git revision 6010f32619bfcbb01cc73747d4ff9040863482d9



Full URL: https://github.com/mbedmicro/mbed/commit/6010f32619bfcbb01cc73747d4ff9040863482d9/



Remove doubling of buffer size in realiseEndpoint()

Who changed what in which revision?

UserRevisionLine numberNew contents of line
bogdanm 0:9b334a45a8ff 1 /**************************************************************************//**
bogdanm 0:9b334a45a8ff 2 * @file efm32zg_vcmp.h
bogdanm 0:9b334a45a8ff 3 * @brief EFM32ZG_VCMP register and bit field definitions
mbed_official 50:a417edff4437 4 * @version 4.2.0
bogdanm 0:9b334a45a8ff 5 ******************************************************************************
bogdanm 0:9b334a45a8ff 6 * @section License
mbed_official 50:a417edff4437 7 * <b>Copyright 2015 Silicon Laboratories, Inc. http://www.silabs.com</b>
bogdanm 0:9b334a45a8ff 8 ******************************************************************************
bogdanm 0:9b334a45a8ff 9 *
bogdanm 0:9b334a45a8ff 10 * Permission is granted to anyone to use this software for any purpose,
bogdanm 0:9b334a45a8ff 11 * including commercial applications, and to alter it and redistribute it
bogdanm 0:9b334a45a8ff 12 * freely, subject to the following restrictions:
bogdanm 0:9b334a45a8ff 13 *
bogdanm 0:9b334a45a8ff 14 * 1. The origin of this software must not be misrepresented; you must not
bogdanm 0:9b334a45a8ff 15 * claim that you wrote the original software.@n
bogdanm 0:9b334a45a8ff 16 * 2. Altered source versions must be plainly marked as such, and must not be
bogdanm 0:9b334a45a8ff 17 * misrepresented as being the original software.@n
bogdanm 0:9b334a45a8ff 18 * 3. This notice may not be removed or altered from any source distribution.
bogdanm 0:9b334a45a8ff 19 *
bogdanm 0:9b334a45a8ff 20 * DISCLAIMER OF WARRANTY/LIMITATION OF REMEDIES: Silicon Laboratories, Inc.
bogdanm 0:9b334a45a8ff 21 * has no obligation to support this Software. Silicon Laboratories, Inc. is
bogdanm 0:9b334a45a8ff 22 * providing the Software "AS IS", with no express or implied warranties of any
bogdanm 0:9b334a45a8ff 23 * kind, including, but not limited to, any implied warranties of
bogdanm 0:9b334a45a8ff 24 * merchantability or fitness for any particular purpose or warranties against
bogdanm 0:9b334a45a8ff 25 * infringement of any proprietary rights of a third party.
bogdanm 0:9b334a45a8ff 26 *
bogdanm 0:9b334a45a8ff 27 * Silicon Laboratories, Inc. will not be liable for any consequential,
bogdanm 0:9b334a45a8ff 28 * incidental, or special damages, or any other relief, or for any claim by
bogdanm 0:9b334a45a8ff 29 * any third party, arising from your use of this Software.
bogdanm 0:9b334a45a8ff 30 *
bogdanm 0:9b334a45a8ff 31 *****************************************************************************/
bogdanm 0:9b334a45a8ff 32 /**************************************************************************//**
mbed_official 50:a417edff4437 33 * @addtogroup Parts
mbed_official 50:a417edff4437 34 * @{
mbed_official 50:a417edff4437 35 ******************************************************************************/
mbed_official 50:a417edff4437 36 /**************************************************************************//**
bogdanm 0:9b334a45a8ff 37 * @defgroup EFM32ZG_VCMP
bogdanm 0:9b334a45a8ff 38 * @{
bogdanm 0:9b334a45a8ff 39 * @brief EFM32ZG_VCMP Register Declaration
bogdanm 0:9b334a45a8ff 40 *****************************************************************************/
bogdanm 0:9b334a45a8ff 41 typedef struct
bogdanm 0:9b334a45a8ff 42 {
bogdanm 0:9b334a45a8ff 43 __IO uint32_t CTRL; /**< Control Register */
bogdanm 0:9b334a45a8ff 44 __IO uint32_t INPUTSEL; /**< Input Selection Register */
bogdanm 0:9b334a45a8ff 45 __I uint32_t STATUS; /**< Status Register */
bogdanm 0:9b334a45a8ff 46 __IO uint32_t IEN; /**< Interrupt Enable Register */
bogdanm 0:9b334a45a8ff 47 __I uint32_t IF; /**< Interrupt Flag Register */
bogdanm 0:9b334a45a8ff 48 __IO uint32_t IFS; /**< Interrupt Flag Set Register */
bogdanm 0:9b334a45a8ff 49 __IO uint32_t IFC; /**< Interrupt Flag Clear Register */
bogdanm 0:9b334a45a8ff 50 } VCMP_TypeDef; /** @} */
bogdanm 0:9b334a45a8ff 51
bogdanm 0:9b334a45a8ff 52 /**************************************************************************//**
bogdanm 0:9b334a45a8ff 53 * @defgroup EFM32ZG_VCMP_BitFields
bogdanm 0:9b334a45a8ff 54 * @{
bogdanm 0:9b334a45a8ff 55 *****************************************************************************/
bogdanm 0:9b334a45a8ff 56
bogdanm 0:9b334a45a8ff 57 /* Bit fields for VCMP CTRL */
bogdanm 0:9b334a45a8ff 58 #define _VCMP_CTRL_RESETVALUE 0x47000000UL /**< Default value for VCMP_CTRL */
bogdanm 0:9b334a45a8ff 59 #define _VCMP_CTRL_MASK 0x4F030715UL /**< Mask for VCMP_CTRL */
bogdanm 0:9b334a45a8ff 60 #define VCMP_CTRL_EN (0x1UL << 0) /**< Voltage Supply Comparator Enable */
bogdanm 0:9b334a45a8ff 61 #define _VCMP_CTRL_EN_SHIFT 0 /**< Shift value for VCMP_EN */
bogdanm 0:9b334a45a8ff 62 #define _VCMP_CTRL_EN_MASK 0x1UL /**< Bit mask for VCMP_EN */
bogdanm 0:9b334a45a8ff 63 #define _VCMP_CTRL_EN_DEFAULT 0x00000000UL /**< Mode DEFAULT for VCMP_CTRL */
bogdanm 0:9b334a45a8ff 64 #define VCMP_CTRL_EN_DEFAULT (_VCMP_CTRL_EN_DEFAULT << 0) /**< Shifted mode DEFAULT for VCMP_CTRL */
bogdanm 0:9b334a45a8ff 65 #define VCMP_CTRL_INACTVAL (0x1UL << 2) /**< Inactive Value */
bogdanm 0:9b334a45a8ff 66 #define _VCMP_CTRL_INACTVAL_SHIFT 2 /**< Shift value for VCMP_INACTVAL */
bogdanm 0:9b334a45a8ff 67 #define _VCMP_CTRL_INACTVAL_MASK 0x4UL /**< Bit mask for VCMP_INACTVAL */
bogdanm 0:9b334a45a8ff 68 #define _VCMP_CTRL_INACTVAL_DEFAULT 0x00000000UL /**< Mode DEFAULT for VCMP_CTRL */
bogdanm 0:9b334a45a8ff 69 #define VCMP_CTRL_INACTVAL_DEFAULT (_VCMP_CTRL_INACTVAL_DEFAULT << 2) /**< Shifted mode DEFAULT for VCMP_CTRL */
bogdanm 0:9b334a45a8ff 70 #define VCMP_CTRL_HYSTEN (0x1UL << 4) /**< Hysteresis Enable */
bogdanm 0:9b334a45a8ff 71 #define _VCMP_CTRL_HYSTEN_SHIFT 4 /**< Shift value for VCMP_HYSTEN */
bogdanm 0:9b334a45a8ff 72 #define _VCMP_CTRL_HYSTEN_MASK 0x10UL /**< Bit mask for VCMP_HYSTEN */
bogdanm 0:9b334a45a8ff 73 #define _VCMP_CTRL_HYSTEN_DEFAULT 0x00000000UL /**< Mode DEFAULT for VCMP_CTRL */
bogdanm 0:9b334a45a8ff 74 #define VCMP_CTRL_HYSTEN_DEFAULT (_VCMP_CTRL_HYSTEN_DEFAULT << 4) /**< Shifted mode DEFAULT for VCMP_CTRL */
bogdanm 0:9b334a45a8ff 75 #define _VCMP_CTRL_WARMTIME_SHIFT 8 /**< Shift value for VCMP_WARMTIME */
bogdanm 0:9b334a45a8ff 76 #define _VCMP_CTRL_WARMTIME_MASK 0x700UL /**< Bit mask for VCMP_WARMTIME */
bogdanm 0:9b334a45a8ff 77 #define _VCMP_CTRL_WARMTIME_DEFAULT 0x00000000UL /**< Mode DEFAULT for VCMP_CTRL */
bogdanm 0:9b334a45a8ff 78 #define _VCMP_CTRL_WARMTIME_4CYCLES 0x00000000UL /**< Mode 4CYCLES for VCMP_CTRL */
bogdanm 0:9b334a45a8ff 79 #define _VCMP_CTRL_WARMTIME_8CYCLES 0x00000001UL /**< Mode 8CYCLES for VCMP_CTRL */
bogdanm 0:9b334a45a8ff 80 #define _VCMP_CTRL_WARMTIME_16CYCLES 0x00000002UL /**< Mode 16CYCLES for VCMP_CTRL */
bogdanm 0:9b334a45a8ff 81 #define _VCMP_CTRL_WARMTIME_32CYCLES 0x00000003UL /**< Mode 32CYCLES for VCMP_CTRL */
bogdanm 0:9b334a45a8ff 82 #define _VCMP_CTRL_WARMTIME_64CYCLES 0x00000004UL /**< Mode 64CYCLES for VCMP_CTRL */
bogdanm 0:9b334a45a8ff 83 #define _VCMP_CTRL_WARMTIME_128CYCLES 0x00000005UL /**< Mode 128CYCLES for VCMP_CTRL */
bogdanm 0:9b334a45a8ff 84 #define _VCMP_CTRL_WARMTIME_256CYCLES 0x00000006UL /**< Mode 256CYCLES for VCMP_CTRL */
bogdanm 0:9b334a45a8ff 85 #define _VCMP_CTRL_WARMTIME_512CYCLES 0x00000007UL /**< Mode 512CYCLES for VCMP_CTRL */
bogdanm 0:9b334a45a8ff 86 #define VCMP_CTRL_WARMTIME_DEFAULT (_VCMP_CTRL_WARMTIME_DEFAULT << 8) /**< Shifted mode DEFAULT for VCMP_CTRL */
bogdanm 0:9b334a45a8ff 87 #define VCMP_CTRL_WARMTIME_4CYCLES (_VCMP_CTRL_WARMTIME_4CYCLES << 8) /**< Shifted mode 4CYCLES for VCMP_CTRL */
bogdanm 0:9b334a45a8ff 88 #define VCMP_CTRL_WARMTIME_8CYCLES (_VCMP_CTRL_WARMTIME_8CYCLES << 8) /**< Shifted mode 8CYCLES for VCMP_CTRL */
bogdanm 0:9b334a45a8ff 89 #define VCMP_CTRL_WARMTIME_16CYCLES (_VCMP_CTRL_WARMTIME_16CYCLES << 8) /**< Shifted mode 16CYCLES for VCMP_CTRL */
bogdanm 0:9b334a45a8ff 90 #define VCMP_CTRL_WARMTIME_32CYCLES (_VCMP_CTRL_WARMTIME_32CYCLES << 8) /**< Shifted mode 32CYCLES for VCMP_CTRL */
bogdanm 0:9b334a45a8ff 91 #define VCMP_CTRL_WARMTIME_64CYCLES (_VCMP_CTRL_WARMTIME_64CYCLES << 8) /**< Shifted mode 64CYCLES for VCMP_CTRL */
bogdanm 0:9b334a45a8ff 92 #define VCMP_CTRL_WARMTIME_128CYCLES (_VCMP_CTRL_WARMTIME_128CYCLES << 8) /**< Shifted mode 128CYCLES for VCMP_CTRL */
bogdanm 0:9b334a45a8ff 93 #define VCMP_CTRL_WARMTIME_256CYCLES (_VCMP_CTRL_WARMTIME_256CYCLES << 8) /**< Shifted mode 256CYCLES for VCMP_CTRL */
bogdanm 0:9b334a45a8ff 94 #define VCMP_CTRL_WARMTIME_512CYCLES (_VCMP_CTRL_WARMTIME_512CYCLES << 8) /**< Shifted mode 512CYCLES for VCMP_CTRL */
bogdanm 0:9b334a45a8ff 95 #define VCMP_CTRL_IRISE (0x1UL << 16) /**< Rising Edge Interrupt Sense */
bogdanm 0:9b334a45a8ff 96 #define _VCMP_CTRL_IRISE_SHIFT 16 /**< Shift value for VCMP_IRISE */
bogdanm 0:9b334a45a8ff 97 #define _VCMP_CTRL_IRISE_MASK 0x10000UL /**< Bit mask for VCMP_IRISE */
bogdanm 0:9b334a45a8ff 98 #define _VCMP_CTRL_IRISE_DEFAULT 0x00000000UL /**< Mode DEFAULT for VCMP_CTRL */
bogdanm 0:9b334a45a8ff 99 #define VCMP_CTRL_IRISE_DEFAULT (_VCMP_CTRL_IRISE_DEFAULT << 16) /**< Shifted mode DEFAULT for VCMP_CTRL */
bogdanm 0:9b334a45a8ff 100 #define VCMP_CTRL_IFALL (0x1UL << 17) /**< Falling Edge Interrupt Sense */
bogdanm 0:9b334a45a8ff 101 #define _VCMP_CTRL_IFALL_SHIFT 17 /**< Shift value for VCMP_IFALL */
bogdanm 0:9b334a45a8ff 102 #define _VCMP_CTRL_IFALL_MASK 0x20000UL /**< Bit mask for VCMP_IFALL */
bogdanm 0:9b334a45a8ff 103 #define _VCMP_CTRL_IFALL_DEFAULT 0x00000000UL /**< Mode DEFAULT for VCMP_CTRL */
bogdanm 0:9b334a45a8ff 104 #define VCMP_CTRL_IFALL_DEFAULT (_VCMP_CTRL_IFALL_DEFAULT << 17) /**< Shifted mode DEFAULT for VCMP_CTRL */
bogdanm 0:9b334a45a8ff 105 #define _VCMP_CTRL_BIASPROG_SHIFT 24 /**< Shift value for VCMP_BIASPROG */
bogdanm 0:9b334a45a8ff 106 #define _VCMP_CTRL_BIASPROG_MASK 0xF000000UL /**< Bit mask for VCMP_BIASPROG */
bogdanm 0:9b334a45a8ff 107 #define _VCMP_CTRL_BIASPROG_DEFAULT 0x00000007UL /**< Mode DEFAULT for VCMP_CTRL */
bogdanm 0:9b334a45a8ff 108 #define VCMP_CTRL_BIASPROG_DEFAULT (_VCMP_CTRL_BIASPROG_DEFAULT << 24) /**< Shifted mode DEFAULT for VCMP_CTRL */
bogdanm 0:9b334a45a8ff 109 #define VCMP_CTRL_HALFBIAS (0x1UL << 30) /**< Half Bias Current */
bogdanm 0:9b334a45a8ff 110 #define _VCMP_CTRL_HALFBIAS_SHIFT 30 /**< Shift value for VCMP_HALFBIAS */
bogdanm 0:9b334a45a8ff 111 #define _VCMP_CTRL_HALFBIAS_MASK 0x40000000UL /**< Bit mask for VCMP_HALFBIAS */
bogdanm 0:9b334a45a8ff 112 #define _VCMP_CTRL_HALFBIAS_DEFAULT 0x00000001UL /**< Mode DEFAULT for VCMP_CTRL */
bogdanm 0:9b334a45a8ff 113 #define VCMP_CTRL_HALFBIAS_DEFAULT (_VCMP_CTRL_HALFBIAS_DEFAULT << 30) /**< Shifted mode DEFAULT for VCMP_CTRL */
bogdanm 0:9b334a45a8ff 114
bogdanm 0:9b334a45a8ff 115 /* Bit fields for VCMP INPUTSEL */
bogdanm 0:9b334a45a8ff 116 #define _VCMP_INPUTSEL_RESETVALUE 0x00000000UL /**< Default value for VCMP_INPUTSEL */
bogdanm 0:9b334a45a8ff 117 #define _VCMP_INPUTSEL_MASK 0x0000013FUL /**< Mask for VCMP_INPUTSEL */
bogdanm 0:9b334a45a8ff 118 #define _VCMP_INPUTSEL_TRIGLEVEL_SHIFT 0 /**< Shift value for VCMP_TRIGLEVEL */
bogdanm 0:9b334a45a8ff 119 #define _VCMP_INPUTSEL_TRIGLEVEL_MASK 0x3FUL /**< Bit mask for VCMP_TRIGLEVEL */
bogdanm 0:9b334a45a8ff 120 #define _VCMP_INPUTSEL_TRIGLEVEL_DEFAULT 0x00000000UL /**< Mode DEFAULT for VCMP_INPUTSEL */
bogdanm 0:9b334a45a8ff 121 #define VCMP_INPUTSEL_TRIGLEVEL_DEFAULT (_VCMP_INPUTSEL_TRIGLEVEL_DEFAULT << 0) /**< Shifted mode DEFAULT for VCMP_INPUTSEL */
bogdanm 0:9b334a45a8ff 122 #define VCMP_INPUTSEL_LPREF (0x1UL << 8) /**< Low Power Reference */
bogdanm 0:9b334a45a8ff 123 #define _VCMP_INPUTSEL_LPREF_SHIFT 8 /**< Shift value for VCMP_LPREF */
bogdanm 0:9b334a45a8ff 124 #define _VCMP_INPUTSEL_LPREF_MASK 0x100UL /**< Bit mask for VCMP_LPREF */
bogdanm 0:9b334a45a8ff 125 #define _VCMP_INPUTSEL_LPREF_DEFAULT 0x00000000UL /**< Mode DEFAULT for VCMP_INPUTSEL */
bogdanm 0:9b334a45a8ff 126 #define VCMP_INPUTSEL_LPREF_DEFAULT (_VCMP_INPUTSEL_LPREF_DEFAULT << 8) /**< Shifted mode DEFAULT for VCMP_INPUTSEL */
bogdanm 0:9b334a45a8ff 127
bogdanm 0:9b334a45a8ff 128 /* Bit fields for VCMP STATUS */
bogdanm 0:9b334a45a8ff 129 #define _VCMP_STATUS_RESETVALUE 0x00000000UL /**< Default value for VCMP_STATUS */
bogdanm 0:9b334a45a8ff 130 #define _VCMP_STATUS_MASK 0x00000003UL /**< Mask for VCMP_STATUS */
bogdanm 0:9b334a45a8ff 131 #define VCMP_STATUS_VCMPACT (0x1UL << 0) /**< Voltage Supply Comparator Active */
bogdanm 0:9b334a45a8ff 132 #define _VCMP_STATUS_VCMPACT_SHIFT 0 /**< Shift value for VCMP_VCMPACT */
bogdanm 0:9b334a45a8ff 133 #define _VCMP_STATUS_VCMPACT_MASK 0x1UL /**< Bit mask for VCMP_VCMPACT */
bogdanm 0:9b334a45a8ff 134 #define _VCMP_STATUS_VCMPACT_DEFAULT 0x00000000UL /**< Mode DEFAULT for VCMP_STATUS */
bogdanm 0:9b334a45a8ff 135 #define VCMP_STATUS_VCMPACT_DEFAULT (_VCMP_STATUS_VCMPACT_DEFAULT << 0) /**< Shifted mode DEFAULT for VCMP_STATUS */
bogdanm 0:9b334a45a8ff 136 #define VCMP_STATUS_VCMPOUT (0x1UL << 1) /**< Voltage Supply Comparator Output */
bogdanm 0:9b334a45a8ff 137 #define _VCMP_STATUS_VCMPOUT_SHIFT 1 /**< Shift value for VCMP_VCMPOUT */
bogdanm 0:9b334a45a8ff 138 #define _VCMP_STATUS_VCMPOUT_MASK 0x2UL /**< Bit mask for VCMP_VCMPOUT */
bogdanm 0:9b334a45a8ff 139 #define _VCMP_STATUS_VCMPOUT_DEFAULT 0x00000000UL /**< Mode DEFAULT for VCMP_STATUS */
bogdanm 0:9b334a45a8ff 140 #define VCMP_STATUS_VCMPOUT_DEFAULT (_VCMP_STATUS_VCMPOUT_DEFAULT << 1) /**< Shifted mode DEFAULT for VCMP_STATUS */
bogdanm 0:9b334a45a8ff 141
bogdanm 0:9b334a45a8ff 142 /* Bit fields for VCMP IEN */
bogdanm 0:9b334a45a8ff 143 #define _VCMP_IEN_RESETVALUE 0x00000000UL /**< Default value for VCMP_IEN */
bogdanm 0:9b334a45a8ff 144 #define _VCMP_IEN_MASK 0x00000003UL /**< Mask for VCMP_IEN */
bogdanm 0:9b334a45a8ff 145 #define VCMP_IEN_EDGE (0x1UL << 0) /**< Edge Trigger Interrupt Enable */
bogdanm 0:9b334a45a8ff 146 #define _VCMP_IEN_EDGE_SHIFT 0 /**< Shift value for VCMP_EDGE */
bogdanm 0:9b334a45a8ff 147 #define _VCMP_IEN_EDGE_MASK 0x1UL /**< Bit mask for VCMP_EDGE */
bogdanm 0:9b334a45a8ff 148 #define _VCMP_IEN_EDGE_DEFAULT 0x00000000UL /**< Mode DEFAULT for VCMP_IEN */
bogdanm 0:9b334a45a8ff 149 #define VCMP_IEN_EDGE_DEFAULT (_VCMP_IEN_EDGE_DEFAULT << 0) /**< Shifted mode DEFAULT for VCMP_IEN */
bogdanm 0:9b334a45a8ff 150 #define VCMP_IEN_WARMUP (0x1UL << 1) /**< Warm-up Interrupt Enable */
bogdanm 0:9b334a45a8ff 151 #define _VCMP_IEN_WARMUP_SHIFT 1 /**< Shift value for VCMP_WARMUP */
bogdanm 0:9b334a45a8ff 152 #define _VCMP_IEN_WARMUP_MASK 0x2UL /**< Bit mask for VCMP_WARMUP */
bogdanm 0:9b334a45a8ff 153 #define _VCMP_IEN_WARMUP_DEFAULT 0x00000000UL /**< Mode DEFAULT for VCMP_IEN */
bogdanm 0:9b334a45a8ff 154 #define VCMP_IEN_WARMUP_DEFAULT (_VCMP_IEN_WARMUP_DEFAULT << 1) /**< Shifted mode DEFAULT for VCMP_IEN */
bogdanm 0:9b334a45a8ff 155
bogdanm 0:9b334a45a8ff 156 /* Bit fields for VCMP IF */
bogdanm 0:9b334a45a8ff 157 #define _VCMP_IF_RESETVALUE 0x00000000UL /**< Default value for VCMP_IF */
bogdanm 0:9b334a45a8ff 158 #define _VCMP_IF_MASK 0x00000003UL /**< Mask for VCMP_IF */
bogdanm 0:9b334a45a8ff 159 #define VCMP_IF_EDGE (0x1UL << 0) /**< Edge Triggered Interrupt Flag */
bogdanm 0:9b334a45a8ff 160 #define _VCMP_IF_EDGE_SHIFT 0 /**< Shift value for VCMP_EDGE */
bogdanm 0:9b334a45a8ff 161 #define _VCMP_IF_EDGE_MASK 0x1UL /**< Bit mask for VCMP_EDGE */
bogdanm 0:9b334a45a8ff 162 #define _VCMP_IF_EDGE_DEFAULT 0x00000000UL /**< Mode DEFAULT for VCMP_IF */
bogdanm 0:9b334a45a8ff 163 #define VCMP_IF_EDGE_DEFAULT (_VCMP_IF_EDGE_DEFAULT << 0) /**< Shifted mode DEFAULT for VCMP_IF */
bogdanm 0:9b334a45a8ff 164 #define VCMP_IF_WARMUP (0x1UL << 1) /**< Warm-up Interrupt Flag */
bogdanm 0:9b334a45a8ff 165 #define _VCMP_IF_WARMUP_SHIFT 1 /**< Shift value for VCMP_WARMUP */
bogdanm 0:9b334a45a8ff 166 #define _VCMP_IF_WARMUP_MASK 0x2UL /**< Bit mask for VCMP_WARMUP */
bogdanm 0:9b334a45a8ff 167 #define _VCMP_IF_WARMUP_DEFAULT 0x00000000UL /**< Mode DEFAULT for VCMP_IF */
bogdanm 0:9b334a45a8ff 168 #define VCMP_IF_WARMUP_DEFAULT (_VCMP_IF_WARMUP_DEFAULT << 1) /**< Shifted mode DEFAULT for VCMP_IF */
bogdanm 0:9b334a45a8ff 169
bogdanm 0:9b334a45a8ff 170 /* Bit fields for VCMP IFS */
bogdanm 0:9b334a45a8ff 171 #define _VCMP_IFS_RESETVALUE 0x00000000UL /**< Default value for VCMP_IFS */
bogdanm 0:9b334a45a8ff 172 #define _VCMP_IFS_MASK 0x00000003UL /**< Mask for VCMP_IFS */
bogdanm 0:9b334a45a8ff 173 #define VCMP_IFS_EDGE (0x1UL << 0) /**< Edge Triggered Interrupt Flag Set */
bogdanm 0:9b334a45a8ff 174 #define _VCMP_IFS_EDGE_SHIFT 0 /**< Shift value for VCMP_EDGE */
bogdanm 0:9b334a45a8ff 175 #define _VCMP_IFS_EDGE_MASK 0x1UL /**< Bit mask for VCMP_EDGE */
bogdanm 0:9b334a45a8ff 176 #define _VCMP_IFS_EDGE_DEFAULT 0x00000000UL /**< Mode DEFAULT for VCMP_IFS */
bogdanm 0:9b334a45a8ff 177 #define VCMP_IFS_EDGE_DEFAULT (_VCMP_IFS_EDGE_DEFAULT << 0) /**< Shifted mode DEFAULT for VCMP_IFS */
bogdanm 0:9b334a45a8ff 178 #define VCMP_IFS_WARMUP (0x1UL << 1) /**< Warm-up Interrupt Flag Set */
bogdanm 0:9b334a45a8ff 179 #define _VCMP_IFS_WARMUP_SHIFT 1 /**< Shift value for VCMP_WARMUP */
bogdanm 0:9b334a45a8ff 180 #define _VCMP_IFS_WARMUP_MASK 0x2UL /**< Bit mask for VCMP_WARMUP */
bogdanm 0:9b334a45a8ff 181 #define _VCMP_IFS_WARMUP_DEFAULT 0x00000000UL /**< Mode DEFAULT for VCMP_IFS */
bogdanm 0:9b334a45a8ff 182 #define VCMP_IFS_WARMUP_DEFAULT (_VCMP_IFS_WARMUP_DEFAULT << 1) /**< Shifted mode DEFAULT for VCMP_IFS */
bogdanm 0:9b334a45a8ff 183
bogdanm 0:9b334a45a8ff 184 /* Bit fields for VCMP IFC */
bogdanm 0:9b334a45a8ff 185 #define _VCMP_IFC_RESETVALUE 0x00000000UL /**< Default value for VCMP_IFC */
bogdanm 0:9b334a45a8ff 186 #define _VCMP_IFC_MASK 0x00000003UL /**< Mask for VCMP_IFC */
bogdanm 0:9b334a45a8ff 187 #define VCMP_IFC_EDGE (0x1UL << 0) /**< Edge Triggered Interrupt Flag Clear */
bogdanm 0:9b334a45a8ff 188 #define _VCMP_IFC_EDGE_SHIFT 0 /**< Shift value for VCMP_EDGE */
bogdanm 0:9b334a45a8ff 189 #define _VCMP_IFC_EDGE_MASK 0x1UL /**< Bit mask for VCMP_EDGE */
bogdanm 0:9b334a45a8ff 190 #define _VCMP_IFC_EDGE_DEFAULT 0x00000000UL /**< Mode DEFAULT for VCMP_IFC */
bogdanm 0:9b334a45a8ff 191 #define VCMP_IFC_EDGE_DEFAULT (_VCMP_IFC_EDGE_DEFAULT << 0) /**< Shifted mode DEFAULT for VCMP_IFC */
bogdanm 0:9b334a45a8ff 192 #define VCMP_IFC_WARMUP (0x1UL << 1) /**< Warm-up Interrupt Flag Clear */
bogdanm 0:9b334a45a8ff 193 #define _VCMP_IFC_WARMUP_SHIFT 1 /**< Shift value for VCMP_WARMUP */
bogdanm 0:9b334a45a8ff 194 #define _VCMP_IFC_WARMUP_MASK 0x2UL /**< Bit mask for VCMP_WARMUP */
bogdanm 0:9b334a45a8ff 195 #define _VCMP_IFC_WARMUP_DEFAULT 0x00000000UL /**< Mode DEFAULT for VCMP_IFC */
bogdanm 0:9b334a45a8ff 196 #define VCMP_IFC_WARMUP_DEFAULT (_VCMP_IFC_WARMUP_DEFAULT << 1) /**< Shifted mode DEFAULT for VCMP_IFC */
bogdanm 0:9b334a45a8ff 197
bogdanm 0:9b334a45a8ff 198 /** @} End of group EFM32ZG_VCMP */
mbed_official 50:a417edff4437 199 /** @} End of group Parts */
bogdanm 0:9b334a45a8ff 200