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targets/cmsis/TARGET_STM/TARGET_STM32F4/TARGET_MTS_MDOT_F405RG/TOOLCHAIN_GCC_ARM/startup_STM32F40x.S@0:9b334a45a8ff, 2015-10-01 (annotated)

Committer:
bogdanm
Date:
Thu Oct 01 15:25:22 2015 +0300
Revision:
0:9b334a45a8ff
Child:
144:ef7eb2e8f9f7
Initial commit on mbed-dev



Replaces mbed-src (now inactive)

Who changed what in which revision?

UserRevisionLine numberNew contents of line
bogdanm 0:9b334a45a8ff 1 /* File: startup_STM32F40x.S
bogdanm 0:9b334a45a8ff 2 * Purpose: startup file for Cortex-M4 devices. Should use with
bogdanm 0:9b334a45a8ff 3 * GCC for ARM Embedded Processors
bogdanm 0:9b334a45a8ff 4 * Version: V1.4
bogdanm 0:9b334a45a8ff 5 * Date: 09 July 2012
bogdanm 0:9b334a45a8ff 6 *
bogdanm 0:9b334a45a8ff 7 * Copyright (c) 2011, 2012, ARM Limited
bogdanm 0:9b334a45a8ff 8 * All rights reserved.
bogdanm 0:9b334a45a8ff 9 *
bogdanm 0:9b334a45a8ff 10 * Redistribution and use in source and binary forms, with or without
bogdanm 0:9b334a45a8ff 11 * modification, are permitted provided that the following conditions are met:
bogdanm 0:9b334a45a8ff 12 * Redistributions of source code must retain the above copyright
bogdanm 0:9b334a45a8ff 13 notice, this list of conditions and the following disclaimer.
bogdanm 0:9b334a45a8ff 14 * Redistributions in binary form must reproduce the above copyright
bogdanm 0:9b334a45a8ff 15 notice, this list of conditions and the following disclaimer in the
bogdanm 0:9b334a45a8ff 16 documentation and/or other materials provided with the distribution.
bogdanm 0:9b334a45a8ff 17 * Neither the name of the ARM Limited nor the
bogdanm 0:9b334a45a8ff 18 names of its contributors may be used to endorse or promote products
bogdanm 0:9b334a45a8ff 19 derived from this software without specific prior written permission.
bogdanm 0:9b334a45a8ff 20 *
bogdanm 0:9b334a45a8ff 21 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
bogdanm 0:9b334a45a8ff 22 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
bogdanm 0:9b334a45a8ff 23 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
bogdanm 0:9b334a45a8ff 24 * DISCLAIMED. IN NO EVENT SHALL ARM LIMITED BE LIABLE FOR ANY
bogdanm 0:9b334a45a8ff 25 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
bogdanm 0:9b334a45a8ff 26 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
bogdanm 0:9b334a45a8ff 27 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
bogdanm 0:9b334a45a8ff 28 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
bogdanm 0:9b334a45a8ff 29 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
bogdanm 0:9b334a45a8ff 30 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
bogdanm 0:9b334a45a8ff 31 */
bogdanm 0:9b334a45a8ff 32 .syntax unified
bogdanm 0:9b334a45a8ff 33 .arch armv7-m
bogdanm 0:9b334a45a8ff 34
bogdanm 0:9b334a45a8ff 35 .section .stack
bogdanm 0:9b334a45a8ff 36 .align 3
bogdanm 0:9b334a45a8ff 37 #ifdef __STACK_SIZE
bogdanm 0:9b334a45a8ff 38 .equ Stack_Size, __STACK_SIZE
bogdanm 0:9b334a45a8ff 39 #else
bogdanm 0:9b334a45a8ff 40 .equ Stack_Size, 0xc00
bogdanm 0:9b334a45a8ff 41 #endif
bogdanm 0:9b334a45a8ff 42 .globl __StackTop
bogdanm 0:9b334a45a8ff 43 .globl __StackLimit
bogdanm 0:9b334a45a8ff 44 __StackLimit:
bogdanm 0:9b334a45a8ff 45 .space Stack_Size
bogdanm 0:9b334a45a8ff 46 .size __StackLimit, . - __StackLimit
bogdanm 0:9b334a45a8ff 47 __StackTop:
bogdanm 0:9b334a45a8ff 48 .size __StackTop, . - __StackTop
bogdanm 0:9b334a45a8ff 49
bogdanm 0:9b334a45a8ff 50 .section .heap
bogdanm 0:9b334a45a8ff 51 .align 3
bogdanm 0:9b334a45a8ff 52 #ifdef __HEAP_SIZE
bogdanm 0:9b334a45a8ff 53 .equ Heap_Size, __HEAP_SIZE
bogdanm 0:9b334a45a8ff 54 #else
bogdanm 0:9b334a45a8ff 55 .equ Heap_Size, 0
bogdanm 0:9b334a45a8ff 56 #endif
bogdanm 0:9b334a45a8ff 57 .globl __HeapBase
bogdanm 0:9b334a45a8ff 58 .globl __HeapLimit
bogdanm 0:9b334a45a8ff 59 __HeapBase:
bogdanm 0:9b334a45a8ff 60 .if Heap_Size
bogdanm 0:9b334a45a8ff 61 .space Heap_Size
bogdanm 0:9b334a45a8ff 62 .endif
bogdanm 0:9b334a45a8ff 63 .size __HeapBase, . - __HeapBase
bogdanm 0:9b334a45a8ff 64 __HeapLimit:
bogdanm 0:9b334a45a8ff 65 .size __HeapLimit, . - __HeapLimit
bogdanm 0:9b334a45a8ff 66
bogdanm 0:9b334a45a8ff 67 .section .isr_vector
bogdanm 0:9b334a45a8ff 68 .align 2
bogdanm 0:9b334a45a8ff 69 .globl __isr_vector
bogdanm 0:9b334a45a8ff 70 __isr_vector:
bogdanm 0:9b334a45a8ff 71 .long __StackTop /* Top of Stack */
bogdanm 0:9b334a45a8ff 72 .long Reset_Handler /* Reset Handler */
bogdanm 0:9b334a45a8ff 73 .long NMI_Handler /* NMI Handler */
bogdanm 0:9b334a45a8ff 74 .long HardFault_Handler /* Hard Fault Handler */
bogdanm 0:9b334a45a8ff 75 .long MemManage_Handler /* MPU Fault Handler */
bogdanm 0:9b334a45a8ff 76 .long BusFault_Handler /* Bus Fault Handler */
bogdanm 0:9b334a45a8ff 77 .long UsageFault_Handler /* Usage Fault Handler */
bogdanm 0:9b334a45a8ff 78 .long 0 /* Reserved */
bogdanm 0:9b334a45a8ff 79 .long 0 /* Reserved */
bogdanm 0:9b334a45a8ff 80 .long 0 /* Reserved */
bogdanm 0:9b334a45a8ff 81 .long 0 /* Reserved */
bogdanm 0:9b334a45a8ff 82 .long SVC_Handler /* SVCall Handler */
bogdanm 0:9b334a45a8ff 83 .long DebugMon_Handler /* Debug Monitor Handler */
bogdanm 0:9b334a45a8ff 84 .long 0 /* Reserved */
bogdanm 0:9b334a45a8ff 85 .long PendSV_Handler /* PendSV Handler */
bogdanm 0:9b334a45a8ff 86 .long SysTick_Handler /* SysTick Handler */
bogdanm 0:9b334a45a8ff 87
bogdanm 0:9b334a45a8ff 88 /* External interrupts */
bogdanm 0:9b334a45a8ff 89 .long WWDG_IRQHandler /* Window WatchDog */
bogdanm 0:9b334a45a8ff 90 .long PVD_IRQHandler /* PVD through EXTI Line detection */
bogdanm 0:9b334a45a8ff 91 .long TAMP_STAMP_IRQHandler /* Tamper and TimeStamps through the EXTI line */
bogdanm 0:9b334a45a8ff 92 .long RTC_WKUP_IRQHandler /* RTC Wakeup through the EXTI line */
bogdanm 0:9b334a45a8ff 93 .long FLASH_IRQHandler /* FLASH */
bogdanm 0:9b334a45a8ff 94 .long RCC_IRQHandler /* RCC */
bogdanm 0:9b334a45a8ff 95 .long EXTI0_IRQHandler /* EXTI Line0 */
bogdanm 0:9b334a45a8ff 96 .long EXTI1_IRQHandler /* EXTI Line1 */
bogdanm 0:9b334a45a8ff 97 .long EXTI2_IRQHandler /* EXTI Line2 */
bogdanm 0:9b334a45a8ff 98 .long EXTI3_IRQHandler /* EXTI Line3 */
bogdanm 0:9b334a45a8ff 99 .long EXTI4_IRQHandler /* EXTI Line4 */
bogdanm 0:9b334a45a8ff 100 .long DMA1_Stream0_IRQHandler /* DMA1 Stream 0 */
bogdanm 0:9b334a45a8ff 101 .long DMA1_Stream1_IRQHandler /* DMA1 Stream 1 */
bogdanm 0:9b334a45a8ff 102 .long DMA1_Stream2_IRQHandler /* DMA1 Stream 2 */
bogdanm 0:9b334a45a8ff 103 .long DMA1_Stream3_IRQHandler /* DMA1 Stream 3 */
bogdanm 0:9b334a45a8ff 104 .long DMA1_Stream4_IRQHandler /* DMA1 Stream 4 */
bogdanm 0:9b334a45a8ff 105 .long DMA1_Stream5_IRQHandler /* DMA1 Stream 5 */
bogdanm 0:9b334a45a8ff 106 .long DMA1_Stream6_IRQHandler /* DMA1 Stream 6 */
bogdanm 0:9b334a45a8ff 107 .long ADC_IRQHandler /* ADC1, ADC2 and ADC3s */
bogdanm 0:9b334a45a8ff 108 .long CAN1_TX_IRQHandler /* CAN1 TX */
bogdanm 0:9b334a45a8ff 109 .long CAN1_RX0_IRQHandler /* CAN1 RX0 */
bogdanm 0:9b334a45a8ff 110 .long CAN1_RX1_IRQHandler /* CAN1 RX1 */
bogdanm 0:9b334a45a8ff 111 .long CAN1_SCE_IRQHandler /* CAN1 SCE */
bogdanm 0:9b334a45a8ff 112 .long EXTI9_5_IRQHandler /* External Line[9:5]s */
bogdanm 0:9b334a45a8ff 113 .long TIM1_BRK_TIM9_IRQHandler /* TIM1 Break and TIM9 */
bogdanm 0:9b334a45a8ff 114 .long TIM1_UP_TIM10_IRQHandler /* TIM1 Update and TIM10 */
bogdanm 0:9b334a45a8ff 115 .long TIM1_TRG_COM_TIM11_IRQHandler /* TIM1 Trigger and Commutation and TIM11 */
bogdanm 0:9b334a45a8ff 116 .long TIM1_CC_IRQHandler /* TIM1 Capture Compare */
bogdanm 0:9b334a45a8ff 117 .long TIM2_IRQHandler /* TIM2 */
bogdanm 0:9b334a45a8ff 118 .long TIM3_IRQHandler /* TIM3 */
bogdanm 0:9b334a45a8ff 119 .long TIM4_IRQHandler /* TIM4 */
bogdanm 0:9b334a45a8ff 120 .long I2C1_EV_IRQHandler /* I2C1 Event */
bogdanm 0:9b334a45a8ff 121 .long I2C1_ER_IRQHandler /* I2C1 Error */
bogdanm 0:9b334a45a8ff 122 .long I2C2_EV_IRQHandler /* I2C2 Event */
bogdanm 0:9b334a45a8ff 123 .long I2C2_ER_IRQHandler /* I2C2 Error */
bogdanm 0:9b334a45a8ff 124 .long SPI1_IRQHandler /* SPI1 */
bogdanm 0:9b334a45a8ff 125 .long SPI2_IRQHandler /* SPI2 */
bogdanm 0:9b334a45a8ff 126 .long USART1_IRQHandler /* USART1 */
bogdanm 0:9b334a45a8ff 127 .long USART2_IRQHandler /* USART2 */
bogdanm 0:9b334a45a8ff 128 .long USART3_IRQHandler /* USART3 */
bogdanm 0:9b334a45a8ff 129 .long EXTI15_10_IRQHandler /* External Line[15:10]s */
bogdanm 0:9b334a45a8ff 130 .long RTC_Alarm_IRQHandler /* RTC Alarm (A and B) through EXTI Line */
bogdanm 0:9b334a45a8ff 131 .long OTG_FS_WKUP_IRQHandler /* USB OTG FS Wakeup through EXTI line */
bogdanm 0:9b334a45a8ff 132 .long TIM8_BRK_TIM12_IRQHandler /* TIM8 Break and TIM12 */
bogdanm 0:9b334a45a8ff 133 .long TIM8_UP_TIM13_IRQHandler /* TIM8 Update and TIM13 */
bogdanm 0:9b334a45a8ff 134 .long TIM8_TRG_COM_TIM14_IRQHandler /* TIM8 Trigger and Commutation and TIM14 */
bogdanm 0:9b334a45a8ff 135 .long TIM8_CC_IRQHandler /* TIM8 Capture Compare */
bogdanm 0:9b334a45a8ff 136 .long DMA1_Stream7_IRQHandler /* DMA1 Stream7 */
bogdanm 0:9b334a45a8ff 137 .long FSMC_IRQHandler /* FSMC */
bogdanm 0:9b334a45a8ff 138 .long SDIO_IRQHandler /* SDIO */
bogdanm 0:9b334a45a8ff 139 .long TIM5_IRQHandler /* TIM5 */
bogdanm 0:9b334a45a8ff 140 .long SPI3_IRQHandler /* SPI3 */
bogdanm 0:9b334a45a8ff 141 .long UART4_IRQHandler /* UART4 */
bogdanm 0:9b334a45a8ff 142 .long UART5_IRQHandler /* UART5 */
bogdanm 0:9b334a45a8ff 143 .long TIM6_DAC_IRQHandler /* TIM6 and DAC1&2 underrun errors */
bogdanm 0:9b334a45a8ff 144 .long TIM7_IRQHandler /* TIM7 */
bogdanm 0:9b334a45a8ff 145 .long DMA2_Stream0_IRQHandler /* DMA2 Stream 0 */
bogdanm 0:9b334a45a8ff 146 .long DMA2_Stream1_IRQHandler /* DMA2 Stream 1 */
bogdanm 0:9b334a45a8ff 147 .long DMA2_Stream2_IRQHandler /* DMA2 Stream 2 */
bogdanm 0:9b334a45a8ff 148 .long DMA2_Stream3_IRQHandler /* DMA2 Stream 3 */
bogdanm 0:9b334a45a8ff 149 .long DMA2_Stream4_IRQHandler /* DMA2 Stream 4 */
bogdanm 0:9b334a45a8ff 150 .long 0 /* Reserved */
bogdanm 0:9b334a45a8ff 151 .long 0 /* Reserved */
bogdanm 0:9b334a45a8ff 152 .long CAN2_TX_IRQHandler /* CAN2 TX */
bogdanm 0:9b334a45a8ff 153 .long CAN2_RX0_IRQHandler /* CAN2 RX0 */
bogdanm 0:9b334a45a8ff 154 .long CAN2_RX1_IRQHandler /* CAN2 RX1 */
bogdanm 0:9b334a45a8ff 155 .long CAN2_SCE_IRQHandler /* CAN2 SCE */
bogdanm 0:9b334a45a8ff 156 .long OTG_FS_IRQHandler /* USB OTG FS */
bogdanm 0:9b334a45a8ff 157 .long DMA2_Stream5_IRQHandler /* DMA2 Stream 5 */
bogdanm 0:9b334a45a8ff 158 .long DMA2_Stream6_IRQHandler /* DMA2 Stream 6 */
bogdanm 0:9b334a45a8ff 159 .long DMA2_Stream7_IRQHandler /* DMA2 Stream 7 */
bogdanm 0:9b334a45a8ff 160 .long USART6_IRQHandler /* USART6 */
bogdanm 0:9b334a45a8ff 161 .long I2C3_EV_IRQHandler /* I2C3 event */
bogdanm 0:9b334a45a8ff 162 .long I2C3_ER_IRQHandler /* I2C3 error */
bogdanm 0:9b334a45a8ff 163 .long OTG_HS_EP1_OUT_IRQHandler /* USB OTG HS End Point 1 Out */
bogdanm 0:9b334a45a8ff 164 .long OTG_HS_EP1_IN_IRQHandler /* USB OTG HS End Point 1 In */
bogdanm 0:9b334a45a8ff 165 .long OTG_HS_WKUP_IRQHandler /* USB OTG HS Wakeup through EXTI */
bogdanm 0:9b334a45a8ff 166 .long OTG_HS_IRQHandler /* USB OTG HS */
bogdanm 0:9b334a45a8ff 167 .long 0 /* Reserved */
bogdanm 0:9b334a45a8ff 168 .long 0 /* Reserved */
bogdanm 0:9b334a45a8ff 169 .long HASH_RNG_IRQHandler /* Hash and Rng */
bogdanm 0:9b334a45a8ff 170 .long FPU_IRQHandler /* FPU */
bogdanm 0:9b334a45a8ff 171
bogdanm 0:9b334a45a8ff 172 .size __isr_vector, . - __isr_vector
bogdanm 0:9b334a45a8ff 173
bogdanm 0:9b334a45a8ff 174 .text
bogdanm 0:9b334a45a8ff 175 .thumb
bogdanm 0:9b334a45a8ff 176 .thumb_func
bogdanm 0:9b334a45a8ff 177 .align 2
bogdanm 0:9b334a45a8ff 178 .globl Reset_Handler
bogdanm 0:9b334a45a8ff 179 .type Reset_Handler, %function
bogdanm 0:9b334a45a8ff 180 Reset_Handler:
bogdanm 0:9b334a45a8ff 181 /* Loop to copy data from read only memory to RAM. The ranges
bogdanm 0:9b334a45a8ff 182 * of copy from/to are specified by following symbols evaluated in
bogdanm 0:9b334a45a8ff 183 * linker script.
bogdanm 0:9b334a45a8ff 184 * __etext: End of code section, i.e., begin of data sections to copy from.
bogdanm 0:9b334a45a8ff 185 * __data_start__/__data_end__: RAM address range that data should be
bogdanm 0:9b334a45a8ff 186 * copied to. Both must be aligned to 4 bytes boundary. */
bogdanm 0:9b334a45a8ff 187
bogdanm 0:9b334a45a8ff 188 ldr r1, =__etext
bogdanm 0:9b334a45a8ff 189 ldr r2, =__data_start__
bogdanm 0:9b334a45a8ff 190 ldr r3, =__data_end__
bogdanm 0:9b334a45a8ff 191
bogdanm 0:9b334a45a8ff 192 .LC0:
bogdanm 0:9b334a45a8ff 193 cmp r2, r3
bogdanm 0:9b334a45a8ff 194 ittt lt
bogdanm 0:9b334a45a8ff 195 ldrlt r0, [r1], #4
bogdanm 0:9b334a45a8ff 196 strlt r0, [r2], #4
bogdanm 0:9b334a45a8ff 197 blt .LC0
bogdanm 0:9b334a45a8ff 198
bogdanm 0:9b334a45a8ff 199 ldr r0, =SystemInit
bogdanm 0:9b334a45a8ff 200 blx r0
bogdanm 0:9b334a45a8ff 201 ldr r0, =_start
bogdanm 0:9b334a45a8ff 202 bx r0
bogdanm 0:9b334a45a8ff 203 .pool
bogdanm 0:9b334a45a8ff 204 .size Reset_Handler, . - Reset_Handler
bogdanm 0:9b334a45a8ff 205
bogdanm 0:9b334a45a8ff 206 .text
bogdanm 0:9b334a45a8ff 207 /* Macro to define default handlers. Default handler
bogdanm 0:9b334a45a8ff 208 * will be weak symbol and just dead loops. They can be
bogdanm 0:9b334a45a8ff 209 * overwritten by other handlers */
bogdanm 0:9b334a45a8ff 210 .macro def_default_handler handler_name
bogdanm 0:9b334a45a8ff 211 .align 1
bogdanm 0:9b334a45a8ff 212 .thumb_func
bogdanm 0:9b334a45a8ff 213 .weak \handler_name
bogdanm 0:9b334a45a8ff 214 .type \handler_name, %function
bogdanm 0:9b334a45a8ff 215 \handler_name :
bogdanm 0:9b334a45a8ff 216 b .
bogdanm 0:9b334a45a8ff 217 .size \handler_name, . - \handler_name
bogdanm 0:9b334a45a8ff 218 .endm
bogdanm 0:9b334a45a8ff 219
bogdanm 0:9b334a45a8ff 220 def_default_handler NMI_Handler
bogdanm 0:9b334a45a8ff 221 def_default_handler HardFault_Handler
bogdanm 0:9b334a45a8ff 222 def_default_handler MemManage_Handler
bogdanm 0:9b334a45a8ff 223 def_default_handler BusFault_Handler
bogdanm 0:9b334a45a8ff 224 def_default_handler UsageFault_Handler
bogdanm 0:9b334a45a8ff 225 def_default_handler SVC_Handler
bogdanm 0:9b334a45a8ff 226 def_default_handler DebugMon_Handler
bogdanm 0:9b334a45a8ff 227 def_default_handler PendSV_Handler
bogdanm 0:9b334a45a8ff 228 def_default_handler SysTick_Handler
bogdanm 0:9b334a45a8ff 229 def_default_handler Default_Handler
bogdanm 0:9b334a45a8ff 230
bogdanm 0:9b334a45a8ff 231 .macro def_irq_default_handler handler_name
bogdanm 0:9b334a45a8ff 232 .weak \handler_name
bogdanm 0:9b334a45a8ff 233 .set \handler_name, Default_Handler
bogdanm 0:9b334a45a8ff 234 .endm
bogdanm 0:9b334a45a8ff 235
bogdanm 0:9b334a45a8ff 236 def_irq_default_handler WWDG_IRQHandler
bogdanm 0:9b334a45a8ff 237 def_irq_default_handler PVD_IRQHandler
bogdanm 0:9b334a45a8ff 238 def_irq_default_handler TAMP_STAMP_IRQHandler
bogdanm 0:9b334a45a8ff 239 def_irq_default_handler RTC_WKUP_IRQHandler
bogdanm 0:9b334a45a8ff 240 def_irq_default_handler FLASH_IRQHandler
bogdanm 0:9b334a45a8ff 241 def_irq_default_handler RCC_IRQHandler
bogdanm 0:9b334a45a8ff 242 def_irq_default_handler EXTI0_IRQHandler
bogdanm 0:9b334a45a8ff 243 def_irq_default_handler EXTI1_IRQHandler
bogdanm 0:9b334a45a8ff 244 def_irq_default_handler EXTI2_IRQHandler
bogdanm 0:9b334a45a8ff 245 def_irq_default_handler EXTI3_IRQHandler
bogdanm 0:9b334a45a8ff 246 def_irq_default_handler EXTI4_IRQHandler
bogdanm 0:9b334a45a8ff 247 def_irq_default_handler DMA1_Stream0_IRQHandler
bogdanm 0:9b334a45a8ff 248 def_irq_default_handler DMA1_Stream1_IRQHandler
bogdanm 0:9b334a45a8ff 249 def_irq_default_handler DMA1_Stream2_IRQHandler
bogdanm 0:9b334a45a8ff 250 def_irq_default_handler DMA1_Stream3_IRQHandler
bogdanm 0:9b334a45a8ff 251 def_irq_default_handler DMA1_Stream4_IRQHandler
bogdanm 0:9b334a45a8ff 252 def_irq_default_handler DMA1_Stream5_IRQHandler
bogdanm 0:9b334a45a8ff 253 def_irq_default_handler DMA1_Stream6_IRQHandler
bogdanm 0:9b334a45a8ff 254 def_irq_default_handler ADC_IRQHandler
bogdanm 0:9b334a45a8ff 255 def_irq_default_handler CAN1_TX_IRQHandler
bogdanm 0:9b334a45a8ff 256 def_irq_default_handler CAN1_RX0_IRQHandler
bogdanm 0:9b334a45a8ff 257 def_irq_default_handler CAN1_RX1_IRQHandler
bogdanm 0:9b334a45a8ff 258 def_irq_default_handler CAN1_SCE_IRQHandler
bogdanm 0:9b334a45a8ff 259 def_irq_default_handler EXTI9_5_IRQHandler
bogdanm 0:9b334a45a8ff 260 def_irq_default_handler TIM1_BRK_TIM9_IRQHandler
bogdanm 0:9b334a45a8ff 261 def_irq_default_handler TIM1_UP_TIM10_IRQHandler
bogdanm 0:9b334a45a8ff 262 def_irq_default_handler TIM1_TRG_COM_TIM11_IRQHandler
bogdanm 0:9b334a45a8ff 263 def_irq_default_handler TIM1_CC_IRQHandler
bogdanm 0:9b334a45a8ff 264 def_irq_default_handler TIM2_IRQHandler
bogdanm 0:9b334a45a8ff 265 def_irq_default_handler TIM3_IRQHandler
bogdanm 0:9b334a45a8ff 266 def_irq_default_handler TIM4_IRQHandler
bogdanm 0:9b334a45a8ff 267 def_irq_default_handler I2C1_EV_IRQHandler
bogdanm 0:9b334a45a8ff 268 def_irq_default_handler I2C1_ER_IRQHandler
bogdanm 0:9b334a45a8ff 269 def_irq_default_handler I2C2_EV_IRQHandler
bogdanm 0:9b334a45a8ff 270 def_irq_default_handler I2C2_ER_IRQHandler
bogdanm 0:9b334a45a8ff 271 def_irq_default_handler SPI1_IRQHandler
bogdanm 0:9b334a45a8ff 272 def_irq_default_handler SPI2_IRQHandler
bogdanm 0:9b334a45a8ff 273 def_irq_default_handler USART1_IRQHandler
bogdanm 0:9b334a45a8ff 274 def_irq_default_handler USART2_IRQHandler
bogdanm 0:9b334a45a8ff 275 def_irq_default_handler USART3_IRQHandler
bogdanm 0:9b334a45a8ff 276 def_irq_default_handler EXTI15_10_IRQHandler
bogdanm 0:9b334a45a8ff 277 def_irq_default_handler RTC_Alarm_IRQHandler
bogdanm 0:9b334a45a8ff 278 def_irq_default_handler OTG_FS_WKUP_IRQHandler
bogdanm 0:9b334a45a8ff 279 def_irq_default_handler TIM8_BRK_TIM12_IRQHandler
bogdanm 0:9b334a45a8ff 280 def_irq_default_handler TIM8_UP_TIM13_IRQHandler
bogdanm 0:9b334a45a8ff 281 def_irq_default_handler TIM8_TRG_COM_TIM14_IRQHandler
bogdanm 0:9b334a45a8ff 282 def_irq_default_handler TIM8_CC_IRQHandler
bogdanm 0:9b334a45a8ff 283 def_irq_default_handler DMA1_Stream7_IRQHandler
bogdanm 0:9b334a45a8ff 284 def_irq_default_handler FSMC_IRQHandler
bogdanm 0:9b334a45a8ff 285 def_irq_default_handler SDIO_IRQHandler
bogdanm 0:9b334a45a8ff 286 def_irq_default_handler TIM5_IRQHandler
bogdanm 0:9b334a45a8ff 287 def_irq_default_handler SPI3_IRQHandler
bogdanm 0:9b334a45a8ff 288 def_irq_default_handler UART4_IRQHandler
bogdanm 0:9b334a45a8ff 289 def_irq_default_handler UART5_IRQHandler
bogdanm 0:9b334a45a8ff 290 def_irq_default_handler TIM6_DAC_IRQHandler
bogdanm 0:9b334a45a8ff 291 def_irq_default_handler TIM7_IRQHandler
bogdanm 0:9b334a45a8ff 292 def_irq_default_handler DMA2_Stream0_IRQHandler
bogdanm 0:9b334a45a8ff 293 def_irq_default_handler DMA2_Stream1_IRQHandler
bogdanm 0:9b334a45a8ff 294 def_irq_default_handler DMA2_Stream2_IRQHandler
bogdanm 0:9b334a45a8ff 295 def_irq_default_handler DMA2_Stream3_IRQHandler
bogdanm 0:9b334a45a8ff 296 def_irq_default_handler DMA2_Stream4_IRQHandler
bogdanm 0:9b334a45a8ff 297 def_irq_default_handler CAN2_TX_IRQHandler
bogdanm 0:9b334a45a8ff 298 def_irq_default_handler CAN2_RX0_IRQHandler
bogdanm 0:9b334a45a8ff 299 def_irq_default_handler CAN2_RX1_IRQHandler
bogdanm 0:9b334a45a8ff 300 def_irq_default_handler CAN2_SCE_IRQHandler
bogdanm 0:9b334a45a8ff 301 def_irq_default_handler OTG_FS_IRQHandler
bogdanm 0:9b334a45a8ff 302 def_irq_default_handler DMA2_Stream5_IRQHandler
bogdanm 0:9b334a45a8ff 303 def_irq_default_handler DMA2_Stream6_IRQHandler
bogdanm 0:9b334a45a8ff 304 def_irq_default_handler DMA2_Stream7_IRQHandler
bogdanm 0:9b334a45a8ff 305 def_irq_default_handler USART6_IRQHandler
bogdanm 0:9b334a45a8ff 306 def_irq_default_handler I2C3_EV_IRQHandler
bogdanm 0:9b334a45a8ff 307 def_irq_default_handler I2C3_ER_IRQHandler
bogdanm 0:9b334a45a8ff 308 def_irq_default_handler OTG_HS_EP1_OUT_IRQHandler
bogdanm 0:9b334a45a8ff 309 def_irq_default_handler OTG_HS_EP1_IN_IRQHandler
bogdanm 0:9b334a45a8ff 310 def_irq_default_handler OTG_HS_WKUP_IRQHandler
bogdanm 0:9b334a45a8ff 311 def_irq_default_handler OTG_HS_IRQHandler
bogdanm 0:9b334a45a8ff 312 def_irq_default_handler HASH_RNG_IRQHandler
bogdanm 0:9b334a45a8ff 313 def_irq_default_handler FPU_IRQHandler
bogdanm 0:9b334a45a8ff 314 def_irq_default_handler DEF_IRQHandler
bogdanm 0:9b334a45a8ff 315
bogdanm 0:9b334a45a8ff 316 .end