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targets/cmsis/TARGET_Freescale/TARGET_K20XX/TARGET_K20D50M/TOOLCHAIN_ARM_STD/startup_MK20D5.S@0:9b334a45a8ff, 2015-10-01 (annotated)

Committer:
bogdanm
Date:
Thu Oct 01 15:25:22 2015 +0300
Revision:
0:9b334a45a8ff
Child:
144:ef7eb2e8f9f7
Initial commit on mbed-dev



Replaces mbed-src (now inactive)

Who changed what in which revision?

UserRevisionLine numberNew contents of line
bogdanm 0:9b334a45a8ff 1 ;/*****************************************************************************
bogdanm 0:9b334a45a8ff 2 ; * @file: startup_MK20D5.s
bogdanm 0:9b334a45a8ff 3 ; * @purpose: CMSIS Cortex-M4 Core Device Startup File for the
bogdanm 0:9b334a45a8ff 4 ; * MK20D5
bogdanm 0:9b334a45a8ff 5 ; * @version: 1.0
bogdanm 0:9b334a45a8ff 6 ; * @date: 2011-12-15
bogdanm 0:9b334a45a8ff 7 ; *
bogdanm 0:9b334a45a8ff 8 ; * Copyright: 1997 - 2015 Freescale Semiconductor, Inc. All Rights Reserved.
bogdanm 0:9b334a45a8ff 9 ;*
bogdanm 0:9b334a45a8ff 10 ; *------- <<< Use Configuration Wizard in Context Menu >>> ------------------
bogdanm 0:9b334a45a8ff 11 ; *
bogdanm 0:9b334a45a8ff 12 ; *****************************************************************************/
bogdanm 0:9b334a45a8ff 13
bogdanm 0:9b334a45a8ff 14
bogdanm 0:9b334a45a8ff 15 __initial_sp EQU 0x20002000 ; Top of RAM
bogdanm 0:9b334a45a8ff 16
bogdanm 0:9b334a45a8ff 17 PRESERVE8
bogdanm 0:9b334a45a8ff 18 THUMB
bogdanm 0:9b334a45a8ff 19
bogdanm 0:9b334a45a8ff 20
bogdanm 0:9b334a45a8ff 21 ; Vector Table Mapped to Address 0 at Reset
bogdanm 0:9b334a45a8ff 22
bogdanm 0:9b334a45a8ff 23 AREA RESET, DATA, READONLY
bogdanm 0:9b334a45a8ff 24 EXPORT __Vectors
bogdanm 0:9b334a45a8ff 25 EXPORT __Vectors_End
bogdanm 0:9b334a45a8ff 26 EXPORT __Vectors_Size
bogdanm 0:9b334a45a8ff 27
bogdanm 0:9b334a45a8ff 28 __Vectors DCD __initial_sp ; Top of Stack
bogdanm 0:9b334a45a8ff 29 DCD Reset_Handler ; Reset Handler
bogdanm 0:9b334a45a8ff 30 DCD NMI_Handler ; NMI Handler
bogdanm 0:9b334a45a8ff 31 DCD HardFault_Handler ; Hard Fault Handler
bogdanm 0:9b334a45a8ff 32 DCD MemManage_Handler ; MPU Fault Handler
bogdanm 0:9b334a45a8ff 33 DCD BusFault_Handler ; Bus Fault Handler
bogdanm 0:9b334a45a8ff 34 DCD UsageFault_Handler ; Usage Fault Handler
bogdanm 0:9b334a45a8ff 35 DCD 0 ; Reserved
bogdanm 0:9b334a45a8ff 36 DCD 0 ; Reserved
bogdanm 0:9b334a45a8ff 37 DCD 0 ; Reserved
bogdanm 0:9b334a45a8ff 38 DCD 0 ; Reserved
bogdanm 0:9b334a45a8ff 39 DCD SVC_Handler ; SVCall Handler
bogdanm 0:9b334a45a8ff 40 DCD DebugMon_Handler ; Debug Monitor Handler
bogdanm 0:9b334a45a8ff 41 DCD 0 ; Reserved
bogdanm 0:9b334a45a8ff 42 DCD PendSV_Handler ; PendSV Handler
bogdanm 0:9b334a45a8ff 43 DCD SysTick_Handler ; SysTick Handler
bogdanm 0:9b334a45a8ff 44
bogdanm 0:9b334a45a8ff 45 ; External Interrupts
bogdanm 0:9b334a45a8ff 46 DCD DMA0_IRQHandler ; DMA channel 0 transfer complete interrupt
bogdanm 0:9b334a45a8ff 47 DCD DMA1_IRQHandler ; DMA channel 1 transfer complete interrupt
bogdanm 0:9b334a45a8ff 48 DCD DMA2_IRQHandler ; DMA channel 2 transfer complete interrupt
bogdanm 0:9b334a45a8ff 49 DCD DMA3_IRQHandler ; DMA channel 3 transfer complete interrupt
bogdanm 0:9b334a45a8ff 50 DCD DMA_Error_IRQHandler ; DMA error interrupt
bogdanm 0:9b334a45a8ff 51 DCD Reserved21_IRQHandler ; Reserved interrupt 21
bogdanm 0:9b334a45a8ff 52 DCD FTFL_IRQHandler ; FTFL interrupt
bogdanm 0:9b334a45a8ff 53 DCD Read_Collision_IRQHandler ; Read collision interrupt
bogdanm 0:9b334a45a8ff 54 DCD LVD_LVW_IRQHandler ; Low Voltage Detect, Low Voltage Warning
bogdanm 0:9b334a45a8ff 55 DCD LLW_IRQHandler ; Low Leakage Wakeup
bogdanm 0:9b334a45a8ff 56 DCD Watchdog_IRQHandler ; WDOG interrupt
bogdanm 0:9b334a45a8ff 57 DCD I2C0_IRQHandler ; I2C0 interrupt
bogdanm 0:9b334a45a8ff 58 DCD SPI0_IRQHandler ; SPI0 interrupt
bogdanm 0:9b334a45a8ff 59 DCD I2S0_Tx_IRQHandler ; I2S0 transmit interrupt
bogdanm 0:9b334a45a8ff 60 DCD I2S0_Rx_IRQHandler ; I2S0 receive interrupt
bogdanm 0:9b334a45a8ff 61 DCD UART0_LON_IRQHandler ; UART0 LON interrupt
bogdanm 0:9b334a45a8ff 62 DCD UART0_RX_TX_IRQHandler ; UART0 receive/transmit interrupt
bogdanm 0:9b334a45a8ff 63 DCD UART0_ERR_IRQHandler ; UART0 error interrupt
bogdanm 0:9b334a45a8ff 64 DCD UART1_RX_TX_IRQHandler ; UART1 receive/transmit interrupt
bogdanm 0:9b334a45a8ff 65 DCD UART1_ERR_IRQHandler ; UART1 error interrupt
bogdanm 0:9b334a45a8ff 66 DCD UART2_RX_TX_IRQHandler ; UART2 receive/transmit interrupt
bogdanm 0:9b334a45a8ff 67 DCD UART2_ERR_IRQHandler ; UART2 error interrupt
bogdanm 0:9b334a45a8ff 68 DCD ADC0_IRQHandler ; ADC0 interrupt
bogdanm 0:9b334a45a8ff 69 DCD CMP0_IRQHandler ; CMP0 interrupt
bogdanm 0:9b334a45a8ff 70 DCD CMP1_IRQHandler ; CMP1 interrupt
bogdanm 0:9b334a45a8ff 71 DCD FTM0_IRQHandler ; FTM0 fault, overflow and channels interrupt
bogdanm 0:9b334a45a8ff 72 DCD FTM1_IRQHandler ; FTM1 fault, overflow and channels interrupt
bogdanm 0:9b334a45a8ff 73 DCD CMT_IRQHandler ; CMT interrupt
bogdanm 0:9b334a45a8ff 74 DCD RTC_IRQHandler ; RTC interrupt
bogdanm 0:9b334a45a8ff 75 DCD RTC_Seconds_IRQHandler ; RTC seconds interrupt
bogdanm 0:9b334a45a8ff 76 DCD PIT0_IRQHandler ; PIT timer channel 0 interrupt
bogdanm 0:9b334a45a8ff 77 DCD PIT1_IRQHandler ; PIT timer channel 1 interrupt
bogdanm 0:9b334a45a8ff 78 DCD PIT2_IRQHandler ; PIT timer channel 2 interrupt
bogdanm 0:9b334a45a8ff 79 DCD PIT3_IRQHandler ; PIT timer channel 3 interrupt
bogdanm 0:9b334a45a8ff 80 DCD PDB0_IRQHandler ; PDB0 interrupt
bogdanm 0:9b334a45a8ff 81 DCD USB0_IRQHandler ; USB0 interrupt
bogdanm 0:9b334a45a8ff 82 DCD USBDCD_IRQHandler ; USBDCD interrupt
bogdanm 0:9b334a45a8ff 83 DCD TSI0_IRQHandler ; TSI0 interrupt
bogdanm 0:9b334a45a8ff 84 DCD MCG_IRQHandler ; MCG interrupt
bogdanm 0:9b334a45a8ff 85 DCD LPTimer_IRQHandler ; LPTimer interrupt
bogdanm 0:9b334a45a8ff 86 DCD PORTA_IRQHandler ; Port A interrupt
bogdanm 0:9b334a45a8ff 87 DCD PORTB_IRQHandler ; Port B interrupt
bogdanm 0:9b334a45a8ff 88 DCD PORTC_IRQHandler ; Port C interrupt
bogdanm 0:9b334a45a8ff 89 DCD PORTD_IRQHandler ; Port D interrupt
bogdanm 0:9b334a45a8ff 90 DCD PORTE_IRQHandler ; Port E interrupt
bogdanm 0:9b334a45a8ff 91 DCD SWI_IRQHandler ; Software interrupt
bogdanm 0:9b334a45a8ff 92 __Vectors_End
bogdanm 0:9b334a45a8ff 93
bogdanm 0:9b334a45a8ff 94 __Vectors_Size EQU __Vectors_End - __Vectors
bogdanm 0:9b334a45a8ff 95
bogdanm 0:9b334a45a8ff 96 ; <h> Flash Configuration
bogdanm 0:9b334a45a8ff 97 ; <i> 16-byte flash configuration field that stores default protection settings (loaded on reset)
bogdanm 0:9b334a45a8ff 98 ; <i> and security information that allows the MCU to restrict acces to the FTFL module.
bogdanm 0:9b334a45a8ff 99 ; <h> Backdoor Comparison Key
bogdanm 0:9b334a45a8ff 100 ; <o0> Backdoor Key 0 <0x0-0xFF:2>
bogdanm 0:9b334a45a8ff 101 ; <o1> Backdoor Key 1 <0x0-0xFF:2>
bogdanm 0:9b334a45a8ff 102 ; <o2> Backdoor Key 2 <0x0-0xFF:2>
bogdanm 0:9b334a45a8ff 103 ; <o3> Backdoor Key 3 <0x0-0xFF:2>
bogdanm 0:9b334a45a8ff 104 ; <o4> Backdoor Key 4 <0x0-0xFF:2>
bogdanm 0:9b334a45a8ff 105 ; <o5> Backdoor Key 5 <0x0-0xFF:2>
bogdanm 0:9b334a45a8ff 106 ; <o6> Backdoor Key 6 <0x0-0xFF:2>
bogdanm 0:9b334a45a8ff 107 ; <o7> Backdoor Key 7 <0x0-0xFF:2>
bogdanm 0:9b334a45a8ff 108 BackDoorK0 EQU 0xFF
bogdanm 0:9b334a45a8ff 109 BackDoorK1 EQU 0xFF
bogdanm 0:9b334a45a8ff 110 BackDoorK2 EQU 0xFF
bogdanm 0:9b334a45a8ff 111 BackDoorK3 EQU 0xFF
bogdanm 0:9b334a45a8ff 112 BackDoorK4 EQU 0xFF
bogdanm 0:9b334a45a8ff 113 BackDoorK5 EQU 0xFF
bogdanm 0:9b334a45a8ff 114 BackDoorK6 EQU 0xFF
bogdanm 0:9b334a45a8ff 115 BackDoorK7 EQU 0xFF
bogdanm 0:9b334a45a8ff 116 ; </h>
bogdanm 0:9b334a45a8ff 117 ; <h> Program flash protection bytes (FPROT)
bogdanm 0:9b334a45a8ff 118 ; <i> Each program flash region can be protected from program and erase operation by setting the associated PROT bit.
bogdanm 0:9b334a45a8ff 119 ; <i> Each bit protects a 1/32 region of the program flash memory.
bogdanm 0:9b334a45a8ff 120 ; <h> FPROT0
bogdanm 0:9b334a45a8ff 121 ; <i> Program flash protection bytes
bogdanm 0:9b334a45a8ff 122 ; <i> 1/32 - 8/32 region
bogdanm 0:9b334a45a8ff 123 ; <o.0> FPROT0.0
bogdanm 0:9b334a45a8ff 124 ; <o.1> FPROT0.1
bogdanm 0:9b334a45a8ff 125 ; <o.2> FPROT0.2
bogdanm 0:9b334a45a8ff 126 ; <o.3> FPROT0.3
bogdanm 0:9b334a45a8ff 127 ; <o.4> FPROT0.4
bogdanm 0:9b334a45a8ff 128 ; <o.5> FPROT0.5
bogdanm 0:9b334a45a8ff 129 ; <o.6> FPROT0.6
bogdanm 0:9b334a45a8ff 130 ; <o.7> FPROT0.7
bogdanm 0:9b334a45a8ff 131 nFPROT0 EQU 0x00
bogdanm 0:9b334a45a8ff 132 FPROT0 EQU nFPROT0:EOR:0xFF
bogdanm 0:9b334a45a8ff 133 ; </h>
bogdanm 0:9b334a45a8ff 134 ; <h> FPROT1
bogdanm 0:9b334a45a8ff 135 ; <i> Program Flash Region Protect Register 1
bogdanm 0:9b334a45a8ff 136 ; <i> 9/32 - 16/32 region
bogdanm 0:9b334a45a8ff 137 ; <o.0> FPROT1.0
bogdanm 0:9b334a45a8ff 138 ; <o.1> FPROT1.1
bogdanm 0:9b334a45a8ff 139 ; <o.2> FPROT1.2
bogdanm 0:9b334a45a8ff 140 ; <o.3> FPROT1.3
bogdanm 0:9b334a45a8ff 141 ; <o.4> FPROT1.4
bogdanm 0:9b334a45a8ff 142 ; <o.5> FPROT1.5
bogdanm 0:9b334a45a8ff 143 ; <o.6> FPROT1.6
bogdanm 0:9b334a45a8ff 144 ; <o.7> FPROT1.7
bogdanm 0:9b334a45a8ff 145 nFPROT1 EQU 0x00
bogdanm 0:9b334a45a8ff 146 FPROT1 EQU nFPROT1:EOR:0xFF
bogdanm 0:9b334a45a8ff 147 ; </h>
bogdanm 0:9b334a45a8ff 148 ; <h> FPROT2
bogdanm 0:9b334a45a8ff 149 ; <i> Program Flash Region Protect Register 2
bogdanm 0:9b334a45a8ff 150 ; <i> 17/32 - 24/32 region
bogdanm 0:9b334a45a8ff 151 ; <o.0> FPROT2.0
bogdanm 0:9b334a45a8ff 152 ; <o.1> FPROT2.1
bogdanm 0:9b334a45a8ff 153 ; <o.2> FPROT2.2
bogdanm 0:9b334a45a8ff 154 ; <o.3> FPROT2.3
bogdanm 0:9b334a45a8ff 155 ; <o.4> FPROT2.4
bogdanm 0:9b334a45a8ff 156 ; <o.5> FPROT2.5
bogdanm 0:9b334a45a8ff 157 ; <o.6> FPROT2.6
bogdanm 0:9b334a45a8ff 158 ; <o.7> FPROT2.7
bogdanm 0:9b334a45a8ff 159 nFPROT2 EQU 0x00
bogdanm 0:9b334a45a8ff 160 FPROT2 EQU nFPROT2:EOR:0xFF
bogdanm 0:9b334a45a8ff 161 ; </h>
bogdanm 0:9b334a45a8ff 162 ; <h> FPROT3
bogdanm 0:9b334a45a8ff 163 ; <i> Program Flash Region Protect Register 3
bogdanm 0:9b334a45a8ff 164 ; <i> 25/32 - 32/32 region
bogdanm 0:9b334a45a8ff 165 ; <o.0> FPROT3.0
bogdanm 0:9b334a45a8ff 166 ; <o.1> FPROT3.1
bogdanm 0:9b334a45a8ff 167 ; <o.2> FPROT3.2
bogdanm 0:9b334a45a8ff 168 ; <o.3> FPROT3.3
bogdanm 0:9b334a45a8ff 169 ; <o.4> FPROT3.4
bogdanm 0:9b334a45a8ff 170 ; <o.5> FPROT3.5
bogdanm 0:9b334a45a8ff 171 ; <o.6> FPROT3.6
bogdanm 0:9b334a45a8ff 172 ; <o.7> FPROT3.7
bogdanm 0:9b334a45a8ff 173 nFPROT3 EQU 0x00
bogdanm 0:9b334a45a8ff 174 FPROT3 EQU nFPROT3:EOR:0xFF
bogdanm 0:9b334a45a8ff 175 ; </h>
bogdanm 0:9b334a45a8ff 176 ; </h>
bogdanm 0:9b334a45a8ff 177 ; <h> Data flash protection byte (FDPROT)
bogdanm 0:9b334a45a8ff 178 ; <i> Each bit protects a 1/8 region of the data flash memory.
bogdanm 0:9b334a45a8ff 179 ; <i> (Program flash only devices: Reserved)
bogdanm 0:9b334a45a8ff 180 ; <o.0> FDPROT.0
bogdanm 0:9b334a45a8ff 181 ; <o.1> FDPROT.1
bogdanm 0:9b334a45a8ff 182 ; <o.2> FDPROT.2
bogdanm 0:9b334a45a8ff 183 ; <o.3> FDPROT.3
bogdanm 0:9b334a45a8ff 184 ; <o.4> FDPROT.4
bogdanm 0:9b334a45a8ff 185 ; <o.5> FDPROT.5
bogdanm 0:9b334a45a8ff 186 ; <o.6> FDPROT.6
bogdanm 0:9b334a45a8ff 187 ; <o.7> FDPROT.7
bogdanm 0:9b334a45a8ff 188 nFDPROT EQU 0x00
bogdanm 0:9b334a45a8ff 189 FDPROT EQU nFDPROT:EOR:0xFF
bogdanm 0:9b334a45a8ff 190 ; </h>
bogdanm 0:9b334a45a8ff 191 ; <h> EEPROM protection byte (FEPROT)
bogdanm 0:9b334a45a8ff 192 ; <i> FlexNVM devices: Each bit protects a 1/8 region of the EEPROM.
bogdanm 0:9b334a45a8ff 193 ; <i> (Program flash only devices: Reserved)
bogdanm 0:9b334a45a8ff 194 ; <o.0> FEPROT.0
bogdanm 0:9b334a45a8ff 195 ; <o.1> FEPROT.1
bogdanm 0:9b334a45a8ff 196 ; <o.2> FEPROT.2
bogdanm 0:9b334a45a8ff 197 ; <o.3> FEPROT.3
bogdanm 0:9b334a45a8ff 198 ; <o.4> FEPROT.4
bogdanm 0:9b334a45a8ff 199 ; <o.5> FEPROT.5
bogdanm 0:9b334a45a8ff 200 ; <o.6> FEPROT.6
bogdanm 0:9b334a45a8ff 201 ; <o.7> FEPROT.7
bogdanm 0:9b334a45a8ff 202 nFEPROT EQU 0x00
bogdanm 0:9b334a45a8ff 203 FEPROT EQU nFEPROT:EOR:0xFF
bogdanm 0:9b334a45a8ff 204 ; </h>
bogdanm 0:9b334a45a8ff 205 ; <h> Flash nonvolatile option byte (FOPT)
bogdanm 0:9b334a45a8ff 206 ; <i> Allows the user to customize the operation of the MCU at boot time.
bogdanm 0:9b334a45a8ff 207 ; <o.0> LPBOOT
bogdanm 0:9b334a45a8ff 208 ; <0=> Low-power boot
bogdanm 0:9b334a45a8ff 209 ; <1=> normal boot
bogdanm 0:9b334a45a8ff 210 ; <o.1> EZPORT_DIS
bogdanm 0:9b334a45a8ff 211 ; <0=> EzPort operation is enabled
bogdanm 0:9b334a45a8ff 212 ; <1=> EzPort operation is disabled
bogdanm 0:9b334a45a8ff 213 FOPT EQU 0xFF
bogdanm 0:9b334a45a8ff 214 ; </h>
bogdanm 0:9b334a45a8ff 215 ; <h> Flash security byte (FSEC)
bogdanm 0:9b334a45a8ff 216 ; <i> WARNING: If SEC field is configured as "MCU security status is secure" and MEEN field is configured as "Mass erase is disabled",
bogdanm 0:9b334a45a8ff 217 ; <i> MCU's security status cannot be set back to unsecure state since Mass erase via the debugger is blocked !!!
bogdanm 0:9b334a45a8ff 218 ; <o.0..1> SEC
bogdanm 0:9b334a45a8ff 219 ; <2=> MCU security status is unsecure
bogdanm 0:9b334a45a8ff 220 ; <3=> MCU security status is secure
bogdanm 0:9b334a45a8ff 221 ; <i> Flash Security
bogdanm 0:9b334a45a8ff 222 ; <i> This bits define the security state of the MCU.
bogdanm 0:9b334a45a8ff 223 ; <o.2..3> FSLACC
bogdanm 0:9b334a45a8ff 224 ; <2=> Freescale factory access denied
bogdanm 0:9b334a45a8ff 225 ; <3=> Freescale factory access granted
bogdanm 0:9b334a45a8ff 226 ; <i> Freescale Failure Analysis Access Code
bogdanm 0:9b334a45a8ff 227 ; <i> This bits define the security state of the MCU.
bogdanm 0:9b334a45a8ff 228 ; <o.4..5> MEEN
bogdanm 0:9b334a45a8ff 229 ; <2=> Mass erase is disabled
bogdanm 0:9b334a45a8ff 230 ; <3=> Mass erase is enabled
bogdanm 0:9b334a45a8ff 231 ; <i> Mass Erase Enable Bits
bogdanm 0:9b334a45a8ff 232 ; <i> Enables and disables mass erase capability of the FTFL module
bogdanm 0:9b334a45a8ff 233 ; <o.6..7> KEYEN
bogdanm 0:9b334a45a8ff 234 ; <2=> Backdoor key access enabled
bogdanm 0:9b334a45a8ff 235 ; <3=> Backdoor key access disabled
bogdanm 0:9b334a45a8ff 236 ; <i> Backdoor key Security Enable
bogdanm 0:9b334a45a8ff 237 ; <i> These bits enable and disable backdoor key access to the FTFL module.
bogdanm 0:9b334a45a8ff 238 FSEC EQU 0xFE
bogdanm 0:9b334a45a8ff 239 ; </h>
bogdanm 0:9b334a45a8ff 240 ; </h>
bogdanm 0:9b334a45a8ff 241 IF :LNOT::DEF:RAM_TARGET
bogdanm 0:9b334a45a8ff 242 AREA |.ARM.__at_0x400|, CODE, READONLY
bogdanm 0:9b334a45a8ff 243 DCB BackDoorK0, BackDoorK1, BackDoorK2, BackDoorK3
bogdanm 0:9b334a45a8ff 244 DCB BackDoorK4, BackDoorK5, BackDoorK6, BackDoorK7
bogdanm 0:9b334a45a8ff 245 DCB FPROT0, FPROT1, FPROT2, FPROT3
bogdanm 0:9b334a45a8ff 246 DCB FSEC, FOPT, FEPROT, FDPROT
bogdanm 0:9b334a45a8ff 247 ENDIF
bogdanm 0:9b334a45a8ff 248
bogdanm 0:9b334a45a8ff 249 AREA |.text|, CODE, READONLY
bogdanm 0:9b334a45a8ff 250
bogdanm 0:9b334a45a8ff 251
bogdanm 0:9b334a45a8ff 252 ; Reset Handler
bogdanm 0:9b334a45a8ff 253
bogdanm 0:9b334a45a8ff 254 Reset_Handler PROC
bogdanm 0:9b334a45a8ff 255 EXPORT Reset_Handler [WEAK]
bogdanm 0:9b334a45a8ff 256 IMPORT SystemInit
bogdanm 0:9b334a45a8ff 257 IMPORT __main
bogdanm 0:9b334a45a8ff 258 LDR R0, =SystemInit
bogdanm 0:9b334a45a8ff 259 BLX R0
bogdanm 0:9b334a45a8ff 260 LDR R0, =__main
bogdanm 0:9b334a45a8ff 261 BX R0
bogdanm 0:9b334a45a8ff 262 ENDP
bogdanm 0:9b334a45a8ff 263
bogdanm 0:9b334a45a8ff 264
bogdanm 0:9b334a45a8ff 265 ; Dummy Exception Handlers (infinite loops which can be modified)
bogdanm 0:9b334a45a8ff 266
bogdanm 0:9b334a45a8ff 267 NMI_Handler PROC
bogdanm 0:9b334a45a8ff 268 EXPORT NMI_Handler [WEAK]
bogdanm 0:9b334a45a8ff 269 B .
bogdanm 0:9b334a45a8ff 270 ENDP
bogdanm 0:9b334a45a8ff 271 HardFault_Handler\
bogdanm 0:9b334a45a8ff 272 PROC
bogdanm 0:9b334a45a8ff 273 EXPORT HardFault_Handler [WEAK]
bogdanm 0:9b334a45a8ff 274 B .
bogdanm 0:9b334a45a8ff 275 ENDP
bogdanm 0:9b334a45a8ff 276 MemManage_Handler\
bogdanm 0:9b334a45a8ff 277 PROC
bogdanm 0:9b334a45a8ff 278 EXPORT MemManage_Handler [WEAK]
bogdanm 0:9b334a45a8ff 279 B .
bogdanm 0:9b334a45a8ff 280 ENDP
bogdanm 0:9b334a45a8ff 281 BusFault_Handler\
bogdanm 0:9b334a45a8ff 282 PROC
bogdanm 0:9b334a45a8ff 283 EXPORT BusFault_Handler [WEAK]
bogdanm 0:9b334a45a8ff 284 B .
bogdanm 0:9b334a45a8ff 285 ENDP
bogdanm 0:9b334a45a8ff 286 UsageFault_Handler\
bogdanm 0:9b334a45a8ff 287 PROC
bogdanm 0:9b334a45a8ff 288 EXPORT UsageFault_Handler [WEAK]
bogdanm 0:9b334a45a8ff 289 B .
bogdanm 0:9b334a45a8ff 290 ENDP
bogdanm 0:9b334a45a8ff 291 SVC_Handler PROC
bogdanm 0:9b334a45a8ff 292 EXPORT SVC_Handler [WEAK]
bogdanm 0:9b334a45a8ff 293 B .
bogdanm 0:9b334a45a8ff 294 ENDP
bogdanm 0:9b334a45a8ff 295 DebugMon_Handler\
bogdanm 0:9b334a45a8ff 296 PROC
bogdanm 0:9b334a45a8ff 297 EXPORT DebugMon_Handler [WEAK]
bogdanm 0:9b334a45a8ff 298 B .
bogdanm 0:9b334a45a8ff 299 ENDP
bogdanm 0:9b334a45a8ff 300 PendSV_Handler PROC
bogdanm 0:9b334a45a8ff 301 EXPORT PendSV_Handler [WEAK]
bogdanm 0:9b334a45a8ff 302 B .
bogdanm 0:9b334a45a8ff 303 ENDP
bogdanm 0:9b334a45a8ff 304 SysTick_Handler PROC
bogdanm 0:9b334a45a8ff 305 EXPORT SysTick_Handler [WEAK]
bogdanm 0:9b334a45a8ff 306 B .
bogdanm 0:9b334a45a8ff 307 ENDP
bogdanm 0:9b334a45a8ff 308
bogdanm 0:9b334a45a8ff 309 Default_Handler PROC
bogdanm 0:9b334a45a8ff 310 EXPORT DMA0_IRQHandler [WEAK]
bogdanm 0:9b334a45a8ff 311 EXPORT DMA1_IRQHandler [WEAK]
bogdanm 0:9b334a45a8ff 312 EXPORT DMA2_IRQHandler [WEAK]
bogdanm 0:9b334a45a8ff 313 EXPORT DMA3_IRQHandler [WEAK]
bogdanm 0:9b334a45a8ff 314 EXPORT DMA_Error_IRQHandler [WEAK]
bogdanm 0:9b334a45a8ff 315 EXPORT Reserved21_IRQHandler [WEAK]
bogdanm 0:9b334a45a8ff 316 EXPORT FTFL_IRQHandler [WEAK]
bogdanm 0:9b334a45a8ff 317 EXPORT Read_Collision_IRQHandler [WEAK]
bogdanm 0:9b334a45a8ff 318 EXPORT LVD_LVW_IRQHandler [WEAK]
bogdanm 0:9b334a45a8ff 319 EXPORT LLW_IRQHandler [WEAK]
bogdanm 0:9b334a45a8ff 320 EXPORT Watchdog_IRQHandler [WEAK]
bogdanm 0:9b334a45a8ff 321 EXPORT I2C0_IRQHandler [WEAK]
bogdanm 0:9b334a45a8ff 322 EXPORT SPI0_IRQHandler [WEAK]
bogdanm 0:9b334a45a8ff 323 EXPORT I2S0_Tx_IRQHandler [WEAK]
bogdanm 0:9b334a45a8ff 324 EXPORT I2S0_Rx_IRQHandler [WEAK]
bogdanm 0:9b334a45a8ff 325 EXPORT UART0_LON_IRQHandler [WEAK]
bogdanm 0:9b334a45a8ff 326 EXPORT UART0_RX_TX_IRQHandler [WEAK]
bogdanm 0:9b334a45a8ff 327 EXPORT UART0_ERR_IRQHandler [WEAK]
bogdanm 0:9b334a45a8ff 328 EXPORT UART1_RX_TX_IRQHandler [WEAK]
bogdanm 0:9b334a45a8ff 329 EXPORT UART1_ERR_IRQHandler [WEAK]
bogdanm 0:9b334a45a8ff 330 EXPORT UART2_RX_TX_IRQHandler [WEAK]
bogdanm 0:9b334a45a8ff 331 EXPORT UART2_ERR_IRQHandler [WEAK]
bogdanm 0:9b334a45a8ff 332 EXPORT ADC0_IRQHandler [WEAK]
bogdanm 0:9b334a45a8ff 333 EXPORT CMP0_IRQHandler [WEAK]
bogdanm 0:9b334a45a8ff 334 EXPORT CMP1_IRQHandler [WEAK]
bogdanm 0:9b334a45a8ff 335 EXPORT FTM0_IRQHandler [WEAK]
bogdanm 0:9b334a45a8ff 336 EXPORT FTM1_IRQHandler [WEAK]
bogdanm 0:9b334a45a8ff 337 EXPORT CMT_IRQHandler [WEAK]
bogdanm 0:9b334a45a8ff 338 EXPORT RTC_IRQHandler [WEAK]
bogdanm 0:9b334a45a8ff 339 EXPORT RTC_Seconds_IRQHandler [WEAK]
bogdanm 0:9b334a45a8ff 340 EXPORT PIT0_IRQHandler [WEAK]
bogdanm 0:9b334a45a8ff 341 EXPORT PIT1_IRQHandler [WEAK]
bogdanm 0:9b334a45a8ff 342 EXPORT PIT2_IRQHandler [WEAK]
bogdanm 0:9b334a45a8ff 343 EXPORT PIT3_IRQHandler [WEAK]
bogdanm 0:9b334a45a8ff 344 EXPORT PDB0_IRQHandler [WEAK]
bogdanm 0:9b334a45a8ff 345 EXPORT USB0_IRQHandler [WEAK]
bogdanm 0:9b334a45a8ff 346 EXPORT USBDCD_IRQHandler [WEAK]
bogdanm 0:9b334a45a8ff 347 EXPORT TSI0_IRQHandler [WEAK]
bogdanm 0:9b334a45a8ff 348 EXPORT MCG_IRQHandler [WEAK]
bogdanm 0:9b334a45a8ff 349 EXPORT LPTimer_IRQHandler [WEAK]
bogdanm 0:9b334a45a8ff 350 EXPORT PORTA_IRQHandler [WEAK]
bogdanm 0:9b334a45a8ff 351 EXPORT PORTB_IRQHandler [WEAK]
bogdanm 0:9b334a45a8ff 352 EXPORT PORTC_IRQHandler [WEAK]
bogdanm 0:9b334a45a8ff 353 EXPORT PORTD_IRQHandler [WEAK]
bogdanm 0:9b334a45a8ff 354 EXPORT PORTE_IRQHandler [WEAK]
bogdanm 0:9b334a45a8ff 355 EXPORT SWI_IRQHandler [WEAK]
bogdanm 0:9b334a45a8ff 356 EXPORT DefaultISR [WEAK]
bogdanm 0:9b334a45a8ff 357
bogdanm 0:9b334a45a8ff 358 DMA0_IRQHandler
bogdanm 0:9b334a45a8ff 359 DMA1_IRQHandler
bogdanm 0:9b334a45a8ff 360 DMA2_IRQHandler
bogdanm 0:9b334a45a8ff 361 DMA3_IRQHandler
bogdanm 0:9b334a45a8ff 362 DMA_Error_IRQHandler
bogdanm 0:9b334a45a8ff 363 Reserved21_IRQHandler
bogdanm 0:9b334a45a8ff 364 FTFL_IRQHandler
bogdanm 0:9b334a45a8ff 365 Read_Collision_IRQHandler
bogdanm 0:9b334a45a8ff 366 LVD_LVW_IRQHandler
bogdanm 0:9b334a45a8ff 367 LLW_IRQHandler
bogdanm 0:9b334a45a8ff 368 Watchdog_IRQHandler
bogdanm 0:9b334a45a8ff 369 I2C0_IRQHandler
bogdanm 0:9b334a45a8ff 370 SPI0_IRQHandler
bogdanm 0:9b334a45a8ff 371 I2S0_Tx_IRQHandler
bogdanm 0:9b334a45a8ff 372 I2S0_Rx_IRQHandler
bogdanm 0:9b334a45a8ff 373 UART0_LON_IRQHandler
bogdanm 0:9b334a45a8ff 374 UART0_RX_TX_IRQHandler
bogdanm 0:9b334a45a8ff 375 UART0_ERR_IRQHandler
bogdanm 0:9b334a45a8ff 376 UART1_RX_TX_IRQHandler
bogdanm 0:9b334a45a8ff 377 UART1_ERR_IRQHandler
bogdanm 0:9b334a45a8ff 378 UART2_RX_TX_IRQHandler
bogdanm 0:9b334a45a8ff 379 UART2_ERR_IRQHandler
bogdanm 0:9b334a45a8ff 380 ADC0_IRQHandler
bogdanm 0:9b334a45a8ff 381 CMP0_IRQHandler
bogdanm 0:9b334a45a8ff 382 CMP1_IRQHandler
bogdanm 0:9b334a45a8ff 383 FTM0_IRQHandler
bogdanm 0:9b334a45a8ff 384 FTM1_IRQHandler
bogdanm 0:9b334a45a8ff 385 CMT_IRQHandler
bogdanm 0:9b334a45a8ff 386 RTC_IRQHandler
bogdanm 0:9b334a45a8ff 387 RTC_Seconds_IRQHandler
bogdanm 0:9b334a45a8ff 388 PIT0_IRQHandler
bogdanm 0:9b334a45a8ff 389 PIT1_IRQHandler
bogdanm 0:9b334a45a8ff 390 PIT2_IRQHandler
bogdanm 0:9b334a45a8ff 391 PIT3_IRQHandler
bogdanm 0:9b334a45a8ff 392 PDB0_IRQHandler
bogdanm 0:9b334a45a8ff 393 USB0_IRQHandler
bogdanm 0:9b334a45a8ff 394 USBDCD_IRQHandler
bogdanm 0:9b334a45a8ff 395 TSI0_IRQHandler
bogdanm 0:9b334a45a8ff 396 MCG_IRQHandler
bogdanm 0:9b334a45a8ff 397 LPTimer_IRQHandler
bogdanm 0:9b334a45a8ff 398 PORTA_IRQHandler
bogdanm 0:9b334a45a8ff 399 PORTB_IRQHandler
bogdanm 0:9b334a45a8ff 400 PORTC_IRQHandler
bogdanm 0:9b334a45a8ff 401 PORTD_IRQHandler
bogdanm 0:9b334a45a8ff 402 PORTE_IRQHandler
bogdanm 0:9b334a45a8ff 403 SWI_IRQHandler
bogdanm 0:9b334a45a8ff 404 DefaultISR
bogdanm 0:9b334a45a8ff 405
bogdanm 0:9b334a45a8ff 406 B .
bogdanm 0:9b334a45a8ff 407
bogdanm 0:9b334a45a8ff 408 ENDP
bogdanm 0:9b334a45a8ff 409
bogdanm 0:9b334a45a8ff 410
bogdanm 0:9b334a45a8ff 411 ALIGN
bogdanm 0:9b334a45a8ff 412 END