registerArrays.h

00001 const uint8_t initialize[][2] = {
00002     { 0x7F,0x00 }, // Bank0, not allowed to perform SPIWriteRead
00003     { 0x05,0xA8 },
00004     { 0x07,0xCC },
00005     { 0x0A,0x17 },
00006     { 0x0D,0x05 },
00007     { 0x0E,0x05 },
00008     { 0x1B,0x43 },
00009     { 0x25,0x2E },
00010     { 0x26,0x35 },
00011     { 0x2E,0x40 },
00012     { 0x32,0x40 },
00013     { 0x33,0x02 },
00014     { 0x34,0x00 },
00015     { 0x36,0xE0 },
00016     { 0x3E,0x14 },
00017     { 0x44,0x02 },
00018     { 0x51,0x06 },
00019     { 0x52,0x0C },
00020     { 0x57,0x05 },
00021     { 0x59,0x03 },
00022     { 0x5B,0x04 },
00023     { 0x5D,0x3B },
00024     { 0x7C,0xC8 },
00025     
00026     { 0x7F,0x01 }, // Bank1, not allowed to perform SPIWriteRead
00027     { 0x00,0x2F },
00028     { 0x08,0x1C },
00029     { 0x0A,0x02 },
00030     { 0x19,0x40 },
00031     { 0x1B,0x10 },
00032     { 0x1D,0x18 },
00033     { 0x1F,0x12 },
00034     { 0x20,0x00 },
00035     { 0x21,0x80 },
00036     { 0x23,0x60 },
00037     { 0x25,0x64 },
00038     { 0x27,0x64 },
00039     { 0x2B,0x78 },
00040     { 0x2F,0x78 },
00041     { 0x39,0x78 },
00042     { 0x3B,0x78 },
00043     { 0x3D,0x78 },
00044     { 0x3F,0x78 },
00045     { 0x44,0x7E },
00046     { 0x45,0xF4 },
00047     { 0x46,0x01 },
00048     { 0x47,0x2C },
00049     { 0x49,0x90 },
00050     { 0x4A,0x05 },
00051     { 0x4B,0xDC },
00052     { 0x4C,0x07 },
00053     { 0x4D,0x08 },
00054     { 0x51,0x02 },
00055     { 0x52,0xBC },
00056     { 0x53,0x02 },
00057     { 0x54,0xBC },
00058     { 0x55,0x07 },
00059     { 0x56,0x08 },
00060     { 0x57,0x07 },
00061     { 0x58,0x08 },
00062     { 0x59,0x08 },
00063     { 0x5A,0x08 },
00064     
00065     { 0x7F,0x02 }, // Bank2, not allowed to perform SPIWriteRead
00066     { 0x07,0x1B },
00067     { 0x08,0x1F },
00068     { 0x09,0x23 },
00069     { 0x51,0x01 },
00070     
00071     { 0x7F,0x03 }, // Bank3, not allowed to perform SPIWriteRead
00072     { 0x07,0x07 },
00073     { 0x08,0x06 },
00074     { 0x2F,0x00 },
00075     { 0x30,0x20 },
00076     { 0x32,0x59 },
00077     { 0x33,0xD8 },
00078     { 0x34,0x4E },
00079     { 0x35,0x20 },
00080     { 0x36,0x5B },
00081     { 0x37,0xCC },
00082     { 0x38,0x50 },
00083     { 0x39,0x14 },
00084     
00085     { 0x7F,0x04 }, // Bank4, not allowed to perform SPIWriteRead
00086     { 0x05,0x01 },
00087     { 0x2C,0x06 },
00088     { 0x2E,0x0C },
00089     { 0x30,0x0C },
00090     { 0x32,0x06 },
00091     { 0x34,0x03 },
00092     { 0x38,0x17 },
00093     { 0x39,0x71 },
00094     { 0x3A,0x18 },
00095     { 0x3B,0x4D },
00096     { 0x3C,0x18 },
00097     { 0x3D,0x4D },
00098     { 0x3E,0x14 },
00099     { 0x3F,0xD1 },
00100     { 0x40,0x14 },
00101     { 0x41,0xDD },
00102     { 0x42,0x0A },
00103     { 0x43,0x6C },
00104     { 0x44,0x08 },
00105     { 0x45,0xAD },
00106     { 0x46,0x06 },
00107     { 0x47,0xF2 },
00108     { 0x48,0x06 },
00109     { 0x49,0xEC },
00110     { 0x4A,0x06 },
00111     { 0x4B,0xEC },
00112     { 0x53,0x08 },
00113     
00114     { 0x7F,0x05 }, // Bank5, not allowed to perform SPIWriteRead
00115     { 0x03,0x00 },
00116     { 0x09,0x01 },
00117     { 0x0B,0xFF },
00118     { 0x0D,0xFF },
00119     { 0x0F,0xFF },
00120     { 0x11,0xFF },
00121     { 0x12,0xD2 },
00122     { 0x13,0xD2 },
00123     { 0x19,0xFF },
00124     { 0x1B,0xFF },
00125     { 0x1D,0xFF },
00126     { 0x1F,0xFF },
00127     { 0x20,0xD2 },
00128     { 0x21,0xD2 },
00129     { 0x2F,0x7C },
00130     { 0x30,0x05 },
00131     { 0x41,0x02 },
00132     { 0x53,0xFF },
00133     { 0x5F,0x02 },
00134     
00135     { 0x7F,0x06 }, // Bank6, not allowed to perform SPIWriteRead
00136     { 0x2A,0x05 }, // Write ONLY address, not allowed to perform SPIWriteRead
00137     { 0x35,0x19 },
00138     
00139     { 0x7F,0x07 }, // Bank7, not allowed to perform SPIWriteRead
00140     { 0x00,0x01 },
00141     { 0x14,0x03 },
00142     { 0x15,0x14 },
00143     { 0x46,0x03 },
00144     
00145     { 0x7F,0x00 }, // Bank0, not allowed to perform SPIWriteRead
00146 };
00147 #define initialize_size (sizeof(initialize)/sizeof(initialize[0]))
00148 
00149 
00150 
00151 const uint8_t modeLaser[][2] = {
00152     { 0x7F, 0x00 }, // Bank0, not allowed to perform SPIWriteRead
00153     { 0x09, 0x5A }, // disable write protect
00154     { 0x53, 0x01 },
00155     { 0x07, 0xCC },
00156     { 0x0D, 0x05 },
00157     { 0x0E, 0x05 },
00158     { 0x19, 0x24 },
00159     { 0x7F, 0x01 }, // Bank1, not allowed to perform SPIWriteRead
00160     { 0x1D, 0x18 },
00161     { 0x1F, 0x12 },
00162     { 0x42, 0x40 },
00163     { 0x37, 0x60 },
00164     { 0x43, 0x0A },
00165     { 0x7F, 0x04 }, // Bank4, not allowed to perform SPIWriteRead
00166     { 0x06, 0x03 },
00167     { 0x7F, 0x05 }, // Bank5, not allowed to perform SPIWriteRead
00168     { 0x2E, 0x02 },
00169     { 0x48, 0x00 },
00170     { 0x3E, 0x05 },
00171     { 0x7F, 0x06 }, // Bank6, not allowed to perform SPIWriteRead
00172     { 0x34, 0x01 },
00173     { 0x7F, 0x00 }, // Bank0, not allowed to perform SPIWriteRead
00174     { 0x09, 0x00 }, // enable write protect
00175 };
00176 #define modeLaser_size (sizeof(modeLaser)/sizeof(modeLaser[0]))
00177 
00178 
00179 
00180 const uint8_t modeLED[][2] = {
00181     { 0x7F, 0x00 }, // Bank0, not allowed to perform SPIWriteRead
00182     { 0x09, 0x5A }, // disable write protect
00183     { 0x07, 0x55 },
00184     { 0x0D, 0x7D },
00185     { 0x0E, 0x7D },
00186     { 0x19, 0x3C },
00187     { 0x7F, 0x01 }, // Bank1, not allowed to perform SPIWriteRead
00188     { 0x1D, 0x00 },
00189     { 0x1F, 0x00 },
00190     { 0x42, 0x20 },
00191     { 0x37, 0x18 },
00192     { 0x43, 0x02 },
00193     { 0x7F, 0x04 }, // Bank4, not allowed to perform SPIWriteRead
00194     { 0x06, 0x00 },
00195     { 0x7F, 0x05 }, // Bank5, not allowed to perform SPIWriteRead
00196     { 0x2E, 0x08 },
00197     { 0x48, 0x02 },
00198     { 0x3E, 0x85 },
00199     { 0x7F, 0x06 }, // Bank6, not allowed to perform SPIWriteRead
00200     { 0x34, 0x09 },
00201     { 0x7F, 0x00 }, // Bank0, not allowed to perform SPIWriteRead
00202     { 0x53, 0x00 },
00203     { 0x09, 0x00 }, // enable write protect
00204 };
00205 #define modeLED_size (sizeof(modeLED)/sizeof(modeLED[0]))