System Management code
Dependencies: mbed CANBuffer Watchdog MODSERIAL mbed-rtos xbeeRelay IAP
Fork of SystemManagement by
IOobjects/CAN_Filter_LUT.h@30:91af74a299e1, 2014-11-13 (annotated)
- Committer:
- pspatel321
- Date:
- Thu Nov 13 10:53:10 2014 +0000
- Revision:
- 30:91af74a299e1
- Child:
- 31:7eaa5e881b56
Parth's edits for the week.; DC-DC completed and fixed, IMD updated, LatchMonitor and Temperature added. Serial dashboard updated. File structure changed Everything tested. Compiles and runs.; Still need to write CAN in/out interface.
Who changed what in which revision?
User | Revision | Line number | New contents of line |
---|---|---|---|
pspatel321 | 30:91af74a299e1 | 1 | /* |
pspatel321 | 30:91af74a299e1 | 2 | Code by Parth Patel, Penn Electric Racing 2014, 9/23/2014 |
pspatel321 | 30:91af74a299e1 | 3 | |
pspatel321 | 30:91af74a299e1 | 4 | This library provides an easy to use, buffered, hardware-filtered CAN interface for |
pspatel321 | 30:91af74a299e1 | 5 | high performance CAN applications. Provides automatic reception of messages via CAN RX interrupt |
pspatel321 | 30:91af74a299e1 | 6 | into a rx ring buffer. Provides automatic transmission of messages via CAN TX interrupt. |
pspatel321 | 30:91af74a299e1 | 7 | |
pspatel321 | 30:91af74a299e1 | 8 | @File CAN_Filter_LUT.h: Contains the formatted lookup tables to program the onboard CAN acceptance filters |
pspatel321 | 30:91af74a299e1 | 9 | |
pspatel321 | 30:91af74a299e1 | 10 | */ |
pspatel321 | 30:91af74a299e1 | 11 | #ifndef _FILE_CAN_FILTER_LUT_H |
pspatel321 | 30:91af74a299e1 | 12 | #define _FILE_CAN_FILTER_LUT_H |
pspatel321 | 30:91af74a299e1 | 13 | #include "CAN_RxIDs.h" |
pspatel321 | 30:91af74a299e1 | 14 | |
pspatel321 | 30:91af74a299e1 | 15 | #define STDMASK 0x7FF |
pspatel321 | 30:91af74a299e1 | 16 | #define EXTMASK 0x1FFFFFFF |
pspatel321 | 30:91af74a299e1 | 17 | |
pspatel321 | 30:91af74a299e1 | 18 | // These arrays defines the CAN Controller Acceptance Filter Lookup Table. |
pspatel321 | 30:91af74a299e1 | 19 | // Follow notes below or else the chip's behaviour will be undefined |
pspatel321 | 30:91af74a299e1 | 20 | // MAX SIZE PERMITTED = 512 32bit ints total across all tables |
pspatel321 | 30:91af74a299e1 | 21 | // Note that AF_LUT_SEI is 16bit, divide #entries by 2 for this one |
pspatel321 | 30:91af74a299e1 | 22 | // Note that AF_LUT_EIR is 64bit, multipy #entries by 2 for this one |
pspatel321 | 30:91af74a299e1 | 23 | |
pspatel321 | 30:91af74a299e1 | 24 | const uint16_t AF_LUT_SEI[] = { |
pspatel321 | 30:91af74a299e1 | 25 | // !! ID's MUST BE IN ASCENDING ORDER (starting at 0x00) !! |
pspatel321 | 30:91af74a299e1 | 26 | |
pspatel321 | 30:91af74a299e1 | 27 | // STANDARD EXPLICIT IDs - CAN CONTROLLER 1 |
pspatel321 | 30:91af74a299e1 | 28 | //( 0xID & STDMASK), |
pspatel321 | 30:91af74a299e1 | 29 | |
pspatel321 | 30:91af74a299e1 | 30 | // STANDARD EXPLICIT IDs - CAN CONTROLLER 2 |
pspatel321 | 30:91af74a299e1 | 31 | //( 0xID & STDMASK) | 1<<13, |
pspatel321 | 30:91af74a299e1 | 32 | }; |
pspatel321 | 30:91af74a299e1 | 33 | |
pspatel321 | 30:91af74a299e1 | 34 | const uint32_t AF_LUT_SIR[] = { |
pspatel321 | 30:91af74a299e1 | 35 | // !! ID's MUST BE IN ASCENDING ORDER (starting at 0x00), NO OVERLAPPING RANGES !! |
pspatel321 | 30:91af74a299e1 | 36 | |
pspatel321 | 30:91af74a299e1 | 37 | // STANDARD ID RANGES - CAN CONTROLLER 1 |
pspatel321 | 30:91af74a299e1 | 38 | //( 0xLOWERBOUND & STDMASK) << 16 | ( 0xUPPERBOUND & STDMASK), lower/upperbounds are inclusive |
pspatel321 | 30:91af74a299e1 | 39 | |
pspatel321 | 30:91af74a299e1 | 40 | // STANDARD ID RANGES - CAN CONTROLLER 2 |
pspatel321 | 30:91af74a299e1 | 41 | //( 0xLOWERBOUND & STDMASK | 1<<13) << 16 | ( 0xUPPERBOUND & STDMASK | 1<<13), lower/upperbounds are inclusive |
pspatel321 | 30:91af74a299e1 | 42 | }; |
pspatel321 | 30:91af74a299e1 | 43 | |
pspatel321 | 30:91af74a299e1 | 44 | const uint32_t AF_LUT_EEI[] = { |
pspatel321 | 30:91af74a299e1 | 45 | // !! ID's MUST BE IN ASCENDING ORDER (starting at 0x00) !! |
pspatel321 | 30:91af74a299e1 | 46 | |
pspatel321 | 30:91af74a299e1 | 47 | // EXTENDED EXPLICIT IDs - CAN CONTROLLER 1 |
pspatel321 | 30:91af74a299e1 | 48 | //( 0xID & EXTMASK), |
pspatel321 | 30:91af74a299e1 | 49 | |
pspatel321 | 30:91af74a299e1 | 50 | // EXTENDED EXPLICIT IDs - CAN CONTROLLER 2 |
pspatel321 | 30:91af74a299e1 | 51 | //( 0xID & EXTMASK) | 1<<29, |
pspatel321 | 30:91af74a299e1 | 52 | }; |
pspatel321 | 30:91af74a299e1 | 53 | |
pspatel321 | 30:91af74a299e1 | 54 | const uint64_t AF_LUT_EIR[] = { |
pspatel321 | 30:91af74a299e1 | 55 | // !! ID's MUST BE IN ASCENDING ORDER (starting at 0x00), NO OVERLAPPING RANGES !! |
pspatel321 | 30:91af74a299e1 | 56 | |
pspatel321 | 30:91af74a299e1 | 57 | // EXTENDED ID RANGES - CAN CONTROLLER 1 |
pspatel321 | 30:91af74a299e1 | 58 | //( 0xLOWERBOUND & EXTMASK) << 32 | ( 0xUPPERBOUND & EXTMASK), lower/upperbounds are inclusive |
pspatel321 | 30:91af74a299e1 | 59 | |
pspatel321 | 30:91af74a299e1 | 60 | // EXTENDED ID RANGES - CAN CONTROLLER 2 |
pspatel321 | 30:91af74a299e1 | 61 | //( 0xLOWERBOUND & EXTMASK | 1<<29) << 32 | ( 0xUPPERBOUND & EXTMASK | 1<<29), lower/upperbounds are inclusive |
pspatel321 | 30:91af74a299e1 | 62 | |
pspatel321 | 30:91af74a299e1 | 63 | }; |
pspatel321 | 30:91af74a299e1 | 64 | |
pspatel321 | 30:91af74a299e1 | 65 | #endif |