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mbed-os/targets/TARGET_ARM_SSG/TARGET_IOTSS/spi_api.c@0:6bf0743ece18, 2020-03-28 (annotated)

Committer:
demayer
Date:
Sat Mar 28 15:28:19 2020 +0000
Revision:
0:6bf0743ece18
IMU Thread with an event-queue running parallel to handle tasks like a 5 times blinking LED. Button with interrupt detected.

Who changed what in which revision?

UserRevisionLine numberNew contents of line
demayer 0:6bf0743ece18 1 /* mbed Microcontroller Library
demayer 0:6bf0743ece18 2 * Copyright (c) 2006-2015 ARM Limited
demayer 0:6bf0743ece18 3 *
demayer 0:6bf0743ece18 4 * Licensed under the Apache License, Version 2.0 (the "License");
demayer 0:6bf0743ece18 5 * you may not use this file except in compliance with the License.
demayer 0:6bf0743ece18 6 * You may obtain a copy of the License at
demayer 0:6bf0743ece18 7 *
demayer 0:6bf0743ece18 8 * http://www.apache.org/licenses/LICENSE-2.0
demayer 0:6bf0743ece18 9 *
demayer 0:6bf0743ece18 10 * Unless required by applicable law or agreed to in writing, software
demayer 0:6bf0743ece18 11 * distributed under the License is distributed on an "AS IS" BASIS,
demayer 0:6bf0743ece18 12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
demayer 0:6bf0743ece18 13 * See the License for the specific language governing permissions and
demayer 0:6bf0743ece18 14 * limitations under the License.
demayer 0:6bf0743ece18 15 */
demayer 0:6bf0743ece18 16 #include <math.h>
demayer 0:6bf0743ece18 17
demayer 0:6bf0743ece18 18 #include "spi_api.h"
demayer 0:6bf0743ece18 19 #include "spi_def.h"
demayer 0:6bf0743ece18 20 #include "cmsis.h"
demayer 0:6bf0743ece18 21 #include "pinmap.h"
demayer 0:6bf0743ece18 22 #include "mbed_error.h"
demayer 0:6bf0743ece18 23 #include "mbed_wait_api.h"
demayer 0:6bf0743ece18 24
demayer 0:6bf0743ece18 25 static const PinMap PinMap_SPI_SCLK[] = {
demayer 0:6bf0743ece18 26 {SCLK_SPI , SPI_0, 0},
demayer 0:6bf0743ece18 27 {CLCD_SCLK , SPI_1, 0},
demayer 0:6bf0743ece18 28 {ADC_SCLK , SPI_2, 0},
demayer 0:6bf0743ece18 29 {SHIELD_0_SPI_SCK , SPI_3, 0},
demayer 0:6bf0743ece18 30 {SHIELD_1_SPI_SCK , SPI_4, 0},
demayer 0:6bf0743ece18 31 {NC , NC , 0}
demayer 0:6bf0743ece18 32 };
demayer 0:6bf0743ece18 33
demayer 0:6bf0743ece18 34 static const PinMap PinMap_SPI_MOSI[] = {
demayer 0:6bf0743ece18 35 {MOSI_SPI, SPI_0, 0},
demayer 0:6bf0743ece18 36 {CLCD_MOSI, SPI_1, 0},
demayer 0:6bf0743ece18 37 {ADC_MOSI, SPI_2, 0},
demayer 0:6bf0743ece18 38 {SHIELD_0_SPI_MOSI, SPI_3, 0},
demayer 0:6bf0743ece18 39 {SHIELD_1_SPI_MOSI, SPI_4, 0},
demayer 0:6bf0743ece18 40 {NC , NC , 0}
demayer 0:6bf0743ece18 41 };
demayer 0:6bf0743ece18 42
demayer 0:6bf0743ece18 43 static const PinMap PinMap_SPI_MISO[] = {
demayer 0:6bf0743ece18 44 {MISO_SPI, SPI_0, 0},
demayer 0:6bf0743ece18 45 {CLCD_MISO, SPI_1, 0},
demayer 0:6bf0743ece18 46 {ADC_MISO, SPI_2, 0},
demayer 0:6bf0743ece18 47 {SHIELD_0_SPI_MISO, SPI_3, 0},
demayer 0:6bf0743ece18 48 {SHIELD_1_SPI_MISO, SPI_4, 0},
demayer 0:6bf0743ece18 49 {NC , NC , 0}
demayer 0:6bf0743ece18 50 };
demayer 0:6bf0743ece18 51
demayer 0:6bf0743ece18 52 static const PinMap PinMap_SPI_SSEL[] = {
demayer 0:6bf0743ece18 53 {SSEL_SPI, SPI_0, 0},
demayer 0:6bf0743ece18 54 {CLCD_SSEL, SPI_1, 0},
demayer 0:6bf0743ece18 55 {ADC_SSEL, SPI_2, 0},
demayer 0:6bf0743ece18 56 {SHIELD_0_SPI_nCS, SPI_3, 0},
demayer 0:6bf0743ece18 57 {SHIELD_1_SPI_nCS, SPI_4, 0},
demayer 0:6bf0743ece18 58 {NC , NC , 0}
demayer 0:6bf0743ece18 59 };
demayer 0:6bf0743ece18 60
demayer 0:6bf0743ece18 61 static inline int ssp_disable(spi_t *obj);
demayer 0:6bf0743ece18 62 static inline int ssp_enable(spi_t *obj);
demayer 0:6bf0743ece18 63
demayer 0:6bf0743ece18 64 void spi_init(spi_t *obj, PinName mosi, PinName miso, PinName sclk, PinName ssel) {
demayer 0:6bf0743ece18 65
demayer 0:6bf0743ece18 66 int altfunction[4];
demayer 0:6bf0743ece18 67 // determine the SPI to use
demayer 0:6bf0743ece18 68 SPIName spi_mosi = (SPIName)pinmap_peripheral(mosi, PinMap_SPI_MOSI);
demayer 0:6bf0743ece18 69 SPIName spi_miso = (SPIName)pinmap_peripheral(miso, PinMap_SPI_MISO);
demayer 0:6bf0743ece18 70 SPIName spi_sclk = (SPIName)pinmap_peripheral(sclk, PinMap_SPI_SCLK);
demayer 0:6bf0743ece18 71 SPIName spi_ssel = (SPIName)pinmap_peripheral(ssel, PinMap_SPI_SSEL);
demayer 0:6bf0743ece18 72 SPIName spi_data = (SPIName)pinmap_merge(spi_mosi, spi_miso);
demayer 0:6bf0743ece18 73 SPIName spi_cntl = (SPIName)pinmap_merge(spi_sclk, spi_ssel);
demayer 0:6bf0743ece18 74 obj->spi = (MPS2_SSP_TypeDef*)pinmap_merge(spi_data, spi_cntl);
demayer 0:6bf0743ece18 75 if ((int)obj->spi == NC) {
demayer 0:6bf0743ece18 76 error("SPI pinout mapping failed");
demayer 0:6bf0743ece18 77 }
demayer 0:6bf0743ece18 78
demayer 0:6bf0743ece18 79 // enable power and clocking
demayer 0:6bf0743ece18 80 switch ((int)obj->spi) {
demayer 0:6bf0743ece18 81 case (int)SPI_0:
demayer 0:6bf0743ece18 82 obj->spi->CR1 = 0;
demayer 0:6bf0743ece18 83 obj->spi->CR0 = SSP_CR0_SCR_DFLT | SSP_CR0_FRF_MOT | SSP_CR0_DSS_8;
demayer 0:6bf0743ece18 84 obj->spi->CPSR = SSP_CPSR_DFLT;
demayer 0:6bf0743ece18 85 obj->spi->IMSC = 0x8;
demayer 0:6bf0743ece18 86 obj->spi->DMACR = 0;
demayer 0:6bf0743ece18 87 obj->spi->CR1 = SSP_CR1_SSE_Msk;
demayer 0:6bf0743ece18 88 obj->spi->ICR = 0x3;
demayer 0:6bf0743ece18 89 break;
demayer 0:6bf0743ece18 90 case (int)SPI_1:
demayer 0:6bf0743ece18 91 /* Configure SSP used for LCD */
demayer 0:6bf0743ece18 92 obj->spi->CR1 = 0; /* Synchronous serial port disable */
demayer 0:6bf0743ece18 93 obj->spi->DMACR = 0; /* Disable FIFO DMA */
demayer 0:6bf0743ece18 94 obj->spi->IMSC = 0; /* Mask all FIFO/IRQ interrupts */
demayer 0:6bf0743ece18 95 obj->spi->ICR = ((1ul << 0) | /* Clear SSPRORINTR interrupt */
demayer 0:6bf0743ece18 96 (1ul << 1) ); /* Clear SSPRTINTR interrupt */
demayer 0:6bf0743ece18 97 obj->spi->CR0 = ((7ul << 0) | /* 8 bit data size */
demayer 0:6bf0743ece18 98 (0ul << 4) | /* Motorola frame format */
demayer 0:6bf0743ece18 99 (0ul << 6) | /* CPOL = 0 */
demayer 0:6bf0743ece18 100 (0ul << 7) | /* CPHA = 0 */
demayer 0:6bf0743ece18 101 (1ul << 8) ); /* Set serial clock rate */
demayer 0:6bf0743ece18 102 obj->spi->CPSR = (2ul << 0); /* set SSP clk to 6MHz (6.6MHz max) */
demayer 0:6bf0743ece18 103 obj->spi->CR1 = ((1ul << 1) | /* Synchronous serial port enable */
demayer 0:6bf0743ece18 104 (0ul << 2) ); /* Device configured as master */
demayer 0:6bf0743ece18 105 break;
demayer 0:6bf0743ece18 106 case (int)SPI_2:
demayer 0:6bf0743ece18 107 obj->spi->CR1 = 0;
demayer 0:6bf0743ece18 108 obj->spi->CR0 = SSP_CR0_SCR_DFLT | SSP_CR0_FRF_MOT | SSP_CR0_DSS_8;
demayer 0:6bf0743ece18 109 obj->spi->CPSR = SSP_CPSR_DFLT;
demayer 0:6bf0743ece18 110 obj->spi->IMSC = 0x8;
demayer 0:6bf0743ece18 111 obj->spi->DMACR = 0;
demayer 0:6bf0743ece18 112 obj->spi->CR1 = SSP_CR1_SSE_Msk;
demayer 0:6bf0743ece18 113 obj->spi->ICR = 0x3;
demayer 0:6bf0743ece18 114 break;
demayer 0:6bf0743ece18 115 case (int)SPI_3:
demayer 0:6bf0743ece18 116 obj->spi->CR1 = 0;
demayer 0:6bf0743ece18 117 obj->spi->CR0 = SSP_CR0_SCR_DFLT | SSP_CR0_FRF_MOT | SSP_CR0_DSS_8;
demayer 0:6bf0743ece18 118 obj->spi->CPSR = SSP_CPSR_DFLT;
demayer 0:6bf0743ece18 119 obj->spi->IMSC = 0x8;
demayer 0:6bf0743ece18 120 obj->spi->DMACR = 0;
demayer 0:6bf0743ece18 121 obj->spi->CR1 = SSP_CR1_SSE_Msk;
demayer 0:6bf0743ece18 122 obj->spi->ICR = 0x3;
demayer 0:6bf0743ece18 123 break;
demayer 0:6bf0743ece18 124 case (int)SPI_4:
demayer 0:6bf0743ece18 125 obj->spi->CR1 = 0;
demayer 0:6bf0743ece18 126 obj->spi->CR0 = SSP_CR0_SCR_DFLT | SSP_CR0_FRF_MOT | SSP_CR0_DSS_8;
demayer 0:6bf0743ece18 127 obj->spi->CPSR = SSP_CPSR_DFLT;
demayer 0:6bf0743ece18 128 obj->spi->IMSC = 0x8;
demayer 0:6bf0743ece18 129 obj->spi->DMACR = 0;
demayer 0:6bf0743ece18 130 obj->spi->CR1 = SSP_CR1_SSE_Msk;
demayer 0:6bf0743ece18 131 obj->spi->ICR = 0x3;
demayer 0:6bf0743ece18 132 break;
demayer 0:6bf0743ece18 133 }
demayer 0:6bf0743ece18 134
demayer 0:6bf0743ece18 135 if(mosi != NC){ altfunction[0] = 1;}else{ altfunction[0] = 0;}
demayer 0:6bf0743ece18 136 if(miso != NC){ altfunction[1] = 1;}else{ altfunction[1] = 0;}
demayer 0:6bf0743ece18 137 if(sclk != NC){ altfunction[2] = 1;}else{ altfunction[2] = 0;}
demayer 0:6bf0743ece18 138 if(ssel != NC){ altfunction[3] = 1;}else{ altfunction[3] = 0;}
demayer 0:6bf0743ece18 139
demayer 0:6bf0743ece18 140 // enable alt function
demayer 0:6bf0743ece18 141 switch ((int)obj->spi) {
demayer 0:6bf0743ece18 142 case (int)SPI_2:
demayer 0:6bf0743ece18 143 CMSDK_GPIO1->ALTFUNCSET |= (altfunction[2]<<5 | altfunction[0]<<4 | altfunction[1]<<3 | altfunction[3]<<2);
demayer 0:6bf0743ece18 144 break;
demayer 0:6bf0743ece18 145 case (int)SPI_3:
demayer 0:6bf0743ece18 146 CMSDK_GPIO0->ALTFUNCSET |= (altfunction[2]<<13 | altfunction[1]<<12 | altfunction[0]<<11 | altfunction[3]<<10);
demayer 0:6bf0743ece18 147 break;
demayer 0:6bf0743ece18 148 case (int)SPI_4:
demayer 0:6bf0743ece18 149 CMSDK_GPIO4->ALTFUNCSET |= (altfunction[2]<<3 | altfunction[1]<<2 | altfunction[0]<<1 | altfunction[3]);
demayer 0:6bf0743ece18 150 break;
demayer 0:6bf0743ece18 151 }
demayer 0:6bf0743ece18 152
demayer 0:6bf0743ece18 153 // set default format and frequency
demayer 0:6bf0743ece18 154 if (ssel == NC) {
demayer 0:6bf0743ece18 155 spi_format(obj, 8, 0, 0); // 8 bits, mode 0, master
demayer 0:6bf0743ece18 156 } else {
demayer 0:6bf0743ece18 157 spi_format(obj, 8, 0, 1); // 8 bits, mode 0, slave
demayer 0:6bf0743ece18 158 }
demayer 0:6bf0743ece18 159 spi_frequency(obj, 1000000);
demayer 0:6bf0743ece18 160
demayer 0:6bf0743ece18 161 // enable the ssp channel
demayer 0:6bf0743ece18 162 ssp_enable(obj);
demayer 0:6bf0743ece18 163
demayer 0:6bf0743ece18 164 // pin out the spi pins
demayer 0:6bf0743ece18 165 pinmap_pinout(mosi, PinMap_SPI_MOSI);
demayer 0:6bf0743ece18 166 pinmap_pinout(miso, PinMap_SPI_MISO);
demayer 0:6bf0743ece18 167 pinmap_pinout(sclk, PinMap_SPI_SCLK);
demayer 0:6bf0743ece18 168 if (ssel != NC) {
demayer 0:6bf0743ece18 169 pinmap_pinout(ssel, PinMap_SPI_SSEL);
demayer 0:6bf0743ece18 170 }
demayer 0:6bf0743ece18 171 }
demayer 0:6bf0743ece18 172
demayer 0:6bf0743ece18 173 void spi_free(spi_t *obj) {}
demayer 0:6bf0743ece18 174
demayer 0:6bf0743ece18 175 void spi_format(spi_t *obj, int bits, int mode, int slave) {
demayer 0:6bf0743ece18 176 ssp_disable(obj);
demayer 0:6bf0743ece18 177 if (!(bits >= 4 && bits <= 16) || !(mode >= 0 && mode <= 3)) {
demayer 0:6bf0743ece18 178 error("SPI format error");
demayer 0:6bf0743ece18 179 }
demayer 0:6bf0743ece18 180
demayer 0:6bf0743ece18 181 int polarity = (mode & 0x2) ? 1 : 0;
demayer 0:6bf0743ece18 182 int phase = (mode & 0x1) ? 1 : 0;
demayer 0:6bf0743ece18 183
demayer 0:6bf0743ece18 184 // set it up
demayer 0:6bf0743ece18 185 int DSS = bits - 1; // DSS (data select size)
demayer 0:6bf0743ece18 186 int SPO = (polarity) ? 1 : 0; // SPO - clock out polarity
demayer 0:6bf0743ece18 187 int SPH = (phase) ? 1 : 0; // SPH - clock out phase
demayer 0:6bf0743ece18 188
demayer 0:6bf0743ece18 189 int FRF = 0; // FRF (frame format) = SPI
demayer 0:6bf0743ece18 190 uint32_t tmp = obj->spi->CR0;
demayer 0:6bf0743ece18 191 tmp &= ~(0xFFFF);
demayer 0:6bf0743ece18 192 tmp |= DSS << 0
demayer 0:6bf0743ece18 193 | FRF << 4
demayer 0:6bf0743ece18 194 | SPO << 6
demayer 0:6bf0743ece18 195 | SPH << 7;
demayer 0:6bf0743ece18 196 obj->spi->CR0 = tmp;
demayer 0:6bf0743ece18 197
demayer 0:6bf0743ece18 198 tmp = obj->spi->CR1;
demayer 0:6bf0743ece18 199 tmp &= ~(0xD);
demayer 0:6bf0743ece18 200 tmp |= 0 << 0 // LBM - loop back mode - off
demayer 0:6bf0743ece18 201 | ((slave) ? 1 : 0) << 2 // MS - master slave mode, 1 = slave
demayer 0:6bf0743ece18 202 | 0 << 3; // SOD - slave output disable - na
demayer 0:6bf0743ece18 203 obj->spi->CR1 = tmp;
demayer 0:6bf0743ece18 204
demayer 0:6bf0743ece18 205 ssp_enable(obj);
demayer 0:6bf0743ece18 206 }
demayer 0:6bf0743ece18 207
demayer 0:6bf0743ece18 208 void spi_frequency(spi_t *obj, int hz) {
demayer 0:6bf0743ece18 209 ssp_disable(obj);
demayer 0:6bf0743ece18 210
demayer 0:6bf0743ece18 211 uint32_t PCLK = SystemCoreClock;
demayer 0:6bf0743ece18 212
demayer 0:6bf0743ece18 213 int prescaler;
demayer 0:6bf0743ece18 214
demayer 0:6bf0743ece18 215 for (prescaler = 2; prescaler <= 254; prescaler += 2) {
demayer 0:6bf0743ece18 216 int prescale_hz = PCLK / prescaler;
demayer 0:6bf0743ece18 217
demayer 0:6bf0743ece18 218 // calculate the divider
demayer 0:6bf0743ece18 219 int divider = floor(((float)prescale_hz / (float)hz) + 0.5f);
demayer 0:6bf0743ece18 220
demayer 0:6bf0743ece18 221 // check we can support the divider
demayer 0:6bf0743ece18 222 if (divider < 256) {
demayer 0:6bf0743ece18 223 // prescaler
demayer 0:6bf0743ece18 224 obj->spi->CPSR = prescaler;
demayer 0:6bf0743ece18 225
demayer 0:6bf0743ece18 226 // divider
demayer 0:6bf0743ece18 227 obj->spi->CR0 &= ~(0xFFFF << 8);
demayer 0:6bf0743ece18 228 obj->spi->CR0 |= (divider - 1) << 8;
demayer 0:6bf0743ece18 229 ssp_enable(obj);
demayer 0:6bf0743ece18 230 return;
demayer 0:6bf0743ece18 231 }
demayer 0:6bf0743ece18 232 }
demayer 0:6bf0743ece18 233 error("Couldn't setup requested SPI frequency");
demayer 0:6bf0743ece18 234 }
demayer 0:6bf0743ece18 235
demayer 0:6bf0743ece18 236 static inline int ssp_disable(spi_t *obj) {
demayer 0:6bf0743ece18 237 return obj->spi->CR1 &= ~(1 << 1);
demayer 0:6bf0743ece18 238 }
demayer 0:6bf0743ece18 239
demayer 0:6bf0743ece18 240 static inline int ssp_enable(spi_t *obj) {
demayer 0:6bf0743ece18 241 return obj->spi->CR1 |= SSP_CR1_SSE_Msk;
demayer 0:6bf0743ece18 242 }
demayer 0:6bf0743ece18 243
demayer 0:6bf0743ece18 244 static inline int ssp_readable(spi_t *obj) {
demayer 0:6bf0743ece18 245 return obj->spi->SR & (1 << 2);
demayer 0:6bf0743ece18 246 }
demayer 0:6bf0743ece18 247
demayer 0:6bf0743ece18 248 static inline int ssp_writeable(spi_t *obj) {
demayer 0:6bf0743ece18 249 return obj->spi->SR & SSP_SR_BSY_Msk;
demayer 0:6bf0743ece18 250 }
demayer 0:6bf0743ece18 251
demayer 0:6bf0743ece18 252 static inline void ssp_write(spi_t *obj, int value) {
demayer 0:6bf0743ece18 253 obj->spi->DR = value;
demayer 0:6bf0743ece18 254 while (ssp_writeable(obj));
demayer 0:6bf0743ece18 255 }
demayer 0:6bf0743ece18 256 static inline int ssp_read(spi_t *obj) {
demayer 0:6bf0743ece18 257 int read_DR = obj->spi->DR;
demayer 0:6bf0743ece18 258 return read_DR;
demayer 0:6bf0743ece18 259 }
demayer 0:6bf0743ece18 260
demayer 0:6bf0743ece18 261 static inline int ssp_busy(spi_t *obj) {
demayer 0:6bf0743ece18 262 return (obj->spi->SR & (1 << 4)) ? (1) : (0);
demayer 0:6bf0743ece18 263 }
demayer 0:6bf0743ece18 264
demayer 0:6bf0743ece18 265 int spi_master_write(spi_t *obj, int value) {
demayer 0:6bf0743ece18 266 ssp_write(obj, value);
demayer 0:6bf0743ece18 267 while (obj->spi->SR & SSP_SR_BSY_Msk); /* Wait for send to finish */
demayer 0:6bf0743ece18 268 return (ssp_read(obj));
demayer 0:6bf0743ece18 269 }
demayer 0:6bf0743ece18 270
demayer 0:6bf0743ece18 271 int spi_master_block_write(spi_t *obj, const char *tx_buffer, int tx_length,
demayer 0:6bf0743ece18 272 char *rx_buffer, int rx_length, char write_fill) {
demayer 0:6bf0743ece18 273 int total = (tx_length > rx_length) ? tx_length : rx_length;
demayer 0:6bf0743ece18 274
demayer 0:6bf0743ece18 275 for (int i = 0; i < total; i++) {
demayer 0:6bf0743ece18 276 char out = (i < tx_length) ? tx_buffer[i] : write_fill;
demayer 0:6bf0743ece18 277 char in = spi_master_write(obj, out);
demayer 0:6bf0743ece18 278 if (i < rx_length) {
demayer 0:6bf0743ece18 279 rx_buffer[i] = in;
demayer 0:6bf0743ece18 280 }
demayer 0:6bf0743ece18 281 }
demayer 0:6bf0743ece18 282
demayer 0:6bf0743ece18 283 return total;
demayer 0:6bf0743ece18 284 }
demayer 0:6bf0743ece18 285
demayer 0:6bf0743ece18 286 int spi_slave_receive(spi_t *obj) {
demayer 0:6bf0743ece18 287 return (ssp_readable(obj) && !ssp_busy(obj)) ? (1) : (0);
demayer 0:6bf0743ece18 288 }
demayer 0:6bf0743ece18 289
demayer 0:6bf0743ece18 290 int spi_slave_read(spi_t *obj) {
demayer 0:6bf0743ece18 291 return obj->spi->DR;
demayer 0:6bf0743ece18 292 }
demayer 0:6bf0743ece18 293
demayer 0:6bf0743ece18 294 void spi_slave_write(spi_t *obj, int value) {
demayer 0:6bf0743ece18 295 while (ssp_writeable(obj) == 0) ;
demayer 0:6bf0743ece18 296 obj->spi->DR = value;
demayer 0:6bf0743ece18 297 }
demayer 0:6bf0743ece18 298
demayer 0:6bf0743ece18 299 int spi_busy(spi_t *obj) {
demayer 0:6bf0743ece18 300 return ssp_busy(obj);
demayer 0:6bf0743ece18 301 }