NXP
/
fsl_phy_mcr20a
Important changes to repositories hosted on mbed.com
Mbed hosted mercurial repositories are deprecated and are due to be permanently deleted in July 2026.
To keep a copy of this software download the repository Zip archive or clone locally using Mercurial.
It is also possible to export all your personal repositories from the account settings page.
Fork of
fsl_phy_mcr20a
by 
Freescale
Embed:
(wiki syntax)
Show/hide line numbers
MCR20Overwrites.h
Go to the documentation of this file.
00001 /*! 00002 * Copyright (c) 2015, Freescale Semiconductor, Inc. 00003 * All rights reserved. 00004 * 00005 * \file MCR20Overwrites.h 00006 * Description: Overwrites header file for MCR20 Register values 00007 * 00008 * Redistribution and use in source and binary forms, with or without modification, 00009 * are permitted provided that the following conditions are met: 00010 * 00011 * o Redistributions of source code must retain the above copyright notice, this list 00012 * of conditions and the following disclaimer. 00013 * 00014 * o Redistributions in binary form must reproduce the above copyright notice, this 00015 * list of conditions and the following disclaimer in the documentation and/or 00016 * other materials provided with the distribution. 00017 * 00018 * o Neither the name of Freescale Semiconductor, Inc. nor the names of its 00019 * contributors may be used to endorse or promote products derived from this 00020 * software without specific prior written permission. 00021 * 00022 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND 00023 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED 00024 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 00025 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR 00026 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 00027 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 00028 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON 00029 * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 00030 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS 00031 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 00032 */ 00033 00034 #ifndef OVERWRITES_H_ 00035 #define OVERWRITES_H_ 00036 00037 typedef struct overwrites_tag { 00038 char address; 00039 char data; 00040 }overwrites_t; 00041 00042 00043 /*****************************************************************************************************************/ 00044 // This file is created exclusively for use with the transceiver 2.0 silicon 00045 // and is provided for the world to use. It contains a list of all 00046 // known overwrite values. Overwrite values are non-default register 00047 // values that configure the transceiver device to a more optimally performing 00048 // posture. It is expected that low level software (i.e. PHY) will 00049 // consume this file as a #include, and transfer the contents to the 00050 // the indicated addresses in the transceiver's memory space. This file has 00051 // at least one required entry, that being its own version current version 00052 // number, to be stored at transceiver's location 0x3B the 00053 // OVERWRITES_VERSION_NUMBER register. The RAM register is provided in 00054 // the transceiver address space to assist in future debug efforts. The 00055 // analyst may read this location (once device has been booted with 00056 // mysterious software) and have a good indication of what register 00057 // overwrites were performed (with all versions of the overwrites.h file 00058 // being archived forever at the Compass location shown above. 00059 // 00060 // The transceiver has an indirect register (IAR) space. Write access to this space 00061 // requires 3 or more writes: 00062 // 1st) the first write is an index value to the indirect (write Bit7=0, register access Bit 6=0) + 0x3E 00063 // 2nd) IAR Register #0x00 - 0xFF. 00064 // 3rd) The data to write 00065 // nth) Burst mode additional data if required. 00066 // 00067 // Write access to direct space requires only a single address, data pair. 00068 00069 overwrites_t const overwrites_direct[] ={ 00070 {0x3B, 0x0C}, //version 0C: new value for ACKDELAY targeting 198us (23 May, 2013, Larry Roshak) 00071 {0x23, 0x17} //PA_PWR new default Power Step is "23" 00072 }; 00073 00074 overwrites_t const overwrites_indirect[] ={ 00075 {0x31, 0x02}, //clear MISO_HIZ_EN (for single SPI master/slave pair) and SPI_PUL_EN (minimize HIB currents) 00076 {0x91, 0xB3}, //VCO_CTRL1 override VCOALC_REF_TX to 3 00077 {0x92, 0x07}, //VCO_CTRL2 override VCOALC_REF_RX to 3, keep VCO_BUF_BOOST = 1 00078 {0x8A, 0x71}, //PA_TUNING override PA_COILTUNING to 001 (27 Nov 2012, D. Brown, on behalf of S. Eid) 00079 {0x79, 0x2F}, //CHF_IBUF Adjust the gm-C filter gain (+/- 6dB) (21 Dec, 2012, on behalf of S. Soca) 00080 {0x7A, 0x2F}, //CHF_QBUF Adjust the gm-C filter gain (+/- 6dB) (21 Dec, 2012, on behalf of S. Soca) 00081 {0x7B, 0x24}, //CHF_IRIN Adjust the filter bandwidth (+/- 0.5MHz) (21 Dec, 2012, on behalf of S. Soca) 00082 {0x7C, 0x24}, //CHF_QRIN Adjust the filter bandwidth (+/- 0.5MHz) (21 Dec, 2012, on behalf of S. Soca) 00083 {0x7D, 0x24}, //CHF_IL Adjust the filter bandwidth (+/- 0.5MHz) (21 Dec, 2012, on behalf of S. Soca) 00084 {0x7E, 0x24}, //CHF_QL Adjust the filter bandwidth (+/- 0.5MHz) (21 Dec, 2012, on behalf of S. Soca) 00085 {0x7F, 0x32}, //CHF_CC1 Adjust the filter center frequency (+/- 1MHz) (21 Dec, 2012, on behalf of S. Soca) 00086 {0x80, 0x1D}, //CHF_CCL Adjust the filter center frequency (+/- 1MHz) (21 Dec, 2012, on behalf of S. Soca) 00087 {0x81, 0x2D}, //CHF_CC2 Adjust the filter center frequency (+/- 1MHz) (21 Dec, 2012, on behalf of S. Soca) 00088 {0x82, 0x24}, //CHF_IROUT Adjust the filter bandwidth (+/- 0.5MHz) (21 Dec, 2012, on behalf of S. Soca) 00089 {0x83, 0x24}, //CHF_QROUT Adjust the filter bandwidth (+/- 0.5MHz) (21 Dec, 2012, on behalf of S. Soca) 00090 {0x64, 0x28}, //PA_CAL_DIS=1 Disabled PA calibration 00091 {0x52, 0x55}, //AGC_THR1 RSSI tune up 00092 {0x53, 0x2D}, //AGC_THR2 RSSI tune up 00093 {0x66, 0x5F}, //ATT_RSSI1 tune up 00094 {0x67, 0x8F}, //ATT_RSSI2 tune up 00095 {0x68, 0x61}, //RSSI_OFFSET 00096 {0x78, 0x03}, //CHF_PMAGAIN 00097 {0x22, 0x50}, //CCA1_THRESH 00098 {0x4D, 0x13}, //CORR_NVAL moved from 0x14 to 0x13 for 0.5 dB improved Rx Sensitivity 00099 {0x39, 0x3D} //ACKDELAY new value targeting a delay of 198us (23 May, 2013, Larry Roshak) 00100 }; 00101 00102 00103 /* begin of deprecated versions 00104 00105 ==VERSION 1== 00106 (version 1 is empty) 00107 00108 ==VERSION 2== 00109 overwrites_t const overwrites_indirect[] ={ 00110 {0x31, 0x02} //clear MISO_HIZ_EN (for single SPI master/slave pair) and SPI_PUL_EN (minimize HIB currents) 00111 }; 00112 00113 ==VERSION 3== 00114 overwrites_t const overwrites_indirect[] ={ 00115 {0x31, 0x02}, //clear MISO_HIZ_EN (for single SPI master/slave pair) and SPI_PUL_EN (minimize HIB currents) 00116 {0x91, 0xB3}, //VCO_CTRL1: override VCOALC_REF_TX to 3 00117 {0x92, 0x07} //VCO_CTRL2: override VCOALC_REF_RX to 3, keep VCO_BUF_BOOST = 1 00118 }; 00119 00120 ==VERSION 4== 00121 overwrites_t const overwrites_direct[] ={ 00122 {0x3B, 0x04} //version 04 is the current version: update PA_COILTUNING default 00123 }; 00124 00125 overwrites_t const overwrites_indirect[] ={ 00126 {0x31, 0x02}, //clear MISO_HIZ_EN (for single SPI master/slave pair) and SPI_PUL_EN (minimize HIB currents) 00127 {0x91, 0xB3}, //VCO_CTRL1: override VCOALC_REF_TX to 3 00128 {0x92, 0x07} //VCO_CTRL2: override VCOALC_REF_RX to 3, keep VCO_BUF_BOOST = 1 00129 {0x8A, 0x71} //PA_TUNING: override PA_COILTUNING to 001 (27 Nov 2012, D. Brown, on behalf of S. Eid) 00130 }; 00131 00132 ==VERSION 5== 00133 overwrites_t const overwrites_direct[] ={ 00134 {0x3B, 0x05} //version 05: updates Channel Filter Register set (21 Dec 2012, on behalf of S. Soca) 00135 }; 00136 00137 overwrites_t const overwrites_indirect[] ={ 00138 {0x31, 0x02}, //clear MISO_HIZ_EN (for single SPI master/slave pair) and SPI_PUL_EN (minimize HIB currents) 00139 {0x91, 0xB3}, //VCO_CTRL1 override VCOALC_REF_TX to 3 00140 {0x92, 0x07} //VCO_CTRL2 override VCOALC_REF_RX to 3, keep VCO_BUF_BOOST = 1 00141 {0x8A, 0x71} //PA_TUNING override PA_COILTUNING to 001 (27 Nov 2012, D. Brown, on behalf of S. Eid) 00142 {0x79, 0x2F} //CHF_IBUF Adjust the gm-C filter gain (+/- 6dB) (21 Dec, 2012, on behalf of S. Soca) 00143 {0x7A, 0x2F} //CHF_QBUF Adjust the gm-C filter gain (+/- 6dB) (21 Dec, 2012, on behalf of S. Soca) 00144 {0x7B, 0x24} //CHF_IRIN Adjust the filter bandwidth (+/- 0.5MHz) (21 Dec, 2012, on behalf of S. Soca) 00145 {0x7C, 0x24} //CHF_QRIN Adjust the filter bandwidth (+/- 0.5MHz) (21 Dec, 2012, on behalf of S. Soca) 00146 {0x7D, 0x24} //CHF_IL Adjust the filter bandwidth (+/- 0.5MHz) (21 Dec, 2012, on behalf of S. Soca) 00147 {0x7E, 0x24} //CHF_QL Adjust the filter bandwidth (+/- 0.5MHz) (21 Dec, 2012, on behalf of S. Soca) 00148 {0x82, 0x24} //CHF_IROUT Adjust the filter bandwidth (+/- 0.5MHz) (21 Dec, 2012, on behalf of S. Soca) 00149 {0x83, 0x24} //CHF_QROUT Adjust the filter bandwidth (+/- 0.5MHz) (21 Dec, 2012, on behalf of S. Soca) 00150 {0x7F, 0x32} //CHF_CC1 Adjust the filter center frequency (+/- 1MHz) (21 Dec, 2012, on behalf of S. Soca) 00151 {0x80, 0x1D} //CHF_CCL Adjust the filter center frequency (+/- 1MHz) (21 Dec, 2012, on behalf of S. Soca) 00152 {0x81, 0x2D} //CHF_CC2 Adjust the filter center frequency (+/- 1MHz) (21 Dec, 2012, on behalf of S. Soca) 00153 }; 00154 00155 ==VERSION 6== 00156 overwrites_t const overwrites_direct[] ={ 00157 {0x3B, 0x06} //version 06: disable PA calibration 00158 }; 00159 00160 overwrites_t const overwrites_indirect[] ={ 00161 {0x31, 0x02}, //clear MISO_HIZ_EN (for single SPI master/slave pair) and SPI_PUL_EN (minimize HIB currents) 00162 {0x91, 0xB3}, //VCO_CTRL1 override VCOALC_REF_TX to 3 00163 {0x92, 0x07} //VCO_CTRL2 override VCOALC_REF_RX to 3, keep VCO_BUF_BOOST = 1 00164 {0x8A, 0x71} //PA_TUNING override PA_COILTUNING to 001 (27 Nov 2012, D. Brown, on behalf of S. Eid) 00165 {0x79, 0x2F} //CHF_IBUF Adjust the gm-C filter gain (+/- 6dB) (21 Dec, 2012, on behalf of S. Soca) 00166 {0x7A, 0x2F} //CHF_QBUF Adjust the gm-C filter gain (+/- 6dB) (21 Dec, 2012, on behalf of S. Soca) 00167 {0x7B, 0x24} //CHF_IRIN Adjust the filter bandwidth (+/- 0.5MHz) (21 Dec, 2012, on behalf of S. Soca) 00168 {0x7C, 0x24} //CHF_QRIN Adjust the filter bandwidth (+/- 0.5MHz) (21 Dec, 2012, on behalf of S. Soca) 00169 {0x7D, 0x24} //CHF_IL Adjust the filter bandwidth (+/- 0.5MHz) (21 Dec, 2012, on behalf of S. Soca) 00170 {0x7E, 0x24} //CHF_QL Adjust the filter bandwidth (+/- 0.5MHz) (21 Dec, 2012, on behalf of S. Soca) 00171 {0x82, 0x24} //CHF_IROUT Adjust the filter bandwidth (+/- 0.5MHz) (21 Dec, 2012, on behalf of S. Soca) 00172 {0x83, 0x24} //CHF_QROUT Adjust the filter bandwidth (+/- 0.5MHz) (21 Dec, 2012, on behalf of S. Soca) 00173 {0x7F, 0x32} //CHF_CC1 Adjust the filter center frequency (+/- 1MHz) (21 Dec, 2012, on behalf of S. Soca) 00174 {0x80, 0x1D} //CHF_CCL Adjust the filter center frequency (+/- 1MHz) (21 Dec, 2012, on behalf of S. Soca) 00175 {0x81, 0x2D} //CHF_CC2 Adjust the filter center frequency (+/- 1MHz) (21 Dec, 2012, on behalf of S. Soca) 00176 {0x64, 0x28} //PA_CAL_DIS=1 Disabled PA calibration 00177 }; 00178 00179 ==VERSION 7== 00180 overwrites_t const overwrites_direct[] ={ 00181 {0x3B, 0x07} //version 07: updated registers for ED/RSSI 00182 }; 00183 00184 overwrites_t const overwrites_indirect[] ={ 00185 {0x31, 0x02}, //clear MISO_HIZ_EN (for single SPI master/slave pair) and SPI_PUL_EN (minimize HIB currents) 00186 {0x91, 0xB3}, //VCO_CTRL1 override VCOALC_REF_TX to 3 00187 {0x92, 0x07}, //VCO_CTRL2 override VCOALC_REF_RX to 3, keep VCO_BUF_BOOST = 1 00188 {0x8A, 0x71}, //PA_TUNING override PA_COILTUNING to 001 (27 Nov 2012, D. Brown, on behalf of S. Eid) 00189 {0x79, 0x2F}, //CHF_IBUF Adjust the gm-C filter gain (+/- 6dB) (21 Dec, 2012, on behalf of S. Soca) 00190 {0x7A, 0x2F}, //CHF_QBUF Adjust the gm-C filter gain (+/- 6dB) (21 Dec, 2012, on behalf of S. Soca) 00191 {0x7B, 0x24}, //CHF_IRIN Adjust the filter bandwidth (+/- 0.5MHz) (21 Dec, 2012, on behalf of S. Soca) 00192 {0x7C, 0x24}, //CHF_QRIN Adjust the filter bandwidth (+/- 0.5MHz) (21 Dec, 2012, on behalf of S. Soca) 00193 {0x7D, 0x24}, //CHF_IL Adjust the filter bandwidth (+/- 0.5MHz) (21 Dec, 2012, on behalf of S. Soca) 00194 {0x7E, 0x24}, //CHF_QL Adjust the filter bandwidth (+/- 0.5MHz) (21 Dec, 2012, on behalf of S. Soca) 00195 {0x82, 0x24}, //CHF_IROUT Adjust the filter bandwidth (+/- 0.5MHz) (21 Dec, 2012, on behalf of S. Soca) 00196 {0x83, 0x24}, //CHF_QROUT Adjust the filter bandwidth (+/- 0.5MHz) (21 Dec, 2012, on behalf of S. Soca) 00197 {0x7F, 0x32}, //CHF_CC1 Adjust the filter center frequency (+/- 1MHz) (21 Dec, 2012, on behalf of S. Soca) 00198 {0x80, 0x1D}, //CHF_CCL Adjust the filter center frequency (+/- 1MHz) (21 Dec, 2012, on behalf of S. Soca) 00199 {0x81, 0x2D}, //CHF_CC2 Adjust the filter center frequency (+/- 1MHz) (21 Dec, 2012, on behalf of S. Soca) 00200 {0x64, 0x28}, //PA_CAL_DIS=1 Disabled PA calibration 00201 {0x52, 0x73}, //AGC_THR1 RSSI tune up 00202 {0x53, 0x2D}, //AGC_THR2 RSSI tune up 00203 {0x66, 0x5F}, //ATT_RSSI1 tune up 00204 {0x67, 0x8F}, //ATT_RSSI2 tune up 00205 {0x68, 0x60}, //RSSI_OFFSET 00206 {0x69, 0x65} //RSSI_SLOPE 00207 }; 00208 00209 00210 ==VERSION 8== 00211 overwrites_t const overwrites_direct[] ={ 00212 {0x3B, 0x08} //version 08: updated registers for ED/RSSI 00213 }; 00214 00215 overwrites_t const overwrites_indirect[] ={ 00216 {0x31, 0x02}, //clear MISO_HIZ_EN (for single SPI master/slave pair) and SPI_PUL_EN (minimize HIB currents) 00217 {0x91, 0xB3}, //VCO_CTRL1 override VCOALC_REF_TX to 3 00218 {0x92, 0x07}, //VCO_CTRL2 override VCOALC_REF_RX to 3, keep VCO_BUF_BOOST = 1 00219 {0x8A, 0x71}, //PA_TUNING override PA_COILTUNING to 001 (27 Nov 2012, D. Brown, on behalf of S. Eid) 00220 {0x79, 0x2F}, //CHF_IBUF Adjust the gm-C filter gain (+/- 6dB) (21 Dec, 2012, on behalf of S. Soca) 00221 {0x7A, 0x2F}, //CHF_QBUF Adjust the gm-C filter gain (+/- 6dB) (21 Dec, 2012, on behalf of S. Soca) 00222 {0x7B, 0x24}, //CHF_IRIN Adjust the filter bandwidth (+/- 0.5MHz) (21 Dec, 2012, on behalf of S. Soca) 00223 {0x7C, 0x24}, //CHF_QRIN Adjust the filter bandwidth (+/- 0.5MHz) (21 Dec, 2012, on behalf of S. Soca) 00224 {0x7D, 0x24}, //CHF_IL Adjust the filter bandwidth (+/- 0.5MHz) (21 Dec, 2012, on behalf of S. Soca) 00225 {0x7E, 0x24}, //CHF_QL Adjust the filter bandwidth (+/- 0.5MHz) (21 Dec, 2012, on behalf of S. Soca) 00226 {0x82, 0x24}, //CHF_IROUT Adjust the filter bandwidth (+/- 0.5MHz) (21 Dec, 2012, on behalf of S. Soca) 00227 {0x83, 0x24}, //CHF_QROUT Adjust the filter bandwidth (+/- 0.5MHz) (21 Dec, 2012, on behalf of S. Soca) 00228 {0x7F, 0x32}, //CHF_CC1 Adjust the filter center frequency (+/- 1MHz) (21 Dec, 2012, on behalf of S. Soca) 00229 {0x80, 0x1D}, //CHF_CCL Adjust the filter center frequency (+/- 1MHz) (21 Dec, 2012, on behalf of S. Soca) 00230 {0x81, 0x2D}, //CHF_CC2 Adjust the filter center frequency (+/- 1MHz) (21 Dec, 2012, on behalf of S. Soca) 00231 {0x64, 0x28}, //PA_CAL_DIS=1 Disabled PA calibration 00232 {0x52, 0x73}, //AGC_THR1 RSSI tune up 00233 {0x53, 0x2D}, //AGC_THR2 RSSI tune up 00234 {0x66, 0x5F}, //ATT_RSSI1 tune up 00235 {0x67, 0x8F}, //ATT_RSSI2 tune up 00236 {0x69, 0x65} //RSSI_SLOPE 00237 {0x68, 0x61}, //RSSI_OFFSET 00238 {0x78, 0x03} //CHF_PMAGAIN 00239 }; 00240 00241 00242 ==VERSION 9== 00243 overwrites_t const overwrites_direct[] ={ 00244 {0x3B, 0x09} //version 09: updated registers for ED/RSSI and PowerStep 00245 {0x23, 0x17} //PA_PWR new default value 00246 }; 00247 00248 overwrites_t const overwrites_indirect[] ={ 00249 {0x31, 0x02}, //clear MISO_HIZ_EN (for single SPI master/slave pair) and SPI_PUL_EN (minimize HIB currents) 00250 {0x91, 0xB3}, //VCO_CTRL1 override VCOALC_REF_TX to 3 00251 {0x92, 0x07}, //VCO_CTRL2 override VCOALC_REF_RX to 3, keep VCO_BUF_BOOST = 1 00252 {0x8A, 0x71}, //PA_TUNING override PA_COILTUNING to 001 (27 Nov 2012, D. Brown, on behalf of S. Eid) 00253 {0x79, 0x2F}, //CHF_IBUF Adjust the gm-C filter gain (+/- 6dB) (21 Dec, 2012, on behalf of S. Soca) 00254 {0x7A, 0x2F}, //CHF_QBUF Adjust the gm-C filter gain (+/- 6dB) (21 Dec, 2012, on behalf of S. Soca) 00255 {0x7B, 0x24}, //CHF_IRIN Adjust the filter bandwidth (+/- 0.5MHz) (21 Dec, 2012, on behalf of S. Soca) 00256 {0x7C, 0x24}, //CHF_QRIN Adjust the filter bandwidth (+/- 0.5MHz) (21 Dec, 2012, on behalf of S. Soca) 00257 {0x7D, 0x24}, //CHF_IL Adjust the filter bandwidth (+/- 0.5MHz) (21 Dec, 2012, on behalf of S. Soca) 00258 {0x7E, 0x24}, //CHF_QL Adjust the filter bandwidth (+/- 0.5MHz) (21 Dec, 2012, on behalf of S. Soca) 00259 {0x7F, 0x32}, //CHF_CC1 Adjust the filter center frequency (+/- 1MHz) (21 Dec, 2012, on behalf of S. Soca) 00260 {0x80, 0x1D}, //CHF_CCL Adjust the filter center frequency (+/- 1MHz) (21 Dec, 2012, on behalf of S. Soca) 00261 {0x81, 0x2D}, //CHF_CC2 Adjust the filter center frequency (+/- 1MHz) (21 Dec, 2012, on behalf of S. Soca) 00262 {0x82, 0x24}, //CHF_IROUT Adjust the filter bandwidth (+/- 0.5MHz) (21 Dec, 2012, on behalf of S. Soca) 00263 {0x83, 0x24}, //CHF_QROUT Adjust the filter bandwidth (+/- 0.5MHz) (21 Dec, 2012, on behalf of S. Soca) 00264 {0x64, 0x28}, //PA_CAL_DIS=1 Disabled PA calibration 00265 {0x52, 0x55}, //AGC_THR1 RSSI tune up 00266 {0x53, 0x2D}, //AGC_THR2 RSSI tune up 00267 {0x66, 0x5F}, //ATT_RSSI1 tune up 00268 {0x67, 0x8F}, //ATT_RSSI2 tune up 00269 {0x68, 0x61}, //RSSI_OFFSET 00270 {0x78, 0x03} //CHF_PMAGAIN 00271 }; 00272 00273 ==VERSION A== 00274 overwrites_t const overwrites_direct[] ={ 00275 {0x3B, 0x0A} //version 0A: updated registers for CCA 00276 {0x23, 0x17} //PA_PWR new default Power Step is "23" 00277 }; 00278 00279 overwrites_t const overwrites_indirect[] ={ 00280 {0x31, 0x02}, //clear MISO_HIZ_EN (for single SPI master/slave pair) and SPI_PUL_EN (minimize HIB currents) 00281 {0x91, 0xB3}, //VCO_CTRL1 override VCOALC_REF_TX to 3 00282 {0x92, 0x07}, //VCO_CTRL2 override VCOALC_REF_RX to 3, keep VCO_BUF_BOOST = 1 00283 {0x8A, 0x71}, //PA_TUNING override PA_COILTUNING to 001 (27 Nov 2012, D. Brown, on behalf of S. Eid) 00284 {0x79, 0x2F}, //CHF_IBUF Adjust the gm-C filter gain (+/- 6dB) (21 Dec, 2012, on behalf of S. Soca) 00285 {0x7A, 0x2F}, //CHF_QBUF Adjust the gm-C filter gain (+/- 6dB) (21 Dec, 2012, on behalf of S. Soca) 00286 {0x7B, 0x24}, //CHF_IRIN Adjust the filter bandwidth (+/- 0.5MHz) (21 Dec, 2012, on behalf of S. Soca) 00287 {0x7C, 0x24}, //CHF_QRIN Adjust the filter bandwidth (+/- 0.5MHz) (21 Dec, 2012, on behalf of S. Soca) 00288 {0x7D, 0x24}, //CHF_IL Adjust the filter bandwidth (+/- 0.5MHz) (21 Dec, 2012, on behalf of S. Soca) 00289 {0x7E, 0x24}, //CHF_QL Adjust the filter bandwidth (+/- 0.5MHz) (21 Dec, 2012, on behalf of S. Soca) 00290 {0x7F, 0x32}, //CHF_CC1 Adjust the filter center frequency (+/- 1MHz) (21 Dec, 2012, on behalf of S. Soca) 00291 {0x80, 0x1D}, //CHF_CCL Adjust the filter center frequency (+/- 1MHz) (21 Dec, 2012, on behalf of S. Soca) 00292 {0x81, 0x2D}, //CHF_CC2 Adjust the filter center frequency (+/- 1MHz) (21 Dec, 2012, on behalf of S. Soca) 00293 {0x82, 0x24}, //CHF_IROUT Adjust the filter bandwidth (+/- 0.5MHz) (21 Dec, 2012, on behalf of S. Soca) 00294 {0x83, 0x24}, //CHF_QROUT Adjust the filter bandwidth (+/- 0.5MHz) (21 Dec, 2012, on behalf of S. Soca) 00295 {0x64, 0x28}, //PA_CAL_DIS=1 Disabled PA calibration 00296 {0x52, 0x55}, //AGC_THR1 RSSI tune up 00297 {0x53, 0x2D}, //AGC_THR2 RSSI tune up 00298 {0x66, 0x5F}, //ATT_RSSI1 tune up 00299 {0x67, 0x8F}, //ATT_RSSI2 tune up 00300 {0x68, 0x61}, //RSSI_OFFSET 00301 {0x78, 0x03} //CHF_PMAGAIN 00302 {0x22, 0x50} //CCA1_THRESH 00303 }; 00304 00305 end of deprecated versions */ 00306 00307 00308 #endif //OVERWRITES_H_ 00309
Generated on Fri Jul 15 2022 21:41:17 by
1.7.2