MK64F12_rfsys.h

00001 /*
00002 ** ###################################################################
00003 **     Compilers:           Keil ARM C/C++ Compiler
00004 **                          Freescale C/C++ for Embedded ARM
00005 **                          GNU C Compiler
00006 **                          IAR ANSI C/C++ Compiler for ARM
00007 **
00008 **     Reference manual:    K64P144M120SF5RM, Rev.2, January 2014
00009 **     Version:             rev. 2.5, 2014-02-10
00010 **     Build:               b140604
00011 **
00012 **     Abstract:
00013 **         Extension to the CMSIS register access layer header.
00014 **
00015 **     Copyright (c) 2014 Freescale Semiconductor, Inc.
00016 **     All rights reserved.
00017 **
00018 **     Redistribution and use in source and binary forms, with or without modification,
00019 **     are permitted provided that the following conditions are met:
00020 **
00021 **     o Redistributions of source code must retain the above copyright notice, this list
00022 **       of conditions and the following disclaimer.
00023 **
00024 **     o Redistributions in binary form must reproduce the above copyright notice, this
00025 **       list of conditions and the following disclaimer in the documentation and/or
00026 **       other materials provided with the distribution.
00027 **
00028 **     o Neither the name of Freescale Semiconductor, Inc. nor the names of its
00029 **       contributors may be used to endorse or promote products derived from this
00030 **       software without specific prior written permission.
00031 **
00032 **     THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
00033 **     ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
00034 **     WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
00035 **     DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
00036 **     ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
00037 **     (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
00038 **     LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
00039 **     ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
00040 **     (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
00041 **     SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
00042 **
00043 **     http:                 www.freescale.com
00044 **     mail:                 support@freescale.com
00045 **
00046 **     Revisions:
00047 **     - rev. 1.0 (2013-08-12)
00048 **         Initial version.
00049 **     - rev. 2.0 (2013-10-29)
00050 **         Register accessor macros added to the memory map.
00051 **         Symbols for Processor Expert memory map compatibility added to the memory map.
00052 **         Startup file for gcc has been updated according to CMSIS 3.2.
00053 **         System initialization updated.
00054 **         MCG - registers updated.
00055 **         PORTA, PORTB, PORTC, PORTE - registers for digital filter removed.
00056 **     - rev. 2.1 (2013-10-30)
00057 **         Definition of BITBAND macros updated to support peripherals with 32-bit acces disabled.
00058 **     - rev. 2.2 (2013-12-09)
00059 **         DMA - EARS register removed.
00060 **         AIPS0, AIPS1 - MPRA register updated.
00061 **     - rev. 2.3 (2014-01-24)
00062 **         Update according to reference manual rev. 2
00063 **         ENET, MCG, MCM, SIM, USB - registers updated
00064 **     - rev. 2.4 (2014-02-10)
00065 **         The declaration of clock configurations has been moved to separate header file system_MK64F12.h
00066 **         Update of SystemInit() and SystemCoreClockUpdate() functions.
00067 **     - rev. 2.5 (2014-02-10)
00068 **         The declaration of clock configurations has been moved to separate header file system_MK64F12.h
00069 **         Update of SystemInit() and SystemCoreClockUpdate() functions.
00070 **         Module access macro module_BASES replaced by module_BASE_PTRS.
00071 **
00072 ** ###################################################################
00073 */
00074 
00075 /*
00076  * WARNING! DO NOT EDIT THIS FILE DIRECTLY!
00077  *
00078  * This file was generated automatically and any changes may be lost.
00079  */
00080 #ifndef __HW_RFSYS_REGISTERS_H__
00081 #define __HW_RFSYS_REGISTERS_H__
00082 
00083 #include "MK64F12.h"
00084 #include "fsl_bitaccess.h"
00085 
00086 /*
00087  * MK64F12 RFSYS
00088  *
00089  * System register file
00090  *
00091  * Registers defined in this header file:
00092  * - HW_RFSYS_REGn - Register file register
00093  *
00094  * - hw_rfsys_t - Struct containing all module registers.
00095  */
00096 
00097 #define HW_RFSYS_INSTANCE_COUNT (1U) /*!< Number of instances of the RFSYS module. */
00098 
00099 /*******************************************************************************
00100  * HW_RFSYS_REGn - Register file register
00101  ******************************************************************************/
00102 
00103 /*!
00104  * @brief HW_RFSYS_REGn - Register file register (RW)
00105  *
00106  * Reset value: 0x00000000U
00107  *
00108  * Each register can be accessed as 8-, 16-, or 32-bits.
00109  */
00110 typedef union _hw_rfsys_regn
00111 {
00112     uint32_t U;
00113     struct _hw_rfsys_regn_bitfields
00114     {
00115         uint32_t LL : 8;               /*!< [7:0]  */
00116         uint32_t LH : 8;               /*!< [15:8]  */
00117         uint32_t HL : 8;               /*!< [23:16]  */
00118         uint32_t HH : 8;               /*!< [31:24]  */
00119     } B;
00120 } hw_rfsys_regn_t;
00121 
00122 /*!
00123  * @name Constants and macros for entire RFSYS_REGn register
00124  */
00125 /*@{*/
00126 #define HW_RFSYS_REGn_COUNT (8U)
00127 
00128 #define HW_RFSYS_REGn_ADDR(x, n) ((x) + 0x0U + (0x4U * (n)))
00129 
00130 #define HW_RFSYS_REGn(x, n)      (*(__IO hw_rfsys_regn_t *) HW_RFSYS_REGn_ADDR(x, n))
00131 #define HW_RFSYS_REGn_RD(x, n)   (HW_RFSYS_REGn(x, n).U)
00132 #define HW_RFSYS_REGn_WR(x, n, v) (HW_RFSYS_REGn(x, n).U = (v))
00133 #define HW_RFSYS_REGn_SET(x, n, v) (HW_RFSYS_REGn_WR(x, n, HW_RFSYS_REGn_RD(x, n) |  (v)))
00134 #define HW_RFSYS_REGn_CLR(x, n, v) (HW_RFSYS_REGn_WR(x, n, HW_RFSYS_REGn_RD(x, n) & ~(v)))
00135 #define HW_RFSYS_REGn_TOG(x, n, v) (HW_RFSYS_REGn_WR(x, n, HW_RFSYS_REGn_RD(x, n) ^  (v)))
00136 /*@}*/
00137 
00138 /*
00139  * Constants & macros for individual RFSYS_REGn bitfields
00140  */
00141 
00142 /*!
00143  * @name Register RFSYS_REGn, field LL[7:0] (RW)
00144  *
00145  * Low lower byte
00146  */
00147 /*@{*/
00148 #define BP_RFSYS_REGn_LL     (0U)          /*!< Bit position for RFSYS_REGn_LL. */
00149 #define BM_RFSYS_REGn_LL     (0x000000FFU) /*!< Bit mask for RFSYS_REGn_LL. */
00150 #define BS_RFSYS_REGn_LL     (8U)          /*!< Bit field size in bits for RFSYS_REGn_LL. */
00151 
00152 /*! @brief Read current value of the RFSYS_REGn_LL field. */
00153 #define BR_RFSYS_REGn_LL(x, n) (HW_RFSYS_REGn(x, n).B.LL)
00154 
00155 /*! @brief Format value for bitfield RFSYS_REGn_LL. */
00156 #define BF_RFSYS_REGn_LL(v)  ((uint32_t)((uint32_t)(v) << BP_RFSYS_REGn_LL) & BM_RFSYS_REGn_LL)
00157 
00158 /*! @brief Set the LL field to a new value. */
00159 #define BW_RFSYS_REGn_LL(x, n, v) (HW_RFSYS_REGn_WR(x, n, (HW_RFSYS_REGn_RD(x, n) & ~BM_RFSYS_REGn_LL) | BF_RFSYS_REGn_LL(v)))
00160 /*@}*/
00161 
00162 /*!
00163  * @name Register RFSYS_REGn, field LH[15:8] (RW)
00164  *
00165  * Low higher byte
00166  */
00167 /*@{*/
00168 #define BP_RFSYS_REGn_LH     (8U)          /*!< Bit position for RFSYS_REGn_LH. */
00169 #define BM_RFSYS_REGn_LH     (0x0000FF00U) /*!< Bit mask for RFSYS_REGn_LH. */
00170 #define BS_RFSYS_REGn_LH     (8U)          /*!< Bit field size in bits for RFSYS_REGn_LH. */
00171 
00172 /*! @brief Read current value of the RFSYS_REGn_LH field. */
00173 #define BR_RFSYS_REGn_LH(x, n) (HW_RFSYS_REGn(x, n).B.LH)
00174 
00175 /*! @brief Format value for bitfield RFSYS_REGn_LH. */
00176 #define BF_RFSYS_REGn_LH(v)  ((uint32_t)((uint32_t)(v) << BP_RFSYS_REGn_LH) & BM_RFSYS_REGn_LH)
00177 
00178 /*! @brief Set the LH field to a new value. */
00179 #define BW_RFSYS_REGn_LH(x, n, v) (HW_RFSYS_REGn_WR(x, n, (HW_RFSYS_REGn_RD(x, n) & ~BM_RFSYS_REGn_LH) | BF_RFSYS_REGn_LH(v)))
00180 /*@}*/
00181 
00182 /*!
00183  * @name Register RFSYS_REGn, field HL[23:16] (RW)
00184  *
00185  * High lower byte
00186  */
00187 /*@{*/
00188 #define BP_RFSYS_REGn_HL     (16U)         /*!< Bit position for RFSYS_REGn_HL. */
00189 #define BM_RFSYS_REGn_HL     (0x00FF0000U) /*!< Bit mask for RFSYS_REGn_HL. */
00190 #define BS_RFSYS_REGn_HL     (8U)          /*!< Bit field size in bits for RFSYS_REGn_HL. */
00191 
00192 /*! @brief Read current value of the RFSYS_REGn_HL field. */
00193 #define BR_RFSYS_REGn_HL(x, n) (HW_RFSYS_REGn(x, n).B.HL)
00194 
00195 /*! @brief Format value for bitfield RFSYS_REGn_HL. */
00196 #define BF_RFSYS_REGn_HL(v)  ((uint32_t)((uint32_t)(v) << BP_RFSYS_REGn_HL) & BM_RFSYS_REGn_HL)
00197 
00198 /*! @brief Set the HL field to a new value. */
00199 #define BW_RFSYS_REGn_HL(x, n, v) (HW_RFSYS_REGn_WR(x, n, (HW_RFSYS_REGn_RD(x, n) & ~BM_RFSYS_REGn_HL) | BF_RFSYS_REGn_HL(v)))
00200 /*@}*/
00201 
00202 /*!
00203  * @name Register RFSYS_REGn, field HH[31:24] (RW)
00204  *
00205  * High higher byte
00206  */
00207 /*@{*/
00208 #define BP_RFSYS_REGn_HH     (24U)         /*!< Bit position for RFSYS_REGn_HH. */
00209 #define BM_RFSYS_REGn_HH     (0xFF000000U) /*!< Bit mask for RFSYS_REGn_HH. */
00210 #define BS_RFSYS_REGn_HH     (8U)          /*!< Bit field size in bits for RFSYS_REGn_HH. */
00211 
00212 /*! @brief Read current value of the RFSYS_REGn_HH field. */
00213 #define BR_RFSYS_REGn_HH(x, n) (HW_RFSYS_REGn(x, n).B.HH)
00214 
00215 /*! @brief Format value for bitfield RFSYS_REGn_HH. */
00216 #define BF_RFSYS_REGn_HH(v)  ((uint32_t)((uint32_t)(v) << BP_RFSYS_REGn_HH) & BM_RFSYS_REGn_HH)
00217 
00218 /*! @brief Set the HH field to a new value. */
00219 #define BW_RFSYS_REGn_HH(x, n, v) (HW_RFSYS_REGn_WR(x, n, (HW_RFSYS_REGn_RD(x, n) & ~BM_RFSYS_REGn_HH) | BF_RFSYS_REGn_HH(v)))
00220 /*@}*/
00221 
00222 /*******************************************************************************
00223  * hw_rfsys_t - module struct
00224  ******************************************************************************/
00225 /*!
00226  * @brief All RFSYS module registers.
00227  */
00228 #pragma pack(1)
00229 typedef struct _hw_rfsys
00230 {
00231     __IO hw_rfsys_regn_t REGn [8];          /*!< [0x0] Register file register */
00232 } hw_rfsys_t;
00233 #pragma pack()
00234 
00235 /*! @brief Macro to access all RFSYS registers. */
00236 /*! @param x RFSYS module instance base address. */
00237 /*! @return Reference (not a pointer) to the registers struct. To get a pointer to the struct,
00238  *     use the '&' operator, like <code>&HW_RFSYS(RFSYS_BASE)</code>. */
00239 #define HW_RFSYS(x)    (*(hw_rfsys_t *)(x))
00240 
00241 #endif /* __HW_RFSYS_REGISTERS_H__ */
00242 /* EOF */