Maxim Integrated
/
MAX77654
Important changes to repositories hosted on mbed.com
Mbed hosted mercurial repositories are deprecated and are due to be permanently deleted in July 2026.
To keep a copy of this software download the repository Zip archive or clone locally using Mercurial.
It is also possible to export all your personal repositories from the account settings page.
Embed:
(wiki syntax)
Show/hide line numbers
MAX77654.h
00001 /******************************************************************************* 00002 * Copyright (C) 2022 Maxim Integrated Products, Inc., All rights Reserved. 00003 * 00004 * This software is protected by copyright laws of the United States and 00005 * of foreign countries. This material may also be protected by patent laws 00006 * and technology transfer regulations of the United States and of foreign 00007 * countries. This software is furnished under a license agreement and/or a 00008 * nondisclosure agreement and may only be used or reproduced in accordance 00009 * with the terms of those agreements. Dissemination of this information to 00010 * any party or parties not specified in the license agreement and/or 00011 * nondisclosure agreement is expressly prohibited. 00012 * 00013 * The above copyright notice and this permission notice shall be included 00014 * in all copies or substantial portions of the Software. 00015 * 00016 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS 00017 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF 00018 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. 00019 * IN NO EVENT SHALL MAXIM INTEGRATED BE LIABLE FOR ANY CLAIM, DAMAGES 00020 * OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 00021 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 00022 * OTHER DEALINGS IN THE SOFTWARE. 00023 * 00024 * Except as contained in this notice, the name of Maxim Integrated 00025 * Products, Inc. shall not be used except as stated in the Maxim Integrated 00026 * Products, Inc. Branding Policy. 00027 * 00028 * The mere transfer of this software does not imply any licenses 00029 * of trade secrets, proprietary technology, copyrights, patents, 00030 * trademarks, maskwork rights, or any other form of intellectual 00031 * property whatsoever. Maxim Integrated Products, Inc. retains all 00032 * ownership rights. 00033 ******************************************************************************* 00034 */ 00035 00036 #ifndef _MAX77654_H_ 00037 #define _MAX77654_H_ 00038 00039 #include "mbed.h" 00040 #include "MAX77654_regs.h" 00041 00042 #define MAX77654_NO_ERROR 0 00043 #define MAX77654_VALUE_NULL -1 00044 #define MAX77654_WRITE_DATA_FAILED -2 00045 #define MAX77654_READ_DATA_FAILED -3 00046 #define MAX77654_INVALID_DATA -4 00047 #define MAX77654_INVALID_CHANNEL_NUMBER -5 00048 00049 #define MAX77654_I2C_ADDRESS 0x90 00050 00051 /** 00052 * @brief MAX77654 Ultra-Low Power PMIC Featuring Single-Inductor, 3-Output Buck-Boost, 00053 * 2-LDOs, Power Path Charger for Small Li+, and Ship Mode 00054 * 00055 * @details The MAX77654 provides highly-integrated battery charging and power supply 00056 * solutions for low-power applications where size and efficiency are critical. 00057 * <br>https://www.maximintegrated.com/en/products/power/power-management-ics/MAX77654.html 00058 * 00059 * @code 00060 * @endcode 00061 */ 00062 00063 class MAX77654 00064 { 00065 private: 00066 I2C *i2c_handler; 00067 InterruptIn *irq_pin; // interrupt pin 00068 00069 /** 00070 * @brief Register Addresses 00071 * @details Enumerated MAX77654 register addresses 00072 */ 00073 typedef enum { 00074 /*Global*/ 00075 INT_GLBL0 = 0x00, // Interrupt Status 0 00076 INT_GLBL1 = 0x04, // Interrupt Status 1 00077 ERCFLAG = 0x05, // Flags 00078 STAT_GLBL = 0x06, // Global Status 00079 INTM_GLBL1 = 0x08, // Interrupt Mask 1 00080 INTM_GLBL0 = 0x09, // Interrupt Mask 0 00081 CNFG_GLBL = 0x10, // Configuration Global 00082 CNFG_GPIO0 = 0x11, // GPIO0 Configuration 00083 CNFG_GPIO1 = 0x12, // GPIO1 Configuration 00084 CNFG_GPIO2 = 0x13, // GPIO2 Configuration 00085 CID = 0x14, // Chip Identification Code 00086 CNFG_WDT = 0x17, // Configuration WatchDog Timer 00087 /*Charger*/ 00088 INT_CHG = 0x01, // Charger Interrupt Status 00089 STAT_CHG_A = 0x02, // Charger Status A 00090 STAT_CHG_B = 0x03, // Charger Status B 00091 INT_M_CHG = 0x07, // Charger Interrupt Mask 00092 CNFG_CHG_A = 0x20, // Charger Configuration A 00093 CNFG_CHG_B = 0x21, // Charger Configuration B 00094 CNFG_CHG_C = 0x22, // Charger Configuration C 00095 CNFG_CHG_D = 0x23, // Charger Configuration D 00096 CNFG_CHG_E = 0x24, // Charger Configuration E 00097 CNFG_CHG_F = 0x25, // Charger Configuration F 00098 CNFG_CHG_G = 0x26, // Charger Configuration G 00099 CNFG_CHG_H = 0x27, // Charger Configuration H 00100 CNFG_CHG_I = 0x28, // Charger Configuration I 00101 /*SBB*/ 00102 CNFG_SBB0_A = 0x29, // SIMO Buck-Boost 0 Configuration A 00103 CNFG_SBB0_B = 0x2A, // SIMO Buck-Boost 0 Configuration B 00104 CNFG_SBB1_A = 0x2B, // SIMO Buck-Boost 1 Configuration A 00105 CNFG_SBB1_B = 0x2C, // SIMO Buck-Boost 1 Configuration B 00106 CNFG_SBB2_A = 0x2D, // SIMO Buck-Boost 2 Configuration A 00107 CNFG_SBB2_B = 0x2E, // SIMO Buck-Boost 2 Configuration B 00108 CNFG_SBB_TOP = 0x2F, // SIMO Buck-Boost Configuration 00109 /*LDO*/ 00110 CNFG_LDO0_A = 0x38, // LDO Configuration A 00111 CNFG_LDO0_B = 0x39, // LDO Configuration B 00112 CNFG_LDO1_A = 0x3A, // LDO Configuration B 00113 CNFG_LDO1_B = 0x3B // LDO Configuration B 00114 } reg_t; 00115 00116 /** 00117 * @brief Interrupt handler function 00118 */ 00119 void InterruptHandler(); 00120 00121 void (MAX77654::*funcptr)(void); 00122 00123 /** 00124 * @brief Post interrupt jobs after interrupt is detected. 00125 */ 00126 void PostInterruptWork(); 00127 00128 Thread *post_intr_work_thread; 00129 00130 struct handler { 00131 void (*func)(void *); 00132 void *cb; 00133 }; 00134 00135 handler *interrupt_handler_list; 00136 00137 public: 00138 /** 00139 * @brief Register Configuration 00140 * All Interrupt Flags combined from INT_GLBL0, INT_GLBL1 and INT_CHG 00141 * 00142 * @details 00143 * - Register : ERCFLAG (0x05) 00144 * - Bit Fields : [7:0] 00145 * - Default : 0x0 00146 * - Description : Enumerated interrupt flags 00147 */ 00148 typedef enum { 00149 INT_GLBL0_GPI0_F, 00150 INT_GLBL0_GPI0_R, 00151 INT_GLBL0_NEN_F, 00152 INT_GLBL0_NEN_R, 00153 INT_GLBL0_TJAL1_R, 00154 INT_GLBL0_TJAL2_R, 00155 INT_GLBL0_DOD1_R, 00156 INT_GLBL0_DOD0_R, 00157 INT_GLBL1_GPI1_F, 00158 INT_GLBL1_GPI1_R, 00159 INT_GLBL1_GPI2_F, 00160 INT_GLBL1_GPI2_R, 00161 INT_GLBL1_SBB_TO, 00162 INT_GLBL1_LDO0_F, 00163 INT_GLBL1_LDO1_F, 00164 INT_CHG_THM_I, 00165 INT_CHG_CGH_I, 00166 INT_CHG_CHGIN_I, 00167 INT_CHG_TJ_REG_I, 00168 INT_CHG_CHGIN_CTRL_I, 00169 INT_CHG_SYS_CTRL_I, 00170 INT_CHG_SYS_CNFG_I, 00171 INT_CHG_END 00172 } int_glbl_t; 00173 00174 /** 00175 * MAX77654 constructor. 00176 */ 00177 MAX77654(I2C *i2c, PinName IRQPin = NC); 00178 00179 /** 00180 * MAX77654 destructor. 00181 */ 00182 ~MAX77654(); 00183 00184 /** 00185 * @brief Function pointer type to interrupt handler function 00186 */ 00187 typedef void (*interrupt_handler_function)(void *); 00188 00189 /** 00190 * @brief Read from a register. 00191 * 00192 * @param[in] reg Address of a register to be read. 00193 * @param[out] value Pointer to save result value. 00194 * 00195 * @returns 0 on success, negative error code on failure. 00196 */ 00197 int read_register(uint8_t reg, uint8_t *value); 00198 00199 /** 00200 * @brief Write to a register. 00201 * 00202 * @param[in] reg Address of a register to be written. 00203 * @param[out] value Pointer of value to be written to register. 00204 * 00205 * @returns 0 on success, negative error code on failure. 00206 */ 00207 int write_register(uint8_t reg, const uint8_t *value); 00208 00209 /** 00210 * @brief Register Configuration 00211 * 00212 * @details 00213 * - Register : ERCFLAG (0x05) 00214 * - Bit Fields : [7:0] 00215 * - Default : 0x0 00216 * - Description : Event Recorder Flags. 00217 */ 00218 typedef enum { 00219 ERC_FLAG_NOT_OCCURRED, 00220 ERC_FLAG_OCCURRED 00221 }ercflag_t; 00222 00223 /** 00224 * @brief Get Thermal Overload Flag. 00225 * 00226 * @param[out] ercflag Thermal overload bit to be read. 00227 * 00228 * @return 0 on success, error code on failure. 00229 */ 00230 int GetThermalOverload(ercflag_t *ercflag); 00231 00232 /** 00233 * @brief Get Sys Domain Overvoltage Lockout Flag. 00234 * 00235 * @param[out] ercflag Sys domain overvoltage lockout bit to be read. 00236 * 00237 * @return 0 on success, error code on failure. 00238 */ 00239 int GetSysOvervoltageLockout(ercflag_t *ercflag); 00240 00241 /** 00242 * @brief Get Sys Domain Undervoltage Lockout Flag. 00243 * 00244 * @param[out] ercflag Sys domain undervoltage lockout bit to be read. 00245 * 00246 * @return 0 on success, error code on failure. 00247 */ 00248 int GetSysUndervoltageLockout(ercflag_t *ercflag); 00249 00250 /** 00251 * @brief Get Manual Reset Timer Flag. 00252 * 00253 * @param[out] ercflag Manual reset timer bit to be read. 00254 * 00255 * @return 0 on success, error code on failure. 00256 */ 00257 int GetManualResetTimer(ercflag_t *ercflag); 00258 00259 /** 00260 * @brief Get Software Off Flag. 00261 * 00262 * @param[out] ercflag Software off bit to be read. 00263 * 00264 * @return 0 on success, error code on failure. 00265 */ 00266 int GetSoftwareOffFlag(ercflag_t *ercflag); 00267 00268 /** 00269 * @brief Get Software Cold Reset. 00270 * 00271 * @param[out] ercflag Software cold reset bit to be read. 00272 * 00273 * @return 0 on success, error code on failure. 00274 */ 00275 int GetSoftwareColdResetFlag(ercflag_t *ercflag); 00276 00277 /** 00278 * @brief Get Watchdog Timer Off Flag. 00279 * 00280 * @param[out] ercflag Watchdog timer off bit to be read. 00281 * 00282 * @return 0 on success, error code on failure. 00283 */ 00284 int GetWatchdogTimerOffFlag(ercflag_t *ercflag); 00285 00286 /** 00287 * @brief Get Watchdog Timer Reset Flag. 00288 * 00289 * @param[out] ercflag Watchdog timer reset bit to be read. 00290 * 00291 * @return 0 on success, error code on failure. 00292 */ 00293 int GetWatchdogTimerResetFlag(ercflag_t *ercflag); 00294 00295 /** 00296 * @brief Register Configuration 00297 * 00298 * @details 00299 * - Register : STAT_GLBL (0x06) 00300 * - Bit Fields : [7] 00301 * - Default : 0x0 00302 * - Description : Device Identification Bits for Metal Options. 00303 */ 00304 typedef enum { 00305 DIDM_MAX77654, 00306 DIDM_RESERVED 00307 }didm_t; 00308 00309 /** 00310 * @brief Get Device Identification Bits for Metal Options. 00311 * 00312 * @param[out] didm Device identification bit to be read. 00313 * 00314 * @return 0 on success, error code on failure. 00315 */ 00316 int GetDeviceIdentification(didm_t *didm); 00317 00318 /** 00319 * @brief Register Configuration 00320 * 00321 * @details 00322 * - Register : STAT_GLBL (0x06) 00323 * - Bit Fields : [6] 00324 * - Default : 0x0 00325 * - Description : BOK Interrupt Status. 00326 */ 00327 typedef enum { 00328 BOK_MAIN_BIAS_NOT_READY, 00329 BOK_MAIN_BIAS_READY 00330 }bok_t; 00331 00332 /** 00333 * @brief Get BOK Interrupt Status. 00334 * 00335 * @param[out] bok Main bias status bit to be read. 00336 * 00337 * @return 0 on success, error code on failure. 00338 */ 00339 int GetBOKInterruptStatus(bok_t *bok); 00340 00341 /** 00342 * @brief Register Configuration 00343 * 00344 * @details 00345 * - Register : STAT_GLBL (0x06) 00346 * - Bit Fields : [5] 00347 * - Default : 0x0 00348 * - Description : LDO0 Dropout Detector Rising Status. 00349 */ 00350 typedef enum { 00351 DOD0_S_LDO0_NOT_IN_DROPOUT, 00352 DOD0_S_LDO0_IN_DROPOUT 00353 }dod0_s_t; 00354 00355 /** 00356 * @brief Get LDO0 Dropout Detector Rising Status. 00357 * 00358 * @param[out] dod0_s LDO0 dropout status bit to be read. 00359 * 00360 * @return 0 on success, error code on failure. 00361 */ 00362 int GetLDO0DropoutRisingStatus(dod0_s_t *dod0_s); 00363 00364 /** 00365 * @brief Register Configuration 00366 * 00367 * @details 00368 * - Register : STAT_GLBL (0x06) 00369 * - Bit Fields : [4] 00370 * - Default : 0x0 00371 * - Description : LDO1 Dropout Detector Rising Status. 00372 */ 00373 typedef enum { 00374 DOD1_S_LDO1_NOT_IN_DROPOUT, 00375 DOD1_S_LDO1_IN_DROPOUT 00376 }dod1_s_t; 00377 00378 /** 00379 * @brief Get LDO1 Dropout Detector Rising Status. 00380 * 00381 * @param[out] dod1_s LDO1 dropout status bit to be read. 00382 * 00383 * @return 0 on success, error code on failure. 00384 */ 00385 int GetLDO1DropoutRisingStatus(dod1_s_t *dod1_s); 00386 00387 /** 00388 * @brief Register Configuration 00389 * 00390 * @details 00391 * - Register : STAT_GLBL (0x06) 00392 * - Bit Fields : [3] 00393 * - Default : 0x0 00394 * - Description : Thermal Alarm 2 Status. 00395 */ 00396 typedef enum { 00397 TJAL2_S_JUNC_TEMP_LESS_THAN_TJA2, 00398 TJAL2_S_JUNC_TEMP_GREATER_THAN_TJA2 00399 }tjal2_s_t; 00400 00401 /** 00402 * @brief Get Thermal Alarm 2 Status. 00403 * 00404 * @param[out] tjal2_s Thermal alarm 2 status bit to be read. 00405 * 00406 * @return 0 on success, error code on failure. 00407 */ 00408 int GetThermalAlarm2Status(tjal2_s_t *tjal2_s); 00409 00410 /** 00411 * @brief Register Configuration 00412 * 00413 * @details 00414 * - Register : STAT_GLBL (0x06) 00415 * - Bit Fields : [2] 00416 * - Default : 0x0 00417 * - Description : Thermal Alarm 1 Status. 00418 */ 00419 typedef enum { 00420 TJAL1_S_JUNC_TEMP_LESS_THAN_TJA1, 00421 TJAL1_S_JUNC_TEMP_GREATER_THAN_TJA1 00422 }tjal1_s_t; 00423 00424 /** 00425 * @brief Get Thermal Alarm 1 Status. 00426 * 00427 * @param[out] tjal1_s Thermal alarm 1 status bit to be read. 00428 * 00429 * @return 0 on success, error code on failure. 00430 */ 00431 int GetThermalAlarm1Status(tjal1_s_t *tjal1_s); 00432 00433 /** 00434 * @brief Register Configuration 00435 * 00436 * @details 00437 * - Register : STAT_GLBL (0x06) 00438 * - Bit Fields : [1] 00439 * - Default : 0x0 00440 * - Description : Debounced Status for the nEN input. 00441 */ 00442 typedef enum { 00443 STAT_EN_NEN_NOT_ACTIVE, 00444 STAT_EN_NEN_ACTIVE 00445 }stat_en_t; 00446 00447 /** 00448 * @brief Get Debounced Status for the nEN input. 00449 * 00450 * @param[out] stat_en Debounced status bit to be read. 00451 * 00452 * @return 0 on success, error code on failure. 00453 */ 00454 int GetnENDebouncedStatus(stat_en_t *stat_en); 00455 00456 /** 00457 * @brief Register Configuration 00458 * 00459 * @details 00460 * - Register : STAT_GLBL (0x06) 00461 * - Bit Fields : [0] 00462 * - Default : 0x0 00463 * - Description : Software Version of the nIRQ MOSFET gate drive. 00464 */ 00465 typedef enum { 00466 STAT_IRQ_UNMASKED_GATE_DRIVE_LOW, 00467 STAT_IRQ_UNMASKED_GATE_DRIVE_HIGH 00468 }stat_irq_t; 00469 00470 /** 00471 * @brief Get Software Version of the nIRQ MOSFET gate drive. 00472 * 00473 * @param[out] stat_en Software version bit to be read. 00474 * 00475 * @return 0 on success, error code on failure. 00476 */ 00477 int GetSoftwareVersionGateDrive(stat_irq_t *stat_irq); 00478 00479 /** 00480 * @brief Register Configuration 00481 * 00482 * @details 00483 * - Register : INT_M_CHG (0x07), INTM_GLBL1 (0x08), and INTM_GLBL0 (0x09) 00484 * - Bit Fields : [7:0] 00485 * - Default : 0x0 00486 * - Description : Interrupt Masks. 00487 */ 00488 typedef enum { 00489 INTM_INTERRUPT_UNMASKED, 00490 INTM_INTERRUPT_MASKED 00491 }intm_t; 00492 00493 /** 00494 * @brief Set LDO1 Fault Interrupt Mask. 00495 * 00496 * @param[in] intm LDO1 fault interrupt mask bit to be written. 00497 * 00498 * @return 0 on success, error code on failure. 00499 */ 00500 int SetLDO1FaultInterruptMask(intm_t intm); 00501 00502 /** 00503 * @brief Get LDO1 Fault Interrupt Mask. 00504 * 00505 * @param[out] intm LDO1 fault interrupt mask bit to be read. 00506 * 00507 * @return 0 on success, error code on failure. 00508 */ 00509 int GetLDO1FaultInterruptMask(intm_t *intm); 00510 00511 /** 00512 * @brief Set LDO0 Fault Interrupt Mask. 00513 * 00514 * @param[in] intm LDO0 fault interrupt mask bit to be written. 00515 * 00516 * @return 0 on success, error code on failure. 00517 */ 00518 int SetLDO0FaultInterruptMask(intm_t intm); 00519 00520 /** 00521 * @brief Get LDO1 Fault Interrupt Mask. 00522 * 00523 * @param[out] intm LDO1 fault interrupt mask bit to be read. 00524 * 00525 * @return 0 on success, error code on failure. 00526 */ 00527 int GetLDO0FaultInterruptMask(intm_t *intm); 00528 00529 /** 00530 * @brief Set SBB Timeout Mask. 00531 * 00532 * @param[in] intm SBB timeout interrupt mask bit to be written. 00533 * 00534 * @return 0 on success, error code on failure. 00535 */ 00536 int SetSBBTimeoutMask(intm_t intm); 00537 00538 /** 00539 * @brief Get SBB Timeout Mask. 00540 * 00541 * @param[out] intm SBB timeout interrupt mask bit to be read. 00542 * 00543 * @return 0 on success, error code on failure. 00544 */ 00545 int GetSBBTimeoutMask(intm_t *intm); 00546 00547 /** 00548 * @brief Set GPI2 Rising Interrupt Mask. 00549 * 00550 * @param[in] intm GPI2 rising interrupt mask bit to be written. 00551 * 00552 * @return 0 on success, error code on failure. 00553 */ 00554 int SetGPI2RisingInterruptMask(intm_t intm); 00555 00556 /** 00557 * @brief Get GPI2 Rising Mask. 00558 * 00559 * @param[out] intm GPI2 rising interrupt mask bit to be read. 00560 * 00561 * @return 0 on success, error code on failure. 00562 */ 00563 int GetGPI2RisingInterruptMask(intm_t *intm); 00564 00565 /** 00566 * @brief Set GPI2 Falling Interrupt Mask. 00567 * 00568 * @param[in] intm GPI2 falling interrupt mask bit to be written. 00569 * 00570 * @return 0 on success, error code on failure. 00571 */ 00572 int SetGPI2FallingInterruptMask(intm_t intm); 00573 00574 /** 00575 * @brief Get GPI2 Falling Mask. 00576 * 00577 * @param[out] intm GPI2 falling interrupt mask bit to be read. 00578 * 00579 * @return 0 on success, error code on failure. 00580 */ 00581 int GetGPI2FallingInterruptMask(intm_t *intm); 00582 00583 /** 00584 * @brief Set GPI1 Rising Interrupt Mask. 00585 * 00586 * @param[in] intm GPI1 rising interrupt mask bit to be written. 00587 * 00588 * @return 0 on success, error code on failure. 00589 */ 00590 int SetGPI1RisingInterruptMask(intm_t intm); 00591 00592 /** 00593 * @brief Get GPI1 Rising Mask. 00594 * 00595 * @param[out] intm GPI1 rising interrupt mask bit to be read. 00596 * 00597 * @return 0 on success, error code on failure. 00598 */ 00599 int GetGPI1RisingInterruptMask(intm_t *intm); 00600 00601 /** 00602 * @brief Set GPI1 Falling Interrupt Mask. 00603 * 00604 * @param[in] intm GPI1 falling interrupt mask bit to be written. 00605 * 00606 * @return 0 on success, error code on failure. 00607 */ 00608 int SetGPI1FallingInterruptMask(intm_t intm); 00609 00610 /** 00611 * @brief Get GPI1 Falling Mask. 00612 * 00613 * @param[out] intm GPI1 falling interrupt mask bit to be read. 00614 * 00615 * @return 0 on success, error code on failure. 00616 */ 00617 int GetGPI1FallingInterruptMask(intm_t *intm); 00618 00619 /** 00620 * @brief Set LDO Dropout0 Detector Rising Interrupt Mask. 00621 * 00622 * @param[in] intm LDO dropout0 detector rising interrupt mask bit to be written. 00623 * 00624 * @return 0 on success, error code on failure. 00625 */ 00626 int SetDropout0RisingInterruptMask(intm_t intm); 00627 00628 /** 00629 * @brief Get LDO Dropout0 Detector Rising Interrupt Mask. 00630 * 00631 * @param[out] intm LDO dropout0 detector rising interrupt mask bit to be read. 00632 * 00633 * @return 0 on success, error code on failure. 00634 */ 00635 int GetDropout0RisingInterruptMask(intm_t *intm); 00636 00637 /** 00638 * @brief Set LDO Dropout1 Detector Rising Interrupt Mask. 00639 * 00640 * @param[in] intm LDO dropout1 detector rising interrupt mask bit to be written. 00641 * 00642 * @return 0 on success, error code on failure. 00643 */ 00644 int SetDropout1RisingInterruptMask(intm_t intm); 00645 00646 /** 00647 * @brief Get LDO Dropout1 Detector Rising Interrupt Mask. 00648 * 00649 * @param[out] intm LDO dropout1 detector rising interrupt mask bit to be read. 00650 * 00651 * @return 0 on success, error code on failure. 00652 */ 00653 int GetDropout1RisingInterruptMask(intm_t *intm); 00654 00655 /** 00656 * @brief Set Thermal Alarm 2 Rising Interrupt Mask. 00657 * 00658 * @param[in] intm Thermal alarm 2 rising interrupt mask bit to be written. 00659 * 00660 * @return 0 on success, error code on failure. 00661 */ 00662 int SetThermalAlarm2RisingInterruptMask(intm_t intm); 00663 00664 /** 00665 * @brief Get Thermal Alarm 2 Rising Interrupt Mask. 00666 * 00667 * @param[out] intm Thermal alarm 2 rising interrupt mask bit to be read. 00668 * 00669 * @return 0 on success, error code on failure. 00670 */ 00671 int GetThermalAlarm2RisingInterruptMask(intm_t *intm); 00672 00673 /** 00674 * @brief Set Thermal Alarm 1 Rising Interrupt Mask. 00675 * 00676 * @param[in] intm Thermal alarm 1 rising interrupt mask bit to be written. 00677 * 00678 * @return 0 on success, error code on failure. 00679 */ 00680 int SetThermalAlarm1RisingInterruptMask(intm_t intm); 00681 00682 /** 00683 * @brief Get Thermal Alarm 1 Rising Interrupt Mask. 00684 * 00685 * @param[out] intm Thermal alarm 1 rising interrupt mask bit to be read. 00686 * 00687 * @return 0 on success, error code on failure. 00688 */ 00689 int GetThermalAlarm1RisingInterruptMask(intm_t *intm); 00690 00691 /** 00692 * @brief Set nEN Rising Interrupt Mask. 00693 * 00694 * @param[in] intm nEN rising interrupt mask bit to be written. 00695 * 00696 * @return 0 on success, error code on failure. 00697 */ 00698 int SetnENRisingInterruptMask(intm_t intm); 00699 00700 /** 00701 * @brief Get nEN Rising Interrupt Mask. 00702 * 00703 * @param[out] intm nEN rising interrupt mask bit to be read. 00704 * 00705 * @return 0 on success, error code on failure. 00706 */ 00707 int GetnENRisingInterruptMask(intm_t *intm); 00708 00709 /** 00710 * @brief Set nEN Falling Interrupt Mask. 00711 * 00712 * @param[in] intm nEN falling interrupt mask bit to be written. 00713 * 00714 * @return 0 on success, error code on failure. 00715 */ 00716 int SetnENFallingInterruptMask(intm_t intm); 00717 00718 /** 00719 * @brief Get nEN Falling Interrupt Mask. 00720 * 00721 * @param[out] intm nEN falling interrupt mask bit to be read. 00722 * 00723 * @return 0 on success, error code on failure. 00724 */ 00725 int GetnENFallingInterruptMask(intm_t *intm); 00726 00727 /** 00728 * @brief Set GPI0 Rising Interrupt Mask. 00729 * 00730 * @param[in] intm GPI rising interrupt mask bit to be written. 00731 * 00732 * @return 0 on success, error code on failure. 00733 */ 00734 int SetGPI0RisingInterruptMask(intm_t intm); 00735 00736 /** 00737 * @brief Get GPI0 Rising Interrupt Mask. 00738 * 00739 * @param[out] intm GPI rising interrupt mask bit to be read. 00740 * 00741 * @return 0 on success, error code on failure. 00742 */ 00743 int GetGPI0RisingInterruptMask(intm_t *intm); 00744 00745 /** 00746 * @brief Set GPI0 Falling Interrupt Mask. 00747 * 00748 * @param[in] intm GPI falling interrupt mask bit to be written. 00749 * 00750 * @return 0 on success, error code on failure. 00751 */ 00752 int SetGPI0FallingInterruptMask(intm_t intm); 00753 00754 /** 00755 * @brief Get GPI0 Falling Interrupt Mask. 00756 * 00757 * @param[out] intm GPI falling interrupt mask bit to be read. 00758 * 00759 * @return 0 on success, error code on failure. 00760 */ 00761 int GetGPI0FallingInterruptMask(intm_t *intm); 00762 00763 /** 00764 * @brief Register Configuration 00765 * 00766 * @details 00767 * - Register : CNFG_GLBL (0x10) 00768 * - Bit Fields : [7] 00769 * - Default : 0x0 00770 * - Description : nEN Internal Pullup Resistor. 00771 */ 00772 typedef enum { 00773 PU_DIS_STRONG_NEN_PULLUP_200K, 00774 PU_DIS_WEAK_NEN_PULLUP_10M 00775 }pu_dis_t; 00776 00777 /** 00778 * @brief Set nEN Internal Pullup Resistor. 00779 * 00780 * @param[in] pu_dis nEN internal pullup resistor bit to be written. 00781 * 00782 * @return 0 on success, error code on failure. 00783 */ 00784 int SetnENInternalPullupResistor(pu_dis_t pu_dis); 00785 00786 /** 00787 * @brief Get nEN Internal Pullup Resistor. 00788 * 00789 * @param[out] pu_dis nEN internal pullup resistor bit to be read. 00790 * 00791 * @return 0 on success, error code on failure. 00792 */ 00793 int GetnENInternalPullupResistor(pu_dis_t *pu_dis); 00794 00795 /** 00796 * @brief Register Configuration 00797 * 00798 * @details 00799 * - Register : CNFG_GLBL (0x10) 00800 * - Bit Fields : [6] 00801 * - Default : 0x0 00802 * - Description : Manual Reset Time (tMRST). 00803 */ 00804 typedef enum { 00805 T_MRST_TIME_8S, 00806 T_MRST_TIME_16S 00807 }t_mrst_t; 00808 00809 /** 00810 * @brief Set the Manual Reset Time (tMRST). 00811 * 00812 * @param[in] t_mrst Manual reset time bit to be written. 00813 * 00814 * @return 0 on success, error code on failure. 00815 */ 00816 int SetManualResetTime(t_mrst_t t_mrst); 00817 00818 /** 00819 * @brief Get the Manual Reset Time (tMRST). 00820 * 00821 * @param[out] t_mrst Manual reset time bit to be read. 00822 * 00823 * @return 0 on success, error code on failure. 00824 */ 00825 int GetManualResetTime(t_mrst_t *t_mrst); 00826 00827 /** 00828 * @brief Register Configuration 00829 * 00830 * @details 00831 * - Register : CNFG_GLBL (0x10) 00832 * - Bit Fields : [5] 00833 * - Default : 0x0 00834 * - Description : Main Bias Low-Power Mode Software Request. 00835 */ 00836 typedef enum { 00837 SBIA_LPM_NORMAL_POWER_MODE, 00838 SBIA_LPM_LOWER_POWER_MODE 00839 }sbia_lpm_t; 00840 00841 /** 00842 * @brief Set Main Bias Low-Power Mode Software Request. 00843 * 00844 * @param[in] sbia_lpm main bias low-power mode software request bit to be written. 00845 * 00846 * @return 0 on success, error code on failure. 00847 */ 00848 int SetMainBiasLowerPowerModeReq(sbia_lpm_t sbia_lpm); 00849 00850 /** 00851 * @brief Get Main Bias Low-Power Mode Software Request. 00852 * 00853 * @param[out] sbia_lpm Main bias low-power mode software request bit to be read. 00854 * 00855 * @return 0 on success, error code on failure. 00856 */ 00857 int GetMainBiasLowerPowerModeReq(sbia_lpm_t *sbia_lpm); 00858 00859 /** 00860 * @brief Register Configuration 00861 * 00862 * @details 00863 * - Register : CNFG_GLBL (0x10) 00864 * - Bit Fields : [4] 00865 * - Default : 0x0 00866 * - Description : Main Bias Enable Software Request. 00867 */ 00868 typedef enum { 00869 SBIA_EN_ON_OFF_CONTROLLER, 00870 SBIA_EN_ALWAYS_ON 00871 }sbia_en_t; 00872 00873 /** 00874 * @brief Set Main Bias Enable Software Request. 00875 * 00876 * @param[in] sbia_en Main bias enable software request bit to be written. 00877 * 00878 * @return 0 on success, error code on failure. 00879 */ 00880 int SetMainBiasEnableReq(sbia_en_t sbia_en); 00881 00882 /** 00883 * @brief Get Main Bias Enable Software Request. 00884 * 00885 * @param[out] sbia_en Main bias enable software request bit to be read. 00886 * 00887 * @return 0 on success, error code on failure. 00888 */ 00889 int GetMainBiasEnableReq(sbia_en_t *sbia_en); 00890 00891 /** 00892 * @brief Register Configuration 00893 * 00894 * @details 00895 * - Register : CNFG_GLBL (0x10) 00896 * - Bit Fields : [3] 00897 * - Default : 0x0 00898 * - Description : nEN Input (ON-KEY) Default Configuration Mode. 00899 */ 00900 typedef enum { 00901 NEN_MODE_PUSH_BUTTON_MODE, 00902 NEN_MODE_SLIDE_SWITCH_MODE 00903 }nen_mode_t; 00904 00905 /** 00906 * @brief Set nEN Input (ON-KEY) Default Configuration Mode. 00907 * 00908 * @param[in] nen_mode nEN input default configuration mode bit to be written. 00909 * 00910 * @return 0 on success, error code on failure. 00911 */ 00912 int SetnEnInputMode(nen_mode_t nen_mode); 00913 00914 /** 00915 * @brief Get nEN Input (ON-KEY) Default Configuration Mode. 00916 * 00917 * @param[out] nen_mode nEN input default configuration mode bit to be read. 00918 * 00919 * @return 0 on success, error code on failure. 00920 */ 00921 int GetnEnInputMode(nen_mode_t *nen_mode); 00922 00923 /** 00924 * @brief Register Configuration 00925 * 00926 * @details 00927 * - Register : CNFG_GLBL (0x10) 00928 * - Bit Fields : [2] 00929 * - Default : 0x0 00930 * - Description : Debounce Timer Enable for the nEN Pin. 00931 */ 00932 typedef enum { 00933 DBEN_NEN_DEBOUNCE_500US, 00934 DBEN_NEN_DEBOUNCE_30MS 00935 }dben_nen_t; 00936 00937 /** 00938 * @brief Set Debounce Timer Enable for the nEN Pin. 00939 * 00940 * @param[in] dben_nen Debounce timer enable for the nEN pin bit to be written. 00941 * 00942 * @return 0 on success, error code on failure. 00943 */ 00944 int SetDebounceTimerEnable(dben_nen_t dben_nen); 00945 00946 /** 00947 * @brief Get Debounce Timer Enable for the nEN Pin. 00948 * 00949 * @param[out] dben_nen Debounce timer enable for the nEN pin bit to be read. 00950 * 00951 * @return 0 on success, error code on failure. 00952 */ 00953 int GetDebounceTimerEnable(dben_nen_t *dben_nen); 00954 00955 /** 00956 * @brief Register Configuration 00957 * 00958 * @details 00959 * - Register : CNFG_GLBL (0x10) 00960 * - Bit Fields : [1:0] 00961 * - Default : 0x0 00962 * - Description : Software Reset Functions. 00963 */ 00964 typedef enum { 00965 SFT_CTRL_NO_ACTION, 00966 SFT_CTRL_SOFTWARE_COLD_RESET, 00967 SFT_CTRL_SOFTWARE_OFF, 00968 SFT_CTRL_FACTORY_SHIP_MODE_ENTER 00969 }sft_ctrl_t; 00970 00971 /** 00972 * @brief Set Software Reset Functions. 00973 * 00974 * @param[in] sft_ctrl Software reset functions field to be written. 00975 * 00976 * @return 0 on success, error code on failure. 00977 */ 00978 int SetSoftwareResetFunctions(sft_ctrl_t sft_ctrl); 00979 00980 /** 00981 * @brief Get Software Reset Functions. 00982 * 00983 * @param[out] sft_ctrl Software reset functions field to be read. 00984 * 00985 * @return 0 on success, error code on failure. 00986 */ 00987 int GetSoftwareResetFunctions(sft_ctrl_t *sft_ctrl); 00988 00989 /** 00990 * @brief Register Configuration 00991 * 00992 * @details 00993 * - Register : CNFG_GPIO0 (0x11), CNFG_GPIO1 (0x12) and CNFG_GPIO2 (0x13) 00994 * - Bit Fields : [5] 00995 * - Default : 0x0 00996 * - Description : Alternate Mode Enable for GPIO 0, 1 or 2. 00997 */ 00998 typedef enum { 00999 ALT_GPIO_STANDARD_GPI_OR_GPO, 01000 ALT_GPIO_FLEX_POWER_OR_SSB2_ENABLE_OR_BIAS_LPM 01001 }alt_gpio_t; 01002 01003 /** 01004 * @brief Set Alternate Mode Enable for GPIO. 01005 * 01006 * @param[in] channel Channel number: 0, 1 or 2 01007 * @param[in] alt_gpio Alternate mode enable for GPIO bit to be written. 01008 * 01009 * @return 0 on success, error code on failure. 01010 */ 01011 int SetAlternateModeEnable(uint8_t channel, alt_gpio_t alt_gpio); 01012 01013 /** 01014 * @brief Get Alternate Mode Enable for GPIO. 01015 * 01016 * @param[in] channel Channel number: 0, 1 or 2 01017 * @param[out] alt_gpio Alternate mode enable for GPIO bit to be read. 01018 * 01019 * @return 0 on success, error code on failure. 01020 */ 01021 int GetAlternateModeEnable(uint8_t channel, alt_gpio_t *alt_gpio); 01022 01023 /** 01024 * @brief Register Configuration 01025 * 01026 * @details 01027 * - Register : CNFG_GPIO0 (0x11), CNFG_GPIO1 (0x12) and CNFG_GPIO2 (0x13) 01028 * - Bit Fields : [4] 01029 * - Default : 0x0 01030 * - Description : General Purpose Input Debounce Timer Enable for GPIO 0, 1 or 2. 01031 */ 01032 typedef enum { 01033 DBEN_GPI_NO_DEBOUNCE, 01034 DBEN_GPI_DEBOUNCE_30MS 01035 }dben_gpi_t; 01036 01037 /** 01038 * @brief Set General Purpose Input Debounce Timer Enable. 01039 * 01040 * @param[in] channel Channel number: 0, 1 or 2 01041 * @param[in] dben_gpi General purpose input debounce timer enable bit to be written. 01042 * 01043 * @return 0 on success, error code on failure. 01044 */ 01045 int SetGPIDebounceTimerEnable(uint8_t channel, dben_gpi_t dben_gpi); 01046 01047 /** 01048 * @brief Get General Purpose Input Debounce Timer Enable. 01049 * 01050 * @param[in] channel Channel number: 0, 1 or 2 01051 * @param[out] dben_gpi General purpose input debounce timer enable bit to be read. 01052 * 01053 * @return 0 on success, error code on failure. 01054 */ 01055 int GetGPIDebounceTimerEnable(uint8_t channel, dben_gpi_t *dben_gpi); 01056 01057 /** 01058 * @brief Register Configuration 01059 * 01060 * @details 01061 * - Register : CNFG_GPIO0 (0x11), CNFG_GPIO1 (0x12) and CNFG_GPIO2 (0x13) 01062 * - Bit Fields : [3] 01063 * - Default : 0x0 01064 * - Description : General Purpose Output Data Output for GPIO 0, 1 or 2. 01065 */ 01066 typedef enum { 01067 GPO_DO_LOGIC_LOW, 01068 GPO_DO_LOGIC_HIGH 01069 }gpo_do_t; 01070 01071 /** 01072 * @brief Set General Purpose Output Data Output. 01073 * 01074 * @param[in] channel Channel number: 0, 1 or 2 01075 * @param[in] gpo_do General purpose output data output bit to be written. 01076 * 01077 * @return 0 on success, error code on failure. 01078 */ 01079 int SetGPODataOutput(uint8_t channel, gpo_do_t gpo_do); 01080 01081 /** 01082 * @brief Get General Purpose Output Data Output. 01083 * 01084 * @param[in] channel Channel number: 0, 1 or 2 01085 * @param[out] gpo_do General purpose output data output bit to be read. 01086 * 01087 * @return 0 on success, error code on failure. 01088 */ 01089 int GetGPODataOutput(uint8_t channel, gpo_do_t *gpo_do); 01090 01091 /** 01092 * @brief Register Configuration 01093 * 01094 * @details 01095 * - Register : CNFG_GPIO0 (0x11), CNFG_GPIO1 (0x12) and CNFG_GPIO2 (0x13) 01096 * - Bit Fields : [2] 01097 * - Default : 0x0 01098 * - Description : General Purpose Output Driver Type for GPIO 0, 1 or 2. 01099 */ 01100 typedef enum { 01101 GPO_DRV_OPEN_DRAIN, 01102 GPO_DRV_PUSH_PULL 01103 }gpo_drv_t; 01104 01105 /** 01106 * @brief Set General Purpose Output Driver Type. 01107 * 01108 * @param[in] channel Channel number: 0, 1 or 2 01109 * @param[in] gpo_drv General purpose output driver type bit to be written. 01110 * 01111 * @return 0 on success, error code on failure. 01112 */ 01113 int SetGPODriveType(uint8_t channel, gpo_drv_t gpo_drv); 01114 01115 /** 01116 * @brief Get General Purpose Output Driver Type. 01117 * 01118 * @param[in] channel Channel number: 0, 1 or 2 01119 * @param[out] gpo_drv General purpose output driver type bit to be read. 01120 * 01121 * @return 0 on success, error code on failure. 01122 */ 01123 int GetGPODriveType(uint8_t channel, gpo_drv_t *gpo_drv); 01124 01125 /** 01126 * @brief Register Configuration 01127 * 01128 * @details 01129 * - Register : CNFG_GPIO0 (0x11), CNFG_GPIO1 (0x12) and CNFG_GPIO2 (0x13) 01130 * - Bit Fields : [1] 01131 * - Default : 0x0 01132 * - Description : GPIO Digital Input Value for GPIO 0, 1 or 2. 01133 */ 01134 typedef enum { 01135 GPO_DI_INPUT_LOGIC_LOW, 01136 GPO_DI_INPUT_LOGIC_HIGH 01137 }gpo_di_t; 01138 01139 /** 01140 * @brief Set GPIO Digital Input Value. 01141 * 01142 * @param[in] channel Channel number: 0, 1 or 2 01143 * @param[in] gpo_di GPIO digital input value bit to be written. 01144 * 01145 * @return 0 on success, error code on failure. 01146 */ 01147 int SetGPIOInputValue(uint8_t channel, gpo_di_t gpo_di); 01148 01149 /** 01150 * @brief Get GPIO Digital Input Value. 01151 * 01152 * @param[in] channel Channel number: 0, 1 or 2 01153 * @param[out] gpo_di GPIO digital input value bit to be read. 01154 * 01155 * @return 0 on success, error code on failure. 01156 */ 01157 int GetGPIOInputValue(uint8_t channel, gpo_di_t *gpo_di); 01158 01159 /** 01160 * @brief Register Configuration 01161 * 01162 * @details 01163 * - Register : CNFG_GPIO0 (0x11), CNFG_GPIO1 (0x12) and CNFG_GPIO2 (0x13) 01164 * - Bit Fields : [0] 01165 * - Default : 0x0 01166 * - Description : GPIO Direction for GPIO 0, 1 or 2. 01167 */ 01168 typedef enum { 01169 GPO_DIR_GPO, 01170 GPO_DIR_GPI 01171 }gpo_dir_t; 01172 01173 /** 01174 * @brief Set GPIO Direction. 01175 * 01176 * @param[in] channel Channel number: 0, 1 or 2 01177 * @param[in] gpo_dir GPIO direction bit to be written. 01178 * 01179 * @return 0 on success, error code on failure. 01180 */ 01181 int SetGPIODirection(uint8_t channel, gpo_dir_t gpo_dir); 01182 01183 /** 01184 * @brief Get GPIO Direction. 01185 * 01186 * @param[in] channel Channel number 01187 * @param[out] gpo_dir GPIO direction bit to be read. 01188 * 01189 * @return 0 on success, error code on failure. 01190 */ 01191 int GetGPIODirection(uint8_t channel, gpo_dir_t *gpo_dir); 01192 01193 /** 01194 * @brief Read the CID 01195 * @details Read and return Chip Identification Code register value 01196 * @returns CID if no errors, error code on failure. 01197 */ 01198 int GetCID(void); 01199 01200 /** 01201 * @brief Register Configuration 01202 * 01203 * @details 01204 * - Register : CNFG_WDT (0x17) 01205 * - Bit Fields : [5:4] 01206 * - Default : 0x0 01207 * - Description : Watchdog Timer Period. 01208 */ 01209 typedef enum { 01210 WDT_PER_SECOND_16S, 01211 WDT_PER_SECOND_32S, 01212 WDT_PER_SECOND_64S, 01213 WDT_PER_SECOND_128S 01214 }wdt_per_t; 01215 01216 /** 01217 * @brief Set Watchdog Timer Period. 01218 * 01219 * @param[in] wdt_per Watchdog timer period bit to be written. 01220 * 01221 * @return 0 on success, error code on failure. 01222 */ 01223 int SetWatchdogTimerPeriod(wdt_per_t wdt_per); 01224 01225 /** 01226 * @brief Get Watchdog Timer Period. 01227 * 01228 * @param[out] wdt_per Watchdog timer period bit to be read. 01229 * 01230 * @return 0 on success, error code on failure. 01231 */ 01232 int GetWatchdogTimerPeriod(wdt_per_t *wdt_per); 01233 01234 /** 01235 * @brief Register Configuration 01236 * 01237 * @details 01238 * - Register : CNFG_WDT (0x17) 01239 * - Bit Fields : [3] 01240 * - Default : 0x0 01241 * - Description : Watchdog Timer Expired Action. 01242 */ 01243 typedef enum { 01244 WDT_MODE_POWER_OFF, 01245 WDT_MODE_POWER_RESET 01246 }wdt_mode_t; 01247 01248 /** 01249 * @brief Set Watchdog Timer Expired Action. 01250 * 01251 * @param[in] wdt_mode Watchdog timer expired action bit to be written. 01252 * 01253 * @return 0 on success, error code on failure. 01254 */ 01255 int SetWatchdogTimerExpiredAction(wdt_mode_t wdt_mode); 01256 01257 /** 01258 * @brief Get Watchdog Timer Expired Action. 01259 * 01260 * @param[out] wdt_mode Watchdog timer expired action bit to be read. 01261 * 01262 * @return 0 on success, error code on failure. 01263 */ 01264 int GetWatchdogTimerExpiredAction(wdt_mode_t *wdt_mode); 01265 01266 /** 01267 * @brief Register Configuration 01268 * 01269 * @details 01270 * - Register : CNFG_WDT (0x17) 01271 * - Bit Fields : [2] 01272 * - Default : 0x0 01273 * - Description : Watchdog Timer Clear Control. 01274 */ 01275 typedef enum { 01276 WDT_CLR_PERIOD_NOT_RESET, 01277 WDT_CLR_PERIOD_RESET 01278 }wdt_clr_t; 01279 01280 /** 01281 * @brief Set Watchdog Timer Clear Control. 01282 * 01283 * @param[in] wdt_clr Watchdog timer clear control bit to be written. 01284 * 01285 * @return 0 on success, error code on failure. 01286 */ 01287 int SetWatchdogTimerClearControl(wdt_clr_t wdt_clr); 01288 01289 /** 01290 * @brief Get Watchdog Timer Clear Control. 01291 * 01292 * @param[out] wdt_clr Watchdog timer clear control bit to be read. 01293 * 01294 * @return 0 on success, error code on failure. 01295 */ 01296 int GetWatchdogTimerClearControl(wdt_clr_t *wdt_clr); 01297 01298 /** 01299 * @brief Register Configuration 01300 * 01301 * @details 01302 * - Register : CNFG_WDT (0x17) 01303 * - Bit Fields : [1] 01304 * - Default : 0x0 01305 * - Description : Watchdog Timer Enable. 01306 */ 01307 typedef enum { 01308 WDT_EN_DISABLED, 01309 WDT_EN_ENABLED 01310 }wdt_en_t; 01311 01312 /** 01313 * @brief Set Watchdog Timer Enable. 01314 * 01315 * @param[in] wdt_en Watchdog timer enable bit to be written. 01316 * 01317 * @return 0 on success, error code on failure. 01318 */ 01319 int SetWatchdogTimerEnable(wdt_en_t wdt_en); 01320 01321 /** 01322 * @brief Get Watchdog Timer Enable. 01323 * 01324 * @param[out] wdt_en Watchdog timer enable bit to be read. 01325 * 01326 * @return 0 on success, error code on failure. 01327 */ 01328 int GetWatchdogTimerEnable(wdt_en_t *wdt_en); 01329 01330 /** 01331 * @brief Register Configuration 01332 * 01333 * @details 01334 * - Register : CNFG_WDT (0x17) 01335 * - Bit Fields : [0] 01336 * - Default : 0x0 01337 * - Description : Factory-Set Safety Bit for the Watchdog Timer. 01338 */ 01339 typedef enum { 01340 WDT_LOCK_UNLOCKED, 01341 WDT_LOCK_LOCKED 01342 }wdt_lock_t; 01343 01344 /** 01345 * @brief Set Factory-Set Safety Bit for the Watchdog Timer. 01346 * 01347 * @param[in] wdt_lock Factory-set safety bit for the watchdog timer to be written. 01348 * 01349 * @return 0 on success, error code on failure. 01350 */ 01351 int SetFactorySetSafetyBit(wdt_lock_t wdt_lock); 01352 01353 /** 01354 * @brief Get Factory-Set Safety Bit for the Watchdog Timer. 01355 * 01356 * @param[out] wdt_lock Factory-set safety bit for the watchdog timer to be read. 01357 * 01358 * @return 0 on success, error code on failure. 01359 */ 01360 int GetFactorySetSafetyBit(wdt_lock_t *wdt_lock); 01361 01362 /** 01363 * @brief Register Configuration 01364 * 01365 * @details 01366 * - Register : STAT_CHG_A (0x02) 01367 * - Bit Fields : [6:3] 01368 * - Default : 0x0 01369 * - Description : Status bits if it is engaged or not. 01370 */ 01371 typedef enum { 01372 STAT_EN_NOT_ENGAGED, 01373 STAT_EN_ENGAGED 01374 }stat_t; 01375 01376 /** 01377 * @brief Get Minimum Input Voltage Regulation Loop Status. 01378 * 01379 * @param[out] stat Status bit to be read. 01380 * 01381 * @return 0 on success, error code on failure. 01382 */ 01383 int GetMinimumVCHGINVoltageLoopStatus(stat_t *stat); 01384 01385 /** 01386 * @brief Get Input Current Limit Loop Status. 01387 * 01388 * @param[out] stat Status bit to be read. 01389 * 01390 * @return 0 on success, error code on failure. 01391 */ 01392 int GetCHGINCurrentLimitLoopStatus(stat_t *stat); 01393 01394 /** 01395 * @brief Get Minimum System Voltage Regulation Loop Status. 01396 * 01397 * @param[out] stat Status bit to be read. 01398 * 01399 * @return 0 on success, error code on failure. 01400 */ 01401 int GetMinimumSYSVoltageLoopStatus(stat_t *stat); 01402 01403 /** 01404 * @brief Get Maximum Junction Temperature Regulation Loop Status. 01405 * 01406 * @param[out] stat Status bit to be read. 01407 * 01408 * @return 0 on success, error code on failure. 01409 */ 01410 int GetMaximumJunctionTempLoopStatus(stat_t *stat); 01411 01412 /** 01413 * @brief Register Configuration 01414 * 01415 * @details 01416 * - Register : STAT_CHG_A (0x02) 01417 * - Bit Fields : [2:0] 01418 * - Default : 0x0 01419 * - Description : Battery Temperature Details. 01420 */ 01421 typedef enum { 01422 THM_DTLS_THERMISTOR_DISABLED, 01423 THM_DTLS_BATTERY_COLD, 01424 THM_DTLS_BATTERY_COOL, 01425 THM_DTLS_BATTERY_WARM, 01426 THM_DTLS_BATTERY_HOT, 01427 THM_DTLS_BATTERY_NORMAL, 01428 THM_DTLS_RESERVED_0x06, 01429 THM_DTLS_RESERVED_0x07 01430 }thm_dtls_t; 01431 01432 /** 01433 * @brief Get Battery Temperature Details. 01434 * Valid only when CHGIN_DTLS[1:0] = 0b11. 01435 * 01436 * @param[out] thm_dtls Battery temperature details field to be read. 01437 * 01438 * @return 0 on success, error code on failure. 01439 */ 01440 int GetBatteryTemperatureDetails(thm_dtls_t *thm_dtls); 01441 01442 /** 01443 * @brief Register Configuration 01444 * 01445 * @details 01446 * - Register : STAT_CHG_B (0x03) 01447 * - Bit Fields : [7:4] 01448 * - Default : 0x0 01449 * - Description : Charger Details. 01450 */ 01451 typedef enum { 01452 CHG_DTLS_OFF, 01453 CHG_DTLS_PREQUALIFICATION_MODE, 01454 CHG_DTLS_FAST_CHARGE_CC, 01455 CHG_DTLS_JEITA_FAST_CHARGE_CC, 01456 CHG_DTLS_FAST_CHARGE_CV, 01457 CHG_DTLS_JEITA_FAST_CHARGE_CV, 01458 CHG_DTLS_TOP_OFF_MODE, 01459 CHG_DTLS_JEITA_MODIFIED_TOP_OFF_MODE, 01460 CHG_DTLS_DONE, 01461 CHG_DTLS_JEITA_MODIFIED_DONE, 01462 CHG_DTLS_PREQUALIFICATION_TIMER_FAULT, 01463 CHG_DTLS_FAST_CHARGE_TIMER_FAULT, 01464 CHG_DTLS_BATTERY_TEMPERATURE_FAULT, 01465 CHG_DTLS_RESERVED_0x0D, 01466 CHG_DTLS_RESERVED_0x0E, 01467 CHG_DTLS_RESERVED_0x0F 01468 }chg_dtls_t; 01469 01470 /** 01471 * @brief Get Charger Details. 01472 * 01473 * @param[out] chg_dtls Charger details field to be read. 01474 * 01475 * @return 0 on success, error code on failure. 01476 */ 01477 int GetChargerDetails(chg_dtls_t *chg_dtls); 01478 01479 /** 01480 * @brief Register Configuration 01481 * 01482 * @details 01483 * - Register : STAT_CHG_B (0x03) 01484 * - Bit Fields : [3:2] 01485 * - Default : 0x0 01486 * - Description : CHGIN Status Detail. 01487 */ 01488 typedef enum { 01489 CHGIN_DTLS_VOLTAGE_BELOW_UVLO, 01490 CHGIN_DTLS_VOLTAGE_ABOVE_OVP, 01491 CHGIN_DTLS_DEBOUNCED, 01492 CHGIN_DTLS_OKAY 01493 }chgin_dtls_t; 01494 01495 /** 01496 * @brief Get CHGIN Status Detail. 01497 * 01498 * @param[out] chgin_dtls CHGIN status detail field to be read. 01499 * 01500 * @return 0 on success, error code on failure. 01501 */ 01502 int GetCHGINStatusDetails(chgin_dtls_t *chgin_dtls); 01503 01504 /** 01505 * @brief Register Configuration 01506 * 01507 * @details 01508 * - Register : STAT_CHG_B (0x03) 01509 * - Bit Fields : [1] 01510 * - Default : 0x0 01511 * - Description : Quick Charger Status. 01512 */ 01513 typedef enum { 01514 CHG_CHARGING_NOT_HAPPENING, 01515 CHG_CHARGING_HAPPENING 01516 }chg_t; 01517 01518 /** 01519 * @brief Get Quick Charger Status. 01520 * 01521 * @param[out] chg Quick charger status bit to be read. 01522 * 01523 * @return 0 on success, error code on failure. 01524 */ 01525 int GetQuickChargerStatus(chg_t *chg); 01526 01527 /** 01528 * @brief Register Configuration 01529 * 01530 * @details 01531 * - Register : STAT_CHG_B (0x03) 01532 * - Bit Fields : [0] 01533 * - Default : 0x0 01534 * - Description : Time Suspend Indicator. 01535 */ 01536 typedef enum { 01537 TIME_SUS_CHARGER_TIMER_NOT_SUSPENDED, 01538 TIME_SUS_CHARGER_TIMER_SUSPENDED 01539 }time_sus_t; 01540 01541 /** 01542 * @brief Get Time Suspend Indicator. 01543 * 01544 * @param[out] time_sus Time suspend indicator bit to be read. 01545 * 01546 * @return 0 on success, error code on failure. 01547 */ 01548 int GetTimeSuspendedIndicator(time_sus_t *time_sus); 01549 01550 /** 01551 * @brief Set SYS_CNFG_I. 01552 * Setting this bit prevents the SYS_CNFG_I bit from causing hardware IRQs 01553 * 01554 * @param[in] intm Interrupt mask bit to be written. 01555 * 01556 * @return 0 on success, error code on failure. 01557 */ 01558 int SetSYSCONFIGMBit(intm_t intm); 01559 01560 /** 01561 * @brief Get SYS_CNFG_I. 01562 * Setting this bit prevents the SYS_CNFG_I bit from causing hardware IRQs 01563 * 01564 * @param[out] intm Interrupt mask bit to be read. 01565 * 01566 * @return 0 on success, error code on failure. 01567 */ 01568 int GetSYSCONFIGMBit(intm_t *intm); 01569 01570 /** 01571 * @brief Set SYS_CTRL_I. 01572 * Setting this bit prevents the SYS_CTRL_I bit from causing hardware IRQs 01573 * 01574 * @param[in] intm Interrupt mask bit to be written. 01575 * 01576 * @return 0 on success, error code on failure. 01577 */ 01578 int SetSYSCTRLMBit(intm_t intm); 01579 01580 /** 01581 * @brief Get SYS_CTRL_I. 01582 * Setting this bit prevents the SYS_CTRL_I bit from causing hardware IRQs 01583 * 01584 * @param[out] intm Interrupt mask bit to be read. 01585 * 01586 * @return 0 on success, error code on failure. 01587 */ 01588 int GetSYSCTRLMBit(intm_t *intm); 01589 01590 /** 01591 * @brief Set CHGIN_CTRL_I. 01592 * Setting this bit prevents the CHGIN_CTRL_I bit from causing hardware IRQs 01593 * 01594 * @param[in] intm Interrupt mask bit to be written. 01595 * 01596 * @return 0 on success, error code on failure. 01597 */ 01598 int SetCHGINCTRLMBit(intm_t intm); 01599 01600 /** 01601 * @brief Get CHGIN_CTRL_I. 01602 * Setting this bit prevents the CHGIN_CTRL_I bit from causing hardware IRQs 01603 * 01604 * @param[out] intm Interrupt mask bit to be read. 01605 * 01606 * @return 0 on success, error code on failure. 01607 */ 01608 int GetCHGINCTRLMBit(intm_t *intm); 01609 01610 /** 01611 * @brief Set TJREG_I. 01612 * Setting this bit prevents the TJREG_I bit from causing hardware IRQs 01613 * 01614 * @param[in] intm Interrupt mask bit to be written. 01615 * 01616 * @return 0 on success, error code on failure. 01617 */ 01618 int SetTJREGMBit(intm_t intm); 01619 01620 /** 01621 * @brief Get TJREG_I. 01622 * Setting this bit prevents the TJREG_I bit from causing hardware IRQs 01623 * 01624 * @param[out] intm Interrupt mask bit to be read. 01625 * 01626 * @return 0 on success, error code on failure. 01627 */ 01628 int GetTJREGMBit(intm_t *intm); 01629 01630 /** 01631 * @brief Set CHGIN_I. 01632 * Setting this bit prevents the CHGIN_I bit from causing hardware IRQs 01633 * 01634 * @param[in] intm Interrupt mask bit to be written. 01635 * 01636 * @return 0 on success, error code on failure. 01637 */ 01638 int SetCHGINMBit(intm_t intm); 01639 01640 /** 01641 * @brief Get CHGIN_I. 01642 * Setting this bit prevents the CHGIN_I bit from causing hardware IRQs 01643 * 01644 * @param[out] intm Interrupt mask bit to be read. 01645 * 01646 * @return 0 on success, error code on failure. 01647 */ 01648 int GetCHGINMBit(intm_t *intm); 01649 01650 /** 01651 * @brief Set CHG_I. 01652 * Setting this bit prevents the CHG_I bit from causing hardware IRQs 01653 * 01654 * @param[in] intm Interrupt mask bit to be written. 01655 * 01656 * @return 0 on success, error code on failure. 01657 */ 01658 int SetCHGMBit(intm_t intm); 01659 01660 /** 01661 * @brief Get CHG_I. 01662 * Setting this bit prevents the CHG_I bit from causing hardware IRQs 01663 * 01664 * @param[out] intm Interrupt mask bit to be read. 01665 * 01666 * @return 0 on success, error code on failure. 01667 */ 01668 int GetCHGMBit(intm_t *intm); 01669 01670 /** 01671 * @brief Set THM_I. 01672 * Setting this bit prevents the THM_I bit from causing hardware IRQs 01673 * 01674 * @param[in] intm Interrupt mask bit to be written. 01675 * 01676 * @return 0 on success, error code on failure. 01677 */ 01678 int SetTHMMBit(intm_t intm); 01679 01680 /** 01681 * @brief Get THM_I. 01682 * Setting this bit prevents the THM_I bit from causing hardware IRQs 01683 * 01684 * @param[out] intm Interrupt mask bit to be read. 01685 * 01686 * @return 0 on success, error code on failure. 01687 */ 01688 int GetTHMMBit(intm_t *intm); 01689 01690 /** 01691 * @brief Register Configuration 01692 * 01693 * @details 01694 * - Register : CNFG_CHG_A (0x20) 01695 * - Bit Fields : [7:6] 01696 * - Default : 0x0 01697 * - Description : VHOT JEITA Temperature Threshold. 01698 */ 01699 typedef enum { 01700 THM_HOT_VOLT_0_411V, 01701 THM_HOT_VOLT_0_367V, 01702 THM_HOT_VOLT_0_327V, 01703 THM_HOT_VOLT_0_291V 01704 }thm_hot_t; 01705 01706 /** 01707 * @brief Set the VHOT JEITA Temperature Threshold. 01708 * 01709 * @param[in] thm_hot The VHOT JEITA temperature threshold field to be written. 01710 * 01711 * @return 0 on success, error code on failure. 01712 */ 01713 int SetHOTJEITATemperature(thm_hot_t thm_hot); 01714 01715 /** 01716 * @brief Get the VHOT JEITA Temperature Threshold. 01717 * 01718 * @param[out] thm_hot The VHOT JEITA temperature threshold field to be read. 01719 * 01720 * @return 0 on success, error code on failure. 01721 */ 01722 int GetHOTJEITATemperature(thm_hot_t *thm_hot); 01723 01724 /** 01725 * @brief Register Configuration 01726 * 01727 * @details 01728 * - Register : CNFG_CHG_A (0x20) 01729 * - Bit Fields : [5:4] 01730 * - Default : 0x0 01731 * - Description : VWARM JEITA Temperature Threshold. 01732 */ 01733 typedef enum { 01734 THM_WARM_VOLT_0_511V, 01735 THM_WARM_VOLT_0_459V, 01736 THM_WARM_VOLT_0_411V, 01737 THM_WARM_VOLT_0_367V 01738 }thm_warm_t; 01739 01740 /** 01741 * @brief Set the VWARM JEITA Temperature Threshold. 01742 * 01743 * @param[in] thm_warm The VWARM JEITA temperature threshold field to be written. 01744 * 01745 * @return 0 on success, error code on failure. 01746 */ 01747 int SetWARMJEITATemperature(thm_warm_t thm_warm); 01748 01749 /** 01750 * @brief Get the VWARM JEITA Temperature Threshold. 01751 * 01752 * @param[out] thm_warm The VWARM JEITA temperature threshold field to be read. 01753 * 01754 * @return 0 on success, error code on failure. 01755 */ 01756 int GetWARMJEITATemperature(thm_warm_t *thm_warm); 01757 01758 /** 01759 * @brief Register Configuration 01760 * 01761 * @details 01762 * - Register : CNFG_CHG_A (0x20) 01763 * - Bit Fields : [3:2] 01764 * - Default : 0x0 01765 * - Description : VCOOL JEITA Temperature Threshold. 01766 */ 01767 typedef enum { 01768 THM_COOL_VOLT_0_923V, 01769 THM_COOL_VOLT_0_867V, 01770 THM_COOL_VOLT_0_807V, 01771 THM_COOL_VOLT_0_747V 01772 }thm_cool_t; 01773 01774 /** 01775 * @brief Set the VCOOL JEITA Temperature Threshold. 01776 * 01777 * @param[in] thm_cool The VCOOL JEITA temperature threshold field to be written. 01778 * 01779 * @return 0 on success, error code on failure. 01780 */ 01781 int SetCOOLJEITATemperature(thm_cool_t thm_cool); 01782 01783 /** 01784 * @brief Get the VCOOL JEITA Temperature Threshold. 01785 * 01786 * @param[out] thm_cool The VCOOL JEITA temperature threshold field to be read. 01787 * 01788 * @return 0 on success, error code on failure. 01789 */ 01790 int GetCOOLJEITATemperature(thm_cool_t *thm_cool); 01791 01792 /** 01793 * @brief Register Configuration 01794 * 01795 * @details 01796 * - Register : CNFG_CHG_A (0x20) 01797 * - Bit Fields : [1:0] 01798 * - Default : 0x0 01799 * - Description : VCOLD JEITA Temperature Threshold. 01800 */ 01801 typedef enum { 01802 THM_COLD_VOLT_1_024V, 01803 THM_COLD_VOLT_0_976V, 01804 THM_COLD_VOLT_0_923V, 01805 THM_COLD_VOLT_0_867V 01806 }thm_cold_t; 01807 01808 /** 01809 * @brief Set the VCOLD JEITA Temperature Threshold. 01810 * 01811 * @param[in] thm_cold The VCOLD JEITA temperature threshold field to be written. 01812 * 01813 * @return 0 on success, error code on failure. 01814 */ 01815 int SetCOLDJEITATemperature(thm_cold_t thm_cold); 01816 01817 /** 01818 * @brief Get the VCOLD JEITA Temperature Threshold. 01819 * 01820 * @param[out] thm_cold The VCOLD JEITA temperature threshold field to be read. 01821 * 01822 * @return 0 on success, error code on failure. 01823 */ 01824 int GetCOLDJEITATemperature(thm_cold_t *thm_cold); 01825 01826 /** 01827 * @brief Register Configuration 01828 * 01829 * @details 01830 * - Register : CNFG_CHG_B (0x21) 01831 * - Bit Fields : [7:5] 01832 * - Default : 0x0 01833 * - Description : Minimum CHGIN Regulation Voltage. 01834 */ 01835 typedef enum { 01836 VCHGIN_MIN_VOLT_4_0V, 01837 VCHGIN_MIN_VOLT_4_1V, 01838 VCHGIN_MIN_VOLT_4_2V, 01839 VCHGIN_MIN_VOLT_4_3V, 01840 VCHGIN_MIN_VOLT_4_4V, 01841 VCHGIN_MIN_VOLT_4_5V, 01842 VCHGIN_MIN_VOLT_4_6V, 01843 VCHGIN_MIN_VOLT_4_7V 01844 }vchgin_min_t; 01845 01846 /** 01847 * @brief Set Minimum CHGIN Regulation Voltage. 01848 * 01849 * @param[in] vchgin_min Minimum CHGIN regulation voltage field to be written. 01850 * 01851 * @return 0 on success, error code on failure. 01852 */ 01853 int SetMinimumCHGINVoltage(vchgin_min_t vchgin_min); 01854 01855 /** 01856 * @brief Get Minimum CHGIN Regulation Voltage. 01857 * 01858 * @param[out] vchgin_min Minimum CHGIN regulation voltage field to be read. 01859 * 01860 * @return 0 on success, error code on failure. 01861 */ 01862 int GetMinimumCHGINVoltage(vchgin_min_t *vchgin_min); 01863 01864 /** 01865 * @brief Register Configuration 01866 * 01867 * @details 01868 * - Register : CNFG_CHG_B (0x21) 01869 * - Bit Fields : [4:2] 01870 * - Default : 0x0 01871 * - Description : CHGIN Input Current Limit. 01872 */ 01873 typedef enum { 01874 ICHGIN_LIM_AMP_95MA, 01875 ICHGIN_LIM_AMP_190MA, 01876 ICHGIN_LIM_AMP_285MA, 01877 ICHGIN_LIM_AMP_385MA, 01878 ICHGIN_LIM_AMP_475MA, 01879 ICHGIN_LIM_AMP_RESERVED_0x05, 01880 ICHGIN_LIM_AMP_RESERVED_0x06, 01881 ICHGIN_LIM_AMP_RESERVED_0x07 01882 }ichgin_lim_t; 01883 01884 /** 01885 * @brief Set CHGIN Input Current Limit. 01886 * 01887 * @param[in] ichgin_lim CHGIN input current limit field to be written. 01888 * 01889 * @return 0 on success, error code on failure. 01890 */ 01891 int SetCHGINInputCurrentLimit(ichgin_lim_t ichgin_lim); 01892 01893 /** 01894 * @brief Get CHGIN Input Current Limit. 01895 * 01896 * @param[out] ichgin_lim CHGIN input current limit field to be read. 01897 * 01898 * @return 0 on success, error code on failure. 01899 */ 01900 int GetCHGINInputCurrentLimit(ichgin_lim_t *ichgin_lim); 01901 01902 /** 01903 * @brief Register Configuration 01904 * 01905 * @details 01906 * - Register : CNFG_CHG_B (0x21) 01907 * - Bit Fields : [1] 01908 * - Default : 0x0 01909 * - Description : Prequalification Charge Current as a percentage of IFAST-CHG. 01910 */ 01911 typedef enum { 01912 I_PQ_PERCENT_10, 01913 I_PQ_PERCENT_20 01914 }i_pq_t; 01915 01916 /** 01917 * @brief Set the Prequalification Charge Current as a percentage of IFAST-CHG. 01918 * 01919 * @param[in] i_pq The prequalification charge current bit to be written. 01920 * 01921 * @return 0 on success, error code on failure. 01922 */ 01923 int SetPrequalificationChargeCurrent(i_pq_t i_pq); 01924 01925 /** 01926 * @brief Get the Prequalification Charge Current as a percentage of IFAST-CHG. 01927 * 01928 * @param[out] i_pq the prequalification charge current bit to be read. 01929 * 01930 * @return 0 on success, error code on failure. 01931 */ 01932 int GetPrequalificationChargeCurrent(i_pq_t *i_pq); 01933 01934 /** 01935 * @brief Register Configuration 01936 * 01937 * @details 01938 * - Register : CNFG_CHG_B (0x21) 01939 * - Bit Fields : [0] 01940 * - Default : 0x0 01941 * - Description : Charger Enable. 01942 */ 01943 typedef enum { 01944 CHG_EN_BATTERY_CHARGER_DISABLED, 01945 CHG_EN_BATTERY_CHARGER_ENABLED 01946 }chg_en_t; 01947 01948 /** 01949 * @brief Set Charger Enable. 01950 * 01951 * @param[in] chg_en Charger enable bit to be written. 01952 * 01953 * @return 0 on success, error code on failure. 01954 */ 01955 int SetBatteryChargerEnable(chg_en_t chg_en); 01956 01957 /** 01958 * @brief Get Charger Enable. 01959 * 01960 * @param[out] chg_en Charger enable bit to be read. 01961 * 01962 * @return 0 on success, error code on failure. 01963 */ 01964 int GetBatteryChargerEnable(chg_en_t *chg_en); 01965 01966 /** 01967 * @brief Register Configuration 01968 * 01969 * @details 01970 * - Register : CNFG_CHG_C (0x22) 01971 * - Bit Fields : [7:5] 01972 * - Default : 0x0 01973 * - Description : Battery Prequalification Voltage Threshold (VPQ). 01974 */ 01975 typedef enum { 01976 CHG_PQ_VOLT_2_3V, 01977 CHG_PQ_VOLT_2_4V, 01978 CHG_PQ_VOLT_2_5V, 01979 CHG_PQ_VOLT_2_6V, 01980 CHG_PQ_VOLT_2_7V, 01981 CHG_PQ_VOLT_2_8V, 01982 CHG_PQ_VOLT_2_9V, 01983 CHG_PQ_VOLT_3_0V 01984 }chg_pq_t; 01985 01986 /** 01987 * @brief Set Battery Prequalification Voltage Threshold (VPQ). 01988 * 01989 * @param[in] chg_pq Battery prequalification voltage threshold field to be written. 01990 * 01991 * @return 0 on success, error code on failure. 01992 */ 01993 int SetBatteryPQVoltageThreshold(chg_pq_t chg_pq); 01994 01995 /** 01996 * @brief Get Battery Prequalification Voltage Threshold (VPQ). 01997 * 01998 * @param[out] chg_pq Battery prequalification voltage threshold field to be read. 01999 * 02000 * @return 0 on success, error code on failure. 02001 */ 02002 int GetBatteryPQVoltageThreshold(chg_pq_t *chg_pq); 02003 02004 /** 02005 * @brief Register Configuration 02006 * 02007 * @details 02008 * - Register : CNFG_CHG_C (0x22) 02009 * - Bit Fields : [4:3] 02010 * - Default : 0x0 02011 * - Description : Charger Termination Current (ITERM). 02012 */ 02013 typedef enum { 02014 I_TERM_PERCENT_5, 02015 I_TERM_PERCENT_7_5, 02016 I_TERM_PERCENT_10, 02017 I_TERM_PERCENT_15 02018 }i_term_t; 02019 02020 /** 02021 * @brief Set Charger Termination Current (ITERM). 02022 * I_TERM[1:0] sets the charger termination current 02023 * as a percentage of the fast charge current IFAST-CHG. 02024 * 02025 * @param[in] i_term Charger termination current field to be written. 02026 * 02027 * @return 0 on success, error code on failure. 02028 */ 02029 int SetChargerTerminationCurrent(i_term_t i_term); 02030 02031 /** 02032 * @brief Get Charger Termination Current (ITERM). 02033 * I_TERM[1:0] sets the charger termination current 02034 * as a percentage of the fast charge current IFAST-CHG. 02035 * 02036 * @param[out] i_term Charger termination current field to be read. 02037 * 02038 * @return 0 on success, error code on failure. 02039 */ 02040 int GetChargerTerminationCurrent(i_term_t *i_term); 02041 02042 /** 02043 * @brief Register Configuration 02044 * 02045 * @details 02046 * - Register : CNFG_CHG_C (0x22) 02047 * - Bit Fields : [2:0] 02048 * - Default : 0x0 02049 * - Description : Top-off Timer Value. 02050 */ 02051 typedef enum { 02052 T_TOPOFF_MINUTE_0M, 02053 T_TOPOFF_MINUTE_5M, 02054 T_TOPOFF_MINUTE_10M, 02055 T_TOPOFF_MINUTE_15M, 02056 T_TOPOFF_MINUTE_20M, 02057 T_TOPOFF_MINUTE_25M, 02058 T_TOPOFF_MINUTE_30M, 02059 T_TOPOFF_MINUTE_35M 02060 }t_topoff_t; 02061 02062 /** 02063 * @brief Set Top-off Timer Value. 02064 * 02065 * @param[in] t_topoff Top-off timer value field to be written. 02066 * 02067 * @return 0 on success, error code on failure. 02068 */ 02069 int SetTopOffTimerValue(t_topoff_t t_topoff); 02070 02071 /** 02072 * @brief Get Top-off Timer Value. 02073 * 02074 * @param[out] t_topoff Top-off timer value field to be read. 02075 * 02076 * @return 0 on success, error code on failure. 02077 */ 02078 int GetTopOffTimerValue(t_topoff_t *t_topoff); 02079 02080 /** 02081 * @brief Register Configuration 02082 * 02083 * @details 02084 * - Register : CNFG_CHG_D (0x23) 02085 * - Bit Fields : [7:5] 02086 * - Default : 0x0 02087 * - Description : Die Junction Temperature Regulation Point, TJ-REG. 02088 */ 02089 typedef enum { 02090 TJ_REG_DEGREE_60C, 02091 TJ_REG_DEGREE_70C, 02092 TJ_REG_DEGREE_80C, 02093 TJ_REG_DEGREE_90C, 02094 TJ_REG_DEGREE_100C, 02095 TJ_REG_DEGREE_100C_0x05, 02096 TJ_REG_DEGREE_100C_0x06, 02097 TJ_REG_DEGREE_100C_0x07 02098 }tj_reg_t; 02099 02100 /** 02101 * @brief Set the Die Junction Temperature Regulation Point, TJ-REG. 02102 * 02103 * @param[in] tj_reg The die junction temperature regulation point field to be written. 02104 * 02105 * @return 0 on success, error code on failure. 02106 */ 02107 int SetDieJunctionTemperature(tj_reg_t tj_reg); 02108 02109 /** 02110 * @brief Get the Die Junction Temperature Regulation Point, TJ-REG. 02111 * 02112 * @param[out] tj_reg The die junction temperature regulation point field to be read. 02113 * 02114 * @return 0 on success, error code on failure. 02115 */ 02116 int GetDieJunctionTemperature(tj_reg_t *tj_reg); 02117 02118 /** 02119 * @brief Register Configuration 02120 * 02121 * @details 02122 * - Register : CNFG_CHG_D (0x23) 02123 * - Bit Fields : [4:0] 02124 * - Default : 0x0 02125 * - Description : System Voltage Regulation (VSYS-REG). 02126 */ 02127 typedef enum { 02128 VSYS_REG_VOLT_4_100V, 02129 VSYS_REG_VOLT_4_125V, 02130 VSYS_REG_VOLT_4_150V, 02131 VSYS_REG_VOLT_4_175V, 02132 VSYS_REG_VOLT_4_200V, 02133 VSYS_REG_VOLT_4_225V, 02134 VSYS_REG_VOLT_4_250V, 02135 VSYS_REG_VOLT_4_275V, 02136 VSYS_REG_VOLT_4_300V, 02137 VSYS_REG_VOLT_4_325V, 02138 VSYS_REG_VOLT_4_350V, 02139 VSYS_REG_VOLT_4_375V, 02140 VSYS_REG_VOLT_4_400V, 02141 VSYS_REG_VOLT_4_425V, 02142 VSYS_REG_VOLT_4_450V, 02143 VSYS_REG_VOLT_4_475V, 02144 VSYS_REG_VOLT_4_500V, 02145 VSYS_REG_VOLT_4_525V, 02146 VSYS_REG_VOLT_4_550V, 02147 VSYS_REG_VOLT_4_575V, 02148 VSYS_REG_VOLT_4_600V, 02149 VSYS_REG_VOLT_4_625V, 02150 VSYS_REG_VOLT_4_650V, 02151 VSYS_REG_VOLT_4_675V, 02152 VSYS_REG_VOLT_4_700V, 02153 VSYS_REG_VOLT_4_725V, 02154 VSYS_REG_VOLT_4_750V, 02155 VSYS_REG_VOLT_4_775V, 02156 VSYS_REG_VOLT_4_800V, 02157 VSYS_REG_VOLT_4_800V_0x1D, 02158 VSYS_REG_VOLT_4_800V_0x1E, 02159 VSYS_REG_VOLT_4_800V_0x1F 02160 }vsys_reg_t; 02161 02162 /** 02163 * @brief Set System Voltage Regulation (VSYS-REG). 02164 * 02165 * @param[in] vsys_reg System voltage regulation field to be written. 02166 * 02167 * @return 0 on success, error code on failure. 02168 */ 02169 int SetSystemVoltageRegulation(vsys_reg_t vsys_reg); 02170 02171 /** 02172 * @brief Get System Voltage Regulation (VSYS-REG). 02173 * 02174 * @param[out] vsys_reg System voltage regulation field to be read. 02175 * 02176 * @return 0 on success, error code on failure. 02177 */ 02178 int GetSystemVoltageRegulation(vsys_reg_t *vsys_reg); 02179 02180 /** 02181 * @brief Register Configuration 02182 * 02183 * @details 02184 * - Register : CNFG_CHG_E (0x24), and CNFG_CHG_F (0x25) 02185 * - Bit Fields : [7:2] 02186 * - Default : 0x0 02187 * - Description : Fast-Charge Constant Current Value, IFAST-CHG or IFAST-CHG-JEITA. 02188 */ 02189 typedef enum { 02190 CHG_CC_AMP_7_5MA, 02191 CHG_CC_AMP_15_0MA, 02192 CHG_CC_AMP_22_5MA, 02193 CHG_CC_AMP_30_0MA, 02194 CHG_CC_AMP_37_5MA, 02195 CHG_CC_AMP_45_0MA, 02196 CHG_CC_AMP_52_5MA, 02197 CHG_CC_AMP_60_0MA, 02198 CHG_CC_AMP_67_5MA, 02199 CHG_CC_AMP_75_0MA, 02200 CHG_CC_AMP_82_5MA, 02201 CHG_CC_AMP_90_0MA, 02202 CHG_CC_AMP_97_5MA, 02203 CHG_CC_AMP_105_0MA, 02204 CHG_CC_AMP_112_5MA, 02205 CHG_CC_AMP_120_0MA, 02206 CHG_CC_AMP_127_5MA, 02207 CHG_CC_AMP_135_0MA, 02208 CHG_CC_AMP_142_5MA, 02209 CHG_CC_AMP_150_0MA, 02210 CHG_CC_AMP_157_5MA, 02211 CHG_CC_AMP_165_0MA, 02212 CHG_CC_AMP_172_5MA, 02213 CHG_CC_AMP_180_0MA, 02214 CHG_CC_AMP_187_5MA, 02215 CHG_CC_AMP_195_0MA, 02216 CHG_CC_AMP_202_5MA, 02217 CHG_CC_AMP_210_0MA, 02218 CHG_CC_AMP_217_5MA, 02219 CHG_CC_AMP_225_0MA, 02220 CHG_CC_AMP_232_5MA, 02221 CHG_CC_AMP_240_0MA, 02222 CHG_CC_AMP_247_5MA, 02223 CHG_CC_AMP_255_0MA, 02224 CHG_CC_AMP_262_5MA, 02225 CHG_CC_AMP_270_0MA, 02226 CHG_CC_AMP_277_5MA, 02227 CHG_CC_AMP_285_0MA, 02228 CHG_CC_AMP_292_5MA, 02229 CHG_CC_AMP_300_0MA, 02230 CHG_CC_AMP_300_0MA_0x28, 02231 CHG_CC_AMP_300_0MA_0x29, 02232 CHG_CC_AMP_300_0MA_0x2A, 02233 CHG_CC_AMP_300_0MA_0x2B, 02234 CHG_CC_AMP_300_0MA_0x2C, 02235 CHG_CC_AMP_300_0MA_0x2D, 02236 CHG_CC_AMP_300_0MA_0x2E, 02237 CHG_CC_AMP_300_0MA_0x2F, 02238 CHG_CC_AMP_300_0MA_0x30, 02239 CHG_CC_AMP_300_0MA_0x31, 02240 CHG_CC_AMP_300_0MA_0x32, 02241 CHG_CC_AMP_300_0MA_0x33, 02242 CHG_CC_AMP_300_0MA_0x34, 02243 CHG_CC_AMP_300_0MA_0x35, 02244 CHG_CC_AMP_300_0MA_0x36, 02245 CHG_CC_AMP_300_0MA_0x37, 02246 CHG_CC_AMP_300_0MA_0x38, 02247 CHG_CC_AMP_300_0MA_0x39, 02248 CHG_CC_AMP_300_0MA_0x3A, 02249 CHG_CC_AMP_300_0MA_0x3B, 02250 CHG_CC_AMP_300_0MA_0x3C, 02251 CHG_CC_AMP_300_0MA_0x3D, 02252 CHG_CC_AMP_300_0MA_0x3E, 02253 CHG_CC_AMP_300_0MA_0x3F 02254 }chg_cc_t; 02255 02256 /** 02257 * @brief Set the Fast-Charge Constant Current Value, IFAST-CHG. 02258 * 02259 * @param[in] chg_cc the fast-charge constant current value field to be written. 02260 * 02261 * @return 0 on success, error code on failure. 02262 */ 02263 int SetFastChargeCCValue(chg_cc_t chg_cc); 02264 02265 /** 02266 * @brief Get the Fast-Charge Constant Current Value, IFAST-CHG. 02267 * 02268 * @param[out] chg_cc the fast-charge constant current value field to be read. 02269 * 02270 * @return 0 on success, error code on failure. 02271 */ 02272 int GetFastChargeCCValue(chg_cc_t *chg_cc); 02273 02274 /** 02275 * @brief Register Configuration 02276 * 02277 * @details 02278 * - Register : CNFG_CHG_E (0x24) 02279 * - Bit Fields : [1:0] 02280 * - Default : 0x0 02281 * - Description : Fast-charge Safety timer, tFC. 02282 */ 02283 typedef enum { 02284 T_FAST_CHG_TIMER_DISABLED, 02285 T_FAST_CHG_HOUR_3H, 02286 T_FAST_CHG_HOUR_5H, 02287 T_FAST_CHG_HOUR_7H 02288 }t_fast_chg_t; 02289 02290 /** 02291 * @brief Set the Fast-charge Safety timer, tFC. 02292 * 02293 * @param[in] t_fast_chg Fast-charge safety timer field to be written. 02294 * 02295 * @return 0 on success, error code on failure. 02296 */ 02297 int SetFastChargSafetyTimer(t_fast_chg_t t_fast_chg); 02298 02299 /** 02300 * @brief Get the Fast-charge Safety timer, tFC. 02301 * 02302 * @param[out] t_fast_chg Fast-charge safety timer field to be read. 02303 * 02304 * @return 0 on success, error code on failure. 02305 */ 02306 int GetFastChargSafetyTimer(t_fast_chg_t *t_fast_chg); 02307 02308 /** 02309 * @brief Set IFAST-CHG-JEITA 02310 * when the battery is either cool or warm as defined by the 02311 * VCOOL and VWARM temperature thresholds.. 02312 * 02313 * @param[in] chg_cc_jeita IFAST-CHG-JEITA field to be written. 02314 * 02315 * @return 0 on success, error code on failure. 02316 */ 02317 int SetFastChargeCCJEITA(chg_cc_t chg_cc_jeita); 02318 02319 /** 02320 * @brief Get IFAST-CHG-JEITA 02321 * when the battery is either cool or warm as defined by the 02322 * VCOOL and VWARM temperature thresholds. 02323 * 02324 * @param[out] chg_cc_jeita IFAST-CHG-JEITA field to be read. 02325 * 02326 * @return 0 on success, error code on failure. 02327 */ 02328 int GetFastChargeCCJEITA(chg_cc_t *chg_cc_jeita); 02329 02330 /** 02331 * @brief Register Configuration 02332 * 02333 * @details 02334 * - Register : CNFG_CHG_F (0x25) 02335 * - Bit Fields : [1] 02336 * - Default : 0x0 02337 * - Description : Thermistor Enable Bit. 02338 */ 02339 typedef enum { 02340 THM_EN_THERMISTOR_DISABLED, 02341 THM_EN_THERMISTOR_ENABLED 02342 }thm_en_t; 02343 02344 /** 02345 * @brief Set Thermistor Enable Bit. 02346 * 02347 * @param[in] thm_en Thermistor enable bit to be written. 02348 * 02349 * @return 0 on success, error code on failure. 02350 */ 02351 int SetThermistorEnable(thm_en_t thm_en); 02352 02353 /** 02354 * @brief Get Thermistor enable bit. 02355 * 02356 * @param[out] thm_en Thermistor enable bit to be read. 02357 * 02358 * @return 0 on success, error code on failure. 02359 */ 02360 int GetThermistorEnable(thm_en_t *thm_en); 02361 02362 /** 02363 * @brief Register Configuration 02364 * 02365 * @details 02366 * - Register : CNFG_CHG_G (0x26) and CNFG_CHG_H (0x27) 02367 * - Bit Fields : [7:2] 02368 * - Default : 0x0 02369 * - Description : Fast-Charge Battery Regulation Voltage, VFAST-CHG or VFAST-CHG-JEITA. 02370 */ 02371 typedef enum { 02372 CHG_CV_VOLT_3_600V, 02373 CHG_CV_VOLT_3_625V, 02374 CHG_CV_VOLT_3_650V, 02375 CHG_CV_VOLT_3_675V, 02376 CHG_CV_VOLT_3_700V, 02377 CHG_CV_VOLT_3_725V, 02378 CHG_CV_VOLT_3_750V, 02379 CHG_CV_VOLT_3_775V, 02380 CHG_CV_VOLT_3_800V, 02381 CHG_CV_VOLT_3_825V, 02382 CHG_CV_VOLT_3_850V, 02383 CHG_CV_VOLT_3_875V, 02384 CHG_CV_VOLT_3_900V, 02385 CHG_CV_VOLT_3_925V, 02386 CHG_CV_VOLT_3_950V, 02387 CHG_CV_VOLT_3_975V, 02388 CHG_CV_VOLT_4_000V, 02389 CHG_CV_VOLT_4_025V, 02390 CHG_CV_VOLT_4_050V, 02391 CHG_CV_VOLT_4_075V, 02392 CHG_CV_VOLT_4_100V, 02393 CHG_CV_VOLT_4_125V, 02394 CHG_CV_VOLT_4_150V, 02395 CHG_CV_VOLT_4_175V, 02396 CHG_CV_VOLT_4_200V, 02397 CHG_CV_VOLT_4_225V, 02398 CHG_CV_VOLT_4_250V, 02399 CHG_CV_VOLT_4_275V, 02400 CHG_CV_VOLT_4_300V, 02401 CHG_CV_VOLT_4_325V, 02402 CHG_CV_VOLT_4_350V, 02403 CHG_CV_VOLT_4_375V, 02404 CHG_CV_VOLT_4_400V, 02405 CHG_CV_VOLT_4_425V, 02406 CHG_CV_VOLT_4_450V, 02407 CHG_CV_VOLT_4_475V, 02408 CHG_CV_VOLT_4_500V, 02409 CHG_CV_VOLT_4_525V, 02410 CHG_CV_VOLT_4_550V, 02411 CHG_CV_VOLT_4_575V, 02412 CHG_CV_VOLT_4_600V, 02413 CHG_CV_VOLT_4_600V_0x29, 02414 CHG_CV_VOLT_4_600V_0x2A, 02415 CHG_CV_VOLT_4_600V_0x2B, 02416 CHG_CV_VOLT_4_600V_0x2C, 02417 CHG_CV_VOLT_4_600V_0x2D, 02418 CHG_CV_VOLT_4_600V_0x2E, 02419 CHG_CV_VOLT_4_600V_0x2F, 02420 CHG_CV_VOLT_4_600V_0x30, 02421 CHG_CV_VOLT_4_600V_0x31, 02422 CHG_CV_VOLT_4_600V_0x32, 02423 CHG_CV_VOLT_4_600V_0x33, 02424 CHG_CV_VOLT_4_600V_0x34, 02425 CHG_CV_VOLT_4_600V_0x35, 02426 CHG_CV_VOLT_4_600V_0x36, 02427 CHG_CV_VOLT_4_600V_0x37, 02428 CHG_CV_VOLT_4_600V_0x38, 02429 CHG_CV_VOLT_4_600V_0x39, 02430 CHG_CV_VOLT_4_600V_0x3A, 02431 CHG_CV_VOLT_4_600V_0x3B, 02432 CHG_CV_VOLT_4_600V_0x3C, 02433 CHG_CV_VOLT_4_600V_0x3D, 02434 CHG_CV_VOLT_4_600V_0x3E, 02435 CHG_CV_VOLT_4_600V_0x3F 02436 }chg_cv_t; 02437 02438 /** 02439 * @brief Set Fast-Charge Battery Regulation Voltage, VFAST-CHG. 02440 * 02441 * @param[in] chg_cv Fast-charge battery regulation voltage field to be written. 02442 * 02443 * @return 0 on success, error code on failure. 02444 */ 02445 int SetFastChargeBatteryRegVolt(chg_cv_t chg_cv); 02446 02447 /** 02448 * @brief Get Fast-Charge Battery Regulation Voltage, VFAST-CHG. 02449 * 02450 * @param[out] chg_cv Fast-charge battery regulation voltage field to be read. 02451 * 02452 * @return 0 on success, error code on failure. 02453 */ 02454 int GetFastChargeBatteryRegVolt(chg_cv_t *chg_cv); 02455 02456 /** 02457 * @brief Register Configuration 02458 * 02459 * @details 02460 * - Register : CNFG_CHG_G (0x26) 02461 * - Bit Fields : [1] 02462 * - Default : 0x0 02463 * - Description : USB suspend mode. 02464 */ 02465 typedef enum { 02466 USBS_CHGIN_NOT_SUSPENDED, 02467 USBS_CHGIN_SUSPENDED 02468 }usbs_t; 02469 02470 /** 02471 * @brief Set USBS. Setting this bit places CHGIN in USB suspend mode. 02472 * 02473 * @param[in] usbs USB suspend mode bit to be written. 02474 * 02475 * @return 0 on success, error code on failure. 02476 */ 02477 int SetCHGINUSBSuspendMode(usbs_t usbs); 02478 02479 /** 02480 * @brief Get USBS. Setting this bit places CHGIN in USB suspend mode. 02481 * 02482 * @param[out] usbs USB suspend mode bit to be read. 02483 * 02484 * @return 0 on success, error code on failure. 02485 */ 02486 int GetCHGINUSBSuspendMode(usbs_t *usbs); 02487 02488 /** 02489 * @brief Set the modified VFAST-CHG-JEITA for when the battery is either 02490 * cool or warm as defined by the VCOOL and VWARM temperature thresholds. 02491 * 02492 * @param[in] chg_cv_jeita Modified VFAST-CHG-JEITA field to be written. 02493 * 02494 * @return 0 on success, error code on failure. 02495 */ 02496 int SetFastChargeVoltageJEITA(chg_cv_t chg_cv_jeita); 02497 02498 /** 02499 * @brief Get the modified VFAST-CHG-JEITA for when the battery is either 02500 * cool or warm as defined by the VCOOL and VWARM temperature thresholds. 02501 * 02502 * @param[out] chg_cv_jeita Modified VFAST-CHG-JEITA field to be read. 02503 * 02504 * @return 0 on success, error code on failure. 02505 */ 02506 int GetFastChargeVoltageJEITA(chg_cv_t *chg_cv_jeita); 02507 02508 /** 02509 * @brief Register Configuration 02510 * 02511 * @details 02512 * - Register : CNFG_CHG_I (0x28) 02513 * - Bit Fields : [7:4] 02514 * - Default : 0x0 02515 * - Description : Battery Discharge Current Full-Scale Current Value. 02516 */ 02517 typedef enum { 02518 IMON_DISCHG_SCALE_AMP_8_2MA, 02519 IMON_DISCHG_SCALE_AMP_40_5MA, 02520 IMON_DISCHG_SCALE_AMP_72_3MA, 02521 IMON_DISCHG_SCALE_AMP_103_4MA, 02522 IMON_DISCHG_SCALE_AMP_134_1MA, 02523 IMON_DISCHG_SCALE_AMP_164_1MA, 02524 IMON_DISCHG_SCALE_AMP_193_7MA, 02525 IMON_DISCHG_SCALE_AMP_222_7MA, 02526 IMON_DISCHG_SCALE_AMP_251_2MA, 02527 IMON_DISCHG_SCALE_AMP_279_3MA, 02528 IMON_DISCHG_SCALE_AMP_300_0MA, 02529 IMON_DISCHG_SCALE_AMP_300_0MA_0x0B, 02530 IMON_DISCHG_SCALE_AMP_300_0MA_0x0C, 02531 IMON_DISCHG_SCALE_AMP_300_0MA_0x0D, 02532 IMON_DISCHG_SCALE_AMP_300_0MA_0x0E, 02533 IMON_DISCHG_SCALE_AMP_300_0MA_0x0F 02534 }imon_dischg_scale_t; 02535 02536 /** 02537 * @brief Set the Battery Discharge Current Full-Scale Current Value. 02538 * 02539 * @param[in] imon_dischg_scale the battery discharge current full-scale current value field to be written. 02540 * 02541 * @return 0 on success, error code on failure. 02542 */ 02543 int SetDischargeCurrentFullScale(imon_dischg_scale_t imon_dischg_scale); 02544 02545 /** 02546 * @brief Get the Battery Discharge Current Full-Scale Current Value. 02547 * 02548 * @param[out] imon_dischg_scale the battery discharge current full-scale current value field to be read. 02549 * 02550 * @return 0 on success, error code on failure. 02551 */ 02552 int GetDischargeCurrentFullScale(imon_dischg_scale_t *imon_dischg_scale); 02553 02554 /** 02555 * @brief Register Configuration 02556 * 02557 * @details 02558 * - Register : CNFG_CHG_I (0x28) 02559 * - Bit Fields : [3:0] 02560 * - Default : 0x0 02561 * - Description : Analog channel to connect to AMUX. 02562 */ 02563 typedef enum { 02564 MUX_SEL_MULTIPLEXER_DISABLED, 02565 MUX_SEL_CHGIN_VOLTAGE_MONITOR, 02566 MUX_SEL_CHGIN_CURRENT_MONITOR, 02567 MUX_SEL_BATTERY_VOLTAGE_MONITOR, 02568 MUX_SEL_BATTERY_CHARGE_CURRENT_MONITOR, 02569 MUX_SEL_BATTERY_DISCHARGE_CURRENT_MONITOR_NORMAL, 02570 MUX_SEL_BATTERY_DISCHARGE_CURRENT_MONITOR_NULL, 02571 MUX_SEL_THM_VOLTAGE_MONITOR, 02572 MUX_SEL_TBIAS_VOLTAGE_MONITOR, 02573 MUX_SEL_AGND_VOLTAGE_MONITOR, 02574 MUX_SEL_SYS_VOLTAGE_MONITOR, 02575 MUX_SEL_SYS_VOLTAGE_MONITOR_0x0B, 02576 MUX_SEL_SYS_VOLTAGE_MONITOR_0x0C, 02577 MUX_SEL_SYS_VOLTAGE_MONITOR_0x0D, 02578 MUX_SEL_SYS_VOLTAGE_MONITOR_0x0E, 02579 MUX_SEL_SYS_VOLTAGE_MONITOR_0x0F 02580 }mux_sel_t; 02581 02582 /** 02583 * @brief Set the Analog Channel to connect to AMUX. 02584 * 02585 * @param[in] imon_dischg_scale the battery discharge current full-scale current value field to be written. 02586 * 02587 * @return 0 on success, error code on failure. 02588 */ 02589 int SetAMUX(mux_sel_t mux_sel); 02590 02591 /** 02592 * @brief Get the Battery Discharge Current Full-Scale Current Value. 02593 * 02594 * @param[out] imon_dischg_scale the battery discharge current full-scale current value field to be read. 02595 * 02596 * @return 0 on success, error code on failure. 02597 */ 02598 int GetAMUX(mux_sel_t *mux_sel); 02599 02600 /** 02601 * @brief Register Configuration 02602 * 02603 * @details 02604 * - Register : CNFG_SBB0_A (0x29), CNFG_SBB1_A (0x2B) and CNFG_SBB2_A (0x2D) 02605 * - Bit Fields : [6:0] 02606 * - Default : 0x0 02607 * - Description : SIMO Buck-Boost Channel 0, 1 or 2 Target Output Voltage. 02608 */ 02609 typedef enum { 02610 TV_SBB_VOLT_0_800V, 02611 TV_SBB_VOLT_0_850V, 02612 TV_SBB_VOLT_0_900V, 02613 TV_SBB_VOLT_0_950V, 02614 TV_SBB_VOLT_1_000V, 02615 TV_SBB_VOLT_1_050V, 02616 TV_SBB_VOLT_1_100V, 02617 TV_SBB_VOLT_1_150V, 02618 TV_SBB_VOLT_1_200V, 02619 TV_SBB_VOLT_1_250V, 02620 TV_SBB_VOLT_1_300V, 02621 TV_SBB_VOLT_1_350V, 02622 TV_SBB_VOLT_1_400V, 02623 TV_SBB_VOLT_1_450V, 02624 TV_SBB_VOLT_1_500V, 02625 TV_SBB_VOLT_1_550V, 02626 TV_SBB_VOLT_1_600V, 02627 TV_SBB_VOLT_1_650V, 02628 TV_SBB_VOLT_1_700V, 02629 TV_SBB_VOLT_1_750V, 02630 TV_SBB_VOLT_1_800V, 02631 TV_SBB_VOLT_1_850V, 02632 TV_SBB_VOLT_1_900V, 02633 TV_SBB_VOLT_1_950V, 02634 TV_SBB_VOLT_2_000V, 02635 TV_SBB_VOLT_2_050V, 02636 TV_SBB_VOLT_2_100V, 02637 TV_SBB_VOLT_2_150V, 02638 TV_SBB_VOLT_2_200V, 02639 TV_SBB_VOLT_2_250V, 02640 TV_SBB_VOLT_2_300V, 02641 TV_SBB_VOLT_2_350V, 02642 TV_SBB_VOLT_2_400V, 02643 TV_SBB_VOLT_2_450V, 02644 TV_SBB_VOLT_2_500V, 02645 TV_SBB_VOLT_2_550V, 02646 TV_SBB_VOLT_2_600V, 02647 TV_SBB_VOLT_2_650V, 02648 TV_SBB_VOLT_2_700V, 02649 TV_SBB_VOLT_2_750V, 02650 TV_SBB_VOLT_2_800V, 02651 TV_SBB_VOLT_2_850V, 02652 TV_SBB_VOLT_2_900V, 02653 TV_SBB_VOLT_2_950V, 02654 TV_SBB_VOLT_3_000V, 02655 TV_SBB_VOLT_3_050V, 02656 TV_SBB_VOLT_3_100V, 02657 TV_SBB_VOLT_3_150V, 02658 TV_SBB_VOLT_3_200V, 02659 TV_SBB_VOLT_3_250V, 02660 TV_SBB_VOLT_3_300V, 02661 TV_SBB_VOLT_3_350V, 02662 TV_SBB_VOLT_3_400V, 02663 TV_SBB_VOLT_3_450V, 02664 TV_SBB_VOLT_3_500V, 02665 TV_SBB_VOLT_3_550V, 02666 TV_SBB_VOLT_3_600V, 02667 TV_SBB_VOLT_3_650V, 02668 TV_SBB_VOLT_3_700V, 02669 TV_SBB_VOLT_3_750V, 02670 TV_SBB_VOLT_3_800V, 02671 TV_SBB_VOLT_3_850V, 02672 TV_SBB_VOLT_3_900V, 02673 TV_SBB_VOLT_3_950V, 02674 TV_SBB_VOLT_4_000V, 02675 TV_SBB_VOLT_4_050V, 02676 TV_SBB_VOLT_4_100V, 02677 TV_SBB_VOLT_4_150V, 02678 TV_SBB_VOLT_4_200V, 02679 TV_SBB_VOLT_4_250V, 02680 TV_SBB_VOLT_4_300V, 02681 TV_SBB_VOLT_4_350V, 02682 TV_SBB_VOLT_4_400V, 02683 TV_SBB_VOLT_4_450V, 02684 TV_SBB_VOLT_4_500V, 02685 TV_SBB_VOLT_4_550V, 02686 TV_SBB_VOLT_4_600V, 02687 TV_SBB_VOLT_4_650V, 02688 TV_SBB_VOLT_4_700V, 02689 TV_SBB_VOLT_4_750V, 02690 TV_SBB_VOLT_4_800V, 02691 TV_SBB_VOLT_4_850V, 02692 TV_SBB_VOLT_4_900V, 02693 TV_SBB_VOLT_4_950V, 02694 TV_SBB_VOLT_5_000V, 02695 TV_SBB_VOLT_5_050V, 02696 TV_SBB_VOLT_5_100V, 02697 TV_SBB_VOLT_5_150V, 02698 TV_SBB_VOLT_5_200V, 02699 TV_SBB_VOLT_5_250V, 02700 TV_SBB_VOLT_5_300V, 02701 TV_SBB_VOLT_5_350V, 02702 TV_SBB_VOLT_5_400V, 02703 TV_SBB_VOLT_5_450V, 02704 TV_SBB_VOLT_5_500V, 02705 TV_SBB_VOLT_5_500V_0x5D, 02706 TV_SBB_VOLT_5_500V_0x5E, 02707 TV_SBB_VOLT_5_500V_0x5F, 02708 TV_SBB_VOLT_5_500V_0x60, 02709 TV_SBB_VOLT_5_500V_0x61, 02710 TV_SBB_VOLT_5_500V_0x62, 02711 TV_SBB_VOLT_5_500V_0x63, 02712 TV_SBB_VOLT_5_500V_0x64, 02713 TV_SBB_VOLT_5_500V_0x65, 02714 TV_SBB_VOLT_5_500V_0x66, 02715 TV_SBB_VOLT_5_500V_0x67, 02716 TV_SBB_VOLT_5_500V_0x68, 02717 TV_SBB_VOLT_5_500V_0x69, 02718 TV_SBB_VOLT_5_500V_0x6A, 02719 TV_SBB_VOLT_5_500V_0x6B, 02720 TV_SBB_VOLT_5_500V_0x6C, 02721 TV_SBB_VOLT_5_500V_0x6D, 02722 TV_SBB_VOLT_5_500V_0x6E, 02723 TV_SBB_VOLT_5_500V_0x6F, 02724 TV_SBB_VOLT_5_500V_0x70, 02725 TV_SBB_VOLT_5_500V_0x71, 02726 TV_SBB_VOLT_5_500V_0x72, 02727 TV_SBB_VOLT_5_500V_0x73, 02728 TV_SBB_VOLT_5_500V_0x74, 02729 TV_SBB_VOLT_5_500V_0x75, 02730 TV_SBB_VOLT_5_500V_0x76, 02731 TV_SBB_VOLT_5_500V_0x77, 02732 TV_SBB_VOLT_5_500V_0x78, 02733 TV_SBB_VOLT_5_500V_0x79, 02734 TV_SBB_VOLT_5_500V_0x7A, 02735 TV_SBB_VOLT_5_500V_0x7B, 02736 TV_SBB_VOLT_5_500V_0x7C, 02737 TV_SBB_VOLT_5_500V_0x7D, 02738 TV_SBB_VOLT_5_500V_0x7E, 02739 TV_SBB_VOLT_5_500V_0x7F 02740 }tv_sbb_t; 02741 02742 /** 02743 * @brief Set SIMO Buck-Boost Channel x Target Output Voltage. 02744 * 02745 * @param[in] channel Channel number: 0, 1 or 2. 02746 * @param[in] tv_sbb SIMO buck-boost channel x target output voltage field to be written. 02747 * 02748 * @return 0 on success, error code on failure. 02749 */ 02750 int SetSBBTargetOutVoltage(uint8_t channel, tv_sbb_t tv_sbb); 02751 02752 /** 02753 * @brief Get SIMO Buck-Boost Channel x Target Output Voltage. 02754 * 02755 * @param[in] channel Channel number: 0, 1 or 2. 02756 * @param[out] tv_sbb SIMO buck-boost channel x target output voltage field to be read. 02757 * 02758 * @return 0 on success, error code on failure. 02759 */ 02760 int GetSBBTargetOutVoltage(uint8_t channel, tv_sbb_t *tv_sbb); 02761 02762 /** 02763 * @brief Register Configuration 02764 * 02765 * @details 02766 * - Register : CNFG_SBB0_B (0x2A), CNFG_SBB1_B (0x2C) (0x2B) and CNFG_SBB2_B (0x2E) 02767 * - Bit Fields : [6] 02768 * - Default : 0x0 02769 * - Description : Operation mode of SBB0, 1 or 2. 02770 */ 02771 typedef enum { 02772 OP_MODE_BUCK_BOOST_MODE, 02773 OP_MODE_BUCK_MODE 02774 }op_mode_t; 02775 02776 /** 02777 * @brief Set Operation mode of SBBx. 02778 * 02779 * @param[in] channel Channel number: 0, 1 or 2. 02780 * @param[in] op_mode Operation mode of SBBx bit to be written. 02781 * 02782 * @return 0 on success, error code on failure. 02783 */ 02784 int SetSIMOOperationMode(uint8_t channel, op_mode_t op_mode); 02785 02786 /** 02787 * @brief Get Operation mode of SBBx. 02788 * 02789 * @param[in] channel Channel number: 0, 1 or 2. 02790 * @param[out] op_mode Operation mode of SBBx bit to be read. 02791 * 02792 * @return 0 on success, error code on failure. 02793 */ 02794 int GetSIMOOperationMode(uint8_t channel, op_mode_t *op_mode); 02795 02796 /** 02797 * @brief Register Configuration 02798 * 02799 * @details 02800 * - Register : CNFG_SBB0_B (0x2A), CNFG_SBB1_B (0x2C) (0x2B) and CNFG_SBB2_B (0x2E) 02801 * - Bit Fields : [5:4] 02802 * - Default : 0x0 02803 * - Description : SIMO Buck-Boost Channel 0, 1 or 2 Peak Current Limit. 02804 */ 02805 typedef enum { 02806 IP_SBB_AMP_1_000A, 02807 IP_SBB_AMP_0_750A, 02808 IP_SBB_AMP_0_500A, 02809 IP_SBB_AMP_0_333A 02810 }ip_sbb_t; 02811 02812 /** 02813 * @brief Set SIMO Buck-Boost Channel x Peak Current Limit. 02814 * 02815 * @param[in] channel Channel number: 0, 1 or 2. 02816 * @param[in] ip_sbb SIMO buck-boost channel 2 peak current limit field to be written. 02817 * 02818 * @return 0 on success, error code on failure. 02819 */ 02820 int SetSBBPeakCurrentLimit(uint8_t channel, ip_sbb_t ip_sbb); 02821 02822 /** 02823 * @brief Get SIMO Buck-Boost Channel x Peak Current Limit. 02824 * 02825 * @param[in] channel Channel number: 0, 1 or 2. 02826 * @param[out] ip_sbb SIMO buck-boost channel 2 peak current limit field to be read. 02827 * 02828 * @return 0 on success, error code on failure. 02829 */ 02830 int GetSBBPeakCurrentLimit(uint8_t channel, ip_sbb_t *ip_sbb); 02831 02832 /** 02833 * @brief Register Configuration 02834 * 02835 * @details 02836 * - Register : CNFG_SBB0_B (0x2A), CNFG_SBB1_B (0x2C) (0x2B) and CNFG_SBB2_B (0x2E) 02837 * - Bit Fields : [3] 02838 * - Default : 0x0 02839 * - Description : SIMO Buck-Boost Channel 0, 1 or 2 Active-Discharge Enable. 02840 */ 02841 typedef enum { 02842 ADE_SBB_DISABLED, 02843 ADE_SBB_ENABLED 02844 }ade_sbb_t; 02845 02846 /** 02847 * @brief Set SIMO Buck-Boost Channel x Active-Discharge Enable. 02848 * 02849 * @param[in] channel Channel number: 0, 1 or 2. 02850 * @param[in] ade_sbb SIMO buck-boost channel 2 active-discharge enable bit to be written. 02851 * 02852 * @return 0 on success, error code on failure. 02853 */ 02854 int SetSBBActiveDischargeEnable(uint8_t channel, ade_sbb_t ade_sbb); 02855 02856 /** 02857 * @brief Get SIMO Buck-Boost Channel x Active-Discharge Enable. 02858 * 02859 * @param[in] channel Channel number: 0, 1 or 2. 02860 * @param[out] ade_sbb SIMO buck-boost channel 2 active-discharge enable bit to be read. 02861 * 02862 * @return 0 on success, error code on failure. 02863 */ 02864 int GetSBBActiveDischargeEnable(uint8_t channel, ade_sbb_t *ade_sbb); 02865 02866 /** 02867 * @brief Register Configuration 02868 * 02869 * @details 02870 * - Register : CNFG_SBB0_B (0x2A), CNFG_SBB1_B (0x2C) (0x2B) and CNFG_SBB2_B (0x2E) 02871 * - Bit Fields : [5:4] 02872 * - Default : 0x0 02873 * - Description : Enable Control for SIMO Buck-Boost Channel 0, 1 or 2. 02874 */ 02875 typedef enum { 02876 EN_SBB_FPS_SLOT_0, 02877 EN_SBB_FPS_SLOT_1, 02878 EN_SBB_FPS_SLOT_2, 02879 EN_SBB_FPS_SLOT_3, 02880 EN_SBB_OFF, 02881 EN_SBB_SAME_AS_0X04, 02882 EN_SBB_ON, 02883 EN_SBB_SAME_AS_0X06, 02884 }en_sbb_t; 02885 02886 /** 02887 * @brief Set Enable Control for SIMO Buck-Boost Channel x. 02888 * 02889 * @param[in] channel Channel number: 0, 1 or 2. 02890 * @param[in] en_sbb Enable control for SIMO buck-boost channel x field to be written. 02891 * 02892 * @return 0 on success, error code on failure. 02893 */ 02894 int SetSBBEnableControl(uint8_t channel, en_sbb_t en_sbb); 02895 02896 /** 02897 * @brief Get Enable Control for SIMO Buck-Boost Channel x. 02898 * 02899 * @param[in] channel Channel number: 0, 1 or 2. 02900 * @param[out] en_sbb Enable control for SIMO buck-boost channel x field to be read. 02901 * 02902 * @return 0 on success, error code on failure. 02903 */ 02904 int GetSBBEnableControl(uint8_t channel, en_sbb_t *en_sbb); 02905 02906 /** 02907 * @brief Register Configuration 02908 * 02909 * @details 02910 * - Register : CNFG_SBB_TOP (0x2F) 02911 * - Bit Fields : [7] 02912 * - Default : 0x0 02913 * - Description : Changes how CNFG_CHG_B.ICHGIN_LIM is interpreted. 02914 */ 02915 typedef enum { 02916 ICHIN_LIM_AMP_95MA, 02917 ICHIN_LIM_AMP_475MA 02918 }ichgin_lim_def_t; 02919 02920 /** 02921 * @brief Set Changes how CNFG_CHG_B.ICHGIN_LIM is interpreted. 02922 * 02923 * @param[in] ichgin_lim_def CNFG_CHG_B.ICHGIN_LIM bit to be written. 02924 * 02925 * @return 0 on success, error code on failure. 02926 */ 02927 int SetCHGINInputCurrentLimit(ichgin_lim_def_t ichgin_lim_def); 02928 02929 /** 02930 * @brief Get Changes how CNFG_CHG_B.ICHGIN_LIM is interpreted. 02931 * 02932 * @param[out] ichgin_lim_def CNFG_CHG_B.ICHGIN_LIM bit to be read. 02933 * 02934 * @return 0 on success, error code on failure. 02935 */ 02936 int GetCHGINInputCurrentLimit(ichgin_lim_def_t *ichgin_lim_def); 02937 02938 /** 02939 * @brief Register Configuration 02940 * 02941 * @details 02942 * - Register : CNFG_SBB_TOP (0x2F) 02943 * - Bit Fields : [1:0] 02944 * - Default : 0x0 02945 * - Description : SIMO Buck-Boost (all channels) Drive Strength Trim. 02946 */ 02947 typedef enum { 02948 DRV_SBB_FASTEST_TRANSITION_TIME, 02949 DRV_SBB_A_LITTLE_SLOWER_THAN_0X00, 02950 DRV_SBB_A_LITTLE_SLOWER_THAN_0X01, 02951 DRV_SBB_A_LITTLE_SLOWER_THAN_0X02 02952 }drv_sbb_t; 02953 02954 /** 02955 * @brief Set SIMO Buck-Boost (all channels) Drive Strength Trim. 02956 * 02957 * @param[in] drv_sbb SIMO buck-boost drive strength trim field to be written. 02958 * 02959 * @return 0 on success, error code on failure. 02960 */ 02961 int SetSBBDriveStrength(drv_sbb_t drv_sbb); 02962 02963 /** 02964 * @brief Get SIMO Buck-Boost (all channels) Drive Strength Trim. 02965 * 02966 * @param[out] drv_sbb SIMO buck-boost drive strength trim field to be read. 02967 * 02968 * @return 0 on success, error code on failure. 02969 */ 02970 int GetSBBDriveStrength(drv_sbb_t *drv_sbb); 02971 02972 /** 02973 * @brief Register Configuration 02974 * 02975 * @details 02976 * - Register : CNFG_LDO0_A (0x38) and CNFG_LDO1_A (0x3A) 02977 * - Bit Fields : [6:0] 02978 * - Default : 0x0 02979 * - Description : LDO Target Output Voltage. 02980 */ 02981 typedef enum { 02982 TV_LDO_VOLT_0_800V, 02983 TV_LDO_VOLT_0_825V, 02984 TV_LDO_VOLT_0_850V, 02985 TV_LDO_VOLT_0_875V, 02986 TV_LDO_VOLT_0_900V, 02987 TV_LDO_VOLT_0_925V, 02988 TV_LDO_VOLT_0_950V, 02989 TV_LDO_VOLT_0_975V, 02990 TV_LDO_VOLT_1_000V, 02991 TV_LDO_VOLT_1_025V, 02992 TV_LDO_VOLT_1_050V, 02993 TV_LDO_VOLT_1_075V, 02994 TV_LDO_VOLT_1_100V, 02995 TV_LDO_VOLT_1_125V, 02996 TV_LDO_VOLT_1_150V, 02997 TV_LDO_VOLT_1_175V, 02998 TV_LDO_VOLT_1_200V, 02999 TV_LDO_VOLT_1_225V, 03000 TV_LDO_VOLT_1_250V, 03001 TV_LDO_VOLT_1_275V, 03002 TV_LDO_VOLT_1_300V, 03003 TV_LDO_VOLT_1_325V, 03004 TV_LDO_VOLT_1_350V, 03005 TV_LDO_VOLT_1_375V, 03006 TV_LDO_VOLT_1_400V, 03007 TV_LDO_VOLT_1_425V, 03008 TV_LDO_VOLT_1_450V, 03009 TV_LDO_VOLT_1_475V, 03010 TV_LDO_VOLT_1_500V, 03011 TV_LDO_VOLT_1_525V, 03012 TV_LDO_VOLT_1_550V, 03013 TV_LDO_VOLT_1_575V, 03014 TV_LDO_VOLT_1_600V, 03015 TV_LDO_VOLT_1_625V, 03016 TV_LDO_VOLT_1_650V, 03017 TV_LDO_VOLT_1_675V, 03018 TV_LDO_VOLT_1_700V, 03019 TV_LDO_VOLT_1_725V, 03020 TV_LDO_VOLT_1_750V, 03021 TV_LDO_VOLT_1_775V, 03022 TV_LDO_VOLT_1_800V, 03023 TV_LDO_VOLT_1_825V, 03024 TV_LDO_VOLT_1_850V, 03025 TV_LDO_VOLT_1_875V, 03026 TV_LDO_VOLT_1_900V, 03027 TV_LDO_VOLT_1_925V, 03028 TV_LDO_VOLT_1_950V, 03029 TV_LDO_VOLT_1_975V, 03030 TV_LDO_VOLT_2_000V, 03031 TV_LDO_VOLT_2_025V, 03032 TV_LDO_VOLT_2_050V, 03033 TV_LDO_VOLT_2_075V, 03034 TV_LDO_VOLT_2_100V, 03035 TV_LDO_VOLT_2_125V, 03036 TV_LDO_VOLT_2_150V, 03037 TV_LDO_VOLT_2_175V, 03038 TV_LDO_VOLT_2_200V, 03039 TV_LDO_VOLT_2_225V, 03040 TV_LDO_VOLT_2_250V, 03041 TV_LDO_VOLT_2_275V, 03042 TV_LDO_VOLT_2_300V, 03043 TV_LDO_VOLT_2_325V, 03044 TV_LDO_VOLT_2_350V, 03045 TV_LDO_VOLT_2_375V, 03046 TV_LDO_VOLT_2_400V, 03047 TV_LDO_VOLT_2_425V, 03048 TV_LDO_VOLT_2_450V, 03049 TV_LDO_VOLT_2_475V, 03050 TV_LDO_VOLT_2_500V, 03051 TV_LDO_VOLT_2_525V, 03052 TV_LDO_VOLT_2_550V, 03053 TV_LDO_VOLT_2_575V, 03054 TV_LDO_VOLT_2_600V, 03055 TV_LDO_VOLT_2_625V, 03056 TV_LDO_VOLT_2_650V, 03057 TV_LDO_VOLT_2_675V, 03058 TV_LDO_VOLT_2_700V, 03059 TV_LDO_VOLT_2_725V, 03060 TV_LDO_VOLT_2_750V, 03061 TV_LDO_VOLT_2_775V, 03062 TV_LDO_VOLT_2_800V, 03063 TV_LDO_VOLT_2_825V, 03064 TV_LDO_VOLT_2_850V, 03065 TV_LDO_VOLT_2_875V, 03066 TV_LDO_VOLT_2_900V, 03067 TV_LDO_VOLT_2_925V, 03068 TV_LDO_VOLT_2_950V, 03069 TV_LDO_VOLT_2_975V, 03070 TV_LDO_VOLT_3_000V, 03071 TV_LDO_VOLT_3_025V, 03072 TV_LDO_VOLT_3_050V, 03073 TV_LDO_VOLT_3_075V, 03074 TV_LDO_VOLT_3_100V, 03075 TV_LDO_VOLT_3_125V, 03076 TV_LDO_VOLT_3_150V, 03077 TV_LDO_VOLT_3_175V, 03078 TV_LDO_VOLT_3_200V, 03079 TV_LDO_VOLT_3_225V, 03080 TV_LDO_VOLT_3_250V, 03081 TV_LDO_VOLT_3_275V, 03082 TV_LDO_VOLT_3_300V, 03083 TV_LDO_VOLT_3_325V, 03084 TV_LDO_VOLT_3_350V, 03085 TV_LDO_VOLT_3_375V, 03086 TV_LDO_VOLT_3_400V, 03087 TV_LDO_VOLT_3_425V, 03088 TV_LDO_VOLT_3_450V, 03089 TV_LDO_VOLT_3_475V, 03090 TV_LDO_VOLT_3_500V, 03091 TV_LDO_VOLT_3_525V, 03092 TV_LDO_VOLT_3_550V, 03093 TV_LDO_VOLT_3_575V, 03094 TV_LDO_VOLT_3_600V, 03095 TV_LDO_VOLT_3_625V, 03096 TV_LDO_VOLT_3_650V, 03097 TV_LDO_VOLT_3_675V, 03098 TV_LDO_VOLT_3_700V, 03099 TV_LDO_VOLT_3_725V, 03100 TV_LDO_VOLT_3_750V, 03101 TV_LDO_VOLT_3_775V, 03102 TV_LDO_VOLT_3_800V, 03103 TV_LDO_VOLT_3_825V, 03104 TV_LDO_VOLT_3_850V, 03105 TV_LDO_VOLT_3_875V, 03106 TV_LDO_VOLT_3_900V, 03107 TV_LDO_VOLT_3_925V, 03108 TV_LDO_VOLT_3_950V, 03109 TV_LDO_VOLT_3_975V 03110 }tv_ldo_t; 03111 03112 /** 03113 * @brief Set LDO Target Output Voltage. 03114 * 03115 * @param[in] channel Channel number: 0 or 1 03116 * @param[in] tv_ldo LDO target output voltage field to be written. 03117 * 03118 * @return 0 on success, error code on failure. 03119 */ 03120 int SetLDOTargetOutVoltage(uint8_t channel, tv_ldo_t tv_ldo); 03121 03122 /** 03123 * @brief Get LDO Target Output Voltage. 03124 * 03125 * @param[in] channel Channel number: 0 or 1 03126 * @param[out] tv_ldo LDO target output voltage field to be read. 03127 * 03128 * @return 0 on success, error code on failure. 03129 */ 03130 int GetLDOTargetOutVoltage(uint8_t channel, tv_ldo_t *tv_ldo); 03131 03132 /** 03133 * @brief Register Configuration 03134 * 03135 * @details 03136 * - Register : CNFG_LDO0_B (0x39) and CNFG_LDO1_B (0x3B) 03137 * - Bit Fields : [4] 03138 * - Default : 0x0 03139 * - Description : Operation Mode of LDO0 or 1. 03140 */ 03141 typedef enum { 03142 LDO_MD_LDO_MODE, 03143 LDO_MD_LSW_MODE 03144 }ldo_md_t; 03145 03146 /** 03147 * @brief Set Operation Mode of LDOx. 03148 * 03149 * @param[in] channel Channel number: 0 or 1 03150 * @param[in] ldo_md Operation mode of LDOx bit to be written. 03151 * 03152 * @return 0 on success, error code on failure. 03153 */ 03154 int SetLDOMode(uint8_t channel, ldo_md_t ldo_md); 03155 03156 /** 03157 * @brief Get Operation Mode of LDOx. 03158 * 03159 * @param[in] channel Channel number: 0 or 1 03160 * @param[out] ldo_md Operation mode of LDOx bit to be read. 03161 * 03162 * @return 0 on success, error code on failure. 03163 */ 03164 int GetLDOMode(uint8_t channel, ldo_md_t *ldo_md); 03165 03166 /** 03167 * @brief Register Configuration 03168 * 03169 * @details 03170 * - Register : CNFG_LDO0_B (0x39) and CNFG_LDO1_B (0x3B) 03171 * - Bit Fields : [3] 03172 * - Default : 0x0 03173 * - Description : LDO0 or 1 Active-Discharge Enable. 03174 */ 03175 typedef enum { 03176 ADE_LDO_DISABLED, 03177 ADE_LDO_ENABLED 03178 }ade_ldo_t; 03179 03180 /** 03181 * @brief Set LDOx Active-Discharge Enable. 03182 * 03183 * @param[in] channel Channel number: 0 or 1 03184 * @param[in] ade_ldo LDOx active-discharge enable bit to be written. 03185 * 03186 * @return 0 on success, error code on failure. 03187 */ 03188 int SetLDOActiveDischargeEnable(uint8_t channel, ade_ldo_t ade_ldo); 03189 03190 /** 03191 * @brief Get LDOx Active-Discharge Enable. 03192 * 03193 * @param[in] channel Channel number: 0 or 1 03194 * @param[out] ade_ldo LDOx active-discharge enable bit to be read. 03195 * 03196 * @return 0 on success, error code on failure. 03197 */ 03198 int GetLDOActiveDischargeEnable(uint8_t channel, ade_ldo_t *ade_ldo); 03199 03200 /** 03201 * @brief Register Configuration 03202 * 03203 * @details 03204 * - Register : CNFG_LDO0_B (0x39) and CNFG_LDO1_B (0x3B) 03205 * - Bit Fields : [2:0] 03206 * - Default : 0x0 03207 * - Description : Enable Control for LDO0 or 1. 03208 */ 03209 typedef enum { 03210 EN_LDO_FPS_SLOT_0, 03211 EN_LDO_FPS_SLOT_1, 03212 EN_LDO_FPS_SLOT_2, 03213 EN_LDO_FPS_SLOT_3, 03214 EN_LDO_OFF, 03215 EN_LDO_SAME_AS_0X04, 03216 EN_LDO_ON, 03217 EN_LDO_SAME_AS_0X06, 03218 }en_ldo_t; 03219 03220 /** 03221 * @brief Set Enable Control for LDOx. 03222 * 03223 * @param[in] channel Channel number: 0 or 1. 03224 * @param[in] en_ldo Enable control for LDOx field to be written. 03225 * 03226 * @return 0 on success, error code on failure 03227 */ 03228 int SetLDOEnableControl(uint8_t channel, en_ldo_t en_ldo); 03229 03230 /** 03231 * @brief Get Enable Control for LDOx. 03232 * 03233 * @param[in] channel Channel number: 0 or 1. 03234 * @param[in] en_ldo Enable control for LDOx field to be read. 03235 * 03236 * @return 0 on success, error code on failure 03237 */ 03238 int GetLDOEnableControl(uint8_t channel, en_ldo_t *en_ldo); 03239 03240 /** 03241 * @brief Disable all interrupts 03242 * 03243 * @return 0 on success, error code on failure 03244 */ 03245 int IRQDisableAll(); 03246 03247 /** 03248 * @brief Set Interrupt Handler for a Specific Interrupt ID. 03249 * 03250 * @param[in] id Interrupt id, one of INTR_ID_*. 03251 * @param[in] func Interrupt handler function. 03252 * @param[in] cb Interrupt handler data. 03253 */ 03254 void SetInterruptHandler(int_glbl_t id, interrupt_handler_function func, void *cb); 03255 }; 03256 #endif /*_MAX77654_H_*/
Generated on Fri Aug 26 2022 11:59:26 by
1.7.2