Maxim Integrated / Mbed OS MAX11410BOB_Serial_Tester

Test program running on MAX32625MBED. Control through USB Serial commands using a terminal emulator such as teraterm or putty.

Dependencies:   MaximTinyTester MAX11410 CmdLine USBDevice

MAX11410.cpp@23:e0c36767f98b, 2019-07-25 (annotated)

Committer:
whismanoid
Date:
Thu Jul 25 03:41:55 2019 -0700
Revision:
23:e0c36767f98b
Parent:
22:3e03687b7e95
Child:
24:c03e67c9a1e7
CodeGenerator MAX11410 WIP Configure_Voltage (not buildable yet)

Who changed what in which revision?

UserRevisionLine numberNew contents of line
whismanoid 19:8f951e448ab1 1 // /*******************************************************************************
whismanoid 19:8f951e448ab1 2 // * Copyright (C) 2019 Maxim Integrated Products, Inc., All Rights Reserved.
whismanoid 19:8f951e448ab1 3 // *
whismanoid 19:8f951e448ab1 4 // * Permission is hereby granted, free of charge, to any person obtaining a
whismanoid 19:8f951e448ab1 5 // * copy of this software and associated documentation files (the "Software"),
whismanoid 19:8f951e448ab1 6 // * to deal in the Software without restriction, including without limitation
whismanoid 19:8f951e448ab1 7 // * the rights to use, copy, modify, merge, publish, distribute, sublicense,
whismanoid 19:8f951e448ab1 8 // * and/or sell copies of the Software, and to permit persons to whom the
whismanoid 19:8f951e448ab1 9 // * Software is furnished to do so, subject to the following conditions:
whismanoid 19:8f951e448ab1 10 // *
whismanoid 19:8f951e448ab1 11 // * The above copyright notice and this permission notice shall be included
whismanoid 19:8f951e448ab1 12 // * in all copies or substantial portions of the Software.
whismanoid 19:8f951e448ab1 13 // *
whismanoid 19:8f951e448ab1 14 // * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
whismanoid 19:8f951e448ab1 15 // * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
whismanoid 19:8f951e448ab1 16 // * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
whismanoid 19:8f951e448ab1 17 // * IN NO EVENT SHALL MAXIM INTEGRATED BE LIABLE FOR ANY CLAIM, DAMAGES
whismanoid 19:8f951e448ab1 18 // * OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
whismanoid 19:8f951e448ab1 19 // * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
whismanoid 19:8f951e448ab1 20 // * OTHER DEALINGS IN THE SOFTWARE.
whismanoid 19:8f951e448ab1 21 // *
whismanoid 19:8f951e448ab1 22 // * Except as contained in this notice, the name of Maxim Integrated
whismanoid 19:8f951e448ab1 23 // * Products, Inc. shall not be used except as stated in the Maxim Integrated
whismanoid 19:8f951e448ab1 24 // * Products, Inc. Branding Policy.
whismanoid 19:8f951e448ab1 25 // *
whismanoid 19:8f951e448ab1 26 // * The mere transfer of this software does not imply any licenses
whismanoid 19:8f951e448ab1 27 // * of trade secrets, proprietary technology, copyrights, patents,
whismanoid 19:8f951e448ab1 28 // * trademarks, maskwork rights, or any other form of intellectual
whismanoid 19:8f951e448ab1 29 // * property whatsoever. Maxim Integrated Products, Inc. retains all
whismanoid 19:8f951e448ab1 30 // * ownership rights.
whismanoid 19:8f951e448ab1 31 // *******************************************************************************
whismanoid 19:8f951e448ab1 32 // */
whismanoid 19:8f951e448ab1 33 // *********************************************************************
whismanoid 19:8f951e448ab1 34 // @file MAX11410.cpp
whismanoid 19:8f951e448ab1 35 // *********************************************************************
whismanoid 19:8f951e448ab1 36 // Device Driver file
whismanoid 19:8f951e448ab1 37 // DO NOT EDIT; except areas designated "CUSTOMIZE". Automatically generated file.
whismanoid 19:8f951e448ab1 38 // generated by XMLSystemOfDevicesToMBED.py
whismanoid 19:8f951e448ab1 39 // System Name = ExampleSystem
whismanoid 19:8f951e448ab1 40 // System Description = Device driver example
whismanoid 19:8f951e448ab1 41
whismanoid 19:8f951e448ab1 42 #include "MAX11410.h"
whismanoid 19:8f951e448ab1 43
whismanoid 19:8f951e448ab1 44 // Device Name = MAX11410
whismanoid 19:8f951e448ab1 45 // Device Description = 1.9ksps, Low-Power, Serial SPI 24-Bit, 10-Channel, Differential/Single-Ended Input, SAR ADC
whismanoid 19:8f951e448ab1 46 // Device Manufacturer = Maxim Integrated
whismanoid 19:8f951e448ab1 47 // Device PartNumber = MAX11410ATI+
whismanoid 19:8f951e448ab1 48 // Device RegValue_Width = DataWidth16bit_HL
whismanoid 19:8f951e448ab1 49 //
whismanoid 19:8f951e448ab1 50 // SPI CS = ActiveLow
whismanoid 19:8f951e448ab1 51 // SPI FrameStart = CS
whismanoid 19:8f951e448ab1 52 // SPI CPOL = 0
whismanoid 19:8f951e448ab1 53 // SPI CPHA = 0
whismanoid 19:8f951e448ab1 54 // SPI MOSI and MISO Data are both stable on Rising edge of SCLK
whismanoid 19:8f951e448ab1 55 // SPI SCLK Idle Low
whismanoid 19:8f951e448ab1 56 // SPI SCLKMaxMHz = 8
whismanoid 19:8f951e448ab1 57 // SPI SCLKMinMHz = 0
whismanoid 19:8f951e448ab1 58 //
whismanoid 19:8f951e448ab1 59
whismanoid 19:8f951e448ab1 60 // CODE GENERATOR: class constructor definition
whismanoid 19:8f951e448ab1 61 MAX11410::MAX11410(SPI &spi, DigitalOut &cs_pin, // SPI interface
whismanoid 19:8f951e448ab1 62 // CODE GENERATOR: class constructor definition gpio InputPin pins
whismanoid 19:8f951e448ab1 63 // CODE GENERATOR: class constructor definition gpio OutputPin pins
whismanoid 19:8f951e448ab1 64 // CODE GENERATOR: class constructor definition ic_variant
whismanoid 19:8f951e448ab1 65 MAX11410_ic_t ic_variant)
whismanoid 19:8f951e448ab1 66 // CODE GENERATOR: class constructor initializer list
whismanoid 19:8f951e448ab1 67 : m_spi(spi), m_cs_pin(cs_pin), // SPI interface
whismanoid 19:8f951e448ab1 68 // CODE GENERATOR: class constructor initializer list gpio InputPin pins
whismanoid 19:8f951e448ab1 69 // CODE GENERATOR: class constructor initializer list gpio OutputPin pins
whismanoid 19:8f951e448ab1 70 // CODE GENERATOR: class constructor initializer list ic_variant
whismanoid 19:8f951e448ab1 71 m_ic_variant(ic_variant)
whismanoid 19:8f951e448ab1 72 {
whismanoid 19:8f951e448ab1 73 // CODE GENERATOR: class constructor definition SPI interface initialization
whismanoid 19:8f951e448ab1 74 //
whismanoid 19:8f951e448ab1 75 // SPI CS = ActiveLow
whismanoid 19:8f951e448ab1 76 // SPI FrameStart = CS
whismanoid 19:8f951e448ab1 77 m_SPI_cs_state = 1;
whismanoid 19:8f951e448ab1 78 m_cs_pin = m_SPI_cs_state;
whismanoid 19:8f951e448ab1 79
whismanoid 19:8f951e448ab1 80 // SPI CPOL = 0
whismanoid 19:8f951e448ab1 81 // SPI CPHA = 0
whismanoid 19:8f951e448ab1 82 // SPI MOSI and MISO Data are both stable on Rising edge of SCLK
whismanoid 19:8f951e448ab1 83 // SPI SCLK Idle Low
whismanoid 19:8f951e448ab1 84 m_SPI_dataMode = 0; //SPI_MODE0 // CPOL=0,CPHA=0: Rising Edge stable; SCLK idle Low
whismanoid 19:8f951e448ab1 85 m_spi.format(8,m_SPI_dataMode); // int bits_must_be_8, int mode=0_3 CPOL=0,CPHA=0
whismanoid 19:8f951e448ab1 86
whismanoid 19:8f951e448ab1 87 // SPI SCLKMaxMHz = 8
whismanoid 19:8f951e448ab1 88 // SPI SCLKMinMHz = 0
whismanoid 19:8f951e448ab1 89 //#define SPI_SCLK_Hz 48000000 // 48MHz
whismanoid 19:8f951e448ab1 90 //#define SPI_SCLK_Hz 24000000 // 24MHz
whismanoid 19:8f951e448ab1 91 //#define SPI_SCLK_Hz 12000000 // 12MHz
whismanoid 19:8f951e448ab1 92 //#define SPI_SCLK_Hz 4000000 // 4MHz
whismanoid 19:8f951e448ab1 93 //#define SPI_SCLK_Hz 2000000 // 2MHz
whismanoid 19:8f951e448ab1 94 //#define SPI_SCLK_Hz 1000000 // 1MHz
whismanoid 19:8f951e448ab1 95 m_SPI_SCLK_Hz = 8000000; // 8MHz; MAX11410 limit is 8MHz
whismanoid 19:8f951e448ab1 96 m_spi.frequency(m_SPI_SCLK_Hz);
whismanoid 19:8f951e448ab1 97
whismanoid 19:8f951e448ab1 98 }
whismanoid 19:8f951e448ab1 99
whismanoid 19:8f951e448ab1 100 // CODE GENERATOR: class destructor definition
whismanoid 19:8f951e448ab1 101 MAX11410::~MAX11410()
whismanoid 19:8f951e448ab1 102 {
whismanoid 19:8f951e448ab1 103 // do nothing
whismanoid 19:8f951e448ab1 104 }
whismanoid 19:8f951e448ab1 105
whismanoid 19:8f951e448ab1 106 // CODE GENERATOR: spi_frequency setter definition
whismanoid 19:8f951e448ab1 107 /// set SPI SCLK frequency
whismanoid 19:8f951e448ab1 108 void MAX11410::spi_frequency(int spi_sclk_Hz)
whismanoid 19:8f951e448ab1 109 {
whismanoid 19:8f951e448ab1 110 m_SPI_SCLK_Hz = spi_sclk_Hz;
whismanoid 19:8f951e448ab1 111 m_spi.frequency(m_SPI_SCLK_Hz);
whismanoid 19:8f951e448ab1 112 }
whismanoid 19:8f951e448ab1 113
whismanoid 19:8f951e448ab1 114 // CODE GENERATOR: omit global g_MAX11410_device
whismanoid 19:8f951e448ab1 115 // CODE GENERATOR: extern function declarations
whismanoid 19:8f951e448ab1 116 // CODE GENERATOR: extern function requirement MAX11410::SPIoutputCS
whismanoid 19:8f951e448ab1 117 // Assert SPI Chip Select
whismanoid 19:8f951e448ab1 118 // SPI chip-select for MAX11410
whismanoid 19:8f951e448ab1 119 //
whismanoid 19:8f951e448ab1 120 void MAX11410::SPIoutputCS(int isLogicHigh)
whismanoid 19:8f951e448ab1 121 {
whismanoid 19:8f951e448ab1 122 // CODE GENERATOR: extern function definition for function SPIoutputCS
whismanoid 19:8f951e448ab1 123 // CODE GENERATOR: extern function definition for standard SPI interface function SPIoutputCS(int isLogicHigh)
whismanoid 19:8f951e448ab1 124 m_SPI_cs_state = isLogicHigh;
whismanoid 19:8f951e448ab1 125 m_cs_pin = m_SPI_cs_state;
whismanoid 19:8f951e448ab1 126 }
whismanoid 19:8f951e448ab1 127
whismanoid 19:8f951e448ab1 128 // CODE GENERATOR: extern function requirement MAX11410::SPIwrite16bits
whismanoid 19:8f951e448ab1 129 // SPI write 16 bits
whismanoid 19:8f951e448ab1 130 // SPI interface to MAX11410 shift 16 bits mosiData into MAX11410 DIN
whismanoid 19:8f951e448ab1 131 //
whismanoid 19:8f951e448ab1 132 void MAX11410::SPIwrite16bits(int16_t mosiData16)
whismanoid 19:8f951e448ab1 133 {
whismanoid 19:8f951e448ab1 134 // CODE GENERATOR: extern function definition for function SPIwrite16bits
whismanoid 19:8f951e448ab1 135 // TODO1: CODE GENERATOR: extern function definition for standard SPI interface function SPIwrite16bits(int16_t mosiData16)
whismanoid 19:8f951e448ab1 136 size_t byteCount = 2;
whismanoid 19:8f951e448ab1 137 static char mosiData[2];
whismanoid 19:8f951e448ab1 138 static char misoData[2];
whismanoid 19:8f951e448ab1 139 mosiData[0] = (char)((mosiData16 >> 8) & 0xFF); // MSByte
whismanoid 19:8f951e448ab1 140 mosiData[1] = (char)((mosiData16 >> 0) & 0xFF); // LSByte
whismanoid 19:8f951e448ab1 141 //
whismanoid 19:8f951e448ab1 142 // Arduino: begin critical section: noInterrupts() masks all interrupt sources; end critical section with interrupts()
whismanoid 19:8f951e448ab1 143 //~ noInterrupts();
whismanoid 19:8f951e448ab1 144 //
whismanoid 19:8f951e448ab1 145 //~ digitalWrite(Scope_Trigger_Pin, LOW); // diagnostic Scope_Trigger_Pin
whismanoid 19:8f951e448ab1 146 //
whismanoid 19:8f951e448ab1 147 unsigned int numBytesTransferred = m_spi.write(mosiData, byteCount, misoData, byteCount);
whismanoid 19:8f951e448ab1 148 //~ m_spi.transfer(mosiData8_FF0000);
whismanoid 19:8f951e448ab1 149 //~ m_spi.transfer(mosiData16_00FF00);
whismanoid 19:8f951e448ab1 150 //~ m_spi.transfer(mosiData16_0000FF);
whismanoid 19:8f951e448ab1 151 //
whismanoid 19:8f951e448ab1 152 //~ digitalWrite(Scope_Trigger_Pin, HIGH); // diagnostic Scope_Trigger_Pin
whismanoid 19:8f951e448ab1 153 //
whismanoid 19:8f951e448ab1 154 // Arduino: begin critical section: noInterrupts() masks all interrupt sources; end critical section with interrupts()
whismanoid 19:8f951e448ab1 155 //~ interrupts();
whismanoid 19:8f951e448ab1 156 //
whismanoid 19:8f951e448ab1 157 // VERIFY: SPIwrite24bits print diagnostic information
whismanoid 19:8f951e448ab1 158 //cmdLine.serial().printf(" MOSI->"));
whismanoid 19:8f951e448ab1 159 //cmdLine.serial().printf(" 0x"));
whismanoid 19:8f951e448ab1 160 //Serial.print( (mosiData8_FF0000 & 0xFF), HEX);
whismanoid 19:8f951e448ab1 161 //cmdLine.serial().printf(" 0x"));
whismanoid 19:8f951e448ab1 162 //Serial.print( (mosiData16_00FF00 & 0xFF), HEX);
whismanoid 19:8f951e448ab1 163 //cmdLine.serial().printf(" 0x"));
whismanoid 19:8f951e448ab1 164 //Serial.print( (mosiData16_0000FF & 0xFF), HEX);
whismanoid 19:8f951e448ab1 165 // hex dump mosiData[0..byteCount-1]
whismanoid 19:8f951e448ab1 166 #if 0 // HAS_MICROUSBSERIAL
whismanoid 19:8f951e448ab1 167 cmdLine_microUSBserial.serial().printf("\r\nSPI");
whismanoid 19:8f951e448ab1 168 if (byteCount > 7) {
whismanoid 19:8f951e448ab1 169 cmdLine_microUSBserial.serial().printf(" byteCount:%d", byteCount);
whismanoid 19:8f951e448ab1 170 }
whismanoid 19:8f951e448ab1 171 cmdLine_microUSBserial.serial().printf(" MOSI->");
whismanoid 19:8f951e448ab1 172 for (unsigned int byteIndex = 0; byteIndex < byteCount; byteIndex++)
whismanoid 19:8f951e448ab1 173 {
whismanoid 19:8f951e448ab1 174 cmdLine_microUSBserial.serial().printf(" 0x%2.2X", mosiData[byteIndex]);
whismanoid 19:8f951e448ab1 175 }
whismanoid 19:8f951e448ab1 176 // hex dump misoData[0..byteCount-1]
whismanoid 19:8f951e448ab1 177 cmdLine_microUSBserial.serial().printf(" MISO<-");
whismanoid 19:8f951e448ab1 178 for (unsigned int byteIndex = 0; byteIndex < numBytesTransferred; byteIndex++)
whismanoid 19:8f951e448ab1 179 {
whismanoid 19:8f951e448ab1 180 cmdLine_microUSBserial.serial().printf(" 0x%2.2X", misoData[byteIndex]);
whismanoid 19:8f951e448ab1 181 }
whismanoid 19:8f951e448ab1 182 cmdLine_microUSBserial.serial().printf(" ");
whismanoid 19:8f951e448ab1 183 #endif
whismanoid 19:8f951e448ab1 184 #if 0 // HAS_DAPLINK_SERIAL
whismanoid 19:8f951e448ab1 185 cmdLine_DAPLINKserial.serial().printf("\r\nSPI");
whismanoid 19:8f951e448ab1 186 if (byteCount > 7) {
whismanoid 19:8f951e448ab1 187 cmdLine_DAPLINKserial.serial().printf(" byteCount:%d", byteCount);
whismanoid 19:8f951e448ab1 188 }
whismanoid 19:8f951e448ab1 189 cmdLine_DAPLINKserial.serial().printf(" MOSI->");
whismanoid 19:8f951e448ab1 190 for (unsigned int byteIndex = 0; byteIndex < byteCount; byteIndex++)
whismanoid 19:8f951e448ab1 191 {
whismanoid 19:8f951e448ab1 192 cmdLine_DAPLINKserial.serial().printf(" 0x%2.2X", mosiData[byteIndex]);
whismanoid 19:8f951e448ab1 193 }
whismanoid 19:8f951e448ab1 194 // hex dump misoData[0..byteCount-1]
whismanoid 19:8f951e448ab1 195 cmdLine_DAPLINKserial.serial().printf(" MISO<-");
whismanoid 19:8f951e448ab1 196 for (unsigned int byteIndex = 0; byteIndex < numBytesTransferred; byteIndex++)
whismanoid 19:8f951e448ab1 197 {
whismanoid 19:8f951e448ab1 198 cmdLine_DAPLINKserial.serial().printf(" 0x%2.2X", misoData[byteIndex]);
whismanoid 19:8f951e448ab1 199 }
whismanoid 19:8f951e448ab1 200 cmdLine_DAPLINKserial.serial().printf(" ");
whismanoid 19:8f951e448ab1 201 #endif
whismanoid 19:8f951e448ab1 202 // VERIFY: DIAGNOSTIC: print MAX5715 device register write
whismanoid 19:8f951e448ab1 203 // TODO: MAX5715_print_register_verbose(mosiData8_FF0000, mosiData16_00FFFF);
whismanoid 19:8f951e448ab1 204 // TODO: print_verbose_SPI_diagnostic(mosiData16_FF00, mosiData16_00FF, misoData16_FF00, misoData16_00FF);
whismanoid 19:8f951e448ab1 205 //
whismanoid 19:8f951e448ab1 206 // int misoData16 = (misoData16_FF00 << 8) | misoData16_00FF;
whismanoid 19:8f951e448ab1 207 // return misoData16;
whismanoid 19:8f951e448ab1 208 }
whismanoid 19:8f951e448ab1 209
whismanoid 19:8f951e448ab1 210 // CODE GENERATOR: class member function definitions
whismanoid 19:8f951e448ab1 211 //----------------------------------------
whismanoid 19:8f951e448ab1 212 // Initialize device
whismanoid 19:8f951e448ab1 213 // @return 1 on success; 0 on failure
whismanoid 19:8f951e448ab1 214 uint8_t MAX11410::Init(void)
whismanoid 19:8f951e448ab1 215 {
whismanoid 19:8f951e448ab1 216
whismanoid 19:8f951e448ab1 217 //----------------------------------------
whismanoid 19:8f951e448ab1 218 // Nominal Full-Scale Voltage Reference
whismanoid 19:8f951e448ab1 219 VRef = 2.500;
whismanoid 19:8f951e448ab1 220
whismanoid 19:8f951e448ab1 221 //----------------------------------------
whismanoid 19:8f951e448ab1 222 // success
whismanoid 19:8f951e448ab1 223 return 1;
whismanoid 19:8f951e448ab1 224 }
whismanoid 19:8f951e448ab1 225
whismanoid 19:8f951e448ab1 226 //----------------------------------------
whismanoid 19:8f951e448ab1 227 // Return the physical voltage corresponding to DAC register.
whismanoid 19:8f951e448ab1 228 // Does not perform any offset or gain correction.
whismanoid 19:8f951e448ab1 229 //
whismanoid 19:8f951e448ab1 230 // @pre VRef = Voltage of REF input, in Volts
whismanoid 19:8f951e448ab1 231 // @param[in] value_u24: raw 24-bit MAX11410 code (right justified).
whismanoid 19:8f951e448ab1 232 // @return physical voltage corresponding to MAX11410 code.
whismanoid 19:8f951e448ab1 233 double MAX11410::VoltageOfCode(uint16_t value_u24)
whismanoid 19:8f951e448ab1 234 {
whismanoid 19:8f951e448ab1 235
whismanoid 19:8f951e448ab1 236 //----------------------------------------
whismanoid 19:8f951e448ab1 237 // Linear map min and max endpoints
whismanoid 19:8f951e448ab1 238 double MaxScaleVoltage = VRef; // voltage of maximum code 0xffffff
whismanoid 19:8f951e448ab1 239 double MinScaleVoltage = 0.0; // voltage of minimum code 0x000
whismanoid 19:8f951e448ab1 240 const uint16_t FULL_SCALE_CODE_24BIT = 0xffffff;
whismanoid 19:8f951e448ab1 241 const uint16_t MaxCode = FULL_SCALE_CODE_24BIT;
whismanoid 19:8f951e448ab1 242 const uint16_t MinCode = 0x000;
whismanoid 19:8f951e448ab1 243 double codeFraction = ((double)value_u24 - MinCode) / (MaxCode - MinCode + 1);
whismanoid 19:8f951e448ab1 244 return MinScaleVoltage + ((MaxScaleVoltage - MinScaleVoltage) * codeFraction);
whismanoid 19:8f951e448ab1 245 }
whismanoid 19:8f951e448ab1 246
whismanoid 19:8f951e448ab1 247 //----------------------------------------
whismanoid 19:8f951e448ab1 248 // Write an 8-bit MAX11410 register
whismanoid 19:8f951e448ab1 249 //
whismanoid 22:3e03687b7e95 250 // CMD_1aaa_aaaa_REGISTER_READ bit is cleared 0.
whismanoid 19:8f951e448ab1 251 //
whismanoid 19:8f951e448ab1 252 // SPI 16-bit transfer
whismanoid 19:8f951e448ab1 253 //
whismanoid 19:8f951e448ab1 254 // SPI MOSI = 0aaa_aaaa_dddd_dddd
whismanoid 19:8f951e448ab1 255 //
whismanoid 19:8f951e448ab1 256 // SPI MISO = xxxx_xxxx_xxxx_xxxx
whismanoid 19:8f951e448ab1 257 //
whismanoid 19:8f951e448ab1 258 // @return 1 on success; 0 on failure
whismanoid 19:8f951e448ab1 259 uint8_t MAX11410::Write_8bit(MAX11410_CMD_enum_t regAddress, uint8_t regData)
whismanoid 19:8f951e448ab1 260 {
whismanoid 23:e0c36767f98b 261
whismanoid 23:e0c36767f98b 262 //----------------------------------------
whismanoid 23:e0c36767f98b 263 // warning -- WIP work in progress
whismanoid 23:e0c36767f98b 264 #warning "Not Implemented Yet: MAX11410::Write_8bit..."
whismanoid 22:3e03687b7e95 265
whismanoid 22:3e03687b7e95 266 int16_t mosiData16 = ((int16_t)regAddress << 8) | ((int16_t)regData);
whismanoid 19:8f951e448ab1 267
whismanoid 19:8f951e448ab1 268 //----------------------------------------
whismanoid 22:3e03687b7e95 269 // SPI write 16-bit mosiData16 and read misoData16
whismanoid 19:8f951e448ab1 270 SPIoutputCS(0);
whismanoid 19:8f951e448ab1 271 SPIwrite16bits(mosiData16);
whismanoid 19:8f951e448ab1 272 SPIoutputCS(1);
whismanoid 19:8f951e448ab1 273
whismanoid 19:8f951e448ab1 274 //----------------------------------------
whismanoid 19:8f951e448ab1 275 // success
whismanoid 19:8f951e448ab1 276 return 1;
whismanoid 19:8f951e448ab1 277 }
whismanoid 19:8f951e448ab1 278
whismanoid 19:8f951e448ab1 279 //----------------------------------------
whismanoid 19:8f951e448ab1 280 // Read an 8-bit MAX11410 register
whismanoid 19:8f951e448ab1 281 //
whismanoid 22:3e03687b7e95 282 // CMD_1aaa_aaaa_REGISTER_READ bit is set 1.
whismanoid 19:8f951e448ab1 283 //
whismanoid 19:8f951e448ab1 284 // SPI 16-bit transfer
whismanoid 19:8f951e448ab1 285 //
whismanoid 19:8f951e448ab1 286 // SPI MOSI = 1aaa_aaaa_0000_0000
whismanoid 19:8f951e448ab1 287 //
whismanoid 19:8f951e448ab1 288 // SPI MISO = xxxx_xxxx_dddd_dddd
whismanoid 19:8f951e448ab1 289 //
whismanoid 19:8f951e448ab1 290 // @return 1 on success; 0 on failure
whismanoid 19:8f951e448ab1 291 uint8_t MAX11410::Read_8bit(MAX11410_CMD_enum_t regAddress, uint8_t* ptrRegData)
whismanoid 19:8f951e448ab1 292 {
whismanoid 23:e0c36767f98b 293
whismanoid 23:e0c36767f98b 294 //----------------------------------------
whismanoid 23:e0c36767f98b 295 // warning -- WIP work in progress
whismanoid 23:e0c36767f98b 296 #warning "Not Implemented Yet: MAX11410::Read_8bit..."
whismanoid 22:3e03687b7e95 297
whismanoid 22:3e03687b7e95 298 int16_t mosiData16 = ((CMD_1aaa_aaaa_REGISTER_READ | (int16_t)regAddress) << 8) | ((int16_t)0);
whismanoid 19:8f951e448ab1 299
whismanoid 19:8f951e448ab1 300 //----------------------------------------
whismanoid 22:3e03687b7e95 301 // SPI write 16-bit mosiData16 and read misoData16
whismanoid 19:8f951e448ab1 302 SPIoutputCS(0);
whismanoid 22:3e03687b7e95 303 int16_t misoData16 = SPIreadWrite16bits(mosiData16);
whismanoid 19:8f951e448ab1 304 SPIoutputCS(1);
whismanoid 19:8f951e448ab1 305
whismanoid 22:3e03687b7e95 306 (*ptrRegData) = (misoData16 & 0x00FF);
whismanoid 19:8f951e448ab1 307 //----------------------------------------
whismanoid 19:8f951e448ab1 308 // success
whismanoid 19:8f951e448ab1 309 return 1;
whismanoid 19:8f951e448ab1 310 }
whismanoid 19:8f951e448ab1 311
whismanoid 19:8f951e448ab1 312 //----------------------------------------
whismanoid 19:8f951e448ab1 313 // Write a 16-bit MAX11410 register
whismanoid 19:8f951e448ab1 314 //
whismanoid 22:3e03687b7e95 315 // CMD_1aaa_aaaa_REGISTER_READ bit is cleared 0.
whismanoid 19:8f951e448ab1 316 //
whismanoid 19:8f951e448ab1 317 // SPI 24-bit transfer
whismanoid 19:8f951e448ab1 318 //
whismanoid 19:8f951e448ab1 319 // SPI MOSI = 0aaa_aaaa_dddd_dddd_dddd_dddd
whismanoid 19:8f951e448ab1 320 //
whismanoid 19:8f951e448ab1 321 // SPI MISO = xxxx_xxxx_xxxx_xxxx_xxxx_xxxx
whismanoid 19:8f951e448ab1 322 //
whismanoid 19:8f951e448ab1 323 // @return 1 on success; 0 on failure
whismanoid 19:8f951e448ab1 324 uint8_t MAX11410::Write_16bit(MAX11410_CMD_enum_t regAddress, uint16_t regData)
whismanoid 19:8f951e448ab1 325 {
whismanoid 23:e0c36767f98b 326
whismanoid 23:e0c36767f98b 327 //----------------------------------------
whismanoid 23:e0c36767f98b 328 // warning -- WIP work in progress
whismanoid 23:e0c36767f98b 329 #warning "Not Implemented Yet: MAX11410::Write_16bit..."
whismanoid 22:3e03687b7e95 330
whismanoid 22:3e03687b7e95 331 int32_t mosiData32 = ((int32_t)regAddress << 8) | ((int32_t)regData);
whismanoid 19:8f951e448ab1 332
whismanoid 19:8f951e448ab1 333 //----------------------------------------
whismanoid 22:3e03687b7e95 334 // SPI write 24-bit ____ and read ____
whismanoid 22:3e03687b7e95 335 // SPI write 32-bit mosiData32 and read misoData32
whismanoid 19:8f951e448ab1 336 SPIoutputCS(0);
whismanoid 22:3e03687b7e95 337 int32_t misoData32 = SPIreadWrite32bits(mosiData32);
whismanoid 19:8f951e448ab1 338 SPIoutputCS(1);
whismanoid 19:8f951e448ab1 339
whismanoid 19:8f951e448ab1 340 //----------------------------------------
whismanoid 19:8f951e448ab1 341 // success
whismanoid 19:8f951e448ab1 342 return 1;
whismanoid 19:8f951e448ab1 343 }
whismanoid 19:8f951e448ab1 344
whismanoid 19:8f951e448ab1 345 //----------------------------------------
whismanoid 19:8f951e448ab1 346 // Read a 16-bit MAX11410 register
whismanoid 19:8f951e448ab1 347 //
whismanoid 22:3e03687b7e95 348 // CMD_1aaa_aaaa_REGISTER_READ bit is set 1.
whismanoid 19:8f951e448ab1 349 //
whismanoid 19:8f951e448ab1 350 // SPI 24-bit transfer
whismanoid 19:8f951e448ab1 351 //
whismanoid 19:8f951e448ab1 352 // SPI MOSI = 1aaa_aaaa_0000_0000_0000_0000
whismanoid 19:8f951e448ab1 353 //
whismanoid 19:8f951e448ab1 354 // SPI MISO = xxxx_xxxx_dddd_dddd_dddd_dddd
whismanoid 19:8f951e448ab1 355 //
whismanoid 19:8f951e448ab1 356 // @return 1 on success; 0 on failure
whismanoid 19:8f951e448ab1 357 uint8_t MAX11410::Read_16bit(MAX11410_CMD_enum_t regAddress, uint16_t* ptrRegData)
whismanoid 19:8f951e448ab1 358 {
whismanoid 23:e0c36767f98b 359
whismanoid 23:e0c36767f98b 360 //----------------------------------------
whismanoid 23:e0c36767f98b 361 // warning -- WIP work in progress
whismanoid 23:e0c36767f98b 362 #warning "Not Implemented Yet: MAX11410::Read_16bit..."
whismanoid 22:3e03687b7e95 363
whismanoid 22:3e03687b7e95 364 int32_t mosiData32 = ((CMD_1aaa_aaaa_REGISTER_READ | (int32_t)regAddress) << 16);
whismanoid 19:8f951e448ab1 365
whismanoid 19:8f951e448ab1 366 //----------------------------------------
whismanoid 22:3e03687b7e95 367 // SPI write 24-bit ____ and read ____
whismanoid 22:3e03687b7e95 368 // SPI write 32-bit mosiData32 and read misoData32
whismanoid 19:8f951e448ab1 369 SPIoutputCS(0);
whismanoid 22:3e03687b7e95 370 int32_t misoData32 = SPIreadWrite32bits(mosiData32);
whismanoid 19:8f951e448ab1 371 SPIoutputCS(1);
whismanoid 19:8f951e448ab1 372
whismanoid 22:3e03687b7e95 373 (*ptrRegData) = (misoData32 & 0x00FFFF);
whismanoid 19:8f951e448ab1 374 //----------------------------------------
whismanoid 19:8f951e448ab1 375 // success
whismanoid 19:8f951e448ab1 376 return 1;
whismanoid 19:8f951e448ab1 377 }
whismanoid 19:8f951e448ab1 378
whismanoid 19:8f951e448ab1 379 //----------------------------------------
whismanoid 19:8f951e448ab1 380 // Write a 24-bit MAX11410 register
whismanoid 19:8f951e448ab1 381 //
whismanoid 22:3e03687b7e95 382 // CMD_1aaa_aaaa_REGISTER_READ bit is cleared 0.
whismanoid 19:8f951e448ab1 383 //
whismanoid 19:8f951e448ab1 384 // SPI 32-bit transfer
whismanoid 19:8f951e448ab1 385 //
whismanoid 19:8f951e448ab1 386 // SPI MOSI = 0aaa_aaaa_dddd_dddd_dddd_dddd_dddd_dddd
whismanoid 19:8f951e448ab1 387 //
whismanoid 19:8f951e448ab1 388 // SPI MISO = xxxx_xxxx_xxxx_xxxx_xxxx_xxxx_xxxx_xxxx
whismanoid 19:8f951e448ab1 389 //
whismanoid 19:8f951e448ab1 390 // @return 1 on success; 0 on failure
whismanoid 19:8f951e448ab1 391 uint8_t MAX11410::Write_24bit(MAX11410_CMD_enum_t regAddress, uint32_t regData)
whismanoid 19:8f951e448ab1 392 {
whismanoid 23:e0c36767f98b 393
whismanoid 23:e0c36767f98b 394 //----------------------------------------
whismanoid 23:e0c36767f98b 395 // warning -- WIP work in progress
whismanoid 23:e0c36767f98b 396 #warning "Not Implemented Yet: MAX11410::Write_24bit..."
whismanoid 22:3e03687b7e95 397
whismanoid 22:3e03687b7e95 398 int32_t mosiData32 = ((int32_t)regAddress << 24) | ((int32_t)regData & 0x00FFFFFF);
whismanoid 19:8f951e448ab1 399
whismanoid 19:8f951e448ab1 400 //----------------------------------------
whismanoid 22:3e03687b7e95 401 // SPI write 32-bit mosiData32 and read misoData32
whismanoid 19:8f951e448ab1 402 SPIoutputCS(0);
whismanoid 22:3e03687b7e95 403 SPIreadWrite32bits(mosiData32);
whismanoid 19:8f951e448ab1 404 SPIoutputCS(1);
whismanoid 19:8f951e448ab1 405
whismanoid 19:8f951e448ab1 406 //----------------------------------------
whismanoid 19:8f951e448ab1 407 // success
whismanoid 19:8f951e448ab1 408 return 1;
whismanoid 19:8f951e448ab1 409 }
whismanoid 19:8f951e448ab1 410
whismanoid 19:8f951e448ab1 411 //----------------------------------------
whismanoid 19:8f951e448ab1 412 // Read a 24-bit MAX11410 register
whismanoid 19:8f951e448ab1 413 //
whismanoid 22:3e03687b7e95 414 // CMD_1aaa_aaaa_REGISTER_READ bit is set 1.
whismanoid 19:8f951e448ab1 415 //
whismanoid 19:8f951e448ab1 416 // SPI 32-bit transfer
whismanoid 19:8f951e448ab1 417 //
whismanoid 19:8f951e448ab1 418 // SPI MOSI = 1aaa_aaaa_0000_0000_0000_0000_0000_0000
whismanoid 19:8f951e448ab1 419 //
whismanoid 19:8f951e448ab1 420 // SPI MISO = xxxx_xxxx_dddd_dddd_dddd_dddd_dddd_dddd
whismanoid 19:8f951e448ab1 421 //
whismanoid 19:8f951e448ab1 422 // @return 1 on success; 0 on failure
whismanoid 19:8f951e448ab1 423 uint8_t MAX11410::Read_24bit(MAX11410_CMD_enum_t regAddress, uint32_t* ptrRegData)
whismanoid 19:8f951e448ab1 424 {
whismanoid 23:e0c36767f98b 425
whismanoid 23:e0c36767f98b 426 //----------------------------------------
whismanoid 23:e0c36767f98b 427 // warning -- WIP work in progress
whismanoid 23:e0c36767f98b 428 #warning "Not Implemented Yet: MAX11410::Read_24bit..."
whismanoid 22:3e03687b7e95 429
whismanoid 22:3e03687b7e95 430 int32_t mosiData32 = ((CMD_1aaa_aaaa_REGISTER_READ | (int32_t)regAddress) << 24);
whismanoid 19:8f951e448ab1 431
whismanoid 19:8f951e448ab1 432 //----------------------------------------
whismanoid 22:3e03687b7e95 433 // SPI write 32-bit mosiData32 and read misoData32
whismanoid 19:8f951e448ab1 434 SPIoutputCS(0);
whismanoid 22:3e03687b7e95 435 int32_t misoData32 = SPIreadWrite32bits(mosiData32);
whismanoid 19:8f951e448ab1 436 SPIoutputCS(1);
whismanoid 19:8f951e448ab1 437
whismanoid 22:3e03687b7e95 438 (*ptrRegData) = (misoData32 & 0x00FFFFFF);
whismanoid 19:8f951e448ab1 439 //----------------------------------------
whismanoid 19:8f951e448ab1 440 // success
whismanoid 19:8f951e448ab1 441 return 1;
whismanoid 19:8f951e448ab1 442 }
whismanoid 19:8f951e448ab1 443
whismanoid 19:8f951e448ab1 444 //----------------------------------------
whismanoid 19:8f951e448ab1 445 // Configure Measurement for voltage input.
whismanoid 19:8f951e448ab1 446 //
whismanoid 19:8f951e448ab1 447 // Example code for typical voltage measurement.
whismanoid 19:8f951e448ab1 448 //
whismanoid 19:8f951e448ab1 449 // SPI register write sequence test AIN0-AGND voltage input using REF2=2.5V
whismanoid 19:8f951e448ab1 450 // write8 0x00 PD = 0x03 (Reset Registers; enter Standby mode)
whismanoid 19:8f951e448ab1 451 // write8 0x00 PD = 0x00 (NOP)
whismanoid 19:8f951e448ab1 452 // write8 0x08 FILTER = 0x34 to select RATE_0100, LINEF_11_SINC4 60SPS (given CONV_TYPE_01_Continuous )
whismanoid 19:8f951e448ab1 453 // write8 0x0B MUX_CTRL0 = 0x0A to select AINP=AIN0 and AINN=GND
whismanoid 19:8f951e448ab1 454 // write8 0x09 CTRL = 0x02 to select reference REF2P/REF2N; or CTRL = 0x1A to select reference REF2P/REF2N with reference input buffers enabled; Data Format = Bipolar 2's Complement
whismanoid 19:8f951e448ab1 455 // write8 0x0E PGA = 0x00 to select input path = Buffers, digital gain = 1V/V
whismanoid 19:8f951e448ab1 456 // write8 0x01 CONV_START = 0x01 to set Conversion Mode = Continuous
whismanoid 19:8f951e448ab1 457 // read24 0x80|0x38 STATUS (%SW 0xB8 0 0 0)
whismanoid 19:8f951e448ab1 458 // read24 0x80|0x30 DATA0 (%SW 0xB0 0 0 0)
whismanoid 19:8f951e448ab1 459 //
whismanoid 19:8f951e448ab1 460 // @param[in] channel_hi = channel high side
whismanoid 19:8f951e448ab1 461 // @param[in] channel_lo = channel low side
whismanoid 19:8f951e448ab1 462 //
whismanoid 19:8f951e448ab1 463 // @return 1 on success; 0 on failure
whismanoid 19:8f951e448ab1 464 uint8_t MAX11410::Configure_Voltage(MAX11410_AINP_SEL_enum_t channel_hi, MAX11410_AINN_SEL_enum_t channel_lo)
whismanoid 19:8f951e448ab1 465 {
whismanoid 23:e0c36767f98b 466
whismanoid 23:e0c36767f98b 467 //----------------------------------------
whismanoid 23:e0c36767f98b 468 // warning -- WIP work in progress
whismanoid 23:e0c36767f98b 469 #warning "Not Tested Yet: MAX11410::Configure_Voltage..."
whismanoid 19:8f951e448ab1 470
whismanoid 19:8f951e448ab1 471 //----------------------------------------
whismanoid 19:8f951e448ab1 472 // write8 0x00 PD = 0x03 (Reset Registers; enter Standby mode)
whismanoid 23:e0c36767f98b 473 Write_8bit(CMD_r000_0000_xxxx_xxdd_PD, PD_11_Reset);
whismanoid 19:8f951e448ab1 474
whismanoid 19:8f951e448ab1 475 //----------------------------------------
whismanoid 19:8f951e448ab1 476 // write8 0x00 PD = 0x00 (NOP)
whismanoid 23:e0c36767f98b 477 Write_8bit(CMD_r000_0000_xxxx_xxdd_PD, PD_00_Normal);
whismanoid 19:8f951e448ab1 478
whismanoid 19:8f951e448ab1 479 //----------------------------------------
whismanoid 19:8f951e448ab1 480 // write8 0x08 FILTER = 0x34 to select RATE_0100, LINEF_11_SINC4 60SPS (given CONV_TYPE_01_Continuous)
whismanoid 23:e0c36767f98b 481 Write_8bit(CMD_r000_1000_x0dd_dddd_FILTER, 0x34);
whismanoid 19:8f951e448ab1 482
whismanoid 19:8f951e448ab1 483 //----------------------------------------
whismanoid 19:8f951e448ab1 484 // write8 0x0B MUX_CTRL0 = 0x0A to select AINP=AIN0 and AINN=GND
whismanoid 23:e0c36767f98b 485 Write_8bit(CMD_r000_1011_dddd_dddd_MUX_CTRL0, 0x0A);
whismanoid 19:8f951e448ab1 486
whismanoid 19:8f951e448ab1 487 //----------------------------------------
whismanoid 19:8f951e448ab1 488 // write8 0x09 CTRL = 0x02 to select reference REF2P/REF2N; or CTRL = 0x1A to select reference REF2P/REF2N with reference input buffers enabled; Data Format = Bipolar 2's Complement
whismanoid 23:e0c36767f98b 489 Write_8bit(CMD_r000_1001_dddd_dddd_CTRL, 0x02);
whismanoid 19:8f951e448ab1 490
whismanoid 19:8f951e448ab1 491 //----------------------------------------
whismanoid 19:8f951e448ab1 492 // write8 0x0E PGA = 0x00 to select input path = Buffers, digital gain = 1V/V
whismanoid 23:e0c36767f98b 493 Write_8bit(CMD_r000_1110_xxdd_xddd_PGA, 0x00);
whismanoid 19:8f951e448ab1 494
whismanoid 19:8f951e448ab1 495 //----------------------------------------
whismanoid 19:8f951e448ab1 496 // write8 0x01 CONV_START = 0x01 to set Conversion Mode = Continuous
whismanoid 23:e0c36767f98b 497 Write_8bit(CMD_r000_0001_xddd_xxdd_CONV_START, 0x01);
whismanoid 19:8f951e448ab1 498
whismanoid 19:8f951e448ab1 499 //----------------------------------------
whismanoid 19:8f951e448ab1 500 // read24 0x80|0x38 STATUS (%SW 0xB8 0 0 0)
whismanoid 23:e0c36767f98b 501 Read_24bit(CMD_r011_1000_dddd_dddd_dddd_dddd_dxxx_dddd_STATUS, &status);
whismanoid 19:8f951e448ab1 502
whismanoid 19:8f951e448ab1 503 //----------------------------------------
whismanoid 19:8f951e448ab1 504 // read24 0x80|0x30 DATA0 (%SW 0xB0 0 0 0)
whismanoid 23:e0c36767f98b 505 Read_24bit(CMD_r011_0000_dddd_dddd_dddd_dddd_dddd_dddd_DATA0, &data0);
whismanoid 23:e0c36767f98b 506
whismanoid 23:e0c36767f98b 507 //----------------------------------------
whismanoid 23:e0c36767f98b 508 // success
whismanoid 23:e0c36767f98b 509 return 1;
whismanoid 19:8f951e448ab1 510 }
whismanoid 19:8f951e448ab1 511
whismanoid 19:8f951e448ab1 512 //----------------------------------------
whismanoid 19:8f951e448ab1 513 // Trigger Measurement for voltage input.
whismanoid 19:8f951e448ab1 514 //
whismanoid 19:8f951e448ab1 515 // Example code for typical voltage measurement.
whismanoid 19:8f951e448ab1 516 //
whismanoid 19:8f951e448ab1 517 // @param[in] channel_hi = channel high side
whismanoid 19:8f951e448ab1 518 // @param[in] channel_lo = channel low side
whismanoid 19:8f951e448ab1 519 // @post TODO: where does the measurement go? struct member?
whismanoid 19:8f951e448ab1 520 //
whismanoid 19:8f951e448ab1 521 // @return 1 on success; 0 on failure
whismanoid 19:8f951e448ab1 522 uint8_t MAX11410::Measure_Voltage(MAX11410_AINP_SEL_enum_t channel_hi, MAX11410_AINN_SEL_enum_t channel_lo)
whismanoid 19:8f951e448ab1 523 {
whismanoid 23:e0c36767f98b 524
whismanoid 23:e0c36767f98b 525 //----------------------------------------
whismanoid 23:e0c36767f98b 526 // warning -- WIP work in progress
whismanoid 23:e0c36767f98b 527 #warning "Not Tested Yet: MAX11410::Measure_Voltage..."
whismanoid 19:8f951e448ab1 528
whismanoid 19:8f951e448ab1 529 //----------------------------------------
whismanoid 22:3e03687b7e95 530 // read24 0x80|0x38 STATUS (%SW 0xB8 0 0 0)
whismanoid 22:3e03687b7e95 531 Read_24bit(CMD_r011_1000_dddd_dddd_dddd_dddd_dxxx_dddd_STATUS, &status);
whismanoid 22:3e03687b7e95 532
whismanoid 22:3e03687b7e95 533 //----------------------------------------
whismanoid 22:3e03687b7e95 534 // read24 0x80|0x30 DATA0 (%SW 0xB0 0 0 0)
whismanoid 22:3e03687b7e95 535 Read_24bit(CMD_r011_0000_dddd_dddd_dddd_dddd_dddd_dddd_DATA0, &data0);
whismanoid 23:e0c36767f98b 536
whismanoid 23:e0c36767f98b 537 //----------------------------------------
whismanoid 19:8f951e448ab1 538 // success
whismanoid 19:8f951e448ab1 539 return 1;
whismanoid 19:8f951e448ab1 540 }
whismanoid 19:8f951e448ab1 541
whismanoid 19:8f951e448ab1 542 //----------------------------------------
whismanoid 19:8f951e448ab1 543 // Configure Measurement for Resistive Temperature Device (RTD).
whismanoid 19:8f951e448ab1 544 //
whismanoid 19:8f951e448ab1 545 // Example code for typical RTD measurement.
whismanoid 19:8f951e448ab1 546 //
whismanoid 19:8f951e448ab1 547 // @param[in] channel_RTD_Force = channel RTD high side force
whismanoid 19:8f951e448ab1 548 // @param[in] channel_RTD_Hi = channel RTD high side sense
whismanoid 19:8f951e448ab1 549 // @param[in] channel_RTD_Lo = channel RTD low side
whismanoid 19:8f951e448ab1 550 //
whismanoid 19:8f951e448ab1 551 // @return 1 on success; 0 on failure
whismanoid 19:8f951e448ab1 552 uint8_t MAX11410::Configure_RTD(MAX11410_AINP_SEL_enum_t channel_RTD_Force, MAX11410_AINP_SEL_enum_t channel_RTD_Hi, MAX11410_AINN_SEL_enum_t channel_RTD_Lo)
whismanoid 19:8f951e448ab1 553 {
whismanoid 23:e0c36767f98b 554
whismanoid 23:e0c36767f98b 555 //----------------------------------------
whismanoid 23:e0c36767f98b 556 // warning -- WIP work in progress
whismanoid 23:e0c36767f98b 557 #warning "Not Implemented Yet: MAX11410::Configure_RTD..."
whismanoid 19:8f951e448ab1 558
whismanoid 19:8f951e448ab1 559 //----------------------------------------
whismanoid 22:3e03687b7e95 560 // read24 0x80|0x38 STATUS (%SW 0xB8 0 0 0)
whismanoid 22:3e03687b7e95 561 Read_24bit(CMD_r011_1000_dddd_dddd_dddd_dddd_dxxx_dddd_STATUS, &status);
whismanoid 22:3e03687b7e95 562
whismanoid 22:3e03687b7e95 563 //----------------------------------------
whismanoid 22:3e03687b7e95 564 // read24 0x80|0x30 DATA0 (%SW 0xB0 0 0 0)
whismanoid 22:3e03687b7e95 565 Read_24bit(CMD_r011_0000_dddd_dddd_dddd_dddd_dddd_dddd_DATA0, &data0);
whismanoid 23:e0c36767f98b 566
whismanoid 23:e0c36767f98b 567 //----------------------------------------
whismanoid 19:8f951e448ab1 568 // success
whismanoid 19:8f951e448ab1 569 return 1;
whismanoid 19:8f951e448ab1 570 }
whismanoid 19:8f951e448ab1 571
whismanoid 19:8f951e448ab1 572 //----------------------------------------
whismanoid 19:8f951e448ab1 573 // Trigger Measurement for Resistive Temperature Device (RTD).
whismanoid 19:8f951e448ab1 574 //
whismanoid 19:8f951e448ab1 575 // Example code for typical RTD measurement.
whismanoid 19:8f951e448ab1 576 //
whismanoid 19:8f951e448ab1 577 // @param[in] channel_RTD_Force = channel RTD high side force
whismanoid 19:8f951e448ab1 578 // @param[in] channel_RTD_Hi = channel RTD high side sense
whismanoid 19:8f951e448ab1 579 // @param[in] channel_RTD_Lo = channel RTD low side
whismanoid 19:8f951e448ab1 580 // @post TODO: where does the measurement go? struct member?
whismanoid 19:8f951e448ab1 581 //
whismanoid 19:8f951e448ab1 582 // @return 1 on success; 0 on failure
whismanoid 19:8f951e448ab1 583 uint8_t MAX11410::Measure_RTD(MAX11410_AINP_SEL_enum_t channel_RTD_Force, MAX11410_AINP_SEL_enum_t channel_RTD_Hi, MAX11410_AINN_SEL_enum_t channel_RTD_Lo)
whismanoid 19:8f951e448ab1 584 {
whismanoid 23:e0c36767f98b 585
whismanoid 23:e0c36767f98b 586 //----------------------------------------
whismanoid 23:e0c36767f98b 587 // warning -- WIP work in progress
whismanoid 23:e0c36767f98b 588 #warning "Not Implemented Yet: MAX11410::Measure_RTD..."
whismanoid 19:8f951e448ab1 589
whismanoid 19:8f951e448ab1 590 //----------------------------------------
whismanoid 22:3e03687b7e95 591 // read24 0x80|0x38 STATUS (%SW 0xB8 0 0 0)
whismanoid 22:3e03687b7e95 592 Read_24bit(CMD_r011_1000_dddd_dddd_dddd_dddd_dxxx_dddd_STATUS, &status);
whismanoid 23:e0c36767f98b 593
whismanoid 23:e0c36767f98b 594 //----------------------------------------
whismanoid 22:3e03687b7e95 595 // read24 0x80|0x30 DATA0 (%SW 0xB0 0 0 0)
whismanoid 22:3e03687b7e95 596 Read_24bit(CMD_r011_0000_dddd_dddd_dddd_dddd_dddd_dddd_DATA0, &data0);
whismanoid 23:e0c36767f98b 597
whismanoid 23:e0c36767f98b 598 //----------------------------------------
whismanoid 19:8f951e448ab1 599 // success
whismanoid 19:8f951e448ab1 600 return 1;
whismanoid 19:8f951e448ab1 601 }
whismanoid 19:8f951e448ab1 602
whismanoid 19:8f951e448ab1 603 //----------------------------------------
whismanoid 19:8f951e448ab1 604 // Configure Measurement for Thermocouple
whismanoid 19:8f951e448ab1 605 //
whismanoid 19:8f951e448ab1 606 // Example code for typical Thermocouple measurement.
whismanoid 19:8f951e448ab1 607 //
whismanoid 19:8f951e448ab1 608 // @param[in] channel_TC_Hi = channel of Thermocouple high side
whismanoid 19:8f951e448ab1 609 // @param[in] channel_TC_Lo = channel of Thermocouple low side
whismanoid 19:8f951e448ab1 610 // @param[in] channel_RTD_Hi = channel of cold junction RTD high side
whismanoid 19:8f951e448ab1 611 // @param[in] channel_RTD_Lo = channel of cold junction RTD low side
whismanoid 19:8f951e448ab1 612 //
whismanoid 19:8f951e448ab1 613 // @return 1 on success; 0 on failure
whismanoid 19:8f951e448ab1 614 uint8_t MAX11410::Configure_Thermocouple(MAX11410_AINP_SEL_enum_t channel_TC_Hi, MAX11410_AINN_SEL_enum_t channel_TC_Lo, MAX11410_AINP_SEL_enum_t channel_RTD_Hi, MAX11410_AINP_SEL_enum_t channel_RTD_Lo)
whismanoid 19:8f951e448ab1 615 {
whismanoid 23:e0c36767f98b 616
whismanoid 23:e0c36767f98b 617 //----------------------------------------
whismanoid 23:e0c36767f98b 618 // warning -- WIP work in progress
whismanoid 23:e0c36767f98b 619 #warning "Not Implemented Yet: MAX11410::Configure_Thermocouple..."
whismanoid 19:8f951e448ab1 620
whismanoid 19:8f951e448ab1 621 //----------------------------------------
whismanoid 22:3e03687b7e95 622 // read24 0x80|0x38 STATUS (%SW 0xB8 0 0 0)
whismanoid 22:3e03687b7e95 623 Read_24bit(CMD_r011_1000_dddd_dddd_dddd_dddd_dxxx_dddd_STATUS, &status);
whismanoid 22:3e03687b7e95 624
whismanoid 22:3e03687b7e95 625 //----------------------------------------
whismanoid 22:3e03687b7e95 626 // read24 0x80|0x30 DATA0 (%SW 0xB0 0 0 0)
whismanoid 22:3e03687b7e95 627 Read_24bit(CMD_r011_0000_dddd_dddd_dddd_dddd_dddd_dddd_DATA0, &data0);
whismanoid 23:e0c36767f98b 628
whismanoid 23:e0c36767f98b 629 //----------------------------------------
whismanoid 19:8f951e448ab1 630 // success
whismanoid 19:8f951e448ab1 631 return 1;
whismanoid 19:8f951e448ab1 632 }
whismanoid 19:8f951e448ab1 633
whismanoid 19:8f951e448ab1 634 //----------------------------------------
whismanoid 19:8f951e448ab1 635 // Trigger Measurement for Thermocouple
whismanoid 19:8f951e448ab1 636 //
whismanoid 19:8f951e448ab1 637 // Example code for typical Thermocouple measurement.
whismanoid 19:8f951e448ab1 638 //
whismanoid 19:8f951e448ab1 639 // @param[in] channel_TC_Hi = channel of Thermocouple high side
whismanoid 19:8f951e448ab1 640 // @param[in] channel_TC_Lo = channel of Thermocouple low side
whismanoid 19:8f951e448ab1 641 // @param[in] channel_RTD_Hi = channel of cold junction RTD high side
whismanoid 19:8f951e448ab1 642 // @param[in] channel_RTD_Lo = channel of cold junction RTD low side
whismanoid 19:8f951e448ab1 643 // @post TODO: where does the measurement go? struct member?
whismanoid 19:8f951e448ab1 644 //
whismanoid 19:8f951e448ab1 645 // @return 1 on success; 0 on failure
whismanoid 19:8f951e448ab1 646 uint8_t MAX11410::Measure_Thermocouple(MAX11410_AINP_SEL_enum_t channel_TC_Hi, MAX11410_AINN_SEL_enum_t channel_TC_Lo, MAX11410_AINP_SEL_enum_t channel_RTD_Hi, MAX11410_AINP_SEL_enum_t channel_RTD_Lo)
whismanoid 19:8f951e448ab1 647 {
whismanoid 23:e0c36767f98b 648
whismanoid 23:e0c36767f98b 649 //----------------------------------------
whismanoid 23:e0c36767f98b 650 // warning -- WIP work in progress
whismanoid 23:e0c36767f98b 651 #warning "Not Implemented Yet: MAX11410::Measure_Thermocouple..."
whismanoid 19:8f951e448ab1 652
whismanoid 19:8f951e448ab1 653 //----------------------------------------
whismanoid 22:3e03687b7e95 654 // read24 0x80|0x38 STATUS (%SW 0xB8 0 0 0)
whismanoid 22:3e03687b7e95 655 Read_24bit(CMD_r011_1000_dddd_dddd_dddd_dddd_dxxx_dddd_STATUS, &status);
whismanoid 22:3e03687b7e95 656
whismanoid 22:3e03687b7e95 657 //----------------------------------------
whismanoid 22:3e03687b7e95 658 // read24 0x80|0x30 DATA0 (%SW 0xB0 0 0 0)
whismanoid 22:3e03687b7e95 659 Read_24bit(CMD_r011_0000_dddd_dddd_dddd_dddd_dddd_dddd_DATA0, &data0);
whismanoid 23:e0c36767f98b 660
whismanoid 23:e0c36767f98b 661 //----------------------------------------
whismanoid 19:8f951e448ab1 662 // success
whismanoid 19:8f951e448ab1 663 return 1;
whismanoid 19:8f951e448ab1 664 }
whismanoid 19:8f951e448ab1 665
whismanoid 19:8f951e448ab1 666
whismanoid 19:8f951e448ab1 667 // End of file