Maxim Integrated / Mbed OS HSP_RPC_GUI

MAX32620HSP (MAXREFDES100) RPC Example for Graphical User Interface

Dependencies:   USBDevice

Fork of HSP_Release by Jerry Bradshaw

This is an example program for the MAX32620HSP (MAXREFDES100 Health Sensor Platform). It demonstrates all the features of the platform and works with a companion graphical user interface (GUI) to help evaluate/configure/monitor the board. Go to the MAXREFDES100 product page and click on "design resources" to download the companion software. The GUI connects to the board through an RPC interface on a virtual serial port over the USB interface.

The RPC interface provides access to all the features of the board and is available to interface with other development environments such Matlab. This firmware provides realtime data streaming through the RPC interface over USB, and also provides the ability to log the data to flash for untethered battery operation. The data logging settings are configured through the GUI, and the GUI also provides the interface to download logged data.

Details on the RPC interface can be found here: HSP RPC Interface Documentation

Windows

With this program loaded, the MAX32620HSP will appear on your computer as a serial port. On Mac and Linux, this will happen by default. For Windows, you need to install a driver: HSP serial port windows driver

For more details about this platform and how to use it, see the MAXREFDES100 product page.

HSP/Devices/MAX30001/MAX30001/MAX30001.cpp@0:e4a10ed6eb92, 2016-10-25 (annotated)

Committer:
jbradshaw
Date:
Tue Oct 25 15:22:11 2016 +0000
Revision:
0:e4a10ed6eb92
Child:
1:9490836294ea
tewt

Who changed what in which revision?

UserRevisionLine numberNew contents of line
jbradshaw 0:e4a10ed6eb92 1
jbradshaw 0:e4a10ed6eb92 2 /*******************************************************************************
jbradshaw 0:e4a10ed6eb92 3 * Copyright (C) 2016 Maxim Integrated Products, Inc., All Rights Reserved.
jbradshaw 0:e4a10ed6eb92 4 *
jbradshaw 0:e4a10ed6eb92 5 * Permission is hereby granted, free of charge, to any person obtaining a
jbradshaw 0:e4a10ed6eb92 6 * copy of this software and associated documentation files (the "Software"),
jbradshaw 0:e4a10ed6eb92 7 * to deal in the Software without restriction, including without limitation
jbradshaw 0:e4a10ed6eb92 8 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
jbradshaw 0:e4a10ed6eb92 9 * and/or sell copies of the Software, and to permit persons to whom the
jbradshaw 0:e4a10ed6eb92 10 * Software is furnished to do so, subject to the following conditions:
jbradshaw 0:e4a10ed6eb92 11 *
jbradshaw 0:e4a10ed6eb92 12 * The above copyright notice and this permission notice shall be included
jbradshaw 0:e4a10ed6eb92 13 * in all copies or substantial portions of the Software.
jbradshaw 0:e4a10ed6eb92 14 *
jbradshaw 0:e4a10ed6eb92 15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
jbradshaw 0:e4a10ed6eb92 16 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
jbradshaw 0:e4a10ed6eb92 17 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
jbradshaw 0:e4a10ed6eb92 18 * IN NO EVENT SHALL MAXIM INTEGRATED BE LIABLE FOR ANY CLAIM, DAMAGES
jbradshaw 0:e4a10ed6eb92 19 * OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
jbradshaw 0:e4a10ed6eb92 20 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
jbradshaw 0:e4a10ed6eb92 21 * OTHER DEALINGS IN THE SOFTWARE.
jbradshaw 0:e4a10ed6eb92 22 *
jbradshaw 0:e4a10ed6eb92 23 * Except as contained in this notice, the name of Maxim Integrated
jbradshaw 0:e4a10ed6eb92 24 * Products, Inc. shall not be used except as stated in the Maxim Integrated
jbradshaw 0:e4a10ed6eb92 25 * Products, Inc. Branding Policy.
jbradshaw 0:e4a10ed6eb92 26 *
jbradshaw 0:e4a10ed6eb92 27 * The mere transfer of this software does not imply any licenses
jbradshaw 0:e4a10ed6eb92 28 * of trade secrets, proprietary technology, copyrights, patents,
jbradshaw 0:e4a10ed6eb92 29 * trademarks, maskwork rights, or any other form of intellectual
jbradshaw 0:e4a10ed6eb92 30 * property whatsoever. Maxim Integrated Products, Inc. retains all
jbradshaw 0:e4a10ed6eb92 31 * ownership rights.
jbradshaw 0:e4a10ed6eb92 32 *******************************************************************************
jbradshaw 0:e4a10ed6eb92 33 */
jbradshaw 0:e4a10ed6eb92 34
jbradshaw 0:e4a10ed6eb92 35 #include "mbed.h"
jbradshaw 0:e4a10ed6eb92 36 #include "MAX30001.h"
jbradshaw 0:e4a10ed6eb92 37
jbradshaw 0:e4a10ed6eb92 38 MAX30001 *MAX30001::instance = NULL;
jbradshaw 0:e4a10ed6eb92 39
jbradshaw 0:e4a10ed6eb92 40 //******************************************************************************
jbradshaw 0:e4a10ed6eb92 41 MAX30001::MAX30001(PinName mosi, PinName miso, PinName sclk, PinName cs) {
jbradshaw 0:e4a10ed6eb92 42 spi = new SPI(mosi, miso, sclk, cs);
jbradshaw 0:e4a10ed6eb92 43 spi->frequency(3000000);
jbradshaw 0:e4a10ed6eb92 44 spi_owner = true;
jbradshaw 0:e4a10ed6eb92 45 functionpointer.attach(&spiHandler);
jbradshaw 0:e4a10ed6eb92 46 onDataAvailableCallback = NULL;
jbradshaw 0:e4a10ed6eb92 47 instance = this;
jbradshaw 0:e4a10ed6eb92 48 }
jbradshaw 0:e4a10ed6eb92 49
jbradshaw 0:e4a10ed6eb92 50 //******************************************************************************
jbradshaw 0:e4a10ed6eb92 51 MAX30001::MAX30001(SPI *_spi) {
jbradshaw 0:e4a10ed6eb92 52 spi = _spi;
jbradshaw 0:e4a10ed6eb92 53 spi->frequency(3000000);
jbradshaw 0:e4a10ed6eb92 54 spi_owner = false;
jbradshaw 0:e4a10ed6eb92 55 functionpointer.attach(&spiHandler);
jbradshaw 0:e4a10ed6eb92 56 onDataAvailableCallback = NULL;
jbradshaw 0:e4a10ed6eb92 57 instance = this;
jbradshaw 0:e4a10ed6eb92 58 }
jbradshaw 0:e4a10ed6eb92 59
jbradshaw 0:e4a10ed6eb92 60 //******************************************************************************
jbradshaw 0:e4a10ed6eb92 61 MAX30001::~MAX30001(void) {
jbradshaw 0:e4a10ed6eb92 62 if (spi_owner) {
jbradshaw 0:e4a10ed6eb92 63 delete spi;
jbradshaw 0:e4a10ed6eb92 64 }
jbradshaw 0:e4a10ed6eb92 65 }
jbradshaw 0:e4a10ed6eb92 66
jbradshaw 0:e4a10ed6eb92 67 //******************************************************************************
jbradshaw 0:e4a10ed6eb92 68 int MAX30001::max30001_Rbias_FMSTR_Init(uint8_t En_rbias, uint8_t Rbiasv,
jbradshaw 0:e4a10ed6eb92 69 uint8_t Rbiasp, uint8_t Rbiasn,
jbradshaw 0:e4a10ed6eb92 70 uint8_t Fmstr) {
jbradshaw 0:e4a10ed6eb92 71 if (max30001_reg_read(CNFG_GEN, &max30001_cnfg_gen.all) == -1) {
jbradshaw 0:e4a10ed6eb92 72 return -1;
jbradshaw 0:e4a10ed6eb92 73 }
jbradshaw 0:e4a10ed6eb92 74
jbradshaw 0:e4a10ed6eb92 75 max30001_cnfg_gen.bit.en_rbias = En_rbias;
jbradshaw 0:e4a10ed6eb92 76 max30001_cnfg_gen.bit.rbiasv = Rbiasv;
jbradshaw 0:e4a10ed6eb92 77 max30001_cnfg_gen.bit.rbiasp = Rbiasp;
jbradshaw 0:e4a10ed6eb92 78 max30001_cnfg_gen.bit.rbiasn = Rbiasn;
jbradshaw 0:e4a10ed6eb92 79 max30001_cnfg_gen.bit.fmstr = Fmstr;
jbradshaw 0:e4a10ed6eb92 80
jbradshaw 0:e4a10ed6eb92 81 if (max30001_reg_write(CNFG_GEN, max30001_cnfg_gen.all) == -1) {
jbradshaw 0:e4a10ed6eb92 82 return -1;
jbradshaw 0:e4a10ed6eb92 83 }
jbradshaw 0:e4a10ed6eb92 84 return 0;
jbradshaw 0:e4a10ed6eb92 85 }
jbradshaw 0:e4a10ed6eb92 86
jbradshaw 0:e4a10ed6eb92 87 //******************************************************************************
jbradshaw 0:e4a10ed6eb92 88 int MAX30001::max30001_CAL_InitStart(uint8_t En_Vcal, uint8_t Vmode,
jbradshaw 0:e4a10ed6eb92 89 uint8_t Vmag, uint8_t Fcal, uint16_t Thigh,
jbradshaw 0:e4a10ed6eb92 90 uint8_t Fifty) {
jbradshaw 0:e4a10ed6eb92 91 // CNFG_CAL
jbradshaw 0:e4a10ed6eb92 92 if (max30001_reg_read(CNFG_CAL, &max30001_cnfg_cal.all) == -1) {
jbradshaw 0:e4a10ed6eb92 93 return -1;
jbradshaw 0:e4a10ed6eb92 94 }
jbradshaw 0:e4a10ed6eb92 95
jbradshaw 0:e4a10ed6eb92 96 max30001_cnfg_cal.bit.vmode = Vmode;
jbradshaw 0:e4a10ed6eb92 97 max30001_cnfg_cal.bit.vmag = Vmag;
jbradshaw 0:e4a10ed6eb92 98 max30001_cnfg_cal.bit.fcal = Fcal;
jbradshaw 0:e4a10ed6eb92 99 max30001_cnfg_cal.bit.thigh = Thigh;
jbradshaw 0:e4a10ed6eb92 100 max30001_cnfg_cal.bit.fifty = Fifty;
jbradshaw 0:e4a10ed6eb92 101
jbradshaw 0:e4a10ed6eb92 102 if (max30001_reg_write(CNFG_CAL, max30001_cnfg_cal.all) == -1) {
jbradshaw 0:e4a10ed6eb92 103 return -1;
jbradshaw 0:e4a10ed6eb92 104 }
jbradshaw 0:e4a10ed6eb92 105
jbradshaw 0:e4a10ed6eb92 106 // RTOS uses a 32768HZ clock. 32768ticks represents 1secs. 1sec/10 =
jbradshaw 0:e4a10ed6eb92 107 // 100msecs.
jbradshaw 0:e4a10ed6eb92 108 wait(1.0 / 10.0);
jbradshaw 0:e4a10ed6eb92 109
jbradshaw 0:e4a10ed6eb92 110 if (max30001_reg_read(CNFG_CAL, &max30001_cnfg_cal.all) == -1) {
jbradshaw 0:e4a10ed6eb92 111 return -1;
jbradshaw 0:e4a10ed6eb92 112 }
jbradshaw 0:e4a10ed6eb92 113
jbradshaw 0:e4a10ed6eb92 114 max30001_cnfg_cal.bit.en_vcal = En_Vcal;
jbradshaw 0:e4a10ed6eb92 115
jbradshaw 0:e4a10ed6eb92 116 if (max30001_reg_write(CNFG_CAL, max30001_cnfg_cal.all) == -1) {
jbradshaw 0:e4a10ed6eb92 117 return -1;
jbradshaw 0:e4a10ed6eb92 118 }
jbradshaw 0:e4a10ed6eb92 119
jbradshaw 0:e4a10ed6eb92 120 // RTOS uses a 32768HZ clock. 32768ticks represents 1secs. 1sec/10 =
jbradshaw 0:e4a10ed6eb92 121 // 100msecs.
jbradshaw 0:e4a10ed6eb92 122 wait(1.0 / 10.0);
jbradshaw 0:e4a10ed6eb92 123
jbradshaw 0:e4a10ed6eb92 124 return 0;
jbradshaw 0:e4a10ed6eb92 125 }
jbradshaw 0:e4a10ed6eb92 126
jbradshaw 0:e4a10ed6eb92 127 //******************************************************************************
jbradshaw 0:e4a10ed6eb92 128 int MAX30001::max30001_CAL_Stop(void) {
jbradshaw 0:e4a10ed6eb92 129
jbradshaw 0:e4a10ed6eb92 130 if (max30001_reg_read(CNFG_CAL, &max30001_cnfg_cal.all) == -1) {
jbradshaw 0:e4a10ed6eb92 131 return -1;
jbradshaw 0:e4a10ed6eb92 132 }
jbradshaw 0:e4a10ed6eb92 133
jbradshaw 0:e4a10ed6eb92 134 max30001_cnfg_cal.bit.en_vcal = 0; // Disable VCAL, all other settings are left unaffected
jbradshaw 0:e4a10ed6eb92 135
jbradshaw 0:e4a10ed6eb92 136 if (max30001_reg_write(CNFG_CAL, max30001_cnfg_cal.all) == -1) {
jbradshaw 0:e4a10ed6eb92 137 return -1;
jbradshaw 0:e4a10ed6eb92 138 }
jbradshaw 0:e4a10ed6eb92 139
jbradshaw 0:e4a10ed6eb92 140 return 0;
jbradshaw 0:e4a10ed6eb92 141 }
jbradshaw 0:e4a10ed6eb92 142 //******************************************************************************
jbradshaw 0:e4a10ed6eb92 143 //******************************************************************************
jbradshaw 0:e4a10ed6eb92 144 int MAX30001::max30001_INT_assignment(max30001_intrpt_Location_t en_enint_loc, max30001_intrpt_Location_t en_eovf_loc, max30001_intrpt_Location_t en_fstint_loc,
jbradshaw 0:e4a10ed6eb92 145 max30001_intrpt_Location_t en_dcloffint_loc, max30001_intrpt_Location_t en_bint_loc, max30001_intrpt_Location_t en_bovf_loc,
jbradshaw 0:e4a10ed6eb92 146 max30001_intrpt_Location_t en_bover_loc, max30001_intrpt_Location_t en_bundr_loc, max30001_intrpt_Location_t en_bcgmon_loc,
jbradshaw 0:e4a10ed6eb92 147 max30001_intrpt_Location_t en_pint_loc, max30001_intrpt_Location_t en_povf_loc, max30001_intrpt_Location_t en_pedge_loc,
jbradshaw 0:e4a10ed6eb92 148 max30001_intrpt_Location_t en_lonint_loc, max30001_intrpt_Location_t en_rrint_loc, max30001_intrpt_Location_t en_samp_loc,
jbradshaw 0:e4a10ed6eb92 149 max30001_intrpt_type_t intb_Type, max30001_intrpt_type_t int2b_Type)
jbradshaw 0:e4a10ed6eb92 150
jbradshaw 0:e4a10ed6eb92 151
jbradshaw 0:e4a10ed6eb92 152 {
jbradshaw 0:e4a10ed6eb92 153 // INT1
jbradshaw 0:e4a10ed6eb92 154
jbradshaw 0:e4a10ed6eb92 155 if (max30001_reg_read(EN_INT, &max30001_en_int.all) == -1) {
jbradshaw 0:e4a10ed6eb92 156 return -1;
jbradshaw 0:e4a10ed6eb92 157 }
jbradshaw 0:e4a10ed6eb92 158
jbradshaw 0:e4a10ed6eb92 159 // max30001_en_int2.bit.en_pint = 0b1; // Keep this off...
jbradshaw 0:e4a10ed6eb92 160
jbradshaw 0:e4a10ed6eb92 161 max30001_en_int.bit.en_eint = 0b1 & en_enint_loc;
jbradshaw 0:e4a10ed6eb92 162 max30001_en_int.bit.en_eovf = 0b1 & en_eovf_loc;
jbradshaw 0:e4a10ed6eb92 163 max30001_en_int.bit.en_fstint = 0b1 & en_fstint_loc;
jbradshaw 0:e4a10ed6eb92 164
jbradshaw 0:e4a10ed6eb92 165 max30001_en_int.bit.en_dcloffint = 0b1 & en_dcloffint_loc;
jbradshaw 0:e4a10ed6eb92 166 max30001_en_int.bit.en_bint = 0b1 & en_bint_loc;
jbradshaw 0:e4a10ed6eb92 167 max30001_en_int.bit.en_bovf = 0b1 & en_bovf_loc;
jbradshaw 0:e4a10ed6eb92 168
jbradshaw 0:e4a10ed6eb92 169 max30001_en_int.bit.en_bover = 0b1 & en_bover_loc;
jbradshaw 0:e4a10ed6eb92 170 max30001_en_int.bit.en_bundr = 0b1 & en_bundr_loc;
jbradshaw 0:e4a10ed6eb92 171 max30001_en_int.bit.en_bcgmon = 0b1 & en_bcgmon_loc;
jbradshaw 0:e4a10ed6eb92 172
jbradshaw 0:e4a10ed6eb92 173 max30001_en_int.bit.en_pint = 0b1 & en_pint_loc;
jbradshaw 0:e4a10ed6eb92 174 max30001_en_int.bit.en_povf = 0b1 & en_povf_loc;
jbradshaw 0:e4a10ed6eb92 175 max30001_en_int.bit.en_pedge = 0b1 & en_pedge_loc;
jbradshaw 0:e4a10ed6eb92 176
jbradshaw 0:e4a10ed6eb92 177 max30001_en_int.bit.en_lonint = 0b1 & en_lonint_loc;
jbradshaw 0:e4a10ed6eb92 178 max30001_en_int.bit.en_rrint = 0b1 & en_rrint_loc;
jbradshaw 0:e4a10ed6eb92 179 max30001_en_int.bit.en_samp = 0b1 & en_samp_loc;
jbradshaw 0:e4a10ed6eb92 180
jbradshaw 0:e4a10ed6eb92 181 max30001_en_int.bit.intb_type = int2b_Type;
jbradshaw 0:e4a10ed6eb92 182
jbradshaw 0:e4a10ed6eb92 183 if (max30001_reg_write(EN_INT, max30001_en_int.all) == -1) {
jbradshaw 0:e4a10ed6eb92 184 return -1;
jbradshaw 0:e4a10ed6eb92 185 }
jbradshaw 0:e4a10ed6eb92 186
jbradshaw 0:e4a10ed6eb92 187 // INT2
jbradshaw 0:e4a10ed6eb92 188
jbradshaw 0:e4a10ed6eb92 189 if (max30001_reg_read(EN_INT2, &max30001_en_int2.all) == -1) {
jbradshaw 0:e4a10ed6eb92 190 return -1;
jbradshaw 0:e4a10ed6eb92 191 }
jbradshaw 0:e4a10ed6eb92 192
jbradshaw 0:e4a10ed6eb92 193 max30001_en_int2.bit.en_eint = 0b1 & (en_enint_loc >> 1);
jbradshaw 0:e4a10ed6eb92 194 max30001_en_int2.bit.en_eovf = 0b1 & (en_eovf_loc >> 1);
jbradshaw 0:e4a10ed6eb92 195 max30001_en_int2.bit.en_fstint = 0b1 & (en_fstint_loc >> 1);
jbradshaw 0:e4a10ed6eb92 196
jbradshaw 0:e4a10ed6eb92 197 max30001_en_int2.bit.en_dcloffint = 0b1 & (en_dcloffint_loc >> 1);
jbradshaw 0:e4a10ed6eb92 198 max30001_en_int2.bit.en_bint = 0b1 & (en_bint_loc >> 1);
jbradshaw 0:e4a10ed6eb92 199 max30001_en_int2.bit.en_bovf = 0b1 & (en_bovf_loc >> 1);
jbradshaw 0:e4a10ed6eb92 200
jbradshaw 0:e4a10ed6eb92 201 max30001_en_int2.bit.en_bover = 0b1 & (en_bover_loc >> 1);
jbradshaw 0:e4a10ed6eb92 202 max30001_en_int2.bit.en_bundr = 0b1 & (en_bundr_loc >> 1);
jbradshaw 0:e4a10ed6eb92 203 max30001_en_int2.bit.en_bcgmon = 0b1 & (en_bcgmon_loc >> 1);
jbradshaw 0:e4a10ed6eb92 204
jbradshaw 0:e4a10ed6eb92 205 max30001_en_int2.bit.en_pint = 0b1 & (en_pint_loc >> 1);
jbradshaw 0:e4a10ed6eb92 206 max30001_en_int2.bit.en_povf = 0b1 & (en_povf_loc >> 1);
jbradshaw 0:e4a10ed6eb92 207 max30001_en_int2.bit.en_pedge = 0b1 & (en_pedge_loc >> 1);
jbradshaw 0:e4a10ed6eb92 208
jbradshaw 0:e4a10ed6eb92 209 max30001_en_int2.bit.en_lonint = 0b1 & (en_lonint_loc >> 1);
jbradshaw 0:e4a10ed6eb92 210 max30001_en_int2.bit.en_rrint = 0b1 & (en_rrint_loc >> 1);
jbradshaw 0:e4a10ed6eb92 211 max30001_en_int2.bit.en_samp = 0b1 & (en_samp_loc >> 1);
jbradshaw 0:e4a10ed6eb92 212
jbradshaw 0:e4a10ed6eb92 213 max30001_en_int2.bit.intb_type = intb_Type;
jbradshaw 0:e4a10ed6eb92 214
jbradshaw 0:e4a10ed6eb92 215 if (max30001_reg_write(EN_INT2, max30001_en_int2.all) == -1) {
jbradshaw 0:e4a10ed6eb92 216 return -1;
jbradshaw 0:e4a10ed6eb92 217 }
jbradshaw 0:e4a10ed6eb92 218
jbradshaw 0:e4a10ed6eb92 219 return 0;
jbradshaw 0:e4a10ed6eb92 220 }
jbradshaw 0:e4a10ed6eb92 221
jbradshaw 0:e4a10ed6eb92 222 //******************************************************************************
jbradshaw 0:e4a10ed6eb92 223 int MAX30001::max30001_ECG_InitStart(uint8_t En_ecg, uint8_t Openp,
jbradshaw 0:e4a10ed6eb92 224 uint8_t Openn, uint8_t Pol,
jbradshaw 0:e4a10ed6eb92 225 uint8_t Calp_sel, uint8_t Caln_sel,
jbradshaw 0:e4a10ed6eb92 226 uint8_t E_fit, uint8_t Rate, uint8_t Gain,
jbradshaw 0:e4a10ed6eb92 227 uint8_t Dhpf, uint8_t Dlpf) {
jbradshaw 0:e4a10ed6eb92 228
jbradshaw 0:e4a10ed6eb92 229 // CNFG_EMUX
jbradshaw 0:e4a10ed6eb92 230
jbradshaw 0:e4a10ed6eb92 231 if (max30001_reg_read(CNFG_EMUX, &max30001_cnfg_emux.all) == -1) {
jbradshaw 0:e4a10ed6eb92 232 return -1;
jbradshaw 0:e4a10ed6eb92 233 }
jbradshaw 0:e4a10ed6eb92 234
jbradshaw 0:e4a10ed6eb92 235 max30001_cnfg_emux.bit.openp = Openp;
jbradshaw 0:e4a10ed6eb92 236 max30001_cnfg_emux.bit.openn = Openn;
jbradshaw 0:e4a10ed6eb92 237 max30001_cnfg_emux.bit.pol = Pol;
jbradshaw 0:e4a10ed6eb92 238 max30001_cnfg_emux.bit.calp_sel = Calp_sel;
jbradshaw 0:e4a10ed6eb92 239 max30001_cnfg_emux.bit.caln_sel = Caln_sel;
jbradshaw 0:e4a10ed6eb92 240
jbradshaw 0:e4a10ed6eb92 241 if (max30001_reg_write(CNFG_EMUX, max30001_cnfg_emux.all) == -1) {
jbradshaw 0:e4a10ed6eb92 242 return -1;
jbradshaw 0:e4a10ed6eb92 243 }
jbradshaw 0:e4a10ed6eb92 244
jbradshaw 0:e4a10ed6eb92 245 /**** ENABLE CHANNELS ****/
jbradshaw 0:e4a10ed6eb92 246 // CNFG_GEN
jbradshaw 0:e4a10ed6eb92 247
jbradshaw 0:e4a10ed6eb92 248 if (max30001_reg_read(CNFG_GEN, &max30001_cnfg_gen.all) == -1) {
jbradshaw 0:e4a10ed6eb92 249 return -1;
jbradshaw 0:e4a10ed6eb92 250 }
jbradshaw 0:e4a10ed6eb92 251
jbradshaw 0:e4a10ed6eb92 252 max30001_cnfg_gen.bit.en_ecg = En_ecg; // 0b1
jbradshaw 0:e4a10ed6eb92 253
jbradshaw 0:e4a10ed6eb92 254 // fmstr is default
jbradshaw 0:e4a10ed6eb92 255
jbradshaw 0:e4a10ed6eb92 256 if (max30001_reg_write(CNFG_GEN, max30001_cnfg_gen.all) == -1) {
jbradshaw 0:e4a10ed6eb92 257 return -1;
jbradshaw 0:e4a10ed6eb92 258 }
jbradshaw 0:e4a10ed6eb92 259
jbradshaw 0:e4a10ed6eb92 260 /**** Wait for PLL Lock & References to settle down ****/
jbradshaw 0:e4a10ed6eb92 261
jbradshaw 0:e4a10ed6eb92 262 max30001_timeout = 0;
jbradshaw 0:e4a10ed6eb92 263
jbradshaw 0:e4a10ed6eb92 264 do {
jbradshaw 0:e4a10ed6eb92 265 if (max30001_reg_read(STATUS, &max30001_status.all) == -1) // Wait and spin for PLL to lock...
jbradshaw 0:e4a10ed6eb92 266 {
jbradshaw 0:e4a10ed6eb92 267 return -1;
jbradshaw 0:e4a10ed6eb92 268 }
jbradshaw 0:e4a10ed6eb92 269 } while (max30001_status.bit.pllint == 1 && max30001_timeout++ <= 1000);
jbradshaw 0:e4a10ed6eb92 270
jbradshaw 0:e4a10ed6eb92 271 // MNGR_INT
jbradshaw 0:e4a10ed6eb92 272
jbradshaw 0:e4a10ed6eb92 273 if (max30001_reg_read(MNGR_INT, &max30001_mngr_int.all) == -1) {
jbradshaw 0:e4a10ed6eb92 274 return -1;
jbradshaw 0:e4a10ed6eb92 275 }
jbradshaw 0:e4a10ed6eb92 276
jbradshaw 0:e4a10ed6eb92 277 max30001_mngr_int.bit.e_fit = E_fit; // 31
jbradshaw 0:e4a10ed6eb92 278
jbradshaw 0:e4a10ed6eb92 279 if (max30001_reg_write(MNGR_INT, max30001_mngr_int.all) == -1) {
jbradshaw 0:e4a10ed6eb92 280 return -1;
jbradshaw 0:e4a10ed6eb92 281 }
jbradshaw 0:e4a10ed6eb92 282
jbradshaw 0:e4a10ed6eb92 283 // CNFG_ECG
jbradshaw 0:e4a10ed6eb92 284
jbradshaw 0:e4a10ed6eb92 285 if (max30001_reg_read(CNFG_ECG, &max30001_cnfg_ecg.all) == -1) {
jbradshaw 0:e4a10ed6eb92 286 return -1;
jbradshaw 0:e4a10ed6eb92 287 }
jbradshaw 0:e4a10ed6eb92 288
jbradshaw 0:e4a10ed6eb92 289 max30001_cnfg_ecg.bit.rate = Rate;
jbradshaw 0:e4a10ed6eb92 290 max30001_cnfg_ecg.bit.gain = Gain;
jbradshaw 0:e4a10ed6eb92 291 max30001_cnfg_ecg.bit.dhpf = Dhpf;
jbradshaw 0:e4a10ed6eb92 292 max30001_cnfg_ecg.bit.dlpf = Dlpf;
jbradshaw 0:e4a10ed6eb92 293
jbradshaw 0:e4a10ed6eb92 294 if (max30001_reg_write(CNFG_ECG, max30001_cnfg_ecg.all) == -1) {
jbradshaw 0:e4a10ed6eb92 295 return -1;
jbradshaw 0:e4a10ed6eb92 296 }
jbradshaw 0:e4a10ed6eb92 297
jbradshaw 0:e4a10ed6eb92 298 return 0;
jbradshaw 0:e4a10ed6eb92 299 }
jbradshaw 0:e4a10ed6eb92 300
jbradshaw 0:e4a10ed6eb92 301 //******************************************************************************
jbradshaw 0:e4a10ed6eb92 302 int MAX30001::max30001_ECGFast_Init(uint8_t Clr_Fast, uint8_t Fast, uint8_t Fast_Th) {
jbradshaw 0:e4a10ed6eb92 303 if (max30001_reg_read(MNGR_INT, &max30001_mngr_int.all) == -1) {
jbradshaw 0:e4a10ed6eb92 304 return -1;
jbradshaw 0:e4a10ed6eb92 305 }
jbradshaw 0:e4a10ed6eb92 306
jbradshaw 0:e4a10ed6eb92 307 max30001_mngr_int.bit.clr_fast = Clr_Fast;
jbradshaw 0:e4a10ed6eb92 308
jbradshaw 0:e4a10ed6eb92 309 if (max30001_reg_write(MNGR_INT, max30001_mngr_int.all) == -1) {
jbradshaw 0:e4a10ed6eb92 310 return -1;
jbradshaw 0:e4a10ed6eb92 311 }
jbradshaw 0:e4a10ed6eb92 312
jbradshaw 0:e4a10ed6eb92 313 if (max30001_reg_read(MNGR_DYN, &max30001_mngr_dyn.all) == -1) {
jbradshaw 0:e4a10ed6eb92 314 return -1;
jbradshaw 0:e4a10ed6eb92 315 }
jbradshaw 0:e4a10ed6eb92 316
jbradshaw 0:e4a10ed6eb92 317 max30001_mngr_dyn.bit.fast = Fast;
jbradshaw 0:e4a10ed6eb92 318 max30001_mngr_dyn.bit.fast_th = Fast_Th;
jbradshaw 0:e4a10ed6eb92 319
jbradshaw 0:e4a10ed6eb92 320 if (max30001_reg_write(MNGR_INT, max30001_mngr_int.all) == -1) {
jbradshaw 0:e4a10ed6eb92 321 return -1;
jbradshaw 0:e4a10ed6eb92 322 }
jbradshaw 0:e4a10ed6eb92 323
jbradshaw 0:e4a10ed6eb92 324 return 0;
jbradshaw 0:e4a10ed6eb92 325 }
jbradshaw 0:e4a10ed6eb92 326
jbradshaw 0:e4a10ed6eb92 327 //******************************************************************************
jbradshaw 0:e4a10ed6eb92 328 int MAX30001::max30001_Stop_ECG(void) {
jbradshaw 0:e4a10ed6eb92 329
jbradshaw 0:e4a10ed6eb92 330 if (max30001_reg_read(CNFG_GEN, &max30001_cnfg_gen.all) == -1) {
jbradshaw 0:e4a10ed6eb92 331 return -1;
jbradshaw 0:e4a10ed6eb92 332 }
jbradshaw 0:e4a10ed6eb92 333
jbradshaw 0:e4a10ed6eb92 334 max30001_cnfg_gen.bit.en_ecg = 0; // Stop ECG
jbradshaw 0:e4a10ed6eb92 335
jbradshaw 0:e4a10ed6eb92 336 // fmstr is default
jbradshaw 0:e4a10ed6eb92 337
jbradshaw 0:e4a10ed6eb92 338 if (max30001_reg_write(CNFG_GEN, max30001_cnfg_gen.all) == -1) {
jbradshaw 0:e4a10ed6eb92 339 return -1;
jbradshaw 0:e4a10ed6eb92 340 }
jbradshaw 0:e4a10ed6eb92 341
jbradshaw 0:e4a10ed6eb92 342 return 0;
jbradshaw 0:e4a10ed6eb92 343 }
jbradshaw 0:e4a10ed6eb92 344
jbradshaw 0:e4a10ed6eb92 345 //******************************************************************************
jbradshaw 0:e4a10ed6eb92 346 int MAX30001::max30001_PACE_InitStart(uint8_t En_pace, uint8_t Clr_pedge,
jbradshaw 0:e4a10ed6eb92 347 uint8_t Pol, uint8_t Gn_diff_off,
jbradshaw 0:e4a10ed6eb92 348 uint8_t Gain, uint8_t Aout_lbw,
jbradshaw 0:e4a10ed6eb92 349 uint8_t Aout, uint8_t Dacp,
jbradshaw 0:e4a10ed6eb92 350 uint8_t Dacn) {
jbradshaw 0:e4a10ed6eb92 351
jbradshaw 0:e4a10ed6eb92 352 /**** SET MASTER FREQUENCY, ENABLE CHANNELS ****/
jbradshaw 0:e4a10ed6eb92 353
jbradshaw 0:e4a10ed6eb92 354 // CNFG_GEN
jbradshaw 0:e4a10ed6eb92 355
jbradshaw 0:e4a10ed6eb92 356 if (max30001_reg_read(CNFG_GEN, &max30001_cnfg_gen.all) == -1) {
jbradshaw 0:e4a10ed6eb92 357 return -1;
jbradshaw 0:e4a10ed6eb92 358 }
jbradshaw 0:e4a10ed6eb92 359
jbradshaw 0:e4a10ed6eb92 360 max30001_cnfg_gen.bit.en_pace = En_pace; // 0b1;
jbradshaw 0:e4a10ed6eb92 361
jbradshaw 0:e4a10ed6eb92 362 if (max30001_reg_write(CNFG_GEN, max30001_cnfg_gen.all) == -1) {
jbradshaw 0:e4a10ed6eb92 363 return -1;
jbradshaw 0:e4a10ed6eb92 364 }
jbradshaw 0:e4a10ed6eb92 365
jbradshaw 0:e4a10ed6eb92 366 /**** Wait for PLL Lock & References to settle down ****/
jbradshaw 0:e4a10ed6eb92 367 max30001_timeout = 0;
jbradshaw 0:e4a10ed6eb92 368
jbradshaw 0:e4a10ed6eb92 369 do {
jbradshaw 0:e4a10ed6eb92 370 if (max30001_reg_read(STATUS, &max30001_status.all) ==
jbradshaw 0:e4a10ed6eb92 371 -1) // Wait and spin for PLL to lock...
jbradshaw 0:e4a10ed6eb92 372 {
jbradshaw 0:e4a10ed6eb92 373 return -1;
jbradshaw 0:e4a10ed6eb92 374 }
jbradshaw 0:e4a10ed6eb92 375
jbradshaw 0:e4a10ed6eb92 376 } while (max30001_status.bit.pllint == 1 && max30001_timeout++ <= 1000);
jbradshaw 0:e4a10ed6eb92 377
jbradshaw 0:e4a10ed6eb92 378 // MNGR_INT
jbradshaw 0:e4a10ed6eb92 379
jbradshaw 0:e4a10ed6eb92 380 if (max30001_reg_read(MNGR_INT, &max30001_mngr_int.all) == -1) {
jbradshaw 0:e4a10ed6eb92 381 return -1;
jbradshaw 0:e4a10ed6eb92 382 }
jbradshaw 0:e4a10ed6eb92 383
jbradshaw 0:e4a10ed6eb92 384 max30001_mngr_int.bit.clr_pedge = Clr_pedge; // 0b0;
jbradshaw 0:e4a10ed6eb92 385
jbradshaw 0:e4a10ed6eb92 386 if (max30001_reg_write(MNGR_INT, max30001_mngr_int.all) == -1) {
jbradshaw 0:e4a10ed6eb92 387 return -1;
jbradshaw 0:e4a10ed6eb92 388 }
jbradshaw 0:e4a10ed6eb92 389
jbradshaw 0:e4a10ed6eb92 390 /* Put: CNFG_PACE */
jbradshaw 0:e4a10ed6eb92 391
jbradshaw 0:e4a10ed6eb92 392 max30001_reg_read(CNFG_PACE, &max30001_cnfg_pace.all);
jbradshaw 0:e4a10ed6eb92 393
jbradshaw 0:e4a10ed6eb92 394 max30001_cnfg_pace.bit.pol = Pol;
jbradshaw 0:e4a10ed6eb92 395 max30001_cnfg_pace.bit.gn_diff_off = Gn_diff_off;
jbradshaw 0:e4a10ed6eb92 396 max30001_cnfg_pace.bit.gain = Gain;
jbradshaw 0:e4a10ed6eb92 397 max30001_cnfg_pace.bit.aout_lbw = Aout_lbw;
jbradshaw 0:e4a10ed6eb92 398 max30001_cnfg_pace.bit.aout = Aout;
jbradshaw 0:e4a10ed6eb92 399 max30001_cnfg_pace.bit.dacp = Dacp;
jbradshaw 0:e4a10ed6eb92 400 max30001_cnfg_pace.bit.dacn = Dacn;
jbradshaw 0:e4a10ed6eb92 401
jbradshaw 0:e4a10ed6eb92 402 max30001_reg_write(CNFG_PACE, max30001_cnfg_pace.all);
jbradshaw 0:e4a10ed6eb92 403
jbradshaw 0:e4a10ed6eb92 404 return 0;
jbradshaw 0:e4a10ed6eb92 405 }
jbradshaw 0:e4a10ed6eb92 406 //******************************************************************************
jbradshaw 0:e4a10ed6eb92 407 int MAX30001::max30001_Stop_PACE(void) {
jbradshaw 0:e4a10ed6eb92 408
jbradshaw 0:e4a10ed6eb92 409 if (max30001_reg_read(CNFG_GEN, &max30001_cnfg_gen.all) == -1) {
jbradshaw 0:e4a10ed6eb92 410 return -1;
jbradshaw 0:e4a10ed6eb92 411 }
jbradshaw 0:e4a10ed6eb92 412
jbradshaw 0:e4a10ed6eb92 413 max30001_cnfg_gen.bit.en_pace = 0; // Stop PACE
jbradshaw 0:e4a10ed6eb92 414
jbradshaw 0:e4a10ed6eb92 415 if (max30001_reg_write(CNFG_GEN, max30001_cnfg_gen.all) == -1) {
jbradshaw 0:e4a10ed6eb92 416 return -1;
jbradshaw 0:e4a10ed6eb92 417 }
jbradshaw 0:e4a10ed6eb92 418
jbradshaw 0:e4a10ed6eb92 419 return 0;
jbradshaw 0:e4a10ed6eb92 420 }
jbradshaw 0:e4a10ed6eb92 421
jbradshaw 0:e4a10ed6eb92 422 //******************************************************************************
jbradshaw 0:e4a10ed6eb92 423 int MAX30001::max30001_BIOZ_InitStart(
jbradshaw 0:e4a10ed6eb92 424 uint8_t En_bioz, uint8_t Openp, uint8_t Openn, uint8_t Calp_sel,
jbradshaw 0:e4a10ed6eb92 425 uint8_t Caln_sel, uint8_t CG_mode, uint8_t B_fit, uint8_t Rate,
jbradshaw 0:e4a10ed6eb92 426 uint8_t Ahpf, uint8_t Ext_rbias, uint8_t Gain, uint8_t Dhpf, uint8_t Dlpf,
jbradshaw 0:e4a10ed6eb92 427 uint8_t Fcgen, uint8_t Cgmon, uint8_t Cgmag, uint8_t Phoff) {
jbradshaw 0:e4a10ed6eb92 428
jbradshaw 0:e4a10ed6eb92 429 // CNFG_BMUX
jbradshaw 0:e4a10ed6eb92 430
jbradshaw 0:e4a10ed6eb92 431 if (max30001_reg_read(CNFG_BMUX, &max30001_cnfg_bmux.all) == -1) {
jbradshaw 0:e4a10ed6eb92 432 return -1;
jbradshaw 0:e4a10ed6eb92 433 }
jbradshaw 0:e4a10ed6eb92 434
jbradshaw 0:e4a10ed6eb92 435 max30001_cnfg_bmux.bit.openp = Openp; // 0b1;
jbradshaw 0:e4a10ed6eb92 436 max30001_cnfg_bmux.bit.openn = Openn; // 0b1;
jbradshaw 0:e4a10ed6eb92 437 max30001_cnfg_bmux.bit.calp_sel = Calp_sel; // 0b10;
jbradshaw 0:e4a10ed6eb92 438 max30001_cnfg_bmux.bit.caln_sel = Caln_sel; // 0b11;
jbradshaw 0:e4a10ed6eb92 439 max30001_cnfg_bmux.bit.cg_mode = CG_mode; // 0b00;
jbradshaw 0:e4a10ed6eb92 440
jbradshaw 0:e4a10ed6eb92 441 if (max30001_reg_write(CNFG_BMUX, max30001_cnfg_bmux.all) == -1) {
jbradshaw 0:e4a10ed6eb92 442 return -1;
jbradshaw 0:e4a10ed6eb92 443 }
jbradshaw 0:e4a10ed6eb92 444
jbradshaw 0:e4a10ed6eb92 445 /**** SET MASTER FREQUENCY, ENABLE CHANNELS ****/
jbradshaw 0:e4a10ed6eb92 446
jbradshaw 0:e4a10ed6eb92 447 // CNFG_GEN
jbradshaw 0:e4a10ed6eb92 448
jbradshaw 0:e4a10ed6eb92 449 if (max30001_reg_read(CNFG_GEN, &max30001_cnfg_gen.all) == -1) {
jbradshaw 0:e4a10ed6eb92 450 return -1;
jbradshaw 0:e4a10ed6eb92 451 }
jbradshaw 0:e4a10ed6eb92 452
jbradshaw 0:e4a10ed6eb92 453 max30001_cnfg_gen.bit.en_bioz = En_bioz;
jbradshaw 0:e4a10ed6eb92 454
jbradshaw 0:e4a10ed6eb92 455 // fmstr is default
jbradshaw 0:e4a10ed6eb92 456
jbradshaw 0:e4a10ed6eb92 457 if (max30001_reg_write(CNFG_GEN, max30001_cnfg_gen.all) == -1) {
jbradshaw 0:e4a10ed6eb92 458 return -1;
jbradshaw 0:e4a10ed6eb92 459 }
jbradshaw 0:e4a10ed6eb92 460
jbradshaw 0:e4a10ed6eb92 461 /**** Wait for PLL Lock & References to settle down ****/
jbradshaw 0:e4a10ed6eb92 462
jbradshaw 0:e4a10ed6eb92 463 max30001_timeout = 0;
jbradshaw 0:e4a10ed6eb92 464
jbradshaw 0:e4a10ed6eb92 465 do {
jbradshaw 0:e4a10ed6eb92 466 if (max30001_reg_read(STATUS, &max30001_status.all) ==
jbradshaw 0:e4a10ed6eb92 467 -1) // Wait and spin for PLL to lock...
jbradshaw 0:e4a10ed6eb92 468 {
jbradshaw 0:e4a10ed6eb92 469 return -1;
jbradshaw 0:e4a10ed6eb92 470 }
jbradshaw 0:e4a10ed6eb92 471
jbradshaw 0:e4a10ed6eb92 472 } while (max30001_status.bit.pllint == 1 && max30001_timeout++ <= 1000);
jbradshaw 0:e4a10ed6eb92 473
jbradshaw 0:e4a10ed6eb92 474 /**** Start of CNFG_BIOZ ****/
jbradshaw 0:e4a10ed6eb92 475
jbradshaw 0:e4a10ed6eb92 476 // MNGR_INT
jbradshaw 0:e4a10ed6eb92 477
jbradshaw 0:e4a10ed6eb92 478 if (max30001_reg_read(MNGR_INT, &max30001_mngr_int.all) == -1) {
jbradshaw 0:e4a10ed6eb92 479 return -1;
jbradshaw 0:e4a10ed6eb92 480 }
jbradshaw 0:e4a10ed6eb92 481
jbradshaw 0:e4a10ed6eb92 482 max30001_mngr_int.bit.b_fit = B_fit; //;
jbradshaw 0:e4a10ed6eb92 483
jbradshaw 0:e4a10ed6eb92 484 if (max30001_reg_write(MNGR_INT, max30001_mngr_int.all) == -1) {
jbradshaw 0:e4a10ed6eb92 485 return -1;
jbradshaw 0:e4a10ed6eb92 486 }
jbradshaw 0:e4a10ed6eb92 487
jbradshaw 0:e4a10ed6eb92 488 // CNFG_BIOZ
jbradshaw 0:e4a10ed6eb92 489
jbradshaw 0:e4a10ed6eb92 490 if (max30001_reg_read(CNFG_BIOZ, &max30001_cnfg_bioz.all) == -1) {
jbradshaw 0:e4a10ed6eb92 491 return -1;
jbradshaw 0:e4a10ed6eb92 492 }
jbradshaw 0:e4a10ed6eb92 493
jbradshaw 0:e4a10ed6eb92 494 max30001_cnfg_bioz.bit.rate = Rate;
jbradshaw 0:e4a10ed6eb92 495 max30001_cnfg_bioz.bit.ahpf = Ahpf;
jbradshaw 0:e4a10ed6eb92 496 max30001_cnfg_bioz.bit.ext_rbias = Ext_rbias;
jbradshaw 0:e4a10ed6eb92 497 max30001_cnfg_bioz.bit.gain = Gain;
jbradshaw 0:e4a10ed6eb92 498 max30001_cnfg_bioz.bit.dhpf = Dhpf;
jbradshaw 0:e4a10ed6eb92 499 max30001_cnfg_bioz.bit.dlpf = Dlpf;
jbradshaw 0:e4a10ed6eb92 500 max30001_cnfg_bioz.bit.fcgen = Fcgen;
jbradshaw 0:e4a10ed6eb92 501 max30001_cnfg_bioz.bit.cgmon = Cgmon;
jbradshaw 0:e4a10ed6eb92 502 max30001_cnfg_bioz.bit.cgmag = Cgmag;
jbradshaw 0:e4a10ed6eb92 503 max30001_cnfg_bioz.bit.phoff = Phoff;
jbradshaw 0:e4a10ed6eb92 504
jbradshaw 0:e4a10ed6eb92 505 if (max30001_reg_write(CNFG_BIOZ, max30001_cnfg_bioz.all) == -1) {
jbradshaw 0:e4a10ed6eb92 506 return -1;
jbradshaw 0:e4a10ed6eb92 507 }
jbradshaw 0:e4a10ed6eb92 508
jbradshaw 0:e4a10ed6eb92 509 return 0;
jbradshaw 0:e4a10ed6eb92 510 }
jbradshaw 0:e4a10ed6eb92 511
jbradshaw 0:e4a10ed6eb92 512 //******************************************************************************
jbradshaw 0:e4a10ed6eb92 513 int MAX30001::max30001_Stop_BIOZ(void) {
jbradshaw 0:e4a10ed6eb92 514
jbradshaw 0:e4a10ed6eb92 515 if (max30001_reg_read(CNFG_GEN, &max30001_cnfg_gen.all) == -1) {
jbradshaw 0:e4a10ed6eb92 516 return -1;
jbradshaw 0:e4a10ed6eb92 517 }
jbradshaw 0:e4a10ed6eb92 518
jbradshaw 0:e4a10ed6eb92 519 max30001_cnfg_gen.bit.en_bioz = 0; // Stop BIOZ
jbradshaw 0:e4a10ed6eb92 520
jbradshaw 0:e4a10ed6eb92 521 if (max30001_reg_write(CNFG_GEN, max30001_cnfg_gen.all) == -1) {
jbradshaw 0:e4a10ed6eb92 522 return -1;
jbradshaw 0:e4a10ed6eb92 523 }
jbradshaw 0:e4a10ed6eb92 524
jbradshaw 0:e4a10ed6eb92 525 return 0;
jbradshaw 0:e4a10ed6eb92 526 }
jbradshaw 0:e4a10ed6eb92 527
jbradshaw 0:e4a10ed6eb92 528 //******************************************************************************
jbradshaw 0:e4a10ed6eb92 529 int MAX30001::max30001_BIOZ_InitBist(uint8_t En_bist, uint8_t Rnom,
jbradshaw 0:e4a10ed6eb92 530 uint8_t Rmod, uint8_t Fbist) {
jbradshaw 0:e4a10ed6eb92 531
jbradshaw 0:e4a10ed6eb92 532 // CNFG_BMUX
jbradshaw 0:e4a10ed6eb92 533
jbradshaw 0:e4a10ed6eb92 534 if (max30001_reg_read(CNFG_BMUX, &max30001_cnfg_bmux.all) == -1) {
jbradshaw 0:e4a10ed6eb92 535 return -1;
jbradshaw 0:e4a10ed6eb92 536 }
jbradshaw 0:e4a10ed6eb92 537
jbradshaw 0:e4a10ed6eb92 538 max30001_cnfg_bmux.bit.en_bist = En_bist;
jbradshaw 0:e4a10ed6eb92 539 max30001_cnfg_bmux.bit.rnom = Rnom;
jbradshaw 0:e4a10ed6eb92 540 max30001_cnfg_bmux.bit.rmod = Rmod;
jbradshaw 0:e4a10ed6eb92 541 max30001_cnfg_bmux.bit.fbist = Fbist;
jbradshaw 0:e4a10ed6eb92 542
jbradshaw 0:e4a10ed6eb92 543 if (max30001_reg_write(CNFG_BMUX, max30001_cnfg_bmux.all) == -1) {
jbradshaw 0:e4a10ed6eb92 544 return -1;
jbradshaw 0:e4a10ed6eb92 545 }
jbradshaw 0:e4a10ed6eb92 546
jbradshaw 0:e4a10ed6eb92 547 return 0;
jbradshaw 0:e4a10ed6eb92 548 }
jbradshaw 0:e4a10ed6eb92 549 //******************************************************************************
jbradshaw 0:e4a10ed6eb92 550 int MAX30001::max30001_RtoR_InitStart(uint8_t En_rtor, uint8_t Wndw,
jbradshaw 0:e4a10ed6eb92 551 uint8_t Gain, uint8_t Pavg, uint8_t Ptsf,
jbradshaw 0:e4a10ed6eb92 552 uint8_t Hoff, uint8_t Ravg, uint8_t Rhsf,
jbradshaw 0:e4a10ed6eb92 553 uint8_t Clr_rrint) {
jbradshaw 0:e4a10ed6eb92 554
jbradshaw 0:e4a10ed6eb92 555 // MNGR_INT
jbradshaw 0:e4a10ed6eb92 556
jbradshaw 0:e4a10ed6eb92 557 if (max30001_reg_read(MNGR_INT, &max30001_mngr_int.all) == -1) {
jbradshaw 0:e4a10ed6eb92 558 return -1;
jbradshaw 0:e4a10ed6eb92 559 }
jbradshaw 0:e4a10ed6eb92 560
jbradshaw 0:e4a10ed6eb92 561 max30001_mngr_int.bit.clr_rrint =
jbradshaw 0:e4a10ed6eb92 562 Clr_rrint; // 0b01 & 0b00 are for interrupt mode...
jbradshaw 0:e4a10ed6eb92 563 // 0b10 is for monitoring mode... it just overwrites the data...
jbradshaw 0:e4a10ed6eb92 564
jbradshaw 0:e4a10ed6eb92 565 if (max30001_reg_write(MNGR_INT, max30001_mngr_int.all) == -1) {
jbradshaw 0:e4a10ed6eb92 566 return -1;
jbradshaw 0:e4a10ed6eb92 567 }
jbradshaw 0:e4a10ed6eb92 568
jbradshaw 0:e4a10ed6eb92 569 // RTOR1
jbradshaw 0:e4a10ed6eb92 570 if (max30001_reg_read(CNFG_RTOR1, &max30001_cnfg_rtor1.all) == -1) {
jbradshaw 0:e4a10ed6eb92 571 return -1;
jbradshaw 0:e4a10ed6eb92 572 }
jbradshaw 0:e4a10ed6eb92 573
jbradshaw 0:e4a10ed6eb92 574 max30001_cnfg_rtor1.bit.wndw = Wndw;
jbradshaw 0:e4a10ed6eb92 575 max30001_cnfg_rtor1.bit.gain = Gain;
jbradshaw 0:e4a10ed6eb92 576 max30001_cnfg_rtor1.bit.en_rtor = En_rtor;
jbradshaw 0:e4a10ed6eb92 577 max30001_cnfg_rtor1.bit.pavg = Pavg;
jbradshaw 0:e4a10ed6eb92 578 max30001_cnfg_rtor1.bit.ptsf = Ptsf;
jbradshaw 0:e4a10ed6eb92 579
jbradshaw 0:e4a10ed6eb92 580 if (max30001_reg_write(CNFG_RTOR1, max30001_cnfg_rtor1.all) == -1) {
jbradshaw 0:e4a10ed6eb92 581 return -1;
jbradshaw 0:e4a10ed6eb92 582 }
jbradshaw 0:e4a10ed6eb92 583 // RTOR2
jbradshaw 0:e4a10ed6eb92 584
jbradshaw 0:e4a10ed6eb92 585 if (max30001_reg_read(CNFG_RTOR2, &max30001_cnfg_rtor2.all) == -1) {
jbradshaw 0:e4a10ed6eb92 586 return -1;
jbradshaw 0:e4a10ed6eb92 587 }
jbradshaw 0:e4a10ed6eb92 588 max30001_cnfg_rtor2.bit.hoff = Hoff;
jbradshaw 0:e4a10ed6eb92 589 max30001_cnfg_rtor2.bit.ravg = Ravg;
jbradshaw 0:e4a10ed6eb92 590 max30001_cnfg_rtor2.bit.rhsf = Rhsf;
jbradshaw 0:e4a10ed6eb92 591
jbradshaw 0:e4a10ed6eb92 592 if (max30001_reg_write(CNFG_RTOR2, max30001_cnfg_rtor2.all) == -1) {
jbradshaw 0:e4a10ed6eb92 593 return -1;
jbradshaw 0:e4a10ed6eb92 594 }
jbradshaw 0:e4a10ed6eb92 595
jbradshaw 0:e4a10ed6eb92 596 return 0;
jbradshaw 0:e4a10ed6eb92 597 }
jbradshaw 0:e4a10ed6eb92 598
jbradshaw 0:e4a10ed6eb92 599 //******************************************************************************
jbradshaw 0:e4a10ed6eb92 600 int MAX30001::max30001_Stop_RtoR(void) {
jbradshaw 0:e4a10ed6eb92 601
jbradshaw 0:e4a10ed6eb92 602 if (max30001_reg_read(CNFG_RTOR1, &max30001_cnfg_rtor1.all) == -1) {
jbradshaw 0:e4a10ed6eb92 603 return -1;
jbradshaw 0:e4a10ed6eb92 604 }
jbradshaw 0:e4a10ed6eb92 605
jbradshaw 0:e4a10ed6eb92 606 max30001_cnfg_rtor1.bit.en_rtor = 0; // Stop RtoR
jbradshaw 0:e4a10ed6eb92 607
jbradshaw 0:e4a10ed6eb92 608 if (max30001_reg_write(CNFG_RTOR1, max30001_cnfg_rtor1.all) == -1) {
jbradshaw 0:e4a10ed6eb92 609 return -1;
jbradshaw 0:e4a10ed6eb92 610 }
jbradshaw 0:e4a10ed6eb92 611
jbradshaw 0:e4a10ed6eb92 612 return 0;
jbradshaw 0:e4a10ed6eb92 613 }
jbradshaw 0:e4a10ed6eb92 614
jbradshaw 0:e4a10ed6eb92 615 //******************************************************************************
jbradshaw 0:e4a10ed6eb92 616 int MAX30001::max30001_PLL_lock(void) {
jbradshaw 0:e4a10ed6eb92 617 // Spin to see PLLint become zero to indicate a lock.
jbradshaw 0:e4a10ed6eb92 618
jbradshaw 0:e4a10ed6eb92 619 max30001_timeout = 0;
jbradshaw 0:e4a10ed6eb92 620
jbradshaw 0:e4a10ed6eb92 621 do {
jbradshaw 0:e4a10ed6eb92 622 if (max30001_reg_read(STATUS, &max30001_status.all) ==
jbradshaw 0:e4a10ed6eb92 623 -1) // Wait and spin for PLL to lock...
jbradshaw 0:e4a10ed6eb92 624 {
jbradshaw 0:e4a10ed6eb92 625 return -1;
jbradshaw 0:e4a10ed6eb92 626 }
jbradshaw 0:e4a10ed6eb92 627
jbradshaw 0:e4a10ed6eb92 628 } while (max30001_status.bit.pllint == 1 && max30001_timeout++ <= 1000);
jbradshaw 0:e4a10ed6eb92 629
jbradshaw 0:e4a10ed6eb92 630 return 0;
jbradshaw 0:e4a10ed6eb92 631 }
jbradshaw 0:e4a10ed6eb92 632
jbradshaw 0:e4a10ed6eb92 633 //******************************************************************************
jbradshaw 0:e4a10ed6eb92 634 int MAX30001::max30001_sw_rst(void) {
jbradshaw 0:e4a10ed6eb92 635 // SW reset for the MAX30001 chip
jbradshaw 0:e4a10ed6eb92 636
jbradshaw 0:e4a10ed6eb92 637 if (max30001_reg_write(SW_RST, 0x000000) == -1) {
jbradshaw 0:e4a10ed6eb92 638 return -1;
jbradshaw 0:e4a10ed6eb92 639 }
jbradshaw 0:e4a10ed6eb92 640
jbradshaw 0:e4a10ed6eb92 641 return 0;
jbradshaw 0:e4a10ed6eb92 642 }
jbradshaw 0:e4a10ed6eb92 643
jbradshaw 0:e4a10ed6eb92 644 //******************************************************************************
jbradshaw 0:e4a10ed6eb92 645 int MAX30001::max30001_synch(void) { // For synchronization
jbradshaw 0:e4a10ed6eb92 646 if (max30001_reg_write(SYNCH, 0x000000) == -1) {
jbradshaw 0:e4a10ed6eb92 647 return -1;
jbradshaw 0:e4a10ed6eb92 648 }
jbradshaw 0:e4a10ed6eb92 649 return 0;
jbradshaw 0:e4a10ed6eb92 650 }
jbradshaw 0:e4a10ed6eb92 651
jbradshaw 0:e4a10ed6eb92 652 //******************************************************************************
jbradshaw 0:e4a10ed6eb92 653 int MAX30001::max300001_fifo_rst(void) { // Resets the FIFO
jbradshaw 0:e4a10ed6eb92 654 if (max30001_reg_write(FIFO_RST, 0x000000) == -1) {
jbradshaw 0:e4a10ed6eb92 655 return -1;
jbradshaw 0:e4a10ed6eb92 656 }
jbradshaw 0:e4a10ed6eb92 657 return 0;
jbradshaw 0:e4a10ed6eb92 658 }
jbradshaw 0:e4a10ed6eb92 659
jbradshaw 0:e4a10ed6eb92 660 //******************************************************************************
jbradshaw 0:e4a10ed6eb92 661 // int MAX30001::max30001_reg_write(uint8_t addr, uint32_t data)
jbradshaw 0:e4a10ed6eb92 662 int MAX30001::max30001_reg_write(MAX30001_REG_map_t addr, uint32_t data) {
jbradshaw 0:e4a10ed6eb92 663
jbradshaw 0:e4a10ed6eb92 664 uint8_t result[4];
jbradshaw 0:e4a10ed6eb92 665 uint8_t data_array[4];
jbradshaw 0:e4a10ed6eb92 666 int32_t success = 0;
jbradshaw 0:e4a10ed6eb92 667
jbradshaw 0:e4a10ed6eb92 668 data_array[0] = (addr << 1) & 0xff;
jbradshaw 0:e4a10ed6eb92 669
jbradshaw 0:e4a10ed6eb92 670 data_array[3] = data & 0xff;
jbradshaw 0:e4a10ed6eb92 671 data_array[2] = (data >> 8) & 0xff;
jbradshaw 0:e4a10ed6eb92 672 data_array[1] = (data >> 16) & 0xff;
jbradshaw 0:e4a10ed6eb92 673
jbradshaw 0:e4a10ed6eb92 674 success = SPI_Transmit(&data_array[0], 4, &result[0], 4);
jbradshaw 0:e4a10ed6eb92 675
jbradshaw 0:e4a10ed6eb92 676 if (success != 0) {
jbradshaw 0:e4a10ed6eb92 677 return -1;
jbradshaw 0:e4a10ed6eb92 678 } else {
jbradshaw 0:e4a10ed6eb92 679 return 0;
jbradshaw 0:e4a10ed6eb92 680 }
jbradshaw 0:e4a10ed6eb92 681 }
jbradshaw 0:e4a10ed6eb92 682
jbradshaw 0:e4a10ed6eb92 683 //******************************************************************************
jbradshaw 0:e4a10ed6eb92 684 // int MAX30001::max30001_reg_read(uint8_t addr, uint32_t *return_data)
jbradshaw 0:e4a10ed6eb92 685 int MAX30001::max30001_reg_read(MAX30001_REG_map_t addr,
jbradshaw 0:e4a10ed6eb92 686 uint32_t *return_data) {
jbradshaw 0:e4a10ed6eb92 687 uint8_t result[4];
jbradshaw 0:e4a10ed6eb92 688 uint8_t data_array[1];
jbradshaw 0:e4a10ed6eb92 689 int32_t success = 0;
jbradshaw 0:e4a10ed6eb92 690
jbradshaw 0:e4a10ed6eb92 691 data_array[0] = ((addr << 1) & 0xff) | 1; // For Read, Or with 1
jbradshaw 0:e4a10ed6eb92 692 success = SPI_Transmit(&data_array[0], 1, &result[0], 4);
jbradshaw 0:e4a10ed6eb92 693 *return_data = /*result[0] + */ (uint32_t)(result[1] << 16) +
jbradshaw 0:e4a10ed6eb92 694 (result[2] << 8) + result[3];
jbradshaw 0:e4a10ed6eb92 695 if (success != 0) {
jbradshaw 0:e4a10ed6eb92 696 return -1;
jbradshaw 0:e4a10ed6eb92 697 } else {
jbradshaw 0:e4a10ed6eb92 698 return 0;
jbradshaw 0:e4a10ed6eb92 699 }
jbradshaw 0:e4a10ed6eb92 700 }
jbradshaw 0:e4a10ed6eb92 701
jbradshaw 0:e4a10ed6eb92 702 //******************************************************************************
jbradshaw 0:e4a10ed6eb92 703 int MAX30001::max30001_Enable_DcLeadOFF_Init(int8_t En_dcloff, int8_t Ipol,
jbradshaw 0:e4a10ed6eb92 704 int8_t Imag, int8_t Vth) {
jbradshaw 0:e4a10ed6eb92 705 // the leads are not touching the body
jbradshaw 0:e4a10ed6eb92 706
jbradshaw 0:e4a10ed6eb92 707 // CNFG_EMUX, Set ECGP and ECGN for external hook up...
jbradshaw 0:e4a10ed6eb92 708
jbradshaw 0:e4a10ed6eb92 709 if (max30001_reg_read(CNFG_GEN, &max30001_cnfg_gen.all) == -1) {
jbradshaw 0:e4a10ed6eb92 710 return -1;
jbradshaw 0:e4a10ed6eb92 711 }
jbradshaw 0:e4a10ed6eb92 712
jbradshaw 0:e4a10ed6eb92 713 max30001_cnfg_gen.bit.en_dcloff = En_dcloff;
jbradshaw 0:e4a10ed6eb92 714 max30001_cnfg_gen.bit.ipol = Ipol;
jbradshaw 0:e4a10ed6eb92 715 max30001_cnfg_gen.bit.imag = Imag;
jbradshaw 0:e4a10ed6eb92 716 max30001_cnfg_gen.bit.vth = Vth;
jbradshaw 0:e4a10ed6eb92 717
jbradshaw 0:e4a10ed6eb92 718 if (max30001_reg_write(CNFG_GEN, max30001_cnfg_gen.all) == -1) {
jbradshaw 0:e4a10ed6eb92 719 return -1;
jbradshaw 0:e4a10ed6eb92 720 }
jbradshaw 0:e4a10ed6eb92 721
jbradshaw 0:e4a10ed6eb92 722 return 0;
jbradshaw 0:e4a10ed6eb92 723 }
jbradshaw 0:e4a10ed6eb92 724
jbradshaw 0:e4a10ed6eb92 725 //******************************************************************************
jbradshaw 0:e4a10ed6eb92 726 int MAX30001::max30001_Disable_DcLeadOFF(void) {
jbradshaw 0:e4a10ed6eb92 727 if (max30001_reg_read(CNFG_GEN, &max30001_cnfg_gen.all) == -1) {
jbradshaw 0:e4a10ed6eb92 728 return -1;
jbradshaw 0:e4a10ed6eb92 729 }
jbradshaw 0:e4a10ed6eb92 730
jbradshaw 0:e4a10ed6eb92 731 max30001_cnfg_gen.bit.en_dcloff = 0; // Turned off the dc lead off.
jbradshaw 0:e4a10ed6eb92 732
jbradshaw 0:e4a10ed6eb92 733 if (max30001_reg_write(CNFG_GEN, max30001_cnfg_gen.all) == -1) {
jbradshaw 0:e4a10ed6eb92 734 return -1;
jbradshaw 0:e4a10ed6eb92 735 }
jbradshaw 0:e4a10ed6eb92 736
jbradshaw 0:e4a10ed6eb92 737 return 0;
jbradshaw 0:e4a10ed6eb92 738 }
jbradshaw 0:e4a10ed6eb92 739
jbradshaw 0:e4a10ed6eb92 740 //******************************************************************************
jbradshaw 0:e4a10ed6eb92 741 int MAX30001::max30001_BIOZ_Enable_ACLeadOFF_Init(uint8_t En_bloff,
jbradshaw 0:e4a10ed6eb92 742 uint8_t Bloff_hi_it,
jbradshaw 0:e4a10ed6eb92 743 uint8_t Bloff_lo_it) {
jbradshaw 0:e4a10ed6eb92 744
jbradshaw 0:e4a10ed6eb92 745 // CNFG_GEN
jbradshaw 0:e4a10ed6eb92 746 if (max30001_reg_read(CNFG_GEN, &max30001_cnfg_gen.all) == -1) {
jbradshaw 0:e4a10ed6eb92 747 return -1;
jbradshaw 0:e4a10ed6eb92 748 }
jbradshaw 0:e4a10ed6eb92 749
jbradshaw 0:e4a10ed6eb92 750 max30001_cnfg_gen.bit.en_bloff = En_bloff;
jbradshaw 0:e4a10ed6eb92 751
jbradshaw 0:e4a10ed6eb92 752 if (max30001_reg_write(CNFG_GEN, max30001_cnfg_gen.all) == -1) {
jbradshaw 0:e4a10ed6eb92 753 return -1;
jbradshaw 0:e4a10ed6eb92 754 }
jbradshaw 0:e4a10ed6eb92 755
jbradshaw 0:e4a10ed6eb92 756 // MNGR_DYN
jbradshaw 0:e4a10ed6eb92 757 if (max30001_reg_read(MNGR_DYN, &max30001_mngr_dyn.all) == -1) {
jbradshaw 0:e4a10ed6eb92 758 return -1;
jbradshaw 0:e4a10ed6eb92 759 }
jbradshaw 0:e4a10ed6eb92 760
jbradshaw 0:e4a10ed6eb92 761 max30001_mngr_dyn.bit.bloff_hi_it = Bloff_hi_it;
jbradshaw 0:e4a10ed6eb92 762 max30001_mngr_dyn.bit.bloff_lo_it = Bloff_lo_it;
jbradshaw 0:e4a10ed6eb92 763
jbradshaw 0:e4a10ed6eb92 764 if (max30001_reg_write(MNGR_DYN, max30001_mngr_dyn.all) == -1) {
jbradshaw 0:e4a10ed6eb92 765 return -1;
jbradshaw 0:e4a10ed6eb92 766 }
jbradshaw 0:e4a10ed6eb92 767
jbradshaw 0:e4a10ed6eb92 768 return 0;
jbradshaw 0:e4a10ed6eb92 769 }
jbradshaw 0:e4a10ed6eb92 770
jbradshaw 0:e4a10ed6eb92 771 //******************************************************************************
jbradshaw 0:e4a10ed6eb92 772 int MAX30001::max30001_BIOZ_Disable_ACleadOFF(void) {
jbradshaw 0:e4a10ed6eb92 773 // CNFG_GEN
jbradshaw 0:e4a10ed6eb92 774 if (max30001_reg_read(CNFG_GEN, &max30001_cnfg_gen.all) == -1) {
jbradshaw 0:e4a10ed6eb92 775 return -1;
jbradshaw 0:e4a10ed6eb92 776 }
jbradshaw 0:e4a10ed6eb92 777
jbradshaw 0:e4a10ed6eb92 778 max30001_cnfg_gen.bit.en_bloff = 0b0; // Turns of the BIOZ AC Lead OFF feature
jbradshaw 0:e4a10ed6eb92 779
jbradshaw 0:e4a10ed6eb92 780 if (max30001_reg_write(CNFG_GEN, max30001_cnfg_gen.all) == -1) {
jbradshaw 0:e4a10ed6eb92 781 return -1;
jbradshaw 0:e4a10ed6eb92 782 }
jbradshaw 0:e4a10ed6eb92 783
jbradshaw 0:e4a10ed6eb92 784 return 0;
jbradshaw 0:e4a10ed6eb92 785 }
jbradshaw 0:e4a10ed6eb92 786
jbradshaw 0:e4a10ed6eb92 787 //******************************************************************************
jbradshaw 0:e4a10ed6eb92 788 int MAX30001::max30001_BIOZ_Enable_BCGMON(void) {
jbradshaw 0:e4a10ed6eb92 789 // CNFG_BIOZ
jbradshaw 0:e4a10ed6eb92 790 if (max30001_reg_read(CNFG_BIOZ, &max30001_cnfg_bioz.all) == -1) {
jbradshaw 0:e4a10ed6eb92 791 return -1;
jbradshaw 0:e4a10ed6eb92 792 }
jbradshaw 0:e4a10ed6eb92 793
jbradshaw 0:e4a10ed6eb92 794 max30001_cnfg_bioz.bit.cgmon = 1;
jbradshaw 0:e4a10ed6eb92 795
jbradshaw 0:e4a10ed6eb92 796 if (max30001_reg_write(CNFG_BIOZ, max30001_cnfg_bioz.all) == -1) {
jbradshaw 0:e4a10ed6eb92 797 return -1;
jbradshaw 0:e4a10ed6eb92 798 }
jbradshaw 0:e4a10ed6eb92 799
jbradshaw 0:e4a10ed6eb92 800 max30001_reg_read(CNFG_BIOZ, &max30001_cnfg_bioz.all);
jbradshaw 0:e4a10ed6eb92 801
jbradshaw 0:e4a10ed6eb92 802 return 0;
jbradshaw 0:e4a10ed6eb92 803 }
jbradshaw 0:e4a10ed6eb92 804
jbradshaw 0:e4a10ed6eb92 805 #if 1
jbradshaw 0:e4a10ed6eb92 806 //******************************************************************************
jbradshaw 0:e4a10ed6eb92 807 int MAX30001::max30001_Enable_LeadON(int8_t Channel) // Channel: ECG = 0b01, BIOZ = 0b10, Disable = 0b00
jbradshaw 0:e4a10ed6eb92 808 {
jbradshaw 0:e4a10ed6eb92 809
jbradshaw 0:e4a10ed6eb92 810 if (max30001_reg_read(CNFG_GEN, &max30001_cnfg_gen.all) == -1) {
jbradshaw 0:e4a10ed6eb92 811 return -1;
jbradshaw 0:e4a10ed6eb92 812 }
jbradshaw 0:e4a10ed6eb92 813
jbradshaw 0:e4a10ed6eb92 814 max30001_cnfg_gen.bit.en_ecg = 0b0;
jbradshaw 0:e4a10ed6eb92 815 max30001_cnfg_gen.bit.en_bioz = 0b0;
jbradshaw 0:e4a10ed6eb92 816 max30001_cnfg_gen.bit.en_pace = 0b0;
jbradshaw 0:e4a10ed6eb92 817
jbradshaw 0:e4a10ed6eb92 818 max30001_cnfg_gen.bit.en_ulp_lon = Channel; // BIOZ ULP lead on detection...
jbradshaw 0:e4a10ed6eb92 819
jbradshaw 0:e4a10ed6eb92 820 if (max30001_reg_write(CNFG_GEN, max30001_cnfg_gen.all) == -1) {
jbradshaw 0:e4a10ed6eb92 821 return -1;
jbradshaw 0:e4a10ed6eb92 822 }
jbradshaw 0:e4a10ed6eb92 823
jbradshaw 0:e4a10ed6eb92 824 max30001_reg_read(CNFG_GEN, &max30001_cnfg_gen.all);
jbradshaw 0:e4a10ed6eb92 825
jbradshaw 0:e4a10ed6eb92 826 max30001_reg_read(STATUS, &max30001_status.all);
jbradshaw 0:e4a10ed6eb92 827
jbradshaw 0:e4a10ed6eb92 828 return 0;
jbradshaw 0:e4a10ed6eb92 829 }
jbradshaw 0:e4a10ed6eb92 830 //******************************************************************************
jbradshaw 0:e4a10ed6eb92 831 int MAX30001::max30001_Disable_LeadON(void) {
jbradshaw 0:e4a10ed6eb92 832
jbradshaw 0:e4a10ed6eb92 833 if (max30001_reg_read(CNFG_GEN, &max30001_cnfg_gen.all) == -1) {
jbradshaw 0:e4a10ed6eb92 834 return -1;
jbradshaw 0:e4a10ed6eb92 835 }
jbradshaw 0:e4a10ed6eb92 836
jbradshaw 0:e4a10ed6eb92 837 max30001_cnfg_gen.bit.en_ulp_lon = 0b0;
jbradshaw 0:e4a10ed6eb92 838
jbradshaw 0:e4a10ed6eb92 839 if (max30001_reg_write(CNFG_GEN, max30001_cnfg_gen.all) == -1) {
jbradshaw 0:e4a10ed6eb92 840 return -1;
jbradshaw 0:e4a10ed6eb92 841 }
jbradshaw 0:e4a10ed6eb92 842
jbradshaw 0:e4a10ed6eb92 843 return 0;
jbradshaw 0:e4a10ed6eb92 844 }
jbradshaw 0:e4a10ed6eb92 845 #endif
jbradshaw 0:e4a10ed6eb92 846 //******************************************************************************
jbradshaw 0:e4a10ed6eb92 847 #define LEADOFF_SERVICE_TIME 0x2000 // 0x1000 = 1 second
jbradshaw 0:e4a10ed6eb92 848 #define LEADOFF_NUMSTATES 2
jbradshaw 0:e4a10ed6eb92 849 uint32_t leadoffState = 0;
jbradshaw 0:e4a10ed6eb92 850 uint32_t max30001_LeadOffoldTime = 0;
jbradshaw 0:e4a10ed6eb92 851 void MAX30001::max30001_ServiceLeadoff(uint32_t currentTime) {
jbradshaw 0:e4a10ed6eb92 852
jbradshaw 0:e4a10ed6eb92 853 uint32_t delta_Time;
jbradshaw 0:e4a10ed6eb92 854
jbradshaw 0:e4a10ed6eb92 855 delta_Time = currentTime - max30001_LeadOffoldTime;
jbradshaw 0:e4a10ed6eb92 856
jbradshaw 0:e4a10ed6eb92 857 if (delta_Time > LEADOFF_SERVICE_TIME) {
jbradshaw 0:e4a10ed6eb92 858 switch (leadoffState) {
jbradshaw 0:e4a10ed6eb92 859 case 0: /* switch to ECG DC Lead OFF */
jbradshaw 0:e4a10ed6eb92 860 max30001_Enable_DcLeadOFF_Init(0b01, 0b0, 0b001, 0b00);
jbradshaw 0:e4a10ed6eb92 861 break;
jbradshaw 0:e4a10ed6eb92 862
jbradshaw 0:e4a10ed6eb92 863 case 1: /* switch to BIOZ DC Lead OFF */
jbradshaw 0:e4a10ed6eb92 864 max30001_Enable_DcLeadOFF_Init(0b10, 0b0, 0b001, 0b00);
jbradshaw 0:e4a10ed6eb92 865 break;
jbradshaw 0:e4a10ed6eb92 866 }
jbradshaw 0:e4a10ed6eb92 867
jbradshaw 0:e4a10ed6eb92 868 leadoffState++;
jbradshaw 0:e4a10ed6eb92 869 leadoffState %= LEADOFF_NUMSTATES;
jbradshaw 0:e4a10ed6eb92 870
jbradshaw 0:e4a10ed6eb92 871 max30001_LeadOffoldTime = currentTime;
jbradshaw 0:e4a10ed6eb92 872 }
jbradshaw 0:e4a10ed6eb92 873 }
jbradshaw 0:e4a10ed6eb92 874 //******************************************************************************
jbradshaw 0:e4a10ed6eb92 875 #define LEADON_SERVICE_TIME 0x2000 // 0x1000 = 1 second
jbradshaw 0:e4a10ed6eb92 876 #define LEADON_NUMSTATES 2
jbradshaw 0:e4a10ed6eb92 877 uint32_t leadOnState = 0;
jbradshaw 0:e4a10ed6eb92 878 uint32_t max30001_LeadOnoldTime = 0;
jbradshaw 0:e4a10ed6eb92 879 void MAX30001::max30001_ServiceLeadON(uint32_t currentTime) {
jbradshaw 0:e4a10ed6eb92 880
jbradshaw 0:e4a10ed6eb92 881 uint32_t delta_Time;
jbradshaw 0:e4a10ed6eb92 882
jbradshaw 0:e4a10ed6eb92 883 delta_Time = currentTime - max30001_LeadOnoldTime;
jbradshaw 0:e4a10ed6eb92 884
jbradshaw 0:e4a10ed6eb92 885 if (delta_Time > LEADON_SERVICE_TIME) {
jbradshaw 0:e4a10ed6eb92 886 switch (leadOnState) {
jbradshaw 0:e4a10ed6eb92 887 case 0: /* switch to ECG DC Lead ON */
jbradshaw 0:e4a10ed6eb92 888 max30001_Enable_LeadON(0b01);
jbradshaw 0:e4a10ed6eb92 889 break;
jbradshaw 0:e4a10ed6eb92 890
jbradshaw 0:e4a10ed6eb92 891 case 1: /* switch to BIOZ DC Lead ON */
jbradshaw 0:e4a10ed6eb92 892 max30001_Enable_LeadON(0b10);
jbradshaw 0:e4a10ed6eb92 893 break;
jbradshaw 0:e4a10ed6eb92 894 }
jbradshaw 0:e4a10ed6eb92 895
jbradshaw 0:e4a10ed6eb92 896 leadOnState++;
jbradshaw 0:e4a10ed6eb92 897 leadOnState %= LEADON_NUMSTATES;
jbradshaw 0:e4a10ed6eb92 898
jbradshaw 0:e4a10ed6eb92 899 max30001_LeadOnoldTime = currentTime;
jbradshaw 0:e4a10ed6eb92 900 }
jbradshaw 0:e4a10ed6eb92 901 }
jbradshaw 0:e4a10ed6eb92 902
jbradshaw 0:e4a10ed6eb92 903 //******************************************************************************
jbradshaw 0:e4a10ed6eb92 904 int MAX30001::max30001_FIFO_LeadONOff_Read(void) {
jbradshaw 0:e4a10ed6eb92 905
jbradshaw 0:e4a10ed6eb92 906 uint8_t result[32 * 3]; // 32words - 3bytes each
jbradshaw 0:e4a10ed6eb92 907
jbradshaw 0:e4a10ed6eb92 908 uint8_t data_array[4];
jbradshaw 0:e4a10ed6eb92 909 int32_t success = 0;
jbradshaw 0:e4a10ed6eb92 910 int i, j;
jbradshaw 0:e4a10ed6eb92 911
jbradshaw 0:e4a10ed6eb92 912 uint32_t total_databytes;
jbradshaw 0:e4a10ed6eb92 913 uint8_t i_index;
jbradshaw 0:e4a10ed6eb92 914 uint8_t data_chunk;
jbradshaw 0:e4a10ed6eb92 915 uint8_t loop_logic;
jbradshaw 0:e4a10ed6eb92 916
jbradshaw 0:e4a10ed6eb92 917 uint8_t etag, ptag, btag;
jbradshaw 0:e4a10ed6eb92 918
jbradshaw 0:e4a10ed6eb92 919 uint8_t adr;
jbradshaw 0:e4a10ed6eb92 920
jbradshaw 0:e4a10ed6eb92 921 int8_t ReadAllPaceOnce;
jbradshaw 0:e4a10ed6eb92 922
jbradshaw 0:e4a10ed6eb92 923 static uint8_t dcloffint_OneShot = 0;
jbradshaw 0:e4a10ed6eb92 924 static uint8_t acloffint_OneShot = 0;
jbradshaw 0:e4a10ed6eb92 925 static uint8_t bcgmon_OneShot = 0;
jbradshaw 0:e4a10ed6eb92 926 static uint8_t acleadon_OneShot = 0;
jbradshaw 0:e4a10ed6eb92 927
jbradshaw 0:e4a10ed6eb92 928 int8_t ret_val;
jbradshaw 0:e4a10ed6eb92 929
jbradshaw 0:e4a10ed6eb92 930 if (max30001_status.bit.eint == 1 || max30001_status.bit.pint == 1) {
jbradshaw 0:e4a10ed6eb92 931 adr = ECG_FIFO_BURST;
jbradshaw 0:e4a10ed6eb92 932 data_array[0] = ((adr << 1) & 0xff) | 1;
jbradshaw 0:e4a10ed6eb92 933
jbradshaw 0:e4a10ed6eb92 934 // The SPI routine only sends out data of 32 bytes in size. Therefore the
jbradshaw 0:e4a10ed6eb92 935 // data is being read in
jbradshaw 0:e4a10ed6eb92 936 // smaller chunks in this routine...
jbradshaw 0:e4a10ed6eb92 937
jbradshaw 0:e4a10ed6eb92 938 total_databytes = (max30001_mngr_int.bit.e_fit + 1) * 3;
jbradshaw 0:e4a10ed6eb92 939
jbradshaw 0:e4a10ed6eb92 940 i_index = 0;
jbradshaw 0:e4a10ed6eb92 941 loop_logic = 1;
jbradshaw 0:e4a10ed6eb92 942
jbradshaw 0:e4a10ed6eb92 943 while (loop_logic) {
jbradshaw 0:e4a10ed6eb92 944 if (total_databytes > 30) {
jbradshaw 0:e4a10ed6eb92 945 data_chunk = 30;
jbradshaw 0:e4a10ed6eb92 946 total_databytes = total_databytes - 30;
jbradshaw 0:e4a10ed6eb92 947 } else {
jbradshaw 0:e4a10ed6eb92 948 data_chunk = total_databytes;
jbradshaw 0:e4a10ed6eb92 949 loop_logic = 0;
jbradshaw 0:e4a10ed6eb92 950 }
jbradshaw 0:e4a10ed6eb92 951
jbradshaw 0:e4a10ed6eb92 952 /* The extra 1 byte is for the extra byte that comes out of the SPI */
jbradshaw 0:e4a10ed6eb92 953 success = SPI_Transmit(&data_array[0], 1, &result[i_index], (data_chunk + 1)); // Make a copy of the FIFO over here...
jbradshaw 0:e4a10ed6eb92 954
jbradshaw 0:e4a10ed6eb92 955 if (success != 0) {
jbradshaw 0:e4a10ed6eb92 956 return -1;
jbradshaw 0:e4a10ed6eb92 957 }
jbradshaw 0:e4a10ed6eb92 958
jbradshaw 0:e4a10ed6eb92 959 /* This is important, because every transaction above creates an empty
jbradshaw 0:e4a10ed6eb92 960 * redundant data at result[0] */
jbradshaw 0:e4a10ed6eb92 961 for (j = i_index; j < (data_chunk + i_index); j++) /* get rid of the 1 extra byte by moving the whole array up one */
jbradshaw 0:e4a10ed6eb92 962 {
jbradshaw 0:e4a10ed6eb92 963 result[j] = result[j + 1];
jbradshaw 0:e4a10ed6eb92 964 }
jbradshaw 0:e4a10ed6eb92 965
jbradshaw 0:e4a10ed6eb92 966 i_index = i_index + 30; /* point to the next array location to put the data in */
jbradshaw 0:e4a10ed6eb92 967 }
jbradshaw 0:e4a10ed6eb92 968
jbradshaw 0:e4a10ed6eb92 969 ReadAllPaceOnce = 0;
jbradshaw 0:e4a10ed6eb92 970
jbradshaw 0:e4a10ed6eb92 971 /* Put the content of the FIFO based on the EFIT value, We ignore the
jbradshaw 0:e4a10ed6eb92 972 * result[0] and start concatenating indexes: 1,2,3 - 4,5,6 - 7,8,9 - */
jbradshaw 0:e4a10ed6eb92 973 for (i = 0, j = 0; i < max30001_mngr_int.bit.e_fit + 1; i++, j = j + 3) // index1=23-16 bit, index2=15-8 bit, index3=7-0 bit
jbradshaw 0:e4a10ed6eb92 974 {
jbradshaw 0:e4a10ed6eb92 975 max30001_ECG_FIFO_buffer[i] = ((uint32_t)result[j] << 16) + (result[j + 1] << 8) + result[j + 2];
jbradshaw 0:e4a10ed6eb92 976
jbradshaw 0:e4a10ed6eb92 977 etag = (0b00111000 & result[j + 2]) >> 3;
jbradshaw 0:e4a10ed6eb92 978 ptag = 0b00000111 & result[j + 2];
jbradshaw 0:e4a10ed6eb92 979
jbradshaw 0:e4a10ed6eb92 980 if (ptag != 0b111 && ReadAllPaceOnce == 0) {
jbradshaw 0:e4a10ed6eb92 981
jbradshaw 0:e4a10ed6eb92 982 ReadAllPaceOnce = 1; // This will prevent extra read of PACE, once group
jbradshaw 0:e4a10ed6eb92 983 // 0-5 is read ONCE.
jbradshaw 0:e4a10ed6eb92 984
jbradshaw 0:e4a10ed6eb92 985 adr = PACE0_FIFO_BURST;
jbradshaw 0:e4a10ed6eb92 986
jbradshaw 0:e4a10ed6eb92 987 data_array[0] = ((adr << 1) & 0xff) | 1; // For Read Or with 1
jbradshaw 0:e4a10ed6eb92 988
jbradshaw 0:e4a10ed6eb92 989 success = SPI_Transmit(&data_array[0], 1, &result[0], 10);
jbradshaw 0:e4a10ed6eb92 990
jbradshaw 0:e4a10ed6eb92 991 max30001_PACE[0] = (uint32_t)(result[1] << 16) + (result[2] << 8) + result[3];
jbradshaw 0:e4a10ed6eb92 992 max30001_PACE[1] = (uint32_t)(result[4] << 16) + (result[5] << 8) + result[6];
jbradshaw 0:e4a10ed6eb92 993 max30001_PACE[2] = (uint32_t)(result[7] << 16) + (result[8] << 8) + result[9];
jbradshaw 0:e4a10ed6eb92 994
jbradshaw 0:e4a10ed6eb92 995 adr = PACE1_FIFO_BURST;
jbradshaw 0:e4a10ed6eb92 996
jbradshaw 0:e4a10ed6eb92 997 data_array[0] = ((adr << 1) & 0xff) | 1; // For Read Or with 1
jbradshaw 0:e4a10ed6eb92 998
jbradshaw 0:e4a10ed6eb92 999 success = SPI_Transmit(&data_array[0], 1, &result[0], 10);
jbradshaw 0:e4a10ed6eb92 1000
jbradshaw 0:e4a10ed6eb92 1001 max30001_PACE[3] = (uint32_t)(result[1] << 16) + (result[2] << 8) + result[3];
jbradshaw 0:e4a10ed6eb92 1002 max30001_PACE[4] = (uint32_t)(result[4] << 16) + (result[5] << 8) + result[6];
jbradshaw 0:e4a10ed6eb92 1003 max30001_PACE[5] = (uint32_t)(result[7] << 16) + (result[8] << 8) + result[9];
jbradshaw 0:e4a10ed6eb92 1004
jbradshaw 0:e4a10ed6eb92 1005 adr = PACE2_FIFO_BURST;
jbradshaw 0:e4a10ed6eb92 1006
jbradshaw 0:e4a10ed6eb92 1007 data_array[0] = ((adr << 1) & 0xff) | 1; // For Read Or with 1
jbradshaw 0:e4a10ed6eb92 1008
jbradshaw 0:e4a10ed6eb92 1009 success = SPI_Transmit(&data_array[0], 1, &result[0], 10);
jbradshaw 0:e4a10ed6eb92 1010
jbradshaw 0:e4a10ed6eb92 1011 max30001_PACE[6] = (uint32_t)(result[1] << 16) + (result[2] << 8) + result[3];
jbradshaw 0:e4a10ed6eb92 1012 max30001_PACE[7] = (uint32_t)(result[4] << 16) + (result[5] << 8) + result[6];
jbradshaw 0:e4a10ed6eb92 1013 max30001_PACE[8] = (uint32_t)(result[7] << 16) + (result[8] << 8) + result[9];
jbradshaw 0:e4a10ed6eb92 1014
jbradshaw 0:e4a10ed6eb92 1015 adr = PACE3_FIFO_BURST;
jbradshaw 0:e4a10ed6eb92 1016
jbradshaw 0:e4a10ed6eb92 1017 data_array[0] = ((adr << 1) & 0xff) | 1; // For Read Or with 1
jbradshaw 0:e4a10ed6eb92 1018
jbradshaw 0:e4a10ed6eb92 1019 success = SPI_Transmit(&data_array[0], 1, &result[0], 10);
jbradshaw 0:e4a10ed6eb92 1020
jbradshaw 0:e4a10ed6eb92 1021 max30001_PACE[9] = (uint32_t)(result[1] << 16) + (result[2] << 8) + result[3];
jbradshaw 0:e4a10ed6eb92 1022 max30001_PACE[10] = (uint32_t)(result[4] << 16) + (result[5] << 8) + result[6];
jbradshaw 0:e4a10ed6eb92 1023 max30001_PACE[11] = (uint32_t)(result[7] << 16) + (result[8] << 8) + result[9];
jbradshaw 0:e4a10ed6eb92 1024
jbradshaw 0:e4a10ed6eb92 1025 adr = PACE4_FIFO_BURST;
jbradshaw 0:e4a10ed6eb92 1026
jbradshaw 0:e4a10ed6eb92 1027 data_array[0] = ((adr << 1) & 0xff) | 1; // For Read Or with 1
jbradshaw 0:e4a10ed6eb92 1028
jbradshaw 0:e4a10ed6eb92 1029 success = SPI_Transmit(&data_array[0], 1, &result[0], 10);
jbradshaw 0:e4a10ed6eb92 1030
jbradshaw 0:e4a10ed6eb92 1031 max30001_PACE[12] = (uint32_t)(result[1] << 16) + (result[2] << 8) + result[3];
jbradshaw 0:e4a10ed6eb92 1032 max30001_PACE[13] = (uint32_t)(result[4] << 16) + (result[5] << 8) + result[6];
jbradshaw 0:e4a10ed6eb92 1033 max30001_PACE[14] = (uint32_t)(result[7] << 16) + (result[8] << 8) + result[9];
jbradshaw 0:e4a10ed6eb92 1034
jbradshaw 0:e4a10ed6eb92 1035 adr = PACE5_FIFO_BURST;
jbradshaw 0:e4a10ed6eb92 1036
jbradshaw 0:e4a10ed6eb92 1037 data_array[0] = ((adr << 1) & 0xff) | 1; // For Read Or with 1
jbradshaw 0:e4a10ed6eb92 1038
jbradshaw 0:e4a10ed6eb92 1039 success = SPI_Transmit(&data_array[0], 1, &result[0], 10);
jbradshaw 0:e4a10ed6eb92 1040
jbradshaw 0:e4a10ed6eb92 1041 max30001_PACE[15] = (uint32_t)(result[1] << 16) + (result[2] << 8) + result[3];
jbradshaw 0:e4a10ed6eb92 1042 max30001_PACE[16] = (uint32_t)(result[4] << 16) + (result[5] << 8) + result[6];
jbradshaw 0:e4a10ed6eb92 1043 max30001_PACE[17] = (uint32_t)(result[7] << 16) + (result[8] << 8) + result[9];
jbradshaw 0:e4a10ed6eb92 1044
jbradshaw 0:e4a10ed6eb92 1045 dataAvailable(MAX30001_DATA_PACE, max30001_PACE, 18); // Send out the Pace data once only
jbradshaw 0:e4a10ed6eb92 1046 }
jbradshaw 0:e4a10ed6eb92 1047 }
jbradshaw 0:e4a10ed6eb92 1048
jbradshaw 0:e4a10ed6eb92 1049 if (etag != 0b110) {
jbradshaw 0:e4a10ed6eb92 1050
jbradshaw 0:e4a10ed6eb92 1051 dataAvailable(MAX30001_DATA_ECG, max30001_ECG_FIFO_buffer, (max30001_mngr_int.bit.e_fit + 1));
jbradshaw 0:e4a10ed6eb92 1052 }
jbradshaw 0:e4a10ed6eb92 1053
jbradshaw 0:e4a10ed6eb92 1054 } /* End of ECG init */
jbradshaw 0:e4a10ed6eb92 1055
jbradshaw 0:e4a10ed6eb92 1056 /* RtoR */
jbradshaw 0:e4a10ed6eb92 1057
jbradshaw 0:e4a10ed6eb92 1058 if (max30001_status.bit.rrint == 1) {
jbradshaw 0:e4a10ed6eb92 1059 if (max30001_reg_read(RTOR, &max30001_RtoR_data) == -1) {
jbradshaw 0:e4a10ed6eb92 1060 return -1;
jbradshaw 0:e4a10ed6eb92 1061 }
jbradshaw 0:e4a10ed6eb92 1062
jbradshaw 0:e4a10ed6eb92 1063 max30001_RtoR_data = (0x00FFFFFF & max30001_RtoR_data) >> 10;
jbradshaw 0:e4a10ed6eb92 1064
jbradshaw 0:e4a10ed6eb92 1065 hspValMax30001.R2R = (uint16_t)max30001_RtoR_data;
jbradshaw 0:e4a10ed6eb92 1066 hspValMax30001.fmstr = (uint16_t)max30001_cnfg_gen.bit.fmstr;
jbradshaw 0:e4a10ed6eb92 1067
jbradshaw 0:e4a10ed6eb92 1068 dataAvailable(MAX30001_DATA_RTOR, &max30001_RtoR_data, 1);
jbradshaw 0:e4a10ed6eb92 1069 }
jbradshaw 0:e4a10ed6eb92 1070
jbradshaw 0:e4a10ed6eb92 1071 // Handling BIOZ data...
jbradshaw 0:e4a10ed6eb92 1072
jbradshaw 0:e4a10ed6eb92 1073 if (max30001_status.bit.bint == 1) {
jbradshaw 0:e4a10ed6eb92 1074 adr = 0x22;
jbradshaw 0:e4a10ed6eb92 1075 data_array[0] = ((adr << 1) & 0xff) | 1;
jbradshaw 0:e4a10ed6eb92 1076
jbradshaw 0:e4a10ed6eb92 1077 /* [(BFIT+1)*3byte]+1extra byte due to the addr */
jbradshaw 0:e4a10ed6eb92 1078
jbradshaw 0:e4a10ed6eb92 1079 if (SPI_Transmit(&data_array[0], 1, &result[0],((max30001_mngr_int.bit.b_fit + 1) * 3) + 1) == -1) // Make a copy of the FIFO over here...
jbradshaw 0:e4a10ed6eb92 1080
jbradshaw 0:e4a10ed6eb92 1081 {
jbradshaw 0:e4a10ed6eb92 1082 return -1;
jbradshaw 0:e4a10ed6eb92 1083 }
jbradshaw 0:e4a10ed6eb92 1084
jbradshaw 0:e4a10ed6eb92 1085 btag = 0b00000111 & result[3];
jbradshaw 0:e4a10ed6eb92 1086
jbradshaw 0:e4a10ed6eb92 1087 /* Put the content of the FIFO based on the BFIT value, We ignore the
jbradshaw 0:e4a10ed6eb92 1088 * result[0] and start concatenating indexes: 1,2,3 - 4,5,6 - 7,8,9 - */
jbradshaw 0:e4a10ed6eb92 1089 for (i = 0, j = 0; i < max30001_mngr_int.bit.b_fit + 1; i++, j = j + 3) // index1=23-16 bit, index2=15-8 bit, index3=7-0 bit
jbradshaw 0:e4a10ed6eb92 1090 {
jbradshaw 0:e4a10ed6eb92 1091 max30001_BIOZ_FIFO_buffer[i] = ((uint32_t)result[j + 1] << 16) + (result[j + 2] << 8) + result[j + 3];
jbradshaw 0:e4a10ed6eb92 1092 }
jbradshaw 0:e4a10ed6eb92 1093
jbradshaw 0:e4a10ed6eb92 1094 if (btag != 0b110) {
jbradshaw 0:e4a10ed6eb92 1095 dataAvailable(MAX30001_DATA_BIOZ, max30001_BIOZ_FIFO_buffer, 8);
jbradshaw 0:e4a10ed6eb92 1096 }
jbradshaw 0:e4a10ed6eb92 1097 }
jbradshaw 0:e4a10ed6eb92 1098
jbradshaw 0:e4a10ed6eb92 1099 ret_val = 0;
jbradshaw 0:e4a10ed6eb92 1100
jbradshaw 0:e4a10ed6eb92 1101 if (max30001_status.bit.dcloffint == 1) // ECG/BIOZ Lead Off
jbradshaw 0:e4a10ed6eb92 1102 {
jbradshaw 0:e4a10ed6eb92 1103 dcloffint_OneShot = 1;
jbradshaw 0:e4a10ed6eb92 1104 max30001_DCLeadOff = 0;
jbradshaw 0:e4a10ed6eb92 1105 max30001_DCLeadOff = max30001_DCLeadOff | (max30001_cnfg_gen.bit.en_dcloff << 8) | (max30001_status.all & 0x00000F);
jbradshaw 0:e4a10ed6eb92 1106 dataAvailable(MAX30001_DATA_LEADOFF_DC, &max30001_DCLeadOff, 1);
jbradshaw 0:e4a10ed6eb92 1107 // Do a FIFO Reset
jbradshaw 0:e4a10ed6eb92 1108 max30001_reg_write(FIFO_RST, 0x000000);
jbradshaw 0:e4a10ed6eb92 1109
jbradshaw 0:e4a10ed6eb92 1110 ret_val = 0b100;
jbradshaw 0:e4a10ed6eb92 1111
jbradshaw 0:e4a10ed6eb92 1112 } else if (dcloffint_OneShot == 1 && max30001_status.bit.dcloffint == 0) // Just send once when it comes out of dc lead off
jbradshaw 0:e4a10ed6eb92 1113 {
jbradshaw 0:e4a10ed6eb92 1114 max30001_DCLeadOff = 0;
jbradshaw 0:e4a10ed6eb92 1115 max30001_DCLeadOff = max30001_DCLeadOff | (max30001_cnfg_gen.bit.en_dcloff << 8) | (max30001_status.all & 0x00000F);
jbradshaw 0:e4a10ed6eb92 1116 dataAvailable(MAX30001_DATA_LEADOFF_DC, &max30001_DCLeadOff, 1);
jbradshaw 0:e4a10ed6eb92 1117 dcloffint_OneShot = 0;
jbradshaw 0:e4a10ed6eb92 1118 }
jbradshaw 0:e4a10ed6eb92 1119
jbradshaw 0:e4a10ed6eb92 1120 if (max30001_status.bit.bover == 1 || max30001_status.bit.bundr == 1) // BIOZ AC Lead Off
jbradshaw 0:e4a10ed6eb92 1121 {
jbradshaw 0:e4a10ed6eb92 1122 acloffint_OneShot = 1;
jbradshaw 0:e4a10ed6eb92 1123 max30001_ACLeadOff = 0;
jbradshaw 0:e4a10ed6eb92 1124 max30001_ACLeadOff =
jbradshaw 0:e4a10ed6eb92 1125 max30001_ACLeadOff | ((max30001_status.all & 0x030000) >> 16);
jbradshaw 0:e4a10ed6eb92 1126 dataAvailable(MAX30001_DATA_LEADOFF_AC, &max30001_ACLeadOff, 1);
jbradshaw 0:e4a10ed6eb92 1127 // Do a FIFO Reset
jbradshaw 0:e4a10ed6eb92 1128 max30001_reg_write(FIFO_RST, 0x000000);
jbradshaw 0:e4a10ed6eb92 1129
jbradshaw 0:e4a10ed6eb92 1130 ret_val = 0b1000;
jbradshaw 0:e4a10ed6eb92 1131 } else if (acloffint_OneShot == 1 && max30001_status.bit.bover == 0 && max30001_status.bit.bundr == 0) // Just send once when it comes out of ac lead off
jbradshaw 0:e4a10ed6eb92 1132 {
jbradshaw 0:e4a10ed6eb92 1133 max30001_ACLeadOff = 0;
jbradshaw 0:e4a10ed6eb92 1134 max30001_ACLeadOff = max30001_ACLeadOff | ((max30001_status.all & 0x030000) >> 16);
jbradshaw 0:e4a10ed6eb92 1135 dataAvailable(MAX30001_DATA_LEADOFF_AC, &max30001_ACLeadOff, 1);
jbradshaw 0:e4a10ed6eb92 1136 acloffint_OneShot = 0;
jbradshaw 0:e4a10ed6eb92 1137 }
jbradshaw 0:e4a10ed6eb92 1138
jbradshaw 0:e4a10ed6eb92 1139 if (max30001_status.bit.bcgmon == 1) // BIOZ BCGMON check
jbradshaw 0:e4a10ed6eb92 1140 {
jbradshaw 0:e4a10ed6eb92 1141 bcgmon_OneShot = 1;
jbradshaw 0:e4a10ed6eb92 1142 max30001_bcgmon = 0;
jbradshaw 0:e4a10ed6eb92 1143 max30001_bcgmon = max30001_bcgmon | ((max30001_status.all & 0x000030) >> 4);
jbradshaw 0:e4a10ed6eb92 1144 dataAvailable(MAX30001_DATA_BCGMON, &max30001_bcgmon, 1);
jbradshaw 0:e4a10ed6eb92 1145 // Do a FIFO Reset
jbradshaw 0:e4a10ed6eb92 1146 max30001_reg_write(FIFO_RST, 0x000000);
jbradshaw 0:e4a10ed6eb92 1147
jbradshaw 0:e4a10ed6eb92 1148 ret_val = 0b10000;
jbradshaw 0:e4a10ed6eb92 1149 } else if (bcgmon_OneShot == 1 && max30001_status.bit.bcgmon == 0) {
jbradshaw 0:e4a10ed6eb92 1150 max30001_bcgmon = 0;
jbradshaw 0:e4a10ed6eb92 1151 max30001_bcgmon = max30001_bcgmon | ((max30001_status.all & 0x000030) >> 4);
jbradshaw 0:e4a10ed6eb92 1152 bcgmon_OneShot = 0;
jbradshaw 0:e4a10ed6eb92 1153 dataAvailable(MAX30001_DATA_BCGMON, &max30001_bcgmon, 1);
jbradshaw 0:e4a10ed6eb92 1154 }
jbradshaw 0:e4a10ed6eb92 1155
jbradshaw 0:e4a10ed6eb92 1156 #if 0
jbradshaw 0:e4a10ed6eb92 1157 if(max30001_status.bit.lonint == 1) // AC LeadON Check
jbradshaw 0:e4a10ed6eb92 1158 {
jbradshaw 0:e4a10ed6eb92 1159 max30001_LeadOn = 0;
jbradshaw 0:e4a10ed6eb92 1160 max30001_reg_read(STATUS,&max30001_status.all); // Reading is important
jbradshaw 0:e4a10ed6eb92 1161 max30001_LeadOn = max30001_LeadOn | (max30001_cnfg_gen.bit.en_ulp_lon << 8) | ((max30001_status.all & 0x000800) >> 11); // 0b01 will mean ECG Lead On, 0b10 will mean BIOZ Lead On
jbradshaw 0:e4a10ed6eb92 1162 // LEAD ON has been detected... Now take actions
jbradshaw 0:e4a10ed6eb92 1163 }
jbradshaw 0:e4a10ed6eb92 1164 #endif
jbradshaw 0:e4a10ed6eb92 1165
jbradshaw 0:e4a10ed6eb92 1166 if (max30001_status.bit.lonint == 1 &&
jbradshaw 0:e4a10ed6eb92 1167 acleadon_OneShot == 0) // AC LeadON Check, when lead is on
jbradshaw 0:e4a10ed6eb92 1168 {
jbradshaw 0:e4a10ed6eb92 1169 max30001_LeadOn = 0;
jbradshaw 0:e4a10ed6eb92 1170 max30001_reg_read(STATUS, &max30001_status.all); // Reading is important
jbradshaw 0:e4a10ed6eb92 1171 max30001_LeadOn =
jbradshaw 0:e4a10ed6eb92 1172 max30001_LeadOn | (max30001_cnfg_gen.bit.en_ulp_lon << 8) |
jbradshaw 0:e4a10ed6eb92 1173 ((max30001_status.all & 0x000800) >>
jbradshaw 0:e4a10ed6eb92 1174 11); // 0b01 will mean ECG Lead On, 0b10 will mean BIOZ Lead On
jbradshaw 0:e4a10ed6eb92 1175
jbradshaw 0:e4a10ed6eb92 1176 // LEAD ON has been detected... Now take actions
jbradshaw 0:e4a10ed6eb92 1177 acleadon_OneShot = 1;
jbradshaw 0:e4a10ed6eb92 1178 dataAvailable(MAX30001_DATA_ACLEADON, &max30001_LeadOn, 1); // One shot data will be sent...
jbradshaw 0:e4a10ed6eb92 1179 } else if (max30001_status.bit.lonint == 0 && acleadon_OneShot == 1) {
jbradshaw 0:e4a10ed6eb92 1180 max30001_LeadOn = 0;
jbradshaw 0:e4a10ed6eb92 1181 max30001_reg_read(STATUS, &max30001_status.all);
jbradshaw 0:e4a10ed6eb92 1182 max30001_LeadOn =
jbradshaw 0:e4a10ed6eb92 1183 max30001_LeadOn | (max30001_cnfg_gen.bit.en_ulp_lon << 8) | ((max30001_status.all & 0x000800) >> 11); // 0b01 will mean ECG Lead On, 0b10 will mean BIOZ Lead On
jbradshaw 0:e4a10ed6eb92 1184 dataAvailable(MAX30001_DATA_ACLEADON, &max30001_LeadOn, 1); // One shot data will be sent...
jbradshaw 0:e4a10ed6eb92 1185 acleadon_OneShot = 0;
jbradshaw 0:e4a10ed6eb92 1186 }
jbradshaw 0:e4a10ed6eb92 1187
jbradshaw 0:e4a10ed6eb92 1188 return ret_val;
jbradshaw 0:e4a10ed6eb92 1189 }
jbradshaw 0:e4a10ed6eb92 1190
jbradshaw 0:e4a10ed6eb92 1191 //******************************************************************************
jbradshaw 0:e4a10ed6eb92 1192
jbradshaw 0:e4a10ed6eb92 1193 int MAX30001::max30001_int_handler(void) {
jbradshaw 0:e4a10ed6eb92 1194
jbradshaw 0:e4a10ed6eb92 1195 static uint32_t InitReset = 0;
jbradshaw 0:e4a10ed6eb92 1196
jbradshaw 0:e4a10ed6eb92 1197 int8_t return_value;
jbradshaw 0:e4a10ed6eb92 1198
jbradshaw 0:e4a10ed6eb92 1199 max30001_reg_read(STATUS, &max30001_status.all);
jbradshaw 0:e4a10ed6eb92 1200
jbradshaw 0:e4a10ed6eb92 1201 // Inital Reset and any FIFO over flow invokes a FIFO reset
jbradshaw 0:e4a10ed6eb92 1202 if (InitReset == 0 || max30001_status.bit.eovf == 1 || max30001_status.bit.bovf == 1 || max30001_status.bit.povf == 1) {
jbradshaw 0:e4a10ed6eb92 1203 // Do a FIFO Reset
jbradshaw 0:e4a10ed6eb92 1204 max30001_reg_write(FIFO_RST, 0x000000);
jbradshaw 0:e4a10ed6eb92 1205
jbradshaw 0:e4a10ed6eb92 1206 InitReset++;
jbradshaw 0:e4a10ed6eb92 1207 return 2;
jbradshaw 0:e4a10ed6eb92 1208 }
jbradshaw 0:e4a10ed6eb92 1209
jbradshaw 0:e4a10ed6eb92 1210 return_value = 0;
jbradshaw 0:e4a10ed6eb92 1211
jbradshaw 0:e4a10ed6eb92 1212 // The four data handling goes on over here
jbradshaw 0:e4a10ed6eb92 1213 if (max30001_status.bit.eint == 1 || max30001_status.bit.pint == 1 || max30001_status.bit.bint == 1 || max30001_status.bit.rrint == 1) {
jbradshaw 0:e4a10ed6eb92 1214 return_value = return_value | max30001_FIFO_LeadONOff_Read();
jbradshaw 0:e4a10ed6eb92 1215 }
jbradshaw 0:e4a10ed6eb92 1216
jbradshaw 0:e4a10ed6eb92 1217 // ECG/BIOZ DC Lead Off test
jbradshaw 0:e4a10ed6eb92 1218 if (max30001_status.bit.dcloffint == 1) {
jbradshaw 0:e4a10ed6eb92 1219 return_value = return_value | max30001_FIFO_LeadONOff_Read();
jbradshaw 0:e4a10ed6eb92 1220 }
jbradshaw 0:e4a10ed6eb92 1221
jbradshaw 0:e4a10ed6eb92 1222 // BIOZ AC Lead Off test
jbradshaw 0:e4a10ed6eb92 1223 if (max30001_status.bit.bover == 1 || max30001_status.bit.bundr == 1) {
jbradshaw 0:e4a10ed6eb92 1224 return_value = return_value | max30001_FIFO_LeadONOff_Read();
jbradshaw 0:e4a10ed6eb92 1225 }
jbradshaw 0:e4a10ed6eb92 1226
jbradshaw 0:e4a10ed6eb92 1227 // BIOZ DRVP/N test using BCGMON.
jbradshaw 0:e4a10ed6eb92 1228 if (max30001_status.bit.bcgmon == 1) {
jbradshaw 0:e4a10ed6eb92 1229 return_value = return_value | max30001_FIFO_LeadONOff_Read();
jbradshaw 0:e4a10ed6eb92 1230 }
jbradshaw 0:e4a10ed6eb92 1231
jbradshaw 0:e4a10ed6eb92 1232 if (max30001_status.bit.lonint == 1) // ECG Lead ON test: i.e. the leads are touching the body...
jbradshaw 0:e4a10ed6eb92 1233 {
jbradshaw 0:e4a10ed6eb92 1234
jbradshaw 0:e4a10ed6eb92 1235 max30001_FIFO_LeadONOff_Read();
jbradshaw 0:e4a10ed6eb92 1236 }
jbradshaw 0:e4a10ed6eb92 1237
jbradshaw 0:e4a10ed6eb92 1238 return return_value;
jbradshaw 0:e4a10ed6eb92 1239 }
jbradshaw 0:e4a10ed6eb92 1240
jbradshaw 0:e4a10ed6eb92 1241 /// function pointer to the async callback
jbradshaw 0:e4a10ed6eb92 1242 static event_callback_t functionpointer;
jbradshaw 0:e4a10ed6eb92 1243 /// flag used to indicate an async xfer has taken place
jbradshaw 0:e4a10ed6eb92 1244 static volatile int xferFlag = 0;
jbradshaw 0:e4a10ed6eb92 1245
jbradshaw 0:e4a10ed6eb92 1246 /**
jbradshaw 0:e4a10ed6eb92 1247 * @brief Callback handler for SPI async events
jbradshaw 0:e4a10ed6eb92 1248 * @param events description of event that occurred
jbradshaw 0:e4a10ed6eb92 1249 */
jbradshaw 0:e4a10ed6eb92 1250 static void spiHandler(int events) { xferFlag = 1; }
jbradshaw 0:e4a10ed6eb92 1251
jbradshaw 0:e4a10ed6eb92 1252 /**
jbradshaw 0:e4a10ed6eb92 1253 * @brief Transmit and recieve QUAD SPI data
jbradshaw 0:e4a10ed6eb92 1254 * @param tx_buf pointer to transmit byte buffer
jbradshaw 0:e4a10ed6eb92 1255 * @param tx_size number of bytes to transmit
jbradshaw 0:e4a10ed6eb92 1256 * @param rx_buf pointer to the recieve buffer
jbradshaw 0:e4a10ed6eb92 1257 * @param rx_size number of bytes to recieve
jbradshaw 0:e4a10ed6eb92 1258 */
jbradshaw 0:e4a10ed6eb92 1259 int MAX30001::SPI_Transmit(const uint8_t *tx_buf, uint32_t tx_size, uint8_t *rx_buf, uint32_t rx_size) {
jbradshaw 0:e4a10ed6eb92 1260 xferFlag = 0;
jbradshaw 0:e4a10ed6eb92 1261 int i;
jbradshaw 0:e4a10ed6eb92 1262 for (i = 0; i < sizeof(buffer); i++) {
jbradshaw 0:e4a10ed6eb92 1263 if (i < tx_size)
jbradshaw 0:e4a10ed6eb92 1264 buffer[i] = tx_buf[i];
jbradshaw 0:e4a10ed6eb92 1265 else
jbradshaw 0:e4a10ed6eb92 1266 buffer[i] = 0xFF;
jbradshaw 0:e4a10ed6eb92 1267 }
jbradshaw 0:e4a10ed6eb92 1268 spi->transfer<uint8_t>(buffer, (int)rx_size, rx_buf, (int)rx_size, spiHandler /* functionpointer */);
jbradshaw 0:e4a10ed6eb92 1269 while (xferFlag == 0);
jbradshaw 0:e4a10ed6eb92 1270 return 0;
jbradshaw 0:e4a10ed6eb92 1271 }
jbradshaw 0:e4a10ed6eb92 1272
jbradshaw 0:e4a10ed6eb92 1273 //******************************************************************************
jbradshaw 0:e4a10ed6eb92 1274 void MAX30001::max30001_ReadHeartrateData(max30001_t *_hspValMax30001) {
jbradshaw 0:e4a10ed6eb92 1275 _hspValMax30001->R2R = hspValMax30001.R2R;
jbradshaw 0:e4a10ed6eb92 1276 _hspValMax30001->fmstr = hspValMax30001.fmstr;
jbradshaw 0:e4a10ed6eb92 1277 }
jbradshaw 0:e4a10ed6eb92 1278
jbradshaw 0:e4a10ed6eb92 1279 //******************************************************************************
jbradshaw 0:e4a10ed6eb92 1280 void MAX30001::onDataAvailable(PtrFunction _onDataAvailable) {
jbradshaw 0:e4a10ed6eb92 1281 onDataAvailableCallback = _onDataAvailable;
jbradshaw 0:e4a10ed6eb92 1282 }
jbradshaw 0:e4a10ed6eb92 1283
jbradshaw 0:e4a10ed6eb92 1284 /**
jbradshaw 0:e4a10ed6eb92 1285 * @brief Used to notify an external function that interrupt data is available
jbradshaw 0:e4a10ed6eb92 1286 * @param id type of data available
jbradshaw 0:e4a10ed6eb92 1287 * @param buffer 32-bit buffer that points to the data
jbradshaw 0:e4a10ed6eb92 1288 * @param length length of 32-bit elements available
jbradshaw 0:e4a10ed6eb92 1289 */
jbradshaw 0:e4a10ed6eb92 1290 void MAX30001::dataAvailable(uint32_t id, uint32_t *buffer, uint32_t length) {
jbradshaw 0:e4a10ed6eb92 1291 if (onDataAvailableCallback != NULL) {
jbradshaw 0:e4a10ed6eb92 1292 (*onDataAvailableCallback)(id, buffer, length);
jbradshaw 0:e4a10ed6eb92 1293 }
jbradshaw 0:e4a10ed6eb92 1294 }
jbradshaw 0:e4a10ed6eb92 1295
jbradshaw 0:e4a10ed6eb92 1296 /**
jbradshaw 0:e4a10ed6eb92 1297 * @brief Callback handler for SPI async events
jbradshaw 0:e4a10ed6eb92 1298 * @param events description of event that occurred
jbradshaw 0:e4a10ed6eb92 1299 */
jbradshaw 0:e4a10ed6eb92 1300 void MAX30001::spiHandler(int events) { xferFlag = 1; }
jbradshaw 0:e4a10ed6eb92 1301
jbradshaw 0:e4a10ed6eb92 1302 //******************************************************************************
jbradshaw 0:e4a10ed6eb92 1303 static int allowInterrupts = 0;
jbradshaw 0:e4a10ed6eb92 1304
jbradshaw 0:e4a10ed6eb92 1305 void MAX30001Mid_IntB_Handler(void) {
jbradshaw 0:e4a10ed6eb92 1306 if (allowInterrupts == 0) return;
jbradshaw 0:e4a10ed6eb92 1307 MAX30001::instance->max30001_int_handler();
jbradshaw 0:e4a10ed6eb92 1308 }
jbradshaw 0:e4a10ed6eb92 1309
jbradshaw 0:e4a10ed6eb92 1310 void MAX30001Mid_Int2B_Handler(void) {
jbradshaw 0:e4a10ed6eb92 1311 if (allowInterrupts == 0) return;
jbradshaw 0:e4a10ed6eb92 1312 MAX30001::instance->max30001_int_handler();
jbradshaw 0:e4a10ed6eb92 1313 }
jbradshaw 0:e4a10ed6eb92 1314
jbradshaw 0:e4a10ed6eb92 1315 void MAX30001_AllowInterrupts(int state) {
jbradshaw 0:e4a10ed6eb92 1316 allowInterrupts = state;
jbradshaw 0:e4a10ed6eb92 1317 }