Functional test program for MAXREFDES89# that ramps each motor driver output up/down and in each direction sequentially. Uses default configuration, i.e. pwm signals are on D4, D5, D9 and D10 along with default I2C addresses for supporting I.C.s.
Dependencies: MAX14871_Shield mbed
main.cpp@0:81e41ea3f51a, 2015-08-28 (annotated)
- Committer:
- j3
- Date:
- Fri Aug 28 19:38:19 2015 +0000
- Revision:
- 0:81e41ea3f51a
- Child:
- 1:c9cf8a2fc829
Simple functional test program
Who changed what in which revision?
User | Revision | Line number | New contents of line |
---|---|---|---|
j3 | 0:81e41ea3f51a | 1 | /********************************************************************** |
j3 | 0:81e41ea3f51a | 2 | * Copyright (C) 2015 Maxim Integrated Products, Inc., All Rights Reserved. |
j3 | 0:81e41ea3f51a | 3 | * |
j3 | 0:81e41ea3f51a | 4 | * Permission is hereby granted, free of charge, to any person obtaining a |
j3 | 0:81e41ea3f51a | 5 | * copy of this software and associated documentation files (the "Software"), |
j3 | 0:81e41ea3f51a | 6 | * to deal in the Software without restriction, including without limitation |
j3 | 0:81e41ea3f51a | 7 | * the rights to use, copy, modify, merge, publish, distribute, sublicense, |
j3 | 0:81e41ea3f51a | 8 | * and/or sell copies of the Software, and to permit persons to whom the |
j3 | 0:81e41ea3f51a | 9 | * Software is furnished to do so, subject to the following conditions: |
j3 | 0:81e41ea3f51a | 10 | * |
j3 | 0:81e41ea3f51a | 11 | * The above copyright notice and this permission notice shall be included |
j3 | 0:81e41ea3f51a | 12 | * in all copies or substantial portions of the Software. |
j3 | 0:81e41ea3f51a | 13 | * |
j3 | 0:81e41ea3f51a | 14 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS |
j3 | 0:81e41ea3f51a | 15 | * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF |
j3 | 0:81e41ea3f51a | 16 | * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. |
j3 | 0:81e41ea3f51a | 17 | * IN NO EVENT SHALL MAXIM INTEGRATED BE LIABLE FOR ANY CLAIM, DAMAGES |
j3 | 0:81e41ea3f51a | 18 | * OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, |
j3 | 0:81e41ea3f51a | 19 | * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR |
j3 | 0:81e41ea3f51a | 20 | * OTHER DEALINGS IN THE SOFTWARE. |
j3 | 0:81e41ea3f51a | 21 | * |
j3 | 0:81e41ea3f51a | 22 | * Except as contained in this notice, the name of Maxim Integrated |
j3 | 0:81e41ea3f51a | 23 | * Products, Inc. shall not be used except as stated in the Maxim Integrated |
j3 | 0:81e41ea3f51a | 24 | * Products, Inc. Branding Policy. |
j3 | 0:81e41ea3f51a | 25 | * |
j3 | 0:81e41ea3f51a | 26 | * The mere transfer of this software does not imply any licenses |
j3 | 0:81e41ea3f51a | 27 | * of trade secrets, proprietary technology, copyrights, patents, |
j3 | 0:81e41ea3f51a | 28 | * trademarks, maskwork rights, or any other form of intellectual |
j3 | 0:81e41ea3f51a | 29 | * property whatsoever. Maxim Integrated Products, Inc. retains all |
j3 | 0:81e41ea3f51a | 30 | * ownership rights. |
j3 | 0:81e41ea3f51a | 31 | **********************************************************************/ |
j3 | 0:81e41ea3f51a | 32 | |
j3 | 0:81e41ea3f51a | 33 | |
j3 | 0:81e41ea3f51a | 34 | #include "mbed.h" |
j3 | 0:81e41ea3f51a | 35 | #include "max14871_shield.h" |
j3 | 0:81e41ea3f51a | 36 | |
j3 | 0:81e41ea3f51a | 37 | |
j3 | 0:81e41ea3f51a | 38 | int main(void) |
j3 | 0:81e41ea3f51a | 39 | { |
j3 | 0:81e41ea3f51a | 40 | |
j3 | 0:81e41ea3f51a | 41 | uint8_t idx = 0; |
j3 | 0:81e41ea3f51a | 42 | const uint8_t DELAY = 50; |
j3 | 0:81e41ea3f51a | 43 | const float VREF = 2.0f; |
j3 | 0:81e41ea3f51a | 44 | const float PWM_PERIOD = 0.000025f; //40KHz |
j3 | 0:81e41ea3f51a | 45 | float pwm_duty_cycle = 0.0f; |
j3 | 0:81e41ea3f51a | 46 | |
j3 | 0:81e41ea3f51a | 47 | Max14871_Shield shld(D14, D15, true); |
j3 | 0:81e41ea3f51a | 48 | |
j3 | 0:81e41ea3f51a | 49 | Max14871_Shield::max14871_motor_driver_t MD_ARRAY[] = {Max14871_Shield::MD1, Max14871_Shield::MD2, |
j3 | 0:81e41ea3f51a | 50 | Max14871_Shield::MD3, Max14871_Shield::MD4}; |
j3 | 0:81e41ea3f51a | 51 | |
j3 | 0:81e41ea3f51a | 52 | //configure motor drivers |
j3 | 0:81e41ea3f51a | 53 | for(idx = 0; idx < 4; idx++) |
j3 | 0:81e41ea3f51a | 54 | { |
j3 | 0:81e41ea3f51a | 55 | shld.set_pwm_duty_cycle(MD_ARRAY[idx], pwm_duty_cycle); |
j3 | 0:81e41ea3f51a | 56 | shld.set_pwm_period(MD_ARRAY[idx], PWM_PERIOD); |
j3 | 0:81e41ea3f51a | 57 | shld.set_current_regulation_mode(MD_ARRAY[idx], Max14871_Shield::RIPPLE_25_EXTERNAL_REF, VREF); |
j3 | 0:81e41ea3f51a | 58 | shld.set_operating_mode(MD_ARRAY[idx], Max14871_Shield::BRAKE); |
j3 | 0:81e41ea3f51a | 59 | } |
j3 | 0:81e41ea3f51a | 60 | |
j3 | 0:81e41ea3f51a | 61 | for(idx = 0; idx < 4; idx++) |
j3 | 0:81e41ea3f51a | 62 | { |
j3 | 0:81e41ea3f51a | 63 | shld.set_operating_mode(MD_ARRAY[idx], Max14871_Shield::FORWARD); |
j3 | 0:81e41ea3f51a | 64 | |
j3 | 0:81e41ea3f51a | 65 | //Ramp up |
j3 | 0:81e41ea3f51a | 66 | printf("Ramping up Forward, MD = %d\n", MD_ARRAY[idx]); |
j3 | 0:81e41ea3f51a | 67 | for(pwm_duty_cycle = 0.0; pwm_duty_cycle < 1.0f; pwm_duty_cycle += 0.1f) |
j3 | 0:81e41ea3f51a | 68 | { |
j3 | 0:81e41ea3f51a | 69 | printf("Duty Cycle = %0.2f\n", pwm_duty_cycle); |
j3 | 0:81e41ea3f51a | 70 | shld.set_pwm_duty_cycle(MD_ARRAY[idx], pwm_duty_cycle); |
j3 | 0:81e41ea3f51a | 71 | wait_ms(DELAY); |
j3 | 0:81e41ea3f51a | 72 | } |
j3 | 0:81e41ea3f51a | 73 | |
j3 | 0:81e41ea3f51a | 74 | //100% duty cycle |
j3 | 0:81e41ea3f51a | 75 | printf("Duty Cycle = %0.2f\n", pwm_duty_cycle); |
j3 | 0:81e41ea3f51a | 76 | shld.set_pwm_duty_cycle(MD_ARRAY[idx], pwm_duty_cycle); |
j3 | 0:81e41ea3f51a | 77 | wait_ms(DELAY); |
j3 | 0:81e41ea3f51a | 78 | |
j3 | 0:81e41ea3f51a | 79 | //Ramp down |
j3 | 0:81e41ea3f51a | 80 | printf("Ramping down Forward, MD = %d\n", MD_ARRAY[idx]); |
j3 | 0:81e41ea3f51a | 81 | for(pwm_duty_cycle = 1.0; pwm_duty_cycle > 0.0f; pwm_duty_cycle -= 0.1f) |
j3 | 0:81e41ea3f51a | 82 | { |
j3 | 0:81e41ea3f51a | 83 | printf("Duty Cycle = %0.2f\n", pwm_duty_cycle); |
j3 | 0:81e41ea3f51a | 84 | shld.set_pwm_duty_cycle(MD_ARRAY[idx], pwm_duty_cycle); |
j3 | 0:81e41ea3f51a | 85 | wait_ms(DELAY); |
j3 | 0:81e41ea3f51a | 86 | } |
j3 | 0:81e41ea3f51a | 87 | |
j3 | 0:81e41ea3f51a | 88 | //0% duty cycle |
j3 | 0:81e41ea3f51a | 89 | printf("Duty Cycle = %0.2f\n", pwm_duty_cycle); |
j3 | 0:81e41ea3f51a | 90 | shld.set_pwm_duty_cycle(MD_ARRAY[idx], pwm_duty_cycle); |
j3 | 0:81e41ea3f51a | 91 | wait_ms(DELAY); |
j3 | 0:81e41ea3f51a | 92 | |
j3 | 0:81e41ea3f51a | 93 | shld.set_operating_mode(MD_ARRAY[idx], Max14871_Shield::REVERSE); |
j3 | 0:81e41ea3f51a | 94 | |
j3 | 0:81e41ea3f51a | 95 | //Ramp up |
j3 | 0:81e41ea3f51a | 96 | printf("Ramping up Reverse, MD = %d\n", MD_ARRAY[idx]); |
j3 | 0:81e41ea3f51a | 97 | for(pwm_duty_cycle = 0.0; pwm_duty_cycle < 1.0f; pwm_duty_cycle += 0.1f) |
j3 | 0:81e41ea3f51a | 98 | { |
j3 | 0:81e41ea3f51a | 99 | printf("Duty Cycle = %0.2f\n", pwm_duty_cycle); |
j3 | 0:81e41ea3f51a | 100 | shld.set_pwm_duty_cycle(MD_ARRAY[idx], pwm_duty_cycle); |
j3 | 0:81e41ea3f51a | 101 | wait_ms(DELAY); |
j3 | 0:81e41ea3f51a | 102 | } |
j3 | 0:81e41ea3f51a | 103 | |
j3 | 0:81e41ea3f51a | 104 | //100% duty cycle |
j3 | 0:81e41ea3f51a | 105 | printf("Duty Cycle = %0.2f\n", pwm_duty_cycle); |
j3 | 0:81e41ea3f51a | 106 | shld.set_pwm_duty_cycle(MD_ARRAY[idx], pwm_duty_cycle); |
j3 | 0:81e41ea3f51a | 107 | wait_ms(DELAY); |
j3 | 0:81e41ea3f51a | 108 | |
j3 | 0:81e41ea3f51a | 109 | //Ramp down |
j3 | 0:81e41ea3f51a | 110 | printf("Ramping down Reverse, MD = %d\n", MD_ARRAY[idx]); |
j3 | 0:81e41ea3f51a | 111 | for(pwm_duty_cycle = 1.0f; pwm_duty_cycle > 0.0f; pwm_duty_cycle -= 0.1f) |
j3 | 0:81e41ea3f51a | 112 | { |
j3 | 0:81e41ea3f51a | 113 | printf("Duty Cycle = %0.2f\n", pwm_duty_cycle); |
j3 | 0:81e41ea3f51a | 114 | shld.set_pwm_duty_cycle(MD_ARRAY[idx], pwm_duty_cycle); |
j3 | 0:81e41ea3f51a | 115 | wait_ms(DELAY); |
j3 | 0:81e41ea3f51a | 116 | } |
j3 | 0:81e41ea3f51a | 117 | |
j3 | 0:81e41ea3f51a | 118 | //0% duty cycle |
j3 | 0:81e41ea3f51a | 119 | printf("Duty Cycle = %0.2f\n", pwm_duty_cycle); |
j3 | 0:81e41ea3f51a | 120 | shld.set_pwm_duty_cycle(MD_ARRAY[idx], pwm_duty_cycle); |
j3 | 0:81e41ea3f51a | 121 | wait_ms(DELAY); |
j3 | 0:81e41ea3f51a | 122 | |
j3 | 0:81e41ea3f51a | 123 | shld.set_operating_mode(MD_ARRAY[idx], Max14871_Shield::COAST); |
j3 | 0:81e41ea3f51a | 124 | } |
j3 | 0:81e41ea3f51a | 125 | |
j3 | 0:81e41ea3f51a | 126 | return 0; |
j3 | 0:81e41ea3f51a | 127 | } |