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Diff: targets/cmsis/TARGET_NXP/TARGET_LPC176X/cmsis_nvic.c
- Revision:
- 15:4892fe388435
- Parent:
- 13:0645d8841f51
- Child:
- 183:46ae3190e86c
diff -r 096882eb0961 -r 4892fe388435 targets/cmsis/TARGET_NXP/TARGET_LPC176X/cmsis_nvic.c
--- a/targets/cmsis/TARGET_NXP/TARGET_LPC176X/cmsis_nvic.c Mon Aug 05 14:54:27 2013 +0000
+++ b/targets/cmsis/TARGET_NXP/TARGET_LPC176X/cmsis_nvic.c Wed Aug 07 16:43:59 2013 +0300
@@ -5,7 +5,6 @@
*/
#include "cmsis_nvic.h"
-#define NVIC_NUM_VECTORS (16 + 33) // CORE + MCU Peripherals
#define NVIC_RAM_VECTOR_ADDRESS (0x10000000) // Location of vectors in RAM
#define NVIC_FLASH_VECTOR_ADDRESS (0x0) // Initial vector position in flash
@@ -22,11 +21,11 @@
}
SCB->VTOR = (uint32_t)NVIC_RAM_VECTOR_ADDRESS;
}
- vectors[IRQn + 16] = vector;
+ vectors[IRQn + NVIC_USER_IRQ_OFFSET] = vector;
}
uint32_t NVIC_GetVector(IRQn_Type IRQn) {
uint32_t *vectors = (uint32_t*)SCB->VTOR;
- return vectors[IRQn + 16];
+ return vectors[IRQn + NVIC_USER_IRQ_OFFSET];
}
