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np_driver_spi.c
00001 /* 00002 * np_driver_spi.c 00003 * 00004 * Created on: July 14, 2016 00005 * Author: Alan.Lin 00006 * 00007 * Copyright: NexPack Ltd. 00008 */ 00009 00010 #include "np_config.h" 00011 #include "spis.h" 00012 #include "np_driver_spi.h" 00013 #include "np_app_spi.h" 00014 00015 int driver_spi_slave_initial(void){ 00016 uint8_t spis_req_value = 0x10; 00017 //IO INITIAL 00018 MXC_IOMAN->spis_req = spis_req_value; 00019 //IO initial IS OK 00020 if(spis_req_value != MXC_IOMAN->spis_ack){ 00021 return E_BUSY; 00022 } 00023 CLKMAN_SetClkScale((clkman_clk_t)(CLKMAN_CLK_SPIS), CLKMAN_SCALE_DIV_1); 00024 00025 //spis function intial 00026 MXC_SPIS->gen_ctrl = 0; 00027 MXC_SPIS->gen_ctrl = (MXC_F_SPIS_GEN_CTRL_SPI_SLAVE_EN | MXC_F_SPIS_GEN_CTRL_TX_FIFO_EN | 00028 MXC_F_SPIS_GEN_CTRL_RX_FIFO_EN |(0x01 << MXC_F_SPIS_GEN_CTRL_SPI_MODE_POS)); 00029 00030 MXC_SPIS_FIFO->tx_8[0] = '$'; //keep first TX byte of next communication is '$'.Meaningless on here 00031 00032 MXC_SPIS->fifo_ctrl &= (~MXC_F_SPIS_FIFO_CTRL_RX_FIFO_AF_LVL); 00033 MXC_SPIS->fifo_ctrl |= (0x0 << MXC_F_SPIS_FIFO_CTRL_RX_FIFO_AF_LVL_POS); 00034 00035 MXC_SPIS->inten = MXC_F_SPIS_INTEN_RX_FIFO_AF;// | MXC_F_SPIS_INTEN_TX_FIFO_AE; 00036 NVIC_EnableIRQ(SPIS_IRQn); 00037 00038 return E_NO_ERROR; 00039 } 00040 00041 void np_driver_spis_put_byte_to_tx_buff(uint8_t t_tx_byte){ 00042 MXC_SPIS_FIFO->tx_8[0] = t_tx_byte; 00043 } 00044 00045 //------------------------interrupt function--------------------------------- 00046 void SPIS_IRQHandler(void){ 00047 uint32_t spis_int_flags = MXC_SPIS->intfl; 00048 00049 if (spis_int_flags & MXC_F_SPIS_INTFL_RX_FIFO_AF) { 00050 // Check for data 00051 while(MXC_SPIS->fifo_stat & MXC_F_SPIS_FIFO_STAT_RX_FIFO_USED) { 00052 np_app_spis_message(MXC_SPIS_FIFO->rx_8[0]); 00053 } 00054 MXC_SPIS->intfl = MXC_F_SPIS_INTFL_RX_FIFO_AF; 00055 } 00056 }
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