Library for MAX30101, read/write functions for registers implemented.
Dependents: test_MAX30101 testSensor
MAX30101.cpp@4:c6761ad52524, 2017-03-27 (annotated)
- Committer:
- Rhyme
- Date:
- Mon Mar 27 07:10:39 2017 +0000
- Revision:
- 4:c6761ad52524
- Parent:
- 2:c465a8d44b9a
- Child:
- 5:7e7ad1807454
Descriptions added
Who changed what in which revision?
User | Revision | Line number | New contents of line |
---|---|---|---|
Rhyme | 0:4ad9373787e8 | 1 | /** |
Rhyme | 0:4ad9373787e8 | 2 | * MAX30101 |
Rhyme | 0:4ad9373787e8 | 3 | * High-Sensitivity Pulse Oximeter and |
Rhyme | 0:4ad9373787e8 | 4 | * Heart-Rate Sensor for Wearable Health |
Rhyme | 0:4ad9373787e8 | 5 | */ |
Rhyme | 0:4ad9373787e8 | 6 | #include "mbed.h" |
Rhyme | 0:4ad9373787e8 | 7 | #include "MAX30101.h" |
Rhyme | 0:4ad9373787e8 | 8 | |
Rhyme | 0:4ad9373787e8 | 9 | /* Status */ |
Rhyme | 0:4ad9373787e8 | 10 | #define REG_INT_MSB 0x00 /* Interrupt Status 1 */ |
Rhyme | 0:4ad9373787e8 | 11 | #define REG_INT_LSB 0x01 /* Interrupt Status 2 */ |
Rhyme | 0:4ad9373787e8 | 12 | #define REG_INT_ENB_MSB 0x02 /* Interrupt Enable 1 */ |
Rhyme | 0:4ad9373787e8 | 13 | #define REG_INT_ENB_LSB 0x03 /* Interrupt Enable 2 */ |
Rhyme | 0:4ad9373787e8 | 14 | /* FIFO */ |
Rhyme | 0:4ad9373787e8 | 15 | #define REG_FIFO_WR_PTR 0x04 /* FIFO Write Pointer */ |
Rhyme | 0:4ad9373787e8 | 16 | #define REG_OVF_COUNTER 0x05 /* Overflow Counter */ |
Rhyme | 0:4ad9373787e8 | 17 | #define REG_FIFO_RD_PTR 0x06 /* FIFO Read Pointer */ |
Rhyme | 0:4ad9373787e8 | 18 | #define REG_FIFO_DATA 0x07 /* FIFO Data Register */ |
Rhyme | 0:4ad9373787e8 | 19 | /* Configuration */ |
Rhyme | 0:4ad9373787e8 | 20 | #define REG_FIFO_CONFIG 0x08 /* FIFO Configuration */ |
Rhyme | 0:4ad9373787e8 | 21 | #define REG_MODE_CONFIG 0x09 /* Mode Configuration */ |
Rhyme | 0:4ad9373787e8 | 22 | #define REG_SPO2_CONFIG 0x0A /* SpO2 Configuration */ |
Rhyme | 0:4ad9373787e8 | 23 | /* reserved 0x0B */ |
Rhyme | 0:4ad9373787e8 | 24 | #define REG_LED1_PA 0x0C /* LED Pulse Amplitude 1 */ |
Rhyme | 0:4ad9373787e8 | 25 | #define REG_LED2_PA 0x0D /* LED Pulse Amplitude 2 */ |
Rhyme | 0:4ad9373787e8 | 26 | #define REG_LED3_PA 0x0E /* LED Pulse Amplitude 3 */ |
Rhyme | 0:4ad9373787e8 | 27 | /* reserved 0x0F */ |
Rhyme | 0:4ad9373787e8 | 28 | #define REG_PILOT_PA 0x10 /* Proximity LED Pulse Amplitude */ |
Rhyme | 0:4ad9373787e8 | 29 | #define REG_SLOT_MSB 0x11 /* Multi-LED Mode Control Registers 2, 1 */ |
Rhyme | 0:4ad9373787e8 | 30 | #define REG_SLOT_LSB 0x12 /* Multi-LED Mode Control Registers 4, 3 */ |
Rhyme | 0:4ad9373787e8 | 31 | /* DIE Temperature */ |
Rhyme | 0:4ad9373787e8 | 32 | #define REG_TEMP_INT 0x1F /* Die Temperature Integer */ |
Rhyme | 0:4ad9373787e8 | 33 | #define REG_TEMP_FRAC 0x20 /* Die Temperature Fraction */ |
Rhyme | 0:4ad9373787e8 | 34 | #define REG_TEMP_EN 0x21 /* Die Temperature Config */ |
Rhyme | 0:4ad9373787e8 | 35 | /* Proximity Function */ |
Rhyme | 1:fc677d82d0f1 | 36 | #define REG_PROX_INT_THR 0x30 /* Proximity Interrupt Threshold */ |
Rhyme | 0:4ad9373787e8 | 37 | /* Part ID */ |
Rhyme | 0:4ad9373787e8 | 38 | #define REG_REV_ID 0xFE /* Revision ID */ |
Rhyme | 0:4ad9373787e8 | 39 | #define REG_PART_ID 0xFF /* Part ID: 0x15 */ |
Rhyme | 2:c465a8d44b9a | 40 | /* Depth of FIFO */ |
Rhyme | 2:c465a8d44b9a | 41 | #define FIFO_DEPTH 32 |
Rhyme | 0:4ad9373787e8 | 42 | |
Rhyme | 0:4ad9373787e8 | 43 | MAX30101::MAX30101(PinName sda, PinName scl, int addr) : m_i2c(sda, scl), m_addr(addr<<1) { |
Rhyme | 0:4ad9373787e8 | 44 | // activate the peripheral |
Rhyme | 0:4ad9373787e8 | 45 | } |
Rhyme | 0:4ad9373787e8 | 46 | |
Rhyme | 0:4ad9373787e8 | 47 | MAX30101::~MAX30101() { } |
Rhyme | 0:4ad9373787e8 | 48 | |
Rhyme | 0:4ad9373787e8 | 49 | void MAX30101::readRegs(int addr, uint8_t * data, int len) { |
Rhyme | 0:4ad9373787e8 | 50 | char t[1] = {addr} ; |
Rhyme | 0:4ad9373787e8 | 51 | m_i2c.write(m_addr, t, 1, true) ; |
Rhyme | 0:4ad9373787e8 | 52 | m_i2c.read(m_addr, (char*)data, len) ; |
Rhyme | 0:4ad9373787e8 | 53 | } |
Rhyme | 0:4ad9373787e8 | 54 | |
Rhyme | 0:4ad9373787e8 | 55 | void MAX30101::writeRegs(uint8_t * data, int len) { |
Rhyme | 0:4ad9373787e8 | 56 | m_i2c.write(m_addr, (char *)data, len) ; |
Rhyme | 0:4ad9373787e8 | 57 | } |
Rhyme | 0:4ad9373787e8 | 58 | |
Rhyme | 0:4ad9373787e8 | 59 | uint8_t MAX30101::getID(void) |
Rhyme | 0:4ad9373787e8 | 60 | { |
Rhyme | 0:4ad9373787e8 | 61 | uint8_t id ; |
Rhyme | 0:4ad9373787e8 | 62 | readRegs(REG_PART_ID, &id, 1) ; |
Rhyme | 0:4ad9373787e8 | 63 | return( id ) ; |
Rhyme | 0:4ad9373787e8 | 64 | } |
Rhyme | 0:4ad9373787e8 | 65 | |
Rhyme | 0:4ad9373787e8 | 66 | uint8_t MAX30101::getRev(void) |
Rhyme | 0:4ad9373787e8 | 67 | { |
Rhyme | 0:4ad9373787e8 | 68 | uint8_t rev ; |
Rhyme | 0:4ad9373787e8 | 69 | readRegs(REG_REV_ID, &rev, 1) ; |
Rhyme | 0:4ad9373787e8 | 70 | return( rev ) ; |
Rhyme | 1:fc677d82d0f1 | 71 | } |
Rhyme | 1:fc677d82d0f1 | 72 | |
Rhyme | 1:fc677d82d0f1 | 73 | uint16_t MAX30101::getIntStatus(void) |
Rhyme | 1:fc677d82d0f1 | 74 | { |
Rhyme | 1:fc677d82d0f1 | 75 | uint8_t res[2] ; |
Rhyme | 1:fc677d82d0f1 | 76 | uint16_t value ; |
Rhyme | 1:fc677d82d0f1 | 77 | readRegs(REG_INT_MSB, res, 2) ; |
Rhyme | 1:fc677d82d0f1 | 78 | value = (res[0] << 8) | res[1] ; |
Rhyme | 1:fc677d82d0f1 | 79 | return( value ) ; |
Rhyme | 1:fc677d82d0f1 | 80 | } |
Rhyme | 1:fc677d82d0f1 | 81 | |
Rhyme | 2:c465a8d44b9a | 82 | uint16_t MAX30101::getIntEnable(void) |
Rhyme | 2:c465a8d44b9a | 83 | { |
Rhyme | 2:c465a8d44b9a | 84 | uint8_t res[2] ; |
Rhyme | 2:c465a8d44b9a | 85 | uint16_t value ; |
Rhyme | 2:c465a8d44b9a | 86 | readRegs(REG_INT_ENB_MSB, res, 2) ; |
Rhyme | 2:c465a8d44b9a | 87 | value = (res[0] << 8) | res[1] ; |
Rhyme | 2:c465a8d44b9a | 88 | return( value ) ; |
Rhyme | 2:c465a8d44b9a | 89 | } |
Rhyme | 2:c465a8d44b9a | 90 | |
Rhyme | 1:fc677d82d0f1 | 91 | void MAX30101::setIntEnable(uint16_t mask) |
Rhyme | 1:fc677d82d0f1 | 92 | { |
Rhyme | 1:fc677d82d0f1 | 93 | uint8_t res[3] ; |
Rhyme | 2:c465a8d44b9a | 94 | res[0] = REG_INT_ENB_MSB ; |
Rhyme | 1:fc677d82d0f1 | 95 | res[1] = (mask >> 8) & 0xFF ; |
Rhyme | 1:fc677d82d0f1 | 96 | res[2] = (mask & 0xFF) ; |
Rhyme | 1:fc677d82d0f1 | 97 | writeRegs(res, 3) ; |
Rhyme | 1:fc677d82d0f1 | 98 | } |
Rhyme | 1:fc677d82d0f1 | 99 | |
Rhyme | 1:fc677d82d0f1 | 100 | uint8_t MAX30101::getFIFO_WR_PTR(void) |
Rhyme | 1:fc677d82d0f1 | 101 | { |
Rhyme | 1:fc677d82d0f1 | 102 | uint8_t data ; |
Rhyme | 1:fc677d82d0f1 | 103 | readRegs(REG_FIFO_WR_PTR, &data, 1) ; |
Rhyme | 1:fc677d82d0f1 | 104 | return( data ) ; |
Rhyme | 1:fc677d82d0f1 | 105 | } |
Rhyme | 1:fc677d82d0f1 | 106 | |
Rhyme | 1:fc677d82d0f1 | 107 | void MAX30101::setFIFO_WR_PTR(uint8_t data) |
Rhyme | 1:fc677d82d0f1 | 108 | { |
Rhyme | 1:fc677d82d0f1 | 109 | uint8_t res[2] ; |
Rhyme | 1:fc677d82d0f1 | 110 | res[0] = REG_FIFO_WR_PTR ; |
Rhyme | 1:fc677d82d0f1 | 111 | res[1] = data ; |
Rhyme | 1:fc677d82d0f1 | 112 | writeRegs(res, 2) ; |
Rhyme | 1:fc677d82d0f1 | 113 | } |
Rhyme | 1:fc677d82d0f1 | 114 | |
Rhyme | 1:fc677d82d0f1 | 115 | uint8_t MAX30101::getOVF_COUNTER(void) |
Rhyme | 1:fc677d82d0f1 | 116 | { |
Rhyme | 1:fc677d82d0f1 | 117 | uint8_t data ; |
Rhyme | 1:fc677d82d0f1 | 118 | readRegs(REG_OVF_COUNTER, &data, 1) ; |
Rhyme | 1:fc677d82d0f1 | 119 | return( data ) ; |
Rhyme | 1:fc677d82d0f1 | 120 | } |
Rhyme | 1:fc677d82d0f1 | 121 | |
Rhyme | 1:fc677d82d0f1 | 122 | void MAX30101::setOVF_COUNTER(uint8_t data) |
Rhyme | 1:fc677d82d0f1 | 123 | { |
Rhyme | 1:fc677d82d0f1 | 124 | uint8_t res[2] ; |
Rhyme | 1:fc677d82d0f1 | 125 | res[0] = REG_OVF_COUNTER ; |
Rhyme | 1:fc677d82d0f1 | 126 | res[1] = data ; |
Rhyme | 1:fc677d82d0f1 | 127 | writeRegs(res, 2) ; |
Rhyme | 1:fc677d82d0f1 | 128 | } |
Rhyme | 1:fc677d82d0f1 | 129 | |
Rhyme | 1:fc677d82d0f1 | 130 | uint8_t MAX30101::getFIFO_RD_PTR(void) |
Rhyme | 1:fc677d82d0f1 | 131 | { |
Rhyme | 1:fc677d82d0f1 | 132 | uint8_t data ; |
Rhyme | 1:fc677d82d0f1 | 133 | readRegs(REG_FIFO_RD_PTR, &data, 1) ; |
Rhyme | 1:fc677d82d0f1 | 134 | return( data ) ; |
Rhyme | 1:fc677d82d0f1 | 135 | } |
Rhyme | 1:fc677d82d0f1 | 136 | |
Rhyme | 1:fc677d82d0f1 | 137 | void MAX30101::setFIFO_RD_PTR(uint8_t data) |
Rhyme | 1:fc677d82d0f1 | 138 | { |
Rhyme | 1:fc677d82d0f1 | 139 | uint8_t res[2] ; |
Rhyme | 1:fc677d82d0f1 | 140 | res[0] = REG_FIFO_RD_PTR ; |
Rhyme | 1:fc677d82d0f1 | 141 | res[1] = data ; |
Rhyme | 1:fc677d82d0f1 | 142 | writeRegs(res, 2) ; |
Rhyme | 1:fc677d82d0f1 | 143 | } |
Rhyme | 1:fc677d82d0f1 | 144 | |
Rhyme | 1:fc677d82d0f1 | 145 | uint8_t MAX30101::getFIFO_DATA(void) |
Rhyme | 1:fc677d82d0f1 | 146 | { |
Rhyme | 1:fc677d82d0f1 | 147 | uint8_t data ; |
Rhyme | 1:fc677d82d0f1 | 148 | readRegs(REG_FIFO_DATA, &data, 1) ; |
Rhyme | 1:fc677d82d0f1 | 149 | return( data ) ; |
Rhyme | 1:fc677d82d0f1 | 150 | } |
Rhyme | 1:fc677d82d0f1 | 151 | |
Rhyme | 1:fc677d82d0f1 | 152 | void MAX30101::setFIFO_DATA(uint8_t data) |
Rhyme | 1:fc677d82d0f1 | 153 | { |
Rhyme | 1:fc677d82d0f1 | 154 | uint8_t res[2] ; |
Rhyme | 1:fc677d82d0f1 | 155 | res[0] = REG_FIFO_DATA ; |
Rhyme | 1:fc677d82d0f1 | 156 | res[1] = data ; |
Rhyme | 1:fc677d82d0f1 | 157 | writeRegs(res, 2) ; |
Rhyme | 1:fc677d82d0f1 | 158 | } |
Rhyme | 1:fc677d82d0f1 | 159 | |
Rhyme | 1:fc677d82d0f1 | 160 | uint8_t MAX30101::getFIFO_CONFIG(void) |
Rhyme | 1:fc677d82d0f1 | 161 | { |
Rhyme | 1:fc677d82d0f1 | 162 | uint8_t data ; |
Rhyme | 1:fc677d82d0f1 | 163 | readRegs(REG_FIFO_CONFIG, &data, 1) ; |
Rhyme | 1:fc677d82d0f1 | 164 | return( data ) ; |
Rhyme | 1:fc677d82d0f1 | 165 | } |
Rhyme | 1:fc677d82d0f1 | 166 | |
Rhyme | 1:fc677d82d0f1 | 167 | void MAX30101::setFIFO_CONFIG(uint8_t data) |
Rhyme | 1:fc677d82d0f1 | 168 | { |
Rhyme | 1:fc677d82d0f1 | 169 | uint8_t res[2] ; |
Rhyme | 1:fc677d82d0f1 | 170 | res[0] = REG_FIFO_CONFIG ; |
Rhyme | 1:fc677d82d0f1 | 171 | res[1] = data ; |
Rhyme | 1:fc677d82d0f1 | 172 | writeRegs(res, 2) ; |
Rhyme | 1:fc677d82d0f1 | 173 | } |
Rhyme | 1:fc677d82d0f1 | 174 | |
Rhyme | 1:fc677d82d0f1 | 175 | uint8_t MAX30101::getMODE_CONFIG(void) |
Rhyme | 1:fc677d82d0f1 | 176 | { |
Rhyme | 1:fc677d82d0f1 | 177 | uint8_t data ; |
Rhyme | 1:fc677d82d0f1 | 178 | readRegs(REG_MODE_CONFIG, &data, 1) ; |
Rhyme | 1:fc677d82d0f1 | 179 | return( data ) ; |
Rhyme | 1:fc677d82d0f1 | 180 | } |
Rhyme | 1:fc677d82d0f1 | 181 | |
Rhyme | 1:fc677d82d0f1 | 182 | void MAX30101::setMODE_CONFIG(uint8_t data) |
Rhyme | 1:fc677d82d0f1 | 183 | { |
Rhyme | 1:fc677d82d0f1 | 184 | uint8_t res[2] ; |
Rhyme | 1:fc677d82d0f1 | 185 | res[0] = REG_MODE_CONFIG ; |
Rhyme | 1:fc677d82d0f1 | 186 | res[1] = data ; |
Rhyme | 1:fc677d82d0f1 | 187 | writeRegs(res, 2) ; |
Rhyme | 1:fc677d82d0f1 | 188 | } |
Rhyme | 1:fc677d82d0f1 | 189 | |
Rhyme | 1:fc677d82d0f1 | 190 | uint8_t MAX30101::getSPO2_CONFIG(void) |
Rhyme | 1:fc677d82d0f1 | 191 | { |
Rhyme | 1:fc677d82d0f1 | 192 | uint8_t data ; |
Rhyme | 1:fc677d82d0f1 | 193 | readRegs(REG_SPO2_CONFIG, &data, 1) ; |
Rhyme | 1:fc677d82d0f1 | 194 | return( data ) ; |
Rhyme | 1:fc677d82d0f1 | 195 | } |
Rhyme | 1:fc677d82d0f1 | 196 | |
Rhyme | 1:fc677d82d0f1 | 197 | void MAX30101::setSPO2_CONFIG(uint8_t data) |
Rhyme | 1:fc677d82d0f1 | 198 | { |
Rhyme | 1:fc677d82d0f1 | 199 | uint8_t res[2] ; |
Rhyme | 1:fc677d82d0f1 | 200 | res[0] = REG_SPO2_CONFIG ; |
Rhyme | 1:fc677d82d0f1 | 201 | res[1] = data ; |
Rhyme | 1:fc677d82d0f1 | 202 | writeRegs(res, 2) ; |
Rhyme | 1:fc677d82d0f1 | 203 | } |
Rhyme | 1:fc677d82d0f1 | 204 | |
Rhyme | 1:fc677d82d0f1 | 205 | uint8_t MAX30101::getLED1_PA(void) |
Rhyme | 1:fc677d82d0f1 | 206 | { |
Rhyme | 1:fc677d82d0f1 | 207 | uint8_t data ; |
Rhyme | 1:fc677d82d0f1 | 208 | readRegs(REG_LED1_PA, &data, 1) ; |
Rhyme | 1:fc677d82d0f1 | 209 | return( data ) ; |
Rhyme | 1:fc677d82d0f1 | 210 | } |
Rhyme | 1:fc677d82d0f1 | 211 | |
Rhyme | 1:fc677d82d0f1 | 212 | void MAX30101::setLED1_PA(uint8_t data) |
Rhyme | 1:fc677d82d0f1 | 213 | { |
Rhyme | 1:fc677d82d0f1 | 214 | uint8_t res[2] ; |
Rhyme | 1:fc677d82d0f1 | 215 | res[0] = REG_LED1_PA ; |
Rhyme | 1:fc677d82d0f1 | 216 | res[1] = data ; |
Rhyme | 1:fc677d82d0f1 | 217 | writeRegs(res, 2) ; |
Rhyme | 1:fc677d82d0f1 | 218 | } |
Rhyme | 1:fc677d82d0f1 | 219 | |
Rhyme | 1:fc677d82d0f1 | 220 | uint8_t MAX30101::getLED2_PA(void) |
Rhyme | 1:fc677d82d0f1 | 221 | { |
Rhyme | 1:fc677d82d0f1 | 222 | uint8_t data ; |
Rhyme | 1:fc677d82d0f1 | 223 | readRegs(REG_LED2_PA, &data, 1) ; |
Rhyme | 1:fc677d82d0f1 | 224 | return( data ) ; |
Rhyme | 1:fc677d82d0f1 | 225 | } |
Rhyme | 1:fc677d82d0f1 | 226 | |
Rhyme | 1:fc677d82d0f1 | 227 | void MAX30101::setLED2_PA(uint8_t data) |
Rhyme | 1:fc677d82d0f1 | 228 | { |
Rhyme | 1:fc677d82d0f1 | 229 | uint8_t res[2] ; |
Rhyme | 1:fc677d82d0f1 | 230 | res[0] = REG_LED2_PA ; |
Rhyme | 1:fc677d82d0f1 | 231 | res[1] = data ; |
Rhyme | 1:fc677d82d0f1 | 232 | writeRegs(res, 2) ; |
Rhyme | 1:fc677d82d0f1 | 233 | } |
Rhyme | 1:fc677d82d0f1 | 234 | |
Rhyme | 1:fc677d82d0f1 | 235 | uint8_t MAX30101::getLED3_PA(void) |
Rhyme | 1:fc677d82d0f1 | 236 | { |
Rhyme | 1:fc677d82d0f1 | 237 | uint8_t data ; |
Rhyme | 1:fc677d82d0f1 | 238 | readRegs(REG_LED3_PA, &data, 1) ; |
Rhyme | 1:fc677d82d0f1 | 239 | return( data ) ; |
Rhyme | 1:fc677d82d0f1 | 240 | } |
Rhyme | 1:fc677d82d0f1 | 241 | |
Rhyme | 1:fc677d82d0f1 | 242 | void MAX30101::setLED3_PA(uint8_t data) |
Rhyme | 1:fc677d82d0f1 | 243 | { |
Rhyme | 1:fc677d82d0f1 | 244 | uint8_t res[2] ; |
Rhyme | 1:fc677d82d0f1 | 245 | res[0] = REG_LED3_PA ; |
Rhyme | 1:fc677d82d0f1 | 246 | res[1] = data ; |
Rhyme | 1:fc677d82d0f1 | 247 | writeRegs(res, 2) ; |
Rhyme | 1:fc677d82d0f1 | 248 | } |
Rhyme | 1:fc677d82d0f1 | 249 | |
Rhyme | 1:fc677d82d0f1 | 250 | uint8_t MAX30101::getPILOT_PA(void) |
Rhyme | 1:fc677d82d0f1 | 251 | { |
Rhyme | 1:fc677d82d0f1 | 252 | uint8_t data ; |
Rhyme | 1:fc677d82d0f1 | 253 | readRegs(REG_PILOT_PA, &data, 1) ; |
Rhyme | 1:fc677d82d0f1 | 254 | return( data ) ; |
Rhyme | 1:fc677d82d0f1 | 255 | } |
Rhyme | 1:fc677d82d0f1 | 256 | |
Rhyme | 1:fc677d82d0f1 | 257 | void MAX30101::setPILOT_PA(uint8_t data) |
Rhyme | 1:fc677d82d0f1 | 258 | { |
Rhyme | 1:fc677d82d0f1 | 259 | uint8_t res[2] ; |
Rhyme | 1:fc677d82d0f1 | 260 | res[0] = REG_PILOT_PA ; |
Rhyme | 1:fc677d82d0f1 | 261 | res[1] = data ; |
Rhyme | 1:fc677d82d0f1 | 262 | writeRegs(res, 2) ; |
Rhyme | 1:fc677d82d0f1 | 263 | } |
Rhyme | 1:fc677d82d0f1 | 264 | |
Rhyme | 1:fc677d82d0f1 | 265 | uint16_t MAX30101::getSLOT(void) |
Rhyme | 1:fc677d82d0f1 | 266 | { |
Rhyme | 1:fc677d82d0f1 | 267 | uint8_t res[2] ; |
Rhyme | 1:fc677d82d0f1 | 268 | uint16_t data ; |
Rhyme | 1:fc677d82d0f1 | 269 | readRegs(REG_SLOT_MSB, res, 2) ; |
Rhyme | 1:fc677d82d0f1 | 270 | data = (res[0] << 8) | res[1] ; |
Rhyme | 1:fc677d82d0f1 | 271 | return( data ) ; |
Rhyme | 1:fc677d82d0f1 | 272 | } |
Rhyme | 1:fc677d82d0f1 | 273 | |
Rhyme | 1:fc677d82d0f1 | 274 | void MAX30101::setSLOT(uint16_t data) |
Rhyme | 1:fc677d82d0f1 | 275 | { |
Rhyme | 1:fc677d82d0f1 | 276 | uint8_t res[3] ; |
Rhyme | 1:fc677d82d0f1 | 277 | res[0] = REG_SLOT_MSB ; |
Rhyme | 1:fc677d82d0f1 | 278 | res[1] = (data >> 8) & 0xFF ; |
Rhyme | 1:fc677d82d0f1 | 279 | res[2] = data & 0xFF ; |
Rhyme | 1:fc677d82d0f1 | 280 | writeRegs(res, 3) ; |
Rhyme | 1:fc677d82d0f1 | 281 | } |
Rhyme | 1:fc677d82d0f1 | 282 | |
Rhyme | 1:fc677d82d0f1 | 283 | uint8_t MAX30101::getTEMP_INT(void) |
Rhyme | 1:fc677d82d0f1 | 284 | { |
Rhyme | 1:fc677d82d0f1 | 285 | uint8_t data ; |
Rhyme | 1:fc677d82d0f1 | 286 | readRegs(REG_TEMP_INT, &data, 1) ; |
Rhyme | 1:fc677d82d0f1 | 287 | return( data ) ; |
Rhyme | 1:fc677d82d0f1 | 288 | } |
Rhyme | 1:fc677d82d0f1 | 289 | |
Rhyme | 2:c465a8d44b9a | 290 | uint8_t MAX30101::getTEMP_FRAC(void) |
Rhyme | 1:fc677d82d0f1 | 291 | { |
Rhyme | 1:fc677d82d0f1 | 292 | uint8_t data ; |
Rhyme | 1:fc677d82d0f1 | 293 | readRegs(REG_TEMP_FRAC, &data, 1) ; |
Rhyme | 1:fc677d82d0f1 | 294 | return( data ) ; |
Rhyme | 1:fc677d82d0f1 | 295 | } |
Rhyme | 1:fc677d82d0f1 | 296 | |
Rhyme | 1:fc677d82d0f1 | 297 | uint8_t MAX30101::getTEMP_EN(void) |
Rhyme | 1:fc677d82d0f1 | 298 | { |
Rhyme | 1:fc677d82d0f1 | 299 | uint8_t data ; |
Rhyme | 1:fc677d82d0f1 | 300 | readRegs(REG_TEMP_EN, &data, 1) ; |
Rhyme | 1:fc677d82d0f1 | 301 | return( data ) ; |
Rhyme | 1:fc677d82d0f1 | 302 | } |
Rhyme | 1:fc677d82d0f1 | 303 | |
Rhyme | 2:c465a8d44b9a | 304 | float MAX30101::getTEMP(void) |
Rhyme | 2:c465a8d44b9a | 305 | { |
Rhyme | 2:c465a8d44b9a | 306 | float temp ; |
Rhyme | 2:c465a8d44b9a | 307 | int temp_int, temp_frac ; |
Rhyme | 2:c465a8d44b9a | 308 | setTEMP_EN() ; |
Rhyme | 2:c465a8d44b9a | 309 | while(getTEMP_EN() == 0x01) { } |
Rhyme | 2:c465a8d44b9a | 310 | temp_int = getTEMP_INT() ; |
Rhyme | 2:c465a8d44b9a | 311 | temp_frac = getTEMP_FRAC() ; |
Rhyme | 2:c465a8d44b9a | 312 | temp = ((float)temp_int)+(((float)temp_frac)/16.0) ; |
Rhyme | 2:c465a8d44b9a | 313 | return( temp ) ; |
Rhyme | 2:c465a8d44b9a | 314 | } |
Rhyme | 2:c465a8d44b9a | 315 | |
Rhyme | 1:fc677d82d0f1 | 316 | uint8_t MAX30101::getPROX_INT_THR(void) |
Rhyme | 1:fc677d82d0f1 | 317 | { |
Rhyme | 1:fc677d82d0f1 | 318 | uint8_t data ; |
Rhyme | 1:fc677d82d0f1 | 319 | readRegs(REG_PROX_INT_THR, &data, 1) ; |
Rhyme | 1:fc677d82d0f1 | 320 | return( data ) ; |
Rhyme | 1:fc677d82d0f1 | 321 | } |
Rhyme | 1:fc677d82d0f1 | 322 | |
Rhyme | 1:fc677d82d0f1 | 323 | void MAX30101::setPROX_INT_THR(uint8_t data) |
Rhyme | 1:fc677d82d0f1 | 324 | { |
Rhyme | 1:fc677d82d0f1 | 325 | uint8_t res[2] ; |
Rhyme | 1:fc677d82d0f1 | 326 | res[0] = REG_PROX_INT_THR ; |
Rhyme | 1:fc677d82d0f1 | 327 | res[1] = data ; |
Rhyme | 1:fc677d82d0f1 | 328 | writeRegs(res, 2) ; |
Rhyme | 1:fc677d82d0f1 | 329 | } |
Rhyme | 1:fc677d82d0f1 | 330 | |
Rhyme | 2:c465a8d44b9a | 331 | void MAX30101::clearFIFO(void) |
Rhyme | 2:c465a8d44b9a | 332 | { |
Rhyme | 2:c465a8d44b9a | 333 | uint8_t res[5] ; |
Rhyme | 2:c465a8d44b9a | 334 | res[0] = REG_FIFO_WR_PTR ; |
Rhyme | 2:c465a8d44b9a | 335 | res[1] = 0x00 ; /* FIFO_WR_PTR */ |
Rhyme | 2:c465a8d44b9a | 336 | res[2] = 0x00 ; /* OVF_COUNTER */ |
Rhyme | 2:c465a8d44b9a | 337 | res[3] = 0x00 ; /* FIFO_RD_PTR */ |
Rhyme | 2:c465a8d44b9a | 338 | res[4] = 0x00 ; /* FIFO_DATA (do we need to clear this?) */ |
Rhyme | 2:c465a8d44b9a | 339 | writeRegs(res, 5) ; |
Rhyme | 2:c465a8d44b9a | 340 | } |
Rhyme | 2:c465a8d44b9a | 341 | |
Rhyme | 2:c465a8d44b9a | 342 | /** |
Rhyme | 2:c465a8d44b9a | 343 | * readFIFO(void) |
Rhyme | 2:c465a8d44b9a | 344 | * FIFO data is always a 3-bytes data |
Rhyme | 2:c465a8d44b9a | 345 | * byte1[1:0] : FIFO_DATA[17]-FIFO_DATA[16] |
Rhyme | 2:c465a8d44b9a | 346 | * byte2[7:0] : FIFO_DATA[15]-FIFO_DATA[8] |
Rhyme | 2:c465a8d44b9a | 347 | * byte3[7:0] : FIFO_DATA[7]-FIFO_DATA[0] |
Rhyme | 2:c465a8d44b9a | 348 | * The data is left aligned, so FIFO_DATA[17] |
Rhyme | 2:c465a8d44b9a | 349 | * is always MSB, although the data length |
Rhyme | 2:c465a8d44b9a | 350 | * can be 18-bit ~ 15-bit |
Rhyme | 2:c465a8d44b9a | 351 | */ |
Rhyme | 2:c465a8d44b9a | 352 | uint32_t MAX30101::readFIFO(void) |
Rhyme | 2:c465a8d44b9a | 353 | { |
Rhyme | 2:c465a8d44b9a | 354 | uint32_t data = 0 ; |
Rhyme | 2:c465a8d44b9a | 355 | uint8_t res[3] ; |
Rhyme | 2:c465a8d44b9a | 356 | readRegs(REG_FIFO_DATA, res, 3) ; |
Rhyme | 2:c465a8d44b9a | 357 | data = |
Rhyme | 2:c465a8d44b9a | 358 | ((res[0] & 0x03)<<16) |
Rhyme | 2:c465a8d44b9a | 359 | | (res[1] << 8) |
Rhyme | 2:c465a8d44b9a | 360 | | res[2] ; |
Rhyme | 2:c465a8d44b9a | 361 | return( data ) ; |
Rhyme | 2:c465a8d44b9a | 362 | } |
Rhyme | 2:c465a8d44b9a | 363 | |
Rhyme | 2:c465a8d44b9a | 364 | void MAX30101::reset(void) |
Rhyme | 2:c465a8d44b9a | 365 | { |
Rhyme | 2:c465a8d44b9a | 366 | uint8_t res[2] ; |
Rhyme | 2:c465a8d44b9a | 367 | res[0] = REG_MODE_CONFIG ; |
Rhyme | 2:c465a8d44b9a | 368 | res[1] = 0x40 ; /* reset */ |
Rhyme | 2:c465a8d44b9a | 369 | writeRegs(res, 2) ; |
Rhyme | 2:c465a8d44b9a | 370 | } |