Maxim DS1683 Total-Elapsed -Time and Event Recorder with Alarm
DS1683.cpp@2:f262ba460525, 2017-04-12 (annotated)
- Committer:
- Rhyme
- Date:
- Wed Apr 12 07:22:55 2017 +0000
- Revision:
- 2:f262ba460525
- Parent:
- 1:8fa5400054bd
additional stops in write removed
Who changed what in which revision?
User | Revision | Line number | New contents of line |
---|---|---|---|
Rhyme | 0:7c0469e71fa2 | 1 | #include "mbed.h" |
Rhyme | 0:7c0469e71fa2 | 2 | #include "DS1683.h" |
Rhyme | 0:7c0469e71fa2 | 3 | |
Rhyme | 0:7c0469e71fa2 | 4 | /* ETC stands for Elapsed Time Counter */ |
Rhyme | 0:7c0469e71fa2 | 5 | |
Rhyme | 0:7c0469e71fa2 | 6 | /* Command Register */ |
Rhyme | 0:7c0469e71fa2 | 7 | #define REG_COMMAND 0x00 |
Rhyme | 0:7c0469e71fa2 | 8 | /* Status Register */ |
Rhyme | 0:7c0469e71fa2 | 9 | #define REG_STATUS 0x01 |
Rhyme | 0:7c0469e71fa2 | 10 | /* Password Entry Register 0x02 - 0x05 */ |
Rhyme | 0:7c0469e71fa2 | 11 | #define REG_PWE 0x02 |
Rhyme | 0:7c0469e71fa2 | 12 | /* Event Counter Register 0x08 - 0x09 */ |
Rhyme | 0:7c0469e71fa2 | 13 | #define REG_EVENT 0x08 |
Rhyme | 0:7c0469e71fa2 | 14 | /* ETC Register */ |
Rhyme | 0:7c0469e71fa2 | 15 | #define REG_ETC 0x0A |
Rhyme | 0:7c0469e71fa2 | 16 | /* Event Counter Alarm Limit Register 0x10 - 0x11 */ |
Rhyme | 0:7c0469e71fa2 | 17 | #define REG_ECAL 0x10 |
Rhyme | 0:7c0469e71fa2 | 18 | /* ETC Alarm Limit Register 0x12 - 0x15 */ |
Rhyme | 0:7c0469e71fa2 | 19 | #define REG_ETCAL 0x12 |
Rhyme | 0:7c0469e71fa2 | 20 | /* Configuration Register */ |
Rhyme | 0:7c0469e71fa2 | 21 | #define REG_CONFIG 0x16 |
Rhyme | 0:7c0469e71fa2 | 22 | /* Password Value 0x1A - 0x1D */ |
Rhyme | 0:7c0469e71fa2 | 23 | #define REG_PWV 0x1A |
Rhyme | 0:7c0469e71fa2 | 24 | /* User EEPROM 0x20 - 0x2F */ |
Rhyme | 0:7c0469e71fa2 | 25 | #define REG_USR 0x20 |
Rhyme | 0:7c0469e71fa2 | 26 | |
Rhyme | 0:7c0469e71fa2 | 27 | /* Command Register Bits */ |
Rhyme | 0:7c0469e71fa2 | 28 | /* bit[7:1] Reserved */ |
Rhyme | 0:7c0469e71fa2 | 29 | /* bit[0] CLR_ALM write 1 to unlatch the acvie ALARM output */ |
Rhyme | 0:7c0469e71fa2 | 30 | // Clear Alarm Bit. This bit reads as a 0. Writing this bit to a 1 |
Rhyme | 0:7c0469e71fa2 | 31 | // unlatches the active ALARM output, setting the ALARM pin to |
Rhyme | 0:7c0469e71fa2 | 32 | // its inactive state if the alarm condition is no longer present. |
Rhyme | 0:7c0469e71fa2 | 33 | // If the alarm condition persists, the ALARM pin once again |
Rhyme | 0:7c0469e71fa2 | 34 | // asserts to its active state. |
Rhyme | 0:7c0469e71fa2 | 35 | #define CLR_ALM_BIT 0x01 |
Rhyme | 0:7c0469e71fa2 | 36 | |
Rhyme | 0:7c0469e71fa2 | 37 | /* Status Register Bits */ |
Rhyme | 0:7c0469e71fa2 | 38 | /* bit[7:3] Reserved */ |
Rhyme | 0:7c0469e71fa2 | 39 | /* bit[2] EVENT */ |
Rhyme | 0:7c0469e71fa2 | 40 | // This bit indicates the status of the EVENT pin's logic level, |
Rhyme | 0:7c0469e71fa2 | 41 | // detected after the tG glitch filter time. |
Rhyme | 0:7c0469e71fa2 | 42 | #define EVENT_BIT 0x04 |
Rhyme | 0:7c0469e71fa2 | 43 | |
Rhyme | 0:7c0469e71fa2 | 44 | /* bit[1] EVENT AF */ |
Rhyme | 0:7c0469e71fa2 | 45 | // Default value = 0. If the value in the Event Counter SRAM value is |
Rhyme | 0:7c0469e71fa2 | 46 | // greater than or equal to the Event Counter Alarm Limit value, |
Rhyme | 0:7c0469e71fa2 | 47 | // then this bit is automatically set to a value of 1 to indecate |
Rhyme | 0:7c0469e71fa2 | 48 | // the ALARM event. When the EVENT SRAM Counter value is less than |
Rhyme | 0:7c0469e71fa2 | 49 | // the Event Counter Alarm Limit, this bit automatically set to a value of 0, |
Rhyme | 0:7c0469e71fa2 | 50 | // indicating that there is no EVENT alarm. |
Rhyme | 0:7c0469e71fa2 | 51 | #define EVENT_AF_BIT 0x02 |
Rhyme | 0:7c0469e71fa2 | 52 | |
Rhyme | 0:7c0469e71fa2 | 53 | /* bit[0] ETC AF */ |
Rhyme | 0:7c0469e71fa2 | 54 | // Default value = 0. If the value in the ETC SRAM value is greater than |
Rhyme | 0:7c0469e71fa2 | 55 | // or equal to the ETC Alarm Limit value, then this bit is automatically |
Rhyme | 0:7c0469e71fa2 | 56 | // set to a value of 1 to indicate an ALARM event. When the ETC SRAM value |
Rhyme | 0:7c0469e71fa2 | 57 | // is less than the ETC Alarm Limit, this bit automatically set to a value of 0, |
Rhyme | 0:7c0469e71fa2 | 58 | // indicating that there is no ETC alarm. |
Rhyme | 0:7c0469e71fa2 | 59 | #define ETC_AF_BIT 0x01 |
Rhyme | 0:7c0469e71fa2 | 60 | |
Rhyme | 0:7c0469e71fa2 | 61 | /* Configuration Register */ |
Rhyme | 0:7c0469e71fa2 | 62 | /* bit[7:3] Reserved */ |
Rhyme | 0:7c0469e71fa2 | 63 | /* bit[2] ETC ALARM EN */ |
Rhyme | 0:7c0469e71fa2 | 64 | // Default value = 0, which is disabled. When set to a 1, |
Rhyme | 0:7c0469e71fa2 | 65 | // and if the ETC register is equal to or greater than the ETC Alarm limit, |
Rhyme | 0:7c0469e71fa2 | 66 | // then this device triggers the ETC Alarm Flag (ETC AF), |
Rhyme | 0:7c0469e71fa2 | 67 | // and the ALARM pin goes to its active state. |
Rhyme | 0:7c0469e71fa2 | 68 | #define ETC_ALARM_EN_BIT 0x04 |
Rhyme | 0:7c0469e71fa2 | 69 | |
Rhyme | 0:7c0469e71fa2 | 70 | /* bit[1] EVENT ALARM EN */ |
Rhyme | 0:7c0469e71fa2 | 71 | // Default value = 0, which is disabled. When set to a 1, and if the Event |
Rhyme | 0:7c0469e71fa2 | 72 | // Counter register is equal to or greater than the Event Counter Alarm limit, |
Rhyme | 0:7c0469e71fa2 | 73 | // then this device triggers the Event Count Alarm Flag (EVENT AF), |
Rhyme | 0:7c0469e71fa2 | 74 | // and the ALARM pin goes to its active state. |
Rhyme | 0:7c0469e71fa2 | 75 | #define EVENT_ALARM_EN_BIT 0x02 |
Rhyme | 0:7c0469e71fa2 | 76 | |
Rhyme | 0:7c0469e71fa2 | 77 | /* bit[0] ALARM POL */ |
Rhyme | 0:7c0469e71fa2 | 78 | // Default value = 0, which sets the ALARM output active low. |
Rhyme | 0:7c0469e71fa2 | 79 | // When set to a 1, the ALARM output is active high. |
Rhyme | 0:7c0469e71fa2 | 80 | #define ALRM_POL_BIT 0x01 |
Rhyme | 0:7c0469e71fa2 | 81 | |
Rhyme | 0:7c0469e71fa2 | 82 | /* Member Functions */ |
Rhyme | 0:7c0469e71fa2 | 83 | |
Rhyme | 0:7c0469e71fa2 | 84 | DS1683::DS1683(PinName sda, PinName scl, PinName eventpin, PinName alarmpin, int addr) : |
Rhyme | 0:7c0469e71fa2 | 85 | event(eventpin), alarm(alarmpin), m_i2c(sda, scl), m_addr(addr<<1) |
Rhyme | 0:7c0469e71fa2 | 86 | { |
Rhyme | 2:f262ba460525 | 87 | // m_i2c.frequency(100000) ; |
Rhyme | 2:f262ba460525 | 88 | m_i2c.frequency(10000) ; |
Rhyme | 0:7c0469e71fa2 | 89 | setConfig(0x00) ; /* disable ETC_ALRM_EN and EVENT_ALRM_EN */ |
Rhyme | 0:7c0469e71fa2 | 90 | alarmPol(0) ; /* Low Active */ |
Rhyme | 0:7c0469e71fa2 | 91 | // alarmPol(1) ; /* Active High */ |
Rhyme | 0:7c0469e71fa2 | 92 | } |
Rhyme | 0:7c0469e71fa2 | 93 | |
Rhyme | 0:7c0469e71fa2 | 94 | DS1683::~DS1683() |
Rhyme | 0:7c0469e71fa2 | 95 | { |
Rhyme | 0:7c0469e71fa2 | 96 | } |
Rhyme | 0:7c0469e71fa2 | 97 | |
Rhyme | 0:7c0469e71fa2 | 98 | int DS1683::read(int addr, uint8_t *data, int len) |
Rhyme | 0:7c0469e71fa2 | 99 | { |
Rhyme | 0:7c0469e71fa2 | 100 | int result ; |
Rhyme | 0:7c0469e71fa2 | 101 | result = readRegs(addr, data, len) ; |
Rhyme | 2:f262ba460525 | 102 | // wait_ms(1000) ; |
Rhyme | 2:f262ba460525 | 103 | wait(0.01) ; |
Rhyme | 0:7c0469e71fa2 | 104 | return( result ) ; |
Rhyme | 0:7c0469e71fa2 | 105 | } |
Rhyme | 0:7c0469e71fa2 | 106 | |
Rhyme | 0:7c0469e71fa2 | 107 | int DS1683::write(int addr, uint8_t *data, int len) |
Rhyme | 0:7c0469e71fa2 | 108 | { |
Rhyme | 0:7c0469e71fa2 | 109 | uint8_t *buf ; |
Rhyme | 0:7c0469e71fa2 | 110 | int ack ; |
Rhyme | 0:7c0469e71fa2 | 111 | buf = new uint8_t[len+1] ; |
Rhyme | 0:7c0469e71fa2 | 112 | buf[0] = addr ; |
Rhyme | 0:7c0469e71fa2 | 113 | for (int i = 0 ; i < len ; i++ ) { |
Rhyme | 0:7c0469e71fa2 | 114 | buf[i+1] = data[i] ; |
Rhyme | 0:7c0469e71fa2 | 115 | } |
Rhyme | 0:7c0469e71fa2 | 116 | ack = writeRegs(buf, len+1) ; |
Rhyme | 1:8fa5400054bd | 117 | // wait_ms(1000) ; |
Rhyme | 0:7c0469e71fa2 | 118 | wait(0.01) ; |
Rhyme | 0:7c0469e71fa2 | 119 | delete buf ; |
Rhyme | 0:7c0469e71fa2 | 120 | return( ack ) ; |
Rhyme | 0:7c0469e71fa2 | 121 | } |
Rhyme | 0:7c0469e71fa2 | 122 | |
Rhyme | 0:7c0469e71fa2 | 123 | int DS1683::readRegs(int addr, uint8_t * data, int len) { |
Rhyme | 0:7c0469e71fa2 | 124 | int result ; |
Rhyme | 0:7c0469e71fa2 | 125 | char t[1] = {addr}; |
Rhyme | 0:7c0469e71fa2 | 126 | m_i2c.write(m_addr, t, 1, true); |
Rhyme | 0:7c0469e71fa2 | 127 | result = m_i2c.read(m_addr, (char *)data, len); |
Rhyme | 0:7c0469e71fa2 | 128 | return( result ) ; |
Rhyme | 0:7c0469e71fa2 | 129 | } |
Rhyme | 0:7c0469e71fa2 | 130 | |
Rhyme | 0:7c0469e71fa2 | 131 | int DS1683::writeRegs(uint8_t * data, int len) { |
Rhyme | 0:7c0469e71fa2 | 132 | int ack ; |
Rhyme | 2:f262ba460525 | 133 | // m_i2c.stop() ; |
Rhyme | 1:8fa5400054bd | 134 | // wait_ms(1000) ; |
Rhyme | 0:7c0469e71fa2 | 135 | wait(0.01) ; |
Rhyme | 0:7c0469e71fa2 | 136 | ack = m_i2c.write(m_addr, (char *)data, len); |
Rhyme | 2:f262ba460525 | 137 | // m_i2c.stop() ; |
Rhyme | 0:7c0469e71fa2 | 138 | return( ack ) ; |
Rhyme | 0:7c0469e71fa2 | 139 | } |
Rhyme | 0:7c0469e71fa2 | 140 | |
Rhyme | 0:7c0469e71fa2 | 141 | uint8_t DS1683::readReg8(int addr) |
Rhyme | 0:7c0469e71fa2 | 142 | { |
Rhyme | 0:7c0469e71fa2 | 143 | uint8_t data[1] ; |
Rhyme | 0:7c0469e71fa2 | 144 | readRegs(addr, data, 1) ; |
Rhyme | 0:7c0469e71fa2 | 145 | return( data[0] ) ; |
Rhyme | 0:7c0469e71fa2 | 146 | } |
Rhyme | 0:7c0469e71fa2 | 147 | |
Rhyme | 0:7c0469e71fa2 | 148 | void DS1683::writeReg8(int addr, uint8_t value) |
Rhyme | 0:7c0469e71fa2 | 149 | { |
Rhyme | 0:7c0469e71fa2 | 150 | uint8_t data[2] ; |
Rhyme | 0:7c0469e71fa2 | 151 | data[0] = addr ; |
Rhyme | 0:7c0469e71fa2 | 152 | data[1] = value ; |
Rhyme | 0:7c0469e71fa2 | 153 | writeRegs(data, 2) ; |
Rhyme | 0:7c0469e71fa2 | 154 | } |
Rhyme | 0:7c0469e71fa2 | 155 | |
Rhyme | 0:7c0469e71fa2 | 156 | uint16_t DS1683::readReg16(int addr) |
Rhyme | 0:7c0469e71fa2 | 157 | { |
Rhyme | 0:7c0469e71fa2 | 158 | uint8_t data[2] ; |
Rhyme | 0:7c0469e71fa2 | 159 | uint16_t value = 0 ; |
Rhyme | 0:7c0469e71fa2 | 160 | readRegs(addr, data, 2) ; |
Rhyme | 0:7c0469e71fa2 | 161 | value = data[1] ; |
Rhyme | 0:7c0469e71fa2 | 162 | value = (value << 8) | data[1] ; |
Rhyme | 0:7c0469e71fa2 | 163 | return(value) ; |
Rhyme | 0:7c0469e71fa2 | 164 | } |
Rhyme | 0:7c0469e71fa2 | 165 | |
Rhyme | 0:7c0469e71fa2 | 166 | void DS1683::writeReg16(int addr, uint16_t value) |
Rhyme | 0:7c0469e71fa2 | 167 | { |
Rhyme | 0:7c0469e71fa2 | 168 | uint8_t data[3] ; |
Rhyme | 0:7c0469e71fa2 | 169 | data[0] = addr ; |
Rhyme | 0:7c0469e71fa2 | 170 | data[1] = value & 0xFF ; |
Rhyme | 0:7c0469e71fa2 | 171 | data[2] = (value >> 8) & 0xFF ; |
Rhyme | 0:7c0469e71fa2 | 172 | writeRegs(data, 3) ; |
Rhyme | 0:7c0469e71fa2 | 173 | } |
Rhyme | 0:7c0469e71fa2 | 174 | |
Rhyme | 0:7c0469e71fa2 | 175 | uint32_t DS1683::readReg32(int addr) |
Rhyme | 0:7c0469e71fa2 | 176 | { |
Rhyme | 0:7c0469e71fa2 | 177 | uint8_t data[4] ; |
Rhyme | 0:7c0469e71fa2 | 178 | uint32_t value = 0 ; |
Rhyme | 0:7c0469e71fa2 | 179 | readRegs(addr, data, 4) ; |
Rhyme | 0:7c0469e71fa2 | 180 | value = data[3] ; |
Rhyme | 0:7c0469e71fa2 | 181 | value = (value << 8) | data[2] ; |
Rhyme | 0:7c0469e71fa2 | 182 | value = (value << 8) | data[1] ; |
Rhyme | 0:7c0469e71fa2 | 183 | value = (value << 8) | data[0] ; |
Rhyme | 0:7c0469e71fa2 | 184 | return(value) ; |
Rhyme | 0:7c0469e71fa2 | 185 | } |
Rhyme | 0:7c0469e71fa2 | 186 | |
Rhyme | 0:7c0469e71fa2 | 187 | void DS1683::writeReg32(int addr, uint32_t value) |
Rhyme | 0:7c0469e71fa2 | 188 | { |
Rhyme | 0:7c0469e71fa2 | 189 | uint8_t data[5] ; |
Rhyme | 0:7c0469e71fa2 | 190 | data[0] = addr ; |
Rhyme | 0:7c0469e71fa2 | 191 | data[1] = value & 0xFF ; |
Rhyme | 0:7c0469e71fa2 | 192 | data[2] = (value >> 8) & 0xFF ; |
Rhyme | 0:7c0469e71fa2 | 193 | data[3] = (value >> 16) & 0xFF ; |
Rhyme | 0:7c0469e71fa2 | 194 | data[4] = (value >> 24) & 0xFF ; |
Rhyme | 0:7c0469e71fa2 | 195 | writeRegs(data, 5) ; |
Rhyme | 0:7c0469e71fa2 | 196 | } |
Rhyme | 0:7c0469e71fa2 | 197 | |
Rhyme | 0:7c0469e71fa2 | 198 | void DS1683::setConfig(uint8_t conf) |
Rhyme | 0:7c0469e71fa2 | 199 | { |
Rhyme | 0:7c0469e71fa2 | 200 | writeReg8(REG_CONFIG, conf) ; |
Rhyme | 0:7c0469e71fa2 | 201 | } |
Rhyme | 0:7c0469e71fa2 | 202 | |
Rhyme | 0:7c0469e71fa2 | 203 | uint8_t DS1683::getConfig(void) |
Rhyme | 0:7c0469e71fa2 | 204 | { |
Rhyme | 0:7c0469e71fa2 | 205 | return( readReg8(REG_CONFIG) ) ; |
Rhyme | 0:7c0469e71fa2 | 206 | } |
Rhyme | 0:7c0469e71fa2 | 207 | |
Rhyme | 0:7c0469e71fa2 | 208 | uint8_t DS1683::getStatus(void) |
Rhyme | 0:7c0469e71fa2 | 209 | { |
Rhyme | 0:7c0469e71fa2 | 210 | return(readReg8(REG_STATUS)) ; |
Rhyme | 0:7c0469e71fa2 | 211 | } |
Rhyme | 0:7c0469e71fa2 | 212 | |
Rhyme | 0:7c0469e71fa2 | 213 | void DS1683::setETC(uint32_t count) |
Rhyme | 0:7c0469e71fa2 | 214 | { |
Rhyme | 0:7c0469e71fa2 | 215 | writeReg32(REG_ETC, count) ; |
Rhyme | 0:7c0469e71fa2 | 216 | } |
Rhyme | 0:7c0469e71fa2 | 217 | |
Rhyme | 0:7c0469e71fa2 | 218 | uint32_t DS1683::getETC(void) |
Rhyme | 0:7c0469e71fa2 | 219 | { |
Rhyme | 0:7c0469e71fa2 | 220 | return(readReg32(REG_ETC)) ; |
Rhyme | 0:7c0469e71fa2 | 221 | } |
Rhyme | 0:7c0469e71fa2 | 222 | |
Rhyme | 0:7c0469e71fa2 | 223 | void DS1683::setEventCount(uint16_t count) |
Rhyme | 0:7c0469e71fa2 | 224 | { |
Rhyme | 0:7c0469e71fa2 | 225 | writeReg16(REG_EVENT, count) ; |
Rhyme | 0:7c0469e71fa2 | 226 | } |
Rhyme | 0:7c0469e71fa2 | 227 | |
Rhyme | 0:7c0469e71fa2 | 228 | uint16_t DS1683::getEventCount(void) |
Rhyme | 0:7c0469e71fa2 | 229 | { |
Rhyme | 0:7c0469e71fa2 | 230 | return(readReg16(REG_EVENT)) ; |
Rhyme | 0:7c0469e71fa2 | 231 | } |
Rhyme | 1:8fa5400054bd | 232 | |
Rhyme | 1:8fa5400054bd | 233 | void DS1683::clearRegs(void) |
Rhyme | 1:8fa5400054bd | 234 | { |
Rhyme | 1:8fa5400054bd | 235 | writeReg16(REG_ECAL, 0x0000) ; |
Rhyme | 1:8fa5400054bd | 236 | writeReg16(REG_EVENT, 0x0000) ; |
Rhyme | 1:8fa5400054bd | 237 | writeReg32(REG_ETCAL, 0x00000000) ; |
Rhyme | 1:8fa5400054bd | 238 | writeReg32(REG_ETC, 0x00000000) ; |
Rhyme | 1:8fa5400054bd | 239 | writeReg8(REG_CONFIG, 0x00) ; |
Rhyme | 1:8fa5400054bd | 240 | } |
Rhyme | 1:8fa5400054bd | 241 | |
Rhyme | 0:7c0469e71fa2 | 242 | void DS1683::dumpRegs(void) |
Rhyme | 0:7c0469e71fa2 | 243 | { |
Rhyme | 1:8fa5400054bd | 244 | // uint8_t data[5] ; |
Rhyme | 1:8fa5400054bd | 245 | //data[0] = 0 ; |
Rhyme | 1:8fa5400054bd | 246 | // readRegs(REG_COMMAND, data, 1) ; |
Rhyme | 1:8fa5400054bd | 247 | printf("Command: 0x%02X ", readReg8(REG_COMMAND)) ; |
Rhyme | 0:7c0469e71fa2 | 248 | printf("Status: 0x%02X ", getStatus()) ; |
Rhyme | 0:7c0469e71fa2 | 249 | printf("Config: 0x%02X\n", getConfig()) ; |
Rhyme | 0:7c0469e71fa2 | 250 | } |
Rhyme | 0:7c0469e71fa2 | 251 | |
Rhyme | 0:7c0469e71fa2 | 252 | void DS1683::enterPW(uint32_t pass) |
Rhyme | 0:7c0469e71fa2 | 253 | { |
Rhyme | 0:7c0469e71fa2 | 254 | uint8_t data[5] ; |
Rhyme | 0:7c0469e71fa2 | 255 | data[0] = REG_PWE ; /* Password Entry */ |
Rhyme | 0:7c0469e71fa2 | 256 | data[1] = pass & 0xFF ; |
Rhyme | 0:7c0469e71fa2 | 257 | data[2] = (pass >> 8) & 0xFF ; |
Rhyme | 0:7c0469e71fa2 | 258 | data[3] = (pass >> 16) & 0xFF ; |
Rhyme | 0:7c0469e71fa2 | 259 | data[4] = (pass >> 24) & 0xFF ; |
Rhyme | 0:7c0469e71fa2 | 260 | writeRegs(data, 5) ; |
Rhyme | 0:7c0469e71fa2 | 261 | } |
Rhyme | 0:7c0469e71fa2 | 262 | |
Rhyme | 0:7c0469e71fa2 | 263 | void DS1683::dumpETC(void) |
Rhyme | 0:7c0469e71fa2 | 264 | { |
Rhyme | 0:7c0469e71fa2 | 265 | uint32_t data[2] ; |
Rhyme | 0:7c0469e71fa2 | 266 | data[0] = getETC() ; |
Rhyme | 0:7c0469e71fa2 | 267 | data[1] = getETCAlarm() ; |
Rhyme | 0:7c0469e71fa2 | 268 | printf("ETC count: 0x%08X / limit: 0x%08X flag: ", data[0], data[1]) ; |
Rhyme | 0:7c0469e71fa2 | 269 | if (getStatus() & ETC_AF_BIT) { |
Rhyme | 0:7c0469e71fa2 | 270 | printf("ON") ; |
Rhyme | 0:7c0469e71fa2 | 271 | } else { |
Rhyme | 0:7c0469e71fa2 | 272 | printf("OFF") ; |
Rhyme | 0:7c0469e71fa2 | 273 | } |
Rhyme | 0:7c0469e71fa2 | 274 | printf("\n") ; |
Rhyme | 0:7c0469e71fa2 | 275 | } |
Rhyme | 0:7c0469e71fa2 | 276 | |
Rhyme | 0:7c0469e71fa2 | 277 | void DS1683::dumpEvent(void) |
Rhyme | 0:7c0469e71fa2 | 278 | { |
Rhyme | 0:7c0469e71fa2 | 279 | uint16_t data[2] ; |
Rhyme | 0:7c0469e71fa2 | 280 | data[0] = getEventCount() ; |
Rhyme | 0:7c0469e71fa2 | 281 | data[1] = getEventAlarm() ; |
Rhyme | 0:7c0469e71fa2 | 282 | printf("Event Counter count: %04X / limit: %04X flag: ", data[0], data[1]) ; |
Rhyme | 0:7c0469e71fa2 | 283 | if (getStatus() & EVENT_AF_BIT) { |
Rhyme | 0:7c0469e71fa2 | 284 | printf("ON") ; |
Rhyme | 0:7c0469e71fa2 | 285 | } else { |
Rhyme | 0:7c0469e71fa2 | 286 | printf("OFF") ; |
Rhyme | 0:7c0469e71fa2 | 287 | } |
Rhyme | 0:7c0469e71fa2 | 288 | printf("\n") ; |
Rhyme | 0:7c0469e71fa2 | 289 | } |
Rhyme | 0:7c0469e71fa2 | 290 | |
Rhyme | 0:7c0469e71fa2 | 291 | void DS1683::setETCAlarm(uint32_t count) |
Rhyme | 0:7c0469e71fa2 | 292 | { |
Rhyme | 0:7c0469e71fa2 | 293 | writeReg32(REG_ETCAL, count) ; |
Rhyme | 0:7c0469e71fa2 | 294 | } |
Rhyme | 0:7c0469e71fa2 | 295 | |
Rhyme | 0:7c0469e71fa2 | 296 | uint32_t DS1683::getETCAlarm(void) |
Rhyme | 0:7c0469e71fa2 | 297 | { |
Rhyme | 0:7c0469e71fa2 | 298 | return(readReg32(REG_ETCAL)) ; |
Rhyme | 0:7c0469e71fa2 | 299 | } |
Rhyme | 0:7c0469e71fa2 | 300 | |
Rhyme | 0:7c0469e71fa2 | 301 | void DS1683::clearAlarm(void) |
Rhyme | 0:7c0469e71fa2 | 302 | { |
Rhyme | 0:7c0469e71fa2 | 303 | uint8_t data[2] ; |
Rhyme | 0:7c0469e71fa2 | 304 | data[0] = REG_COMMAND ; |
Rhyme | 0:7c0469e71fa2 | 305 | data[1] = 0x01 ; |
Rhyme | 0:7c0469e71fa2 | 306 | writeRegs(data, 2) ; |
Rhyme | 0:7c0469e71fa2 | 307 | } |
Rhyme | 0:7c0469e71fa2 | 308 | |
Rhyme | 0:7c0469e71fa2 | 309 | void DS1683::clearEvent(void) |
Rhyme | 0:7c0469e71fa2 | 310 | { |
Rhyme | 0:7c0469e71fa2 | 311 | writeReg16(REG_EVENT, 0x0000) ; |
Rhyme | 0:7c0469e71fa2 | 312 | } |
Rhyme | 0:7c0469e71fa2 | 313 | |
Rhyme | 0:7c0469e71fa2 | 314 | void DS1683::setEventAlarm(uint16_t count) |
Rhyme | 0:7c0469e71fa2 | 315 | { |
Rhyme | 0:7c0469e71fa2 | 316 | writeReg16(REG_ECAL, count) ; |
Rhyme | 0:7c0469e71fa2 | 317 | } |
Rhyme | 0:7c0469e71fa2 | 318 | |
Rhyme | 0:7c0469e71fa2 | 319 | uint16_t DS1683::getEventAlarm(void) |
Rhyme | 0:7c0469e71fa2 | 320 | { |
Rhyme | 0:7c0469e71fa2 | 321 | return(readReg16(REG_ECAL)) ; |
Rhyme | 0:7c0469e71fa2 | 322 | } |
Rhyme | 0:7c0469e71fa2 | 323 | |
Rhyme | 0:7c0469e71fa2 | 324 | void DS1683::clearETC(void) |
Rhyme | 0:7c0469e71fa2 | 325 | { |
Rhyme | 0:7c0469e71fa2 | 326 | writeReg32(REG_ETC, 0x00000000) ; |
Rhyme | 0:7c0469e71fa2 | 327 | } |
Rhyme | 0:7c0469e71fa2 | 328 | |
Rhyme | 0:7c0469e71fa2 | 329 | void DS1683::enableETCAlarm(void) |
Rhyme | 0:7c0469e71fa2 | 330 | { |
Rhyme | 0:7c0469e71fa2 | 331 | uint8_t config ; |
Rhyme | 0:7c0469e71fa2 | 332 | config = getConfig() ; |
Rhyme | 0:7c0469e71fa2 | 333 | config |= ETC_ALARM_EN_BIT ; |
Rhyme | 0:7c0469e71fa2 | 334 | setConfig(config) ; |
Rhyme | 0:7c0469e71fa2 | 335 | } |
Rhyme | 0:7c0469e71fa2 | 336 | |
Rhyme | 0:7c0469e71fa2 | 337 | void DS1683::disableETCAlarm(void) |
Rhyme | 0:7c0469e71fa2 | 338 | { |
Rhyme | 0:7c0469e71fa2 | 339 | uint8_t config ; |
Rhyme | 0:7c0469e71fa2 | 340 | config = getConfig() ; |
Rhyme | 0:7c0469e71fa2 | 341 | config &= ~ETC_ALARM_EN_BIT ; |
Rhyme | 0:7c0469e71fa2 | 342 | setConfig(config) ; |
Rhyme | 0:7c0469e71fa2 | 343 | } |
Rhyme | 0:7c0469e71fa2 | 344 | |
Rhyme | 0:7c0469e71fa2 | 345 | void DS1683::enableEventAlarm(void) |
Rhyme | 0:7c0469e71fa2 | 346 | { |
Rhyme | 0:7c0469e71fa2 | 347 | uint8_t config ; |
Rhyme | 0:7c0469e71fa2 | 348 | config = getConfig() ; |
Rhyme | 0:7c0469e71fa2 | 349 | config |= EVENT_ALARM_EN_BIT ; |
Rhyme | 0:7c0469e71fa2 | 350 | setConfig(config) ; |
Rhyme | 0:7c0469e71fa2 | 351 | } |
Rhyme | 0:7c0469e71fa2 | 352 | |
Rhyme | 0:7c0469e71fa2 | 353 | void DS1683::disableEventAlarm(void) |
Rhyme | 0:7c0469e71fa2 | 354 | { |
Rhyme | 0:7c0469e71fa2 | 355 | uint8_t config ; |
Rhyme | 0:7c0469e71fa2 | 356 | config = getConfig() ; |
Rhyme | 0:7c0469e71fa2 | 357 | config &= ~EVENT_ALARM_EN_BIT ; |
Rhyme | 0:7c0469e71fa2 | 358 | setConfig(config) ; |
Rhyme | 0:7c0469e71fa2 | 359 | } |
Rhyme | 0:7c0469e71fa2 | 360 | |
Rhyme | 0:7c0469e71fa2 | 361 | void DS1683::alarmPol(int pol) |
Rhyme | 0:7c0469e71fa2 | 362 | { |
Rhyme | 0:7c0469e71fa2 | 363 | uint8_t config ; |
Rhyme | 0:7c0469e71fa2 | 364 | config = getConfig() ; |
Rhyme | 0:7c0469e71fa2 | 365 | if (pol) { |
Rhyme | 0:7c0469e71fa2 | 366 | config |= 0x01 ; |
Rhyme | 0:7c0469e71fa2 | 367 | } else { |
Rhyme | 0:7c0469e71fa2 | 368 | config &= ~0x01 ; |
Rhyme | 0:7c0469e71fa2 | 369 | } |
Rhyme | 0:7c0469e71fa2 | 370 | setConfig(config) ; |
Rhyme | 0:7c0469e71fa2 | 371 | } |