MSS / AK9752

AKM AK9752 Ultra-small IR Sensor IC with I2C I/F

AK9752.cpp@0:d177a32f8f36, 2017-12-27 (annotated)

Committer:
Rhyme
Date:
Wed Dec 27 06:26:33 2017 +0000
Revision:
0:d177a32f8f36
First working version, no documents in place

Who changed what in which revision?

UserRevisionLine numberNew contents of line
Rhyme 0:d177a32f8f36 1 #include "mbed.h"
Rhyme 0:d177a32f8f36 2 #include "AK9752.h"
Rhyme 0:d177a32f8f36 3
Rhyme 0:d177a32f8f36 4 #define REG_WIA1 0x00
Rhyme 0:d177a32f8f36 5 #define REG_WIA2 0x01
Rhyme 0:d177a32f8f36 6 #define REG_INFO1 0x02
Rhyme 0:d177a32f8f36 7 #define REG_INFO2 0x03
Rhyme 0:d177a32f8f36 8 #define REG_ST1 0x04
Rhyme 0:d177a32f8f36 9 #define REG_INTCAUSE 0x05
Rhyme 0:d177a32f8f36 10 #define REG_IR_LSB 0x06
Rhyme 0:d177a32f8f36 11 #define REG_IR_MSB 0x07
Rhyme 0:d177a32f8f36 12 #define REG_TMP_LSB 0x08
Rhyme 0:d177a32f8f36 13 #define REG_TMP_MSB 0x09
Rhyme 0:d177a32f8f36 14 #define REG_ST2 0x0A
Rhyme 0:d177a32f8f36 15 #define REG_THIRH_LSB 0x0B
Rhyme 0:d177a32f8f36 16 #define REG_THIRH_MSB 0x0C
Rhyme 0:d177a32f8f36 17 #define REG_THIRL_LSB 0x0D
Rhyme 0:d177a32f8f36 18 #define REG_THIRL_MSB 0x0E
Rhyme 0:d177a32f8f36 19 #define REG_THTMPH_LSB 0x0F
Rhyme 0:d177a32f8f36 20 #define REG_THTMPH_MSB 0x10
Rhyme 0:d177a32f8f36 21 #define REG_THTMPL_LSB 0x11
Rhyme 0:d177a32f8f36 22 #define REG_THTMPL_MSB 0x12
Rhyme 0:d177a32f8f36 23 #define REG_INTEN 0x13
Rhyme 0:d177a32f8f36 24 #define REG_CNTL1 0x14
Rhyme 0:d177a32f8f36 25 #define REG_CNTL2 0x15
Rhyme 0:d177a32f8f36 26 #define REG_CNTL3 0x16
Rhyme 0:d177a32f8f36 27
Rhyme 0:d177a32f8f36 28
Rhyme 0:d177a32f8f36 29 AK9752::AK9752(PinName sda, PinName scl, int addr) : m_i2c(sda, scl), m_addr(addr<<1) {
Rhyme 0:d177a32f8f36 30 // activate the peripheral
Rhyme 0:d177a32f8f36 31 }
Rhyme 0:d177a32f8f36 32
Rhyme 0:d177a32f8f36 33 AK9752::~AK9752() { }
Rhyme 0:d177a32f8f36 34
Rhyme 0:d177a32f8f36 35 int AK9752::readRegs(int addr, uint8_t * data, int len) {
Rhyme 0:d177a32f8f36 36 char t[1] = {addr};
Rhyme 0:d177a32f8f36 37 int result ;
Rhyme 0:d177a32f8f36 38 result = m_i2c.write(m_addr, t, 1, true);
Rhyme 0:d177a32f8f36 39 if (result == 0) {
Rhyme 0:d177a32f8f36 40 result = m_i2c.read(m_addr, (char *)data, len);
Rhyme 0:d177a32f8f36 41 }
Rhyme 0:d177a32f8f36 42 return( result ) ;
Rhyme 0:d177a32f8f36 43 }
Rhyme 0:d177a32f8f36 44
Rhyme 0:d177a32f8f36 45 int AK9752::writeRegs(uint8_t * data, int len) {
Rhyme 0:d177a32f8f36 46 int result ;
Rhyme 0:d177a32f8f36 47 result = m_i2c.write(m_addr, (char *)data, len);
Rhyme 0:d177a32f8f36 48 return( result ) ;
Rhyme 0:d177a32f8f36 49 }
Rhyme 0:d177a32f8f36 50
Rhyme 0:d177a32f8f36 51 /**
Rhyme 0:d177a32f8f36 52 * getCompanyCode
Rhyme 0:d177a32f8f36 53 * the code is expected to be 0x48
Rhyme 0:d177a32f8f36 54 */
Rhyme 0:d177a32f8f36 55 uint8_t AK9752::getCompanyCode(void)
Rhyme 0:d177a32f8f36 56 {
Rhyme 0:d177a32f8f36 57 uint8_t data ;
Rhyme 0:d177a32f8f36 58 readRegs(REG_WIA1, &data, 1) ;
Rhyme 0:d177a32f8f36 59 return(data) ;
Rhyme 0:d177a32f8f36 60 }
Rhyme 0:d177a32f8f36 61
Rhyme 0:d177a32f8f36 62 /**
Rhyme 0:d177a32f8f36 63 * getDeviceID
Rhyme 0:d177a32f8f36 64 * the ID is expected to be 0x14
Rhyme 0:d177a32f8f36 65 */
Rhyme 0:d177a32f8f36 66 uint8_t AK9752::getDeviceID(void)
Rhyme 0:d177a32f8f36 67 {
Rhyme 0:d177a32f8f36 68 uint8_t data ;
Rhyme 0:d177a32f8f36 69 readRegs(REG_WIA2, &data, 1) ;
Rhyme 0:d177a32f8f36 70 return(data) ;
Rhyme 0:d177a32f8f36 71 }
Rhyme 0:d177a32f8f36 72
Rhyme 0:d177a32f8f36 73 bool AK9752::dataReady(void) /* returns ST1[0], read ST2 to clear */
Rhyme 0:d177a32f8f36 74 {
Rhyme 0:d177a32f8f36 75 uint8_t data ;
Rhyme 0:d177a32f8f36 76 readRegs(REG_ST1, &data, 1) ;
Rhyme 0:d177a32f8f36 77 return((data & 0x01) == 0x01) ;
Rhyme 0:d177a32f8f36 78 }
Rhyme 0:d177a32f8f36 79
Rhyme 0:d177a32f8f36 80 uint8_t AK9752::getIntcause(void) /* get REG_INTCAUSE (0x05) */
Rhyme 0:d177a32f8f36 81 {
Rhyme 0:d177a32f8f36 82 uint8_t data ;
Rhyme 0:d177a32f8f36 83 readRegs(REG_INTCAUSE, &data, 1) ;
Rhyme 0:d177a32f8f36 84 return( data ) ;
Rhyme 0:d177a32f8f36 85 }
Rhyme 0:d177a32f8f36 86
Rhyme 0:d177a32f8f36 87 int16_t AK9752::getRawIR(void) /* raw data, must be mulitplied by 0.4578 for pA */
Rhyme 0:d177a32f8f36 88 {
Rhyme 0:d177a32f8f36 89 uint16_t temp ;
Rhyme 0:d177a32f8f36 90 uint8_t data[2] ;
Rhyme 0:d177a32f8f36 91 readRegs(REG_IR_LSB, data, 2) ;
Rhyme 0:d177a32f8f36 92 temp = (data[1] << 8) | data[0] ;
Rhyme 0:d177a32f8f36 93 return( temp ) ;
Rhyme 0:d177a32f8f36 94 }
Rhyme 0:d177a32f8f36 95
Rhyme 0:d177a32f8f36 96 float AK9752::getIR(void)
Rhyme 0:d177a32f8f36 97 {
Rhyme 0:d177a32f8f36 98 float fIR ;
Rhyme 0:d177a32f8f36 99 uint16_t iIR ;
Rhyme 0:d177a32f8f36 100 iIR = getRawIR() ;
Rhyme 0:d177a32f8f36 101 fIR = iIR * 0.4578 ;
Rhyme 0:d177a32f8f36 102 return( fIR ) ;
Rhyme 0:d177a32f8f36 103 }
Rhyme 0:d177a32f8f36 104
Rhyme 0:d177a32f8f36 105 int16_t AK9752::getRawTMP(void) /* raw data, must be multiplied by 0.0019837 and + 25 */
Rhyme 0:d177a32f8f36 106 {
Rhyme 0:d177a32f8f36 107 uint16_t temp ;
Rhyme 0:d177a32f8f36 108 uint8_t data[2] ;
Rhyme 0:d177a32f8f36 109 readRegs(REG_TMP_LSB, data, 2) ;
Rhyme 0:d177a32f8f36 110 temp = (data[1] << 8) | data[0] ;
Rhyme 0:d177a32f8f36 111 return( temp ) ;
Rhyme 0:d177a32f8f36 112 }
Rhyme 0:d177a32f8f36 113
Rhyme 0:d177a32f8f36 114 float AK9752::getTMP(void)
Rhyme 0:d177a32f8f36 115 {
Rhyme 0:d177a32f8f36 116 float ftemp ;
Rhyme 0:d177a32f8f36 117 uint16_t itemp ;
Rhyme 0:d177a32f8f36 118 itemp = getRawTMP() ;
Rhyme 0:d177a32f8f36 119 ftemp = itemp * 0.0019837 + 25.0 ;
Rhyme 0:d177a32f8f36 120 return( ftemp ) ;
Rhyme 0:d177a32f8f36 121 }
Rhyme 0:d177a32f8f36 122
Rhyme 0:d177a32f8f36 123 bool AK9752::dataOverRun(void) /* check data over run and clear data ready */
Rhyme 0:d177a32f8f36 124 {
Rhyme 0:d177a32f8f36 125 uint8_t data ;
Rhyme 0:d177a32f8f36 126 readRegs(REG_ST2, &data, 1) ;
Rhyme 0:d177a32f8f36 127 return((data & 0x01) == 0x01) ;
Rhyme 0:d177a32f8f36 128 }
Rhyme 0:d177a32f8f36 129
Rhyme 0:d177a32f8f36 130 void AK9752::getTHIR(int16_t *high, int16_t *low)
Rhyme 0:d177a32f8f36 131 {
Rhyme 0:d177a32f8f36 132 uint8_t data[4] ;
Rhyme 0:d177a32f8f36 133 readRegs(REG_THIRH_LSB, data, 4) ;
Rhyme 0:d177a32f8f36 134 *high = (data[1] << 8) | data[0] ;
Rhyme 0:d177a32f8f36 135 *low = (data[3] << 8) | data[2] ;
Rhyme 0:d177a32f8f36 136 }
Rhyme 0:d177a32f8f36 137
Rhyme 0:d177a32f8f36 138 void AK9752::setTHIR(int16_t high, int16_t low)
Rhyme 0:d177a32f8f36 139 {
Rhyme 0:d177a32f8f36 140 uint8_t data[5] ;
Rhyme 0:d177a32f8f36 141 data[0] = REG_THIRH_LSB ;
Rhyme 0:d177a32f8f36 142 data[1] = high & 0xFF ;
Rhyme 0:d177a32f8f36 143 data[2] = (high >> 8) & 0xFF ;
Rhyme 0:d177a32f8f36 144 data[3] = low & 0xFF ;
Rhyme 0:d177a32f8f36 145 data[4] = (low >> 8) & 0xFF ;
Rhyme 0:d177a32f8f36 146 writeRegs(data, 5) ;
Rhyme 0:d177a32f8f36 147 }
Rhyme 0:d177a32f8f36 148
Rhyme 0:d177a32f8f36 149 void AK9752::getTHTMP(int16_t *high, int16_t *low)
Rhyme 0:d177a32f8f36 150 {
Rhyme 0:d177a32f8f36 151 uint8_t data[4] ;
Rhyme 0:d177a32f8f36 152 readRegs(REG_THTMPH_LSB, data, 4) ;
Rhyme 0:d177a32f8f36 153 *high = (data[1] << 8) | data[0] ;
Rhyme 0:d177a32f8f36 154 *low = (data[3] << 8) | data[2] ;
Rhyme 0:d177a32f8f36 155 }
Rhyme 0:d177a32f8f36 156
Rhyme 0:d177a32f8f36 157 void AK9752::setTHTMP(int16_t high, int16_t low)
Rhyme 0:d177a32f8f36 158 {
Rhyme 0:d177a32f8f36 159 uint8_t data[5] ;
Rhyme 0:d177a32f8f36 160 data[0] = REG_THTMPH_LSB ;
Rhyme 0:d177a32f8f36 161 data[1] = high & 0xFF ;
Rhyme 0:d177a32f8f36 162 data[2] = (high >> 8) & 0xFF ;
Rhyme 0:d177a32f8f36 163 data[3] = low & 0xFF ;
Rhyme 0:d177a32f8f36 164 data[4] = (low >> 8) & 0xFF ;
Rhyme 0:d177a32f8f36 165 writeRegs(data, 5) ;
Rhyme 0:d177a32f8f36 166 }
Rhyme 0:d177a32f8f36 167
Rhyme 0:d177a32f8f36 168 /**
Rhyme 0:d177a32f8f36 169 * ITEN[4] = IRHI : IR upper threshold interrupt enable
Rhyme 0:d177a32f8f36 170 * ITEN[3] = IRLI : IR lower threshold interrupt enable
Rhyme 0:d177a32f8f36 171 * ITEN[2] = TMPHI : Temp upper threshold interrupt enable
Rhyme 0:d177a32f8f36 172 * ITEN[1] = TMPLI : Temp lower threshold interrupt enable
Rhyme 0:d177a32f8f36 173 * ITEN[0] = DRI : Data ready interrupt enable
Rhyme 0:d177a32f8f36 174 */
Rhyme 0:d177a32f8f36 175 uint8_t AK9752::getINTEN(void)
Rhyme 0:d177a32f8f36 176 {
Rhyme 0:d177a32f8f36 177 uint8_t value ;
Rhyme 0:d177a32f8f36 178 readRegs(REG_INTEN, &value, 1) ;
Rhyme 0:d177a32f8f36 179 return(value) ;
Rhyme 0:d177a32f8f36 180 }
Rhyme 0:d177a32f8f36 181
Rhyme 0:d177a32f8f36 182 void AK9752::setINTEN(uint8_t value)
Rhyme 0:d177a32f8f36 183 {
Rhyme 0:d177a32f8f36 184 uint8_t t[2] ;
Rhyme 0:d177a32f8f36 185 t[0] = REG_INTEN ;
Rhyme 0:d177a32f8f36 186 t[1] = value ;
Rhyme 0:d177a32f8f36 187 writeRegs(t, 2) ;
Rhyme 0:d177a32f8f36 188 }
Rhyme 0:d177a32f8f36 189
Rhyme 0:d177a32f8f36 190 /**
Rhyme 0:d177a32f8f36 191 * CNTL1
Rhyme 0:d177a32f8f36 192 * CNTL1[4:2] = FCTMP[2:0]
Rhyme 0:d177a32f8f36 193 * FCTMP = 000 : no digital filter
Rhyme 0:d177a32f8f36 194 * FCTMP = 001 : Fc = 2.5Hz
Rhyme 0:d177a32f8f36 195 * FCTMP = 010 : Fc = 0.9Hz
Rhyme 0:d177a32f8f36 196 * FCTMP = 011 : Fc = 0.45Hz
Rhyme 0:d177a32f8f36 197 * FCTMP = 100 : Fc = 0.22Hz
Rhyme 0:d177a32f8f36 198 * FCTMP = other : (reserved)
Rhyme 0:d177a32f8f36 199 * CNTL1[1:0] = FCIR[1:0]
Rhyme 0:d177a32f8f36 200 * FCIR = 00 : no digital filter
Rhyme 0:d177a32f8f36 201 * FCIR = 01 : Fc = 2.5Hz
Rhyme 0:d177a32f8f36 202 * FCIR = 10 : Fc = 0.9Hz
Rhyme 0:d177a32f8f36 203 * FCIR = 11 : Fc = 0.45Hz
Rhyme 0:d177a32f8f36 204 */
Rhyme 0:d177a32f8f36 205 uint8_t AK9752::getCNTL1(void)
Rhyme 0:d177a32f8f36 206 {
Rhyme 0:d177a32f8f36 207 uint8_t value ;
Rhyme 0:d177a32f8f36 208 readRegs(REG_CNTL1, &value, 1) ;
Rhyme 0:d177a32f8f36 209 return(value) ;
Rhyme 0:d177a32f8f36 210 }
Rhyme 0:d177a32f8f36 211
Rhyme 0:d177a32f8f36 212 void AK9752::setCNTL1(uint8_t value)
Rhyme 0:d177a32f8f36 213 {
Rhyme 0:d177a32f8f36 214 uint8_t t[2] ;
Rhyme 0:d177a32f8f36 215 t[0] = REG_CNTL1 ;
Rhyme 0:d177a32f8f36 216 t[1] = value ;
Rhyme 0:d177a32f8f36 217 writeRegs(t, 2) ;
Rhyme 0:d177a32f8f36 218 }
Rhyme 0:d177a32f8f36 219
Rhyme 0:d177a32f8f36 220 /**
Rhyme 0:d177a32f8f36 221 * CNTL2
Rhyme 0:d177a32f8f36 222 * CNTL2[1:0] = MODE[1:0]
Rhyme 0:d177a32f8f36 223 * MODE = 00 : standby
Rhyme 0:d177a32f8f36 224 * MODE = 01 : continuous measure
Rhyme 0:d177a32f8f36 225 * MODE = 10 : single shot
Rhyme 0:d177a32f8f36 226 * MODE = 11 : (reserved)
Rhyme 0:d177a32f8f36 227 */
Rhyme 0:d177a32f8f36 228 uint8_t AK9752::getCNTL2(void)
Rhyme 0:d177a32f8f36 229 {
Rhyme 0:d177a32f8f36 230 uint8_t value ;
Rhyme 0:d177a32f8f36 231 readRegs(REG_CNTL2, &value, 1) ;
Rhyme 0:d177a32f8f36 232 return(value) ;
Rhyme 0:d177a32f8f36 233 }
Rhyme 0:d177a32f8f36 234
Rhyme 0:d177a32f8f36 235 void AK9752::setCNTL2(uint8_t value)
Rhyme 0:d177a32f8f36 236 {
Rhyme 0:d177a32f8f36 237 uint8_t t[2] ;
Rhyme 0:d177a32f8f36 238 t[0] = REG_CNTL2 ;
Rhyme 0:d177a32f8f36 239 t[1] = value ;
Rhyme 0:d177a32f8f36 240 writeRegs(t, 2) ;
Rhyme 0:d177a32f8f36 241 }
Rhyme 0:d177a32f8f36 242
Rhyme 0:d177a32f8f36 243 void AK9752::software_reset(void)
Rhyme 0:d177a32f8f36 244 {
Rhyme 0:d177a32f8f36 245 uint8_t t[2] = { REG_CNTL3, 0xFF } ;
Rhyme 0:d177a32f8f36 246 writeRegs(t, 2) ;
Rhyme 0:d177a32f8f36 247 }