Lancaster University / mbed-src

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targets/hal/TARGET_NXP/TARGET_LPC11U6X/us_ticker.c@641:be9b2017785a, 2016-07-13 (annotated)

Committer:
LancasterUniversity
Date:
Wed Jul 13 12:52:54 2016 +0100
Revision:
641:be9b2017785a
Parent:
304:89b9c3a9a045 
Synchronized with git rev 1fb8ab4c

Author: James Devine

mbed-classic: BUGFIX for timer when using wait_ms from interrupt context



Previously if a user used wait[_ms,_us] in interrupt context the device would

hang indefinitely. This was due to incrementing overflowCount from

interrupt context only.



This meant that if a user used wait[_ms,_us] in an ISR with

the same or greater interrupt priority, it would result in an infinite

loop as the overflowCount variable would never be incremented, and

wait[_ms,_us] would never return.



This patch simply applies a better solution for the race condition

mentioned in the previous commit. It instead disables the timer1

interrupt and increments the overflowCount variable, preventing

the race condition whilst supporting wait[_ms,_us] in interrupt

context.

Who changed what in which revision?

UserRevisionLine numberNew contents of line
mbed_official 174:8bb9f3a33240 1 /* mbed Microcontroller Library
mbed_official 174:8bb9f3a33240 2 * Copyright (c) 2006-2013 ARM Limited
mbed_official 174:8bb9f3a33240 3 *
mbed_official 174:8bb9f3a33240 4 * Licensed under the Apache License, Version 2.0 (the "License");
mbed_official 174:8bb9f3a33240 5 * you may not use this file except in compliance with the License.
mbed_official 174:8bb9f3a33240 6 * You may obtain a copy of the License at
mbed_official 174:8bb9f3a33240 7 *
mbed_official 174:8bb9f3a33240 8 * http://www.apache.org/licenses/LICENSE-2.0
mbed_official 174:8bb9f3a33240 9 *
mbed_official 174:8bb9f3a33240 10 * Unless required by applicable law or agreed to in writing, software
mbed_official 174:8bb9f3a33240 11 * distributed under the License is distributed on an "AS IS" BASIS,
mbed_official 174:8bb9f3a33240 12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
mbed_official 174:8bb9f3a33240 13 * See the License for the specific language governing permissions and
mbed_official 174:8bb9f3a33240 14 * limitations under the License.
mbed_official 174:8bb9f3a33240 15 */
mbed_official 174:8bb9f3a33240 16 #include <stddef.h>
mbed_official 174:8bb9f3a33240 17 #include "us_ticker_api.h"
mbed_official 174:8bb9f3a33240 18 #include "PeripheralNames.h"
mbed_official 174:8bb9f3a33240 19
mbed_official 174:8bb9f3a33240 20 #define US_TICKER_TIMER ((LPC_CT32B0_Type *)LPC_CT32B1_BASE)
mbed_official 174:8bb9f3a33240 21 #define US_TICKER_TIMER_IRQn CT32B1_IRQn
mbed_official 174:8bb9f3a33240 22
mbed_official 174:8bb9f3a33240 23 int us_ticker_inited = 0;
mbed_official 174:8bb9f3a33240 24
mbed_official 174:8bb9f3a33240 25 void us_ticker_init(void) {
mbed_official 174:8bb9f3a33240 26 if (us_ticker_inited) return;
mbed_official 174:8bb9f3a33240 27 us_ticker_inited = 1;
mbed_official 174:8bb9f3a33240 28
mbed_official 174:8bb9f3a33240 29 LPC_SYSCON->SYSAHBCLKCTRL |= (1<<10); // Clock CT32B1
mbed_official 186:2e805bf06ee4 30 uint32_t PCLK = SystemCoreClock;
mbed_official 174:8bb9f3a33240 31
mbed_official 174:8bb9f3a33240 32 US_TICKER_TIMER->TCR = 0x2; // reset
mbed_official 174:8bb9f3a33240 33
mbed_official 174:8bb9f3a33240 34 uint32_t prescale = PCLK / 1000000; // default to 1MHz (1 us ticks)
mbed_official 174:8bb9f3a33240 35 US_TICKER_TIMER->PR = prescale - 1;
mbed_official 174:8bb9f3a33240 36 US_TICKER_TIMER->TCR = 1; // enable = 1, reset = 0
mbed_official 174:8bb9f3a33240 37
mbed_official 174:8bb9f3a33240 38 NVIC_SetVector(US_TICKER_TIMER_IRQn, (uint32_t)us_ticker_irq_handler);
mbed_official 174:8bb9f3a33240 39 NVIC_EnableIRQ(US_TICKER_TIMER_IRQn);
mbed_official 174:8bb9f3a33240 40 }
mbed_official 174:8bb9f3a33240 41
mbed_official 174:8bb9f3a33240 42 uint32_t us_ticker_read() {
mbed_official 174:8bb9f3a33240 43 if (!us_ticker_inited)
mbed_official 174:8bb9f3a33240 44 us_ticker_init();
mbed_official 174:8bb9f3a33240 45
mbed_official 174:8bb9f3a33240 46 return US_TICKER_TIMER->TC;
mbed_official 174:8bb9f3a33240 47 }
mbed_official 174:8bb9f3a33240 48
mbed_official 304:89b9c3a9a045 49 void us_ticker_set_interrupt(timestamp_t timestamp) {
mbed_official 174:8bb9f3a33240 50 // set match value
mbed_official 304:89b9c3a9a045 51 US_TICKER_TIMER->MR0 = (uint32_t)timestamp;
mbed_official 174:8bb9f3a33240 52 // enable match interrupt
mbed_official 174:8bb9f3a33240 53 US_TICKER_TIMER->MCR |= 1;
mbed_official 174:8bb9f3a33240 54 }
mbed_official 174:8bb9f3a33240 55
mbed_official 174:8bb9f3a33240 56 void us_ticker_disable_interrupt(void) {
mbed_official 174:8bb9f3a33240 57 US_TICKER_TIMER->MCR &= ~1;
mbed_official 174:8bb9f3a33240 58 }
mbed_official 174:8bb9f3a33240 59
mbed_official 174:8bb9f3a33240 60 void us_ticker_clear_interrupt(void) {
mbed_official 174:8bb9f3a33240 61 US_TICKER_TIMER->IR = 1;
mbed_official 174:8bb9f3a33240 62 }