edge_reset_mgr.cpp

00001 #include "mbed.h"
00002 #include "edge_reset_mgr.h"
00003 
00004 /**
00005   * System Reset Status Register 0 (RCM_SRS0) 0x4007_F000
00006   *
00007   * bit[7] : POR         Power-On Reset
00008   * bit[6] : PIN         External Reset Pin
00009   * bit[5] : WDOG        Watchdog
00010   * bit[4] : (Reserved)
00011   * bit[3] : LOL         Loss-of-Lock Reset
00012   * bit[2] : LOC         Loss-of-Clock Reset
00013   * bit[1] : LVD         Low-Voltage Detect Reset
00014   * bit[0] : WAKEUP      Low Leakage Wakeup Reset
00015   */
00016 #define REG_RCM_SRS0    (uint8_t *)0x4007F000
00017 #define POR_RESET_BIT   0x80
00018 #define PIN_RESET_BIT   0x40
00019 #define WDG_RESET_BIT   0x20
00020 #define LOL_RESET_BIT   0x08
00021 #define LOC_RESET_BIT   0x04
00022 #define LVD_RESET_BIT   0x02
00023 #define WUP_RESET_BIT   0x01
00024 
00025   /**
00026    * System Reset Status Register 1 (RCM_SRS1) 0x4007_F001
00027    *
00028    * bit[7:6] (Reserved)
00029    * bit[5] : SACKERR     Stop Mode Acknowledge Error Reset
00030    * bit[4] : (Reserved)
00031    * bit[3] : MDM_AP      MDM-AP System Reset Request
00032    * bit[2] : SW          Software Reset
00033    * bit[1] : LOCKUP      Core Lockup
00034    * bit[0] : (Reserved)
00035    */
00036 #define REG_RCM_SRS1     (uint8_t *)0x4007F001
00037 #define SACK_RESET_BIT   0x20
00038 #define MDM_RESET_BIT    0x08
00039 #define SW_RESET_BIT     0x04
00040 #define LOCKUP_RESET_BIT 0x02
00041 
00042 #define IDX_POR_RESET    0
00043 #define IDX_PIN_RESET    1
00044 #define IDX_WDG_RESET    2
00045 #define IDX_LOL_RESET    3
00046 #define IDX_LOC_RESET    4
00047 #define IDX_LVD_RESET    5
00048 #define IDX_WUP_RESET    6
00049 #define IDX_SACK_RESET   7
00050 #define IDX_MDM_RESET    8
00051 #define IDX_SW_RESET     9
00052 #define IDX_LOCKUP_RESET 10 
00053 
00054 const char *reset_reason[] = {
00055     "Power On Reset",
00056     "Reset Pin Asserted",
00057     "Watch Dog Reset",
00058     "Loss of Lock Reset",
00059     "Loss of Clock Reset",
00060     "Low Voltage Detect Reset",
00061     "Low Leakage Wakeup Reset",
00062     "Stop Mode Acknowledge Error Reset",
00063     "MDM-AP System Reset Request",
00064     "Software Reset",
00065     "Core Lockup Reset",
00066     0
00067 } ;
00068 
00069 void print_reset_reason(void) 
00070 {
00071     extern char *reset_reason_str ;
00072     int idx = 0 ;
00073     uint8_t *data = REG_RCM_SRS0 ;
00074     if (*data & POR_RESET_BIT) {
00075         idx = IDX_POR_RESET ;
00076     }
00077     if (*data & PIN_RESET_BIT) {
00078         idx = IDX_PIN_RESET ; 
00079     }
00080     if (*data & WDG_RESET_BIT) {
00081         idx = IDX_WDG_RESET ; 
00082     }
00083     if (*data & LOL_RESET_BIT) {
00084         idx = IDX_LOL_RESET ;
00085     }
00086     if (*data & LVD_RESET_BIT) {
00087         idx = IDX_LVD_RESET ;
00088     }  
00089     if (*data & LOC_RESET_BIT) {
00090         idx = IDX_LOC_RESET ;
00091     }
00092     if (*data & WUP_RESET_BIT) {
00093         idx = IDX_WUP_RESET ;
00094     }
00095     data = REG_RCM_SRS1 ;
00096     if (*data & SACK_RESET_BIT) {
00097         idx = IDX_SACK_RESET ;
00098     }
00099     if (*data & MDM_RESET_BIT) {
00100         idx = IDX_MDM_RESET ;
00101     }
00102     if (*data & SW_RESET_BIT) {
00103         idx = IDX_SW_RESET ;
00104     }
00105     if (*data & LOCKUP_RESET_BIT) {
00106         idx = IDX_LOCKUP_RESET ;
00107     }
00108     printf("%s\n", reset_reason[idx]) ;
00109     reset_reason_str = (char *)reset_reason[idx] ;
00110 }
00111 
00112 /**
00113  * Software Reset
00114  * 
00115  * From Cortex-M0 Devices Generic User Guide
00116  * 4.3.4 Application Interrupt and Reset Control Register
00117  *
00118  * Bit[31:16] : VECTCKEY
00119  * Bit[15]    : ENDIANESS
00120  * Bit[14:3]  : (Reserved)
00121  * Bit[2]     : SYSRESETREQ
00122  * Bit[1]     : VECTCLRACTIVE (reserved for debug use)
00123  * Bit[0]     : (Reserved)
00124  *
00125  * Note: To trigger software reset, both VECTKEY=0x05FA and SYSRESETREQ
00126  * must be written at once, therefore the value will be
00127  * 0x05FA0004
00128  */
00129  
00130 void software_reset(void)
00131 {
00132      SCB->AIRCR = 0x05FA0004 ; 
00133 }
00134 
00135 /**
00136  * reset_watch_dog
00137  * reset the watch dog counter
00138  * this function must be called within the limit (1sec)
00139  */
00140  
00141 void reset_watch_dog(void) 
00142 {
00143     SIM->SRVCOP = (uint32_t)0x55u;
00144     SIM->SRVCOP = (uint32_t)0xAAu;
00145 }