LELEC2811 - I&S
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LSM6DSO
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Dependencies: X_NUCLEO_COMMON ST_INTERFACES
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lsm6dso_reg.h
00001 /* 00002 ****************************************************************************** 00003 * @file lsm6dso_reg.h 00004 * @author Sensor Solutions Software Team 00005 * @brief This file contains all the functions prototypes for the 00006 * lsm6dso_reg.c driver. 00007 ****************************************************************************** 00008 * @attention 00009 * 00010 * <h2><center>© COPYRIGHT(c) 2018 STMicroelectronics</center></h2> 00011 * 00012 * Redistribution and use in source and binary forms, with or without 00013 * modification, are permitted provided that the following conditions 00014 * are met: 00015 * 1. Redistributions of source code must retain the above copyright notice, 00016 * this list of conditions and the following disclaimer. 00017 * 2. Redistributions in binary form must reproduce the above copyright 00018 * notice, this list of conditions and the following disclaimer in the 00019 * documentation and/or other materials provided with the distribution. 00020 * 3. Neither the name of STMicroelectronics nor the names of its 00021 * contributors may be used to endorse or promote products derived from 00022 * this software without specific prior written permission. 00023 * 00024 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 00025 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 00026 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 00027 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE 00028 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 00029 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 00030 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 00031 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 00032 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 00033 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 00034 * POSSIBILITY OF SUCH DAMAGE. 00035 * 00036 */ 00037 00038 /* Define to prevent recursive inclusion -------------------------------------*/ 00039 #ifndef LSM6DSO_DRIVER_H 00040 #define LSM6DSO_DRIVER_H 00041 00042 #ifdef __cplusplus 00043 extern "C" { 00044 #endif 00045 00046 /* Includes ------------------------------------------------------------------*/ 00047 #include <stdint.h> 00048 #include <math.h> 00049 00050 /** @addtogroup LSM6DSO 00051 * @{ 00052 * 00053 */ 00054 00055 /** @defgroup LSM6DSO_sensors_common_types 00056 * @{ 00057 * 00058 */ 00059 00060 #ifndef MEMS_SHARED_TYPES 00061 #define MEMS_SHARED_TYPES 00062 00063 /** 00064 * @defgroup axisXbitXX_t 00065 * @brief These unions are useful to represent different sensors data type. 00066 * These unions are not need by the driver. 00067 * 00068 * REMOVING the unions you are compliant with: 00069 * MISRA-C 2012 [Rule 19.2] -> " Union are not allowed " 00070 * 00071 * @{ 00072 * 00073 */ 00074 00075 typedef union { 00076 int16_t i16bit[3]; 00077 uint8_t u8bit[6]; 00078 } axis3bit16_t; 00079 00080 typedef union { 00081 int16_t i16bit; 00082 uint8_t u8bit[2]; 00083 } axis1bit16_t; 00084 00085 typedef union { 00086 int32_t i32bit[3]; 00087 uint8_t u8bit[12]; 00088 } axis3bit32_t; 00089 00090 typedef union { 00091 int32_t i32bit; 00092 uint8_t u8bit[4]; 00093 } axis1bit32_t; 00094 00095 /** 00096 * @} 00097 * 00098 */ 00099 00100 typedef struct { 00101 uint8_t bit0 : 1; 00102 uint8_t bit1 : 1; 00103 uint8_t bit2 : 1; 00104 uint8_t bit3 : 1; 00105 uint8_t bit4 : 1; 00106 uint8_t bit5 : 1; 00107 uint8_t bit6 : 1; 00108 uint8_t bit7 : 1; 00109 } bitwise_t; 00110 00111 #define PROPERTY_DISABLE (0U) 00112 #define PROPERTY_ENABLE (1U) 00113 00114 #endif /* MEMS_SHARED_TYPES */ 00115 00116 /** 00117 * @} 00118 * 00119 */ 00120 00121 /** @addtogroup LSM6DSO_Interfaces_Functions 00122 * @brief This section provide a set of functions used to read and 00123 * write a generic register of the device. 00124 * MANDATORY: return 0 -> no Error. 00125 * @{ 00126 * 00127 */ 00128 00129 typedef int32_t (*lsm6dso_write_ptr)(void *, uint8_t, uint8_t *, uint16_t); 00130 typedef int32_t (*lsm6dso_read_ptr)(void *, uint8_t, uint8_t *, uint16_t); 00131 00132 typedef struct { 00133 /** Component mandatory fields **/ 00134 lsm6dso_write_ptr write_reg; 00135 lsm6dso_read_ptr read_reg; 00136 /** Customizable optional pointer **/ 00137 void *handle; 00138 } lsm6dso_ctx_t; 00139 00140 /** 00141 * @} 00142 * 00143 */ 00144 00145 /** @defgroup LSM6DSO_Infos 00146 * @{ 00147 * 00148 */ 00149 00150 /** I2C Device Address 8 bit format if SA0=0 -> D5 if SA0=1 -> D7 **/ 00151 #define LSM6DSO_I2C_ADD_L 0xD5 00152 #define LSM6DSO_I2C_ADD_H 0xD7 00153 00154 /** Device Identification (Who am I) **/ 00155 #define LSM6DSO_ID 0x6C 00156 00157 /** 00158 * @} 00159 * 00160 */ 00161 00162 #define LSM6DSO_FUNC_CFG_ACCESS 0x01U 00163 typedef struct { 00164 uint8_t not_used_01 : 6; 00165 uint8_t reg_access : 2; /* shub_reg_access + func_cfg_access */ 00166 } lsm6dso_func_cfg_access_t; 00167 00168 #define LSM6DSO_PIN_CTRL 0x02U 00169 typedef struct { 00170 uint8_t not_used_01 : 6; 00171 uint8_t sdo_pu_en : 1; 00172 uint8_t ois_pu_dis : 1; 00173 } lsm6dso_pin_ctrl_t; 00174 00175 #define LSM6DSO_FIFO_CTRL1 0x07U 00176 typedef struct { 00177 uint8_t wtm : 8; 00178 } lsm6dso_fifo_ctrl1_t; 00179 00180 #define LSM6DSO_FIFO_CTRL2 0x08U 00181 typedef struct { 00182 uint8_t wtm : 1; 00183 uint8_t uncoptr_rate : 2; 00184 uint8_t not_used_01 : 1; 00185 uint8_t odrchg_en : 1; 00186 uint8_t not_used_02 : 1; 00187 uint8_t fifo_compr_rt_en : 1; 00188 uint8_t stop_on_wtm : 1; 00189 } lsm6dso_fifo_ctrl2_t; 00190 00191 #define LSM6DSO_FIFO_CTRL3 0x09U 00192 typedef struct { 00193 uint8_t bdr_xl : 4; 00194 uint8_t bdr_gy : 4; 00195 } lsm6dso_fifo_ctrl3_t; 00196 00197 #define LSM6DSO_FIFO_CTRL4 0x0AU 00198 typedef struct { 00199 uint8_t fifo_mode : 3; 00200 uint8_t not_used_01 : 1; 00201 uint8_t odr_t_batch : 2; 00202 uint8_t odr_ts_batch : 2; 00203 } lsm6dso_fifo_ctrl4_t; 00204 00205 #define LSM6DSO_COUNTER_BDR_REG1 0x0BU 00206 typedef struct { 00207 uint8_t cnt_bdr_th : 3; 00208 uint8_t not_used_01 : 2; 00209 uint8_t trig_counter_bdr : 1; 00210 uint8_t rst_counter_bdr : 1; 00211 uint8_t dataready_pulsed : 1; 00212 } lsm6dso_counter_bdr_reg1_t; 00213 00214 #define LSM6DSO_COUNTER_BDR_REG2 0x0CU 00215 typedef struct { 00216 uint8_t cnt_bdr_th : 8; 00217 } lsm6dso_counter_bdr_reg2_t; 00218 00219 #define LSM6DSO_INT1_CTRL 0x0D 00220 typedef struct { 00221 uint8_t int1_drdy_xl : 1; 00222 uint8_t int1_drdy_g : 1; 00223 uint8_t int1_boot : 1; 00224 uint8_t int1_fifo_th : 1; 00225 uint8_t int1_fifo_ovr : 1; 00226 uint8_t int1_fifo_full : 1; 00227 uint8_t int1_cnt_bdr : 1; 00228 uint8_t den_drdy_flag : 1; 00229 } lsm6dso_int1_ctrl_t; 00230 00231 #define LSM6DSO_INT2_CTRL 0x0EU 00232 typedef struct { 00233 uint8_t int2_drdy_xl : 1; 00234 uint8_t int2_drdy_g : 1; 00235 uint8_t int2_drdy_temp : 1; 00236 uint8_t int2_fifo_th : 1; 00237 uint8_t int2_fifo_ovr : 1; 00238 uint8_t int2_fifo_full : 1; 00239 uint8_t int2_cnt_bdr : 1; 00240 uint8_t not_used_01 : 1; 00241 } lsm6dso_int2_ctrl_t; 00242 00243 #define LSM6DSO_WHO_AM_I 0x0FU 00244 #define LSM6DSO_CTRL1_XL 0x10U 00245 typedef struct { 00246 uint8_t not_used_01 : 1; 00247 uint8_t lpf2_xl_en : 1; 00248 uint8_t fs_xl : 2; 00249 uint8_t odr_xl : 4; 00250 } lsm6dso_ctrl1_xl_t; 00251 00252 #define LSM6DSO_CTRL2_G 0x11U 00253 typedef struct { 00254 uint8_t not_used_01 : 1; 00255 uint8_t fs_g : 3; /* fs_125 + fs_g */ 00256 uint8_t odr_g : 4; 00257 } lsm6dso_ctrl2_g_t; 00258 00259 #define LSM6DSO_CTRL3_C 0x12U 00260 typedef struct { 00261 uint8_t sw_reset : 1; 00262 uint8_t not_used_01 : 1; 00263 uint8_t if_inc : 1; 00264 uint8_t sim : 1; 00265 uint8_t pp_od : 1; 00266 uint8_t h_lactive : 1; 00267 uint8_t bdu : 1; 00268 uint8_t boot : 1; 00269 } lsm6dso_ctrl3_c_t; 00270 00271 #define LSM6DSO_CTRL4_C 0x13U 00272 typedef struct { 00273 uint8_t not_used_01 : 1; 00274 uint8_t lpf1_sel_g : 1; 00275 uint8_t i2c_disable : 1; 00276 uint8_t drdy_mask : 1; 00277 uint8_t not_used_02 : 1; 00278 uint8_t int2_on_int1 : 1; 00279 uint8_t sleep_g : 1; 00280 uint8_t not_used_03 : 1; 00281 } lsm6dso_ctrl4_c_t; 00282 00283 #define LSM6DSO_CTRL5_C 0x14U 00284 typedef struct { 00285 uint8_t st_xl : 2; 00286 uint8_t st_g : 2; 00287 uint8_t not_used_01 : 1; 00288 uint8_t rounding : 2; 00289 uint8_t xl_ulp_en : 1; 00290 } lsm6dso_ctrl5_c_t; 00291 00292 #define LSM6DSO_CTRL6_C 0x15U 00293 typedef struct { 00294 uint8_t ftype : 3; 00295 uint8_t usr_off_w : 1; 00296 uint8_t xl_hm_mode : 1; 00297 uint8_t den_mode : 3; /* trig_en + lvl1_en + lvl2_en */ 00298 } lsm6dso_ctrl6_c_t; 00299 00300 #define LSM6DSO_CTRL7_G 0x16U 00301 typedef struct { 00302 uint8_t ois_on : 1; 00303 uint8_t usr_off_on_out : 1; 00304 uint8_t ois_on_en : 1; 00305 uint8_t not_used_01 : 1; 00306 uint8_t hpm_g : 2; 00307 uint8_t hp_en_g : 1; 00308 uint8_t g_hm_mode : 1; 00309 } lsm6dso_ctrl7_g_t; 00310 00311 #define LSM6DSO_CTRL8_XL 0x17U 00312 typedef struct { 00313 uint8_t low_pass_on_6d : 1; 00314 uint8_t xl_fs_mode : 1; 00315 uint8_t hp_slope_xl_en : 1; 00316 uint8_t fastsettl_mode_xl : 1; 00317 uint8_t hp_ref_mode_xl : 1; 00318 uint8_t hpcf_xl : 3; 00319 } lsm6dso_ctrl8_xl_t; 00320 00321 #define LSM6DSO_CTRL9_XL 0x18U 00322 typedef struct { 00323 uint8_t not_used_01 : 1; 00324 uint8_t i3c_disable : 1; 00325 uint8_t den_lh : 1; 00326 uint8_t den_xl_g : 2; /* den_xl_en + den_xl_g */ 00327 uint8_t den_z : 1; 00328 uint8_t den_y : 1; 00329 uint8_t den_x : 1; 00330 } lsm6dso_ctrl9_xl_t; 00331 00332 #define LSM6DSO_CTRL10_C 0x19U 00333 typedef struct { 00334 uint8_t not_used_01 : 5; 00335 uint8_t timestamp_en : 1; 00336 uint8_t not_used_02 : 2; 00337 } lsm6dso_ctrl10_c_t; 00338 00339 #define LSM6DSO_ALL_INT_SRC 0x1AU 00340 typedef struct { 00341 uint8_t ff_ia : 1; 00342 uint8_t wu_ia : 1; 00343 uint8_t single_tap : 1; 00344 uint8_t double_tap : 1; 00345 uint8_t d6d_ia : 1; 00346 uint8_t sleep_change_ia : 1; 00347 uint8_t not_used_01 : 1; 00348 uint8_t timestamp_endcount : 1; 00349 } lsm6dso_all_int_src_t; 00350 00351 #define LSM6DSO_WAKE_UP_SRC 0x1BU 00352 typedef struct { 00353 uint8_t z_wu : 1; 00354 uint8_t y_wu : 1; 00355 uint8_t x_wu : 1; 00356 uint8_t wu_ia : 1; 00357 uint8_t sleep_state : 1; 00358 uint8_t ff_ia : 1; 00359 uint8_t sleep_change_ia : 1; 00360 uint8_t not_used_01 : 1; 00361 } lsm6dso_wake_up_src_t; 00362 00363 #define LSM6DSO_TAP_SRC 0x1CU 00364 typedef struct { 00365 uint8_t z_tap : 1; 00366 uint8_t y_tap : 1; 00367 uint8_t x_tap : 1; 00368 uint8_t tap_sign : 1; 00369 uint8_t double_tap : 1; 00370 uint8_t single_tap : 1; 00371 uint8_t tap_ia : 1; 00372 uint8_t not_used_02 : 1; 00373 } lsm6dso_tap_src_t; 00374 00375 #define LSM6DSO_D6D_SRC 0x1DU 00376 typedef struct { 00377 uint8_t xl : 1; 00378 uint8_t xh : 1; 00379 uint8_t yl : 1; 00380 uint8_t yh : 1; 00381 uint8_t zl : 1; 00382 uint8_t zh : 1; 00383 uint8_t d6d_ia : 1; 00384 uint8_t den_drdy : 1; 00385 } lsm6dso_d6d_src_t; 00386 00387 #define LSM6DSO_STATUS_REG 0x1EU 00388 typedef struct { 00389 uint8_t xlda : 1; 00390 uint8_t gda : 1; 00391 uint8_t tda : 1; 00392 uint8_t not_used_01 : 5; 00393 } lsm6dso_status_reg_t; 00394 00395 #define LSM6DSO_STATUS_SPIAUX 0x1EU 00396 typedef struct { 00397 uint8_t xlda : 1; 00398 uint8_t gda : 1; 00399 uint8_t gyro_settling : 1; 00400 uint8_t not_used_01 : 5; 00401 } lsm6dso_status_spiaux_t; 00402 00403 #define LSM6DSO_OUT_TEMP_L 0x20U 00404 #define LSM6DSO_OUT_TEMP_H 0x21U 00405 #define LSM6DSO_OUTX_L_G 0x22U 00406 #define LSM6DSO_OUTX_H_G 0x23U 00407 #define LSM6DSO_OUTY_L_G 0x24U 00408 #define LSM6DSO_OUTY_H_G 0x25U 00409 #define LSM6DSO_OUTZ_L_G 0x26U 00410 #define LSM6DSO_OUTZ_H_G 0x27U 00411 #define LSM6DSO_OUTX_L_A 0x28U 00412 #define LSM6DSO_OUTX_H_A 0x29U 00413 #define LSM6DSO_OUTY_L_A 0x2AU 00414 #define LSM6DSO_OUTY_H_A 0x2BU 00415 #define LSM6DSO_OUTZ_L_A 0x2CU 00416 #define LSM6DSO_OUTZ_H_A 0x2DU 00417 #define LSM6DSO_EMB_FUNC_STATUS_MAINPAGE 0x35U 00418 typedef struct { 00419 uint8_t not_used_01 : 3; 00420 uint8_t is_step_det : 1; 00421 uint8_t is_tilt : 1; 00422 uint8_t is_sigmot : 1; 00423 uint8_t not_used_02 : 1; 00424 uint8_t is_fsm_lc : 1; 00425 } lsm6dso_emb_func_status_mainpage_t; 00426 00427 #define LSM6DSO_FSM_STATUS_A_MAINPAGE 0x36U 00428 typedef struct { 00429 uint8_t is_fsm1 : 1; 00430 uint8_t is_fsm2 : 1; 00431 uint8_t is_fsm3 : 1; 00432 uint8_t is_fsm4 : 1; 00433 uint8_t is_fsm5 : 1; 00434 uint8_t is_fsm6 : 1; 00435 uint8_t is_fsm7 : 1; 00436 uint8_t is_fsm8 : 1; 00437 } lsm6dso_fsm_status_a_mainpage_t; 00438 00439 #define LSM6DSO_FSM_STATUS_B_MAINPAGE 0x37U 00440 typedef struct { 00441 uint8_t IS_FSM9 : 1; 00442 uint8_t IS_FSM10 : 1; 00443 uint8_t IS_FSM11 : 1; 00444 uint8_t IS_FSM12 : 1; 00445 uint8_t IS_FSM13 : 1; 00446 uint8_t IS_FSM14 : 1; 00447 uint8_t IS_FSM15 : 1; 00448 uint8_t IS_FSM16 : 1; 00449 } lsm6dso_fsm_status_b_mainpage_t; 00450 00451 #define LSM6DSO_STATUS_MASTER_MAINPAGE 0x39U 00452 typedef struct { 00453 uint8_t sens_hub_endop : 1; 00454 uint8_t not_used_01 : 2; 00455 uint8_t slave0_nack : 1; 00456 uint8_t slave1_nack : 1; 00457 uint8_t slave2_nack : 1; 00458 uint8_t slave3_nack : 1; 00459 uint8_t wr_once_done : 1; 00460 } lsm6dso_status_master_mainpage_t; 00461 00462 #define LSM6DSO_FIFO_STATUS1 0x3AU 00463 typedef struct { 00464 uint8_t diff_fifo : 8; 00465 } lsm6dso_fifo_status1_t; 00466 00467 #define LSM6DSO_FIFO_STATUS2 0x3B 00468 typedef struct { 00469 uint8_t diff_fifo : 2; 00470 uint8_t not_used_01 : 1; 00471 uint8_t over_run_latched : 1; 00472 uint8_t counter_bdr_ia : 1; 00473 uint8_t fifo_full_ia : 1; 00474 uint8_t fifo_ovr_ia : 1; 00475 uint8_t fifo_wtm_ia : 1; 00476 } lsm6dso_fifo_status2_t; 00477 00478 #define LSM6DSO_TIMESTAMP0 0x40U 00479 #define LSM6DSO_TIMESTAMP1 0x41U 00480 #define LSM6DSO_TIMESTAMP2 0x42U 00481 #define LSM6DSO_TIMESTAMP3 0x43U 00482 #define LSM6DSO_TAP_CFG0 0x56U 00483 typedef struct { 00484 uint8_t lir : 1; 00485 uint8_t tap_z_en : 1; 00486 uint8_t tap_y_en : 1; 00487 uint8_t tap_x_en : 1; 00488 uint8_t slope_fds : 1; 00489 uint8_t sleep_status_on_int : 1; 00490 uint8_t int_clr_on_read : 1; 00491 uint8_t not_used_01 : 1; 00492 } lsm6dso_tap_cfg0_t; 00493 00494 #define LSM6DSO_TAP_CFG1 0x57U 00495 typedef struct { 00496 uint8_t tap_ths_x : 5; 00497 uint8_t tap_priority : 3; 00498 } lsm6dso_tap_cfg1_t; 00499 00500 #define LSM6DSO_TAP_CFG2 0x58U 00501 typedef struct { 00502 uint8_t tap_ths_y : 5; 00503 uint8_t inact_en : 2; 00504 uint8_t interrupts_enable : 1; 00505 } lsm6dso_tap_cfg2_t; 00506 00507 #define LSM6DSO_TAP_THS_6D 0x59U 00508 typedef struct { 00509 uint8_t tap_ths_z : 5; 00510 uint8_t sixd_ths : 2; 00511 uint8_t d4d_en : 1; 00512 } lsm6dso_tap_ths_6d_t; 00513 00514 #define LSM6DSO_INT_DUR2 0x5AU 00515 typedef struct { 00516 uint8_t shock : 2; 00517 uint8_t quiet : 2; 00518 uint8_t dur : 4; 00519 } lsm6dso_int_dur2_t; 00520 00521 #define LSM6DSO_WAKE_UP_THS 0x5BU 00522 typedef struct { 00523 uint8_t wk_ths : 6; 00524 uint8_t usr_off_on_wu : 1; 00525 uint8_t single_double_tap : 1; 00526 } lsm6dso_wake_up_ths_t; 00527 00528 #define LSM6DSO_WAKE_UP_DUR 0x5CU 00529 typedef struct { 00530 uint8_t sleep_dur : 4; 00531 uint8_t wake_ths_w : 1; 00532 uint8_t wake_dur : 2; 00533 uint8_t ff_dur : 1; 00534 } lsm6dso_wake_up_dur_t; 00535 00536 #define LSM6DSO_FREE_FALL 0x5DU 00537 typedef struct { 00538 uint8_t ff_ths : 3; 00539 uint8_t ff_dur : 5; 00540 } lsm6dso_free_fall_t; 00541 00542 #define LSM6DSO_MD1_CFG 0x5EU 00543 typedef struct { 00544 uint8_t int1_shub : 1; 00545 uint8_t int1_emb_func : 1; 00546 uint8_t int1_6d : 1; 00547 uint8_t int1_double_tap : 1; 00548 uint8_t int1_ff : 1; 00549 uint8_t int1_wu : 1; 00550 uint8_t int1_single_tap : 1; 00551 uint8_t int1_sleep_change : 1; 00552 } lsm6dso_md1_cfg_t; 00553 00554 #define LSM6DSO_MD2_CFG 0x5FU 00555 typedef struct { 00556 uint8_t int2_timestamp : 1; 00557 uint8_t int2_emb_func : 1; 00558 uint8_t int2_6d : 1; 00559 uint8_t int2_double_tap : 1; 00560 uint8_t int2_ff : 1; 00561 uint8_t int2_wu : 1; 00562 uint8_t int2_single_tap : 1; 00563 uint8_t int2_sleep_change : 1; 00564 } lsm6dso_md2_cfg_t; 00565 00566 #define LSM6DSO_I3C_BUS_AVB 0x62U 00567 typedef struct { 00568 uint8_t pd_dis_int1 : 1; 00569 uint8_t not_used_01 : 2; 00570 uint8_t i3c_bus_avb_sel : 2; 00571 uint8_t not_used_02 : 3; 00572 } lsm6dso_i3c_bus_avb_t; 00573 00574 #define LSM6DSO_INTERNAL_FREQ_FINE 0x63U 00575 typedef struct { 00576 uint8_t freq_fine : 8; 00577 } lsm6dso_internal_freq_fine_t; 00578 00579 #define LSM6DSO_INT_OIS 0x6FU 00580 typedef struct { 00581 uint8_t st_xl_ois : 2; 00582 uint8_t not_used_01 : 3; 00583 uint8_t den_lh_ois : 1; 00584 uint8_t lvl2_ois : 1; 00585 uint8_t int2_drdy_ois : 1; 00586 } lsm6dso_int_ois_t; 00587 00588 #define LSM6DSO_CTRL1_OIS 0x70U 00589 typedef struct { 00590 uint8_t ois_en_spi2 : 1; 00591 uint8_t fs_g_ois : 3; /* fs_125_ois + fs[1:0]_g_ois */ 00592 uint8_t mode4_en : 1; 00593 uint8_t sim_ois : 1; 00594 uint8_t lvl1_ois : 1; 00595 uint8_t not_used_01 : 1; 00596 } lsm6dso_ctrl1_ois_t; 00597 00598 #define LSM6DSO_CTRL2_OIS 0x71U 00599 typedef struct { 00600 uint8_t hp_en_ois : 1; 00601 uint8_t ftype_ois : 2; 00602 uint8_t not_used_01 : 1; 00603 uint8_t hpm_ois : 2; 00604 uint8_t not_used_02 : 2; 00605 } lsm6dso_ctrl2_ois_t; 00606 00607 #define LSM6DSO_CTRL3_OIS 0x72U 00608 typedef struct { 00609 uint8_t st_ois_clampdis : 1; 00610 uint8_t st_ois : 2; 00611 uint8_t filter_xl_conf_ois : 3; 00612 uint8_t fs_xl_ois : 2; 00613 } lsm6dso_ctrl3_ois_t; 00614 00615 #define LSM6DSO_X_OFS_USR 0x73U 00616 #define LSM6DSO_Y_OFS_USR 0x74U 00617 #define LSM6DSO_Z_OFS_USR 0x75U 00618 #define LSM6DSO_FIFO_DATA_OUT_TAG 0x78U 00619 typedef struct { 00620 uint8_t tag_parity : 1; 00621 uint8_t tag_cnt : 2; 00622 uint8_t tag_sensor : 5; 00623 } lsm6dso_fifo_data_out_tag_t; 00624 00625 #define LSM6DSO_FIFO_DATA_OUT_X_L 0x79U 00626 #define LSM6DSO_FIFO_DATA_OUT_X_H 0x7AU 00627 #define LSM6DSO_FIFO_DATA_OUT_Y_L 0x7BU 00628 #define LSM6DSO_FIFO_DATA_OUT_Y_H 0x7CU 00629 #define LSM6DSO_FIFO_DATA_OUT_Z_L 0x7DU 00630 #define LSM6DSO_FIFO_DATA_OUT_Z_H 0x7EU 00631 #define LSM6DSO_PAGE_SEL 0x02U 00632 typedef struct { 00633 uint8_t not_used_01 : 4; 00634 uint8_t page_sel : 4; 00635 } lsm6dso_page_sel_t; 00636 00637 #define LSM6DSO_EMB_FUNC_EN_A 0x04U 00638 typedef struct { 00639 uint8_t not_used_01 : 3; 00640 uint8_t pedo_en : 1; 00641 uint8_t tilt_en : 1; 00642 uint8_t sign_motion_en : 1; 00643 uint8_t not_used_02 : 2; 00644 } lsm6dso_emb_func_en_a_t; 00645 00646 #define LSM6DSO_EMB_FUNC_EN_B 0x05U 00647 typedef struct { 00648 uint8_t fsm_en : 1; 00649 uint8_t not_used_01 : 2; 00650 uint8_t fifo_compr_en : 1; 00651 uint8_t pedo_adv_en : 1; 00652 uint8_t not_used_02 : 3; 00653 } lsm6dso_emb_func_en_b_t; 00654 00655 #define LSM6DSO_PAGE_ADDRESS 0x08U 00656 typedef struct { 00657 uint8_t page_addr : 8; 00658 } lsm6dso_page_address_t; 00659 00660 #define LSM6DSO_PAGE_VALUE 0x09U 00661 typedef struct { 00662 uint8_t page_value : 8; 00663 } lsm6dso_page_value_t; 00664 00665 #define LSM6DSO_EMB_FUNC_INT1 0x0AU 00666 typedef struct { 00667 uint8_t not_used_01 : 3; 00668 uint8_t int1_step_detector : 1; 00669 uint8_t int1_tilt : 1; 00670 uint8_t int1_sig_mot : 1; 00671 uint8_t not_used_02 : 1; 00672 uint8_t int1_fsm_lc : 1; 00673 } lsm6dso_emb_func_int1_t; 00674 00675 #define LSM6DSO_FSM_INT1_A 0x0BU 00676 typedef struct { 00677 uint8_t int1_fsm1 : 1; 00678 uint8_t int1_fsm2 : 1; 00679 uint8_t int1_fsm3 : 1; 00680 uint8_t int1_fsm4 : 1; 00681 uint8_t int1_fsm5 : 1; 00682 uint8_t int1_fsm6 : 1; 00683 uint8_t int1_fsm7 : 1; 00684 uint8_t int1_fsm8 : 1; 00685 } lsm6dso_fsm_int1_a_t; 00686 00687 #define LSM6DSO_FSM_INT1_B 0x0CU 00688 typedef struct { 00689 uint8_t int1_fsm9 : 1; 00690 uint8_t int1_fsm10 : 1; 00691 uint8_t int1_fsm11 : 1; 00692 uint8_t int1_fsm12 : 1; 00693 uint8_t int1_fsm13 : 1; 00694 uint8_t int1_fsm14 : 1; 00695 uint8_t int1_fsm15 : 1; 00696 uint8_t int1_fsm16 : 1; 00697 } lsm6dso_fsm_int1_b_t; 00698 00699 #define LSM6DSO_EMB_FUNC_INT2 0x0EU 00700 typedef struct { 00701 uint8_t not_used_01 : 3; 00702 uint8_t int2_step_detector : 1; 00703 uint8_t int2_tilt : 1; 00704 uint8_t int2_sig_mot : 1; 00705 uint8_t not_used_02 : 1; 00706 uint8_t int2_fsm_lc : 1; 00707 } lsm6dso_emb_func_int2_t; 00708 00709 #define LSM6DSO_FSM_INT2_A 0x0FU 00710 typedef struct { 00711 uint8_t int2_fsm1 : 1; 00712 uint8_t int2_fsm2 : 1; 00713 uint8_t int2_fsm3 : 1; 00714 uint8_t int2_fsm4 : 1; 00715 uint8_t int2_fsm5 : 1; 00716 uint8_t int2_fsm6 : 1; 00717 uint8_t int2_fsm7 : 1; 00718 uint8_t int2_fsm8 : 1; 00719 } lsm6dso_fsm_int2_a_t; 00720 00721 #define LSM6DSO_FSM_INT2_B 0x10U 00722 typedef struct { 00723 uint8_t int2_fsm9 : 1; 00724 uint8_t int2_fsm10 : 1; 00725 uint8_t int2_fsm11 : 1; 00726 uint8_t int2_fsm12 : 1; 00727 uint8_t int2_fsm13 : 1; 00728 uint8_t int2_fsm14 : 1; 00729 uint8_t int2_fsm15 : 1; 00730 uint8_t int2_fsm16 : 1; 00731 } lsm6dso_fsm_int2_b_t; 00732 00733 #define LSM6DSO_EMB_FUNC_STATUS 0x12U 00734 typedef struct { 00735 uint8_t not_used_01 : 3; 00736 uint8_t is_step_det : 1; 00737 uint8_t is_tilt : 1; 00738 uint8_t is_sigmot : 1; 00739 uint8_t not_used_02 : 1; 00740 uint8_t is_fsm_lc : 1; 00741 } lsm6dso_emb_func_status_t; 00742 00743 #define LSM6DSO_FSM_STATUS_A 0x13U 00744 typedef struct { 00745 uint8_t is_fsm1 : 1; 00746 uint8_t is_fsm2 : 1; 00747 uint8_t is_fsm3 : 1; 00748 uint8_t is_fsm4 : 1; 00749 uint8_t is_fsm5 : 1; 00750 uint8_t is_fsm6 : 1; 00751 uint8_t is_fsm7 : 1; 00752 uint8_t is_fsm8 : 1; 00753 } lsm6dso_fsm_status_a_t; 00754 00755 #define LSM6DSO_FSM_STATUS_B 0x14U 00756 typedef struct { 00757 uint8_t is_fsm9 : 1; 00758 uint8_t is_fsm10 : 1; 00759 uint8_t is_fsm11 : 1; 00760 uint8_t is_fsm12 : 1; 00761 uint8_t is_fsm13 : 1; 00762 uint8_t is_fsm14 : 1; 00763 uint8_t is_fsm15 : 1; 00764 uint8_t is_fsm16 : 1; 00765 } lsm6dso_fsm_status_b_t; 00766 00767 #define LSM6DSO_PAGE_RW 0x17U 00768 typedef struct { 00769 uint8_t not_used_01 : 5; 00770 uint8_t page_rw : 2; /* page_write + page_read */ 00771 uint8_t emb_func_lir : 1; 00772 } lsm6dso_page_rw_t; 00773 00774 #define LSM6DSO_EMB_FUNC_FIFO_CFG 0x44U 00775 typedef struct { 00776 uint8_t not_used_00 : 6; 00777 uint8_t pedo_fifo_en : 1; 00778 uint8_t not_used_01 : 1; 00779 } lsm6dso_emb_func_fifo_cfg_t; 00780 00781 #define LSM6DSO_FSM_ENABLE_A 0x46U 00782 typedef struct { 00783 uint8_t fsm1_en : 1; 00784 uint8_t fsm2_en : 1; 00785 uint8_t fsm3_en : 1; 00786 uint8_t fsm4_en : 1; 00787 uint8_t fsm5_en : 1; 00788 uint8_t fsm6_en : 1; 00789 uint8_t fsm7_en : 1; 00790 uint8_t fsm8_en : 1; 00791 } lsm6dso_fsm_enable_a_t; 00792 00793 #define LSM6DSO_FSM_ENABLE_B 0x47U 00794 typedef struct { 00795 uint8_t fsm9_en : 1; 00796 uint8_t fsm10_en : 1; 00797 uint8_t fsm11_en : 1; 00798 uint8_t fsm12_en : 1; 00799 uint8_t fsm13_en : 1; 00800 uint8_t fsm14_en : 1; 00801 uint8_t fsm15_en : 1; 00802 uint8_t fsm16_en : 1; 00803 } lsm6dso_fsm_enable_b_t; 00804 00805 #define LSM6DSO_FSM_LONG_COUNTER_L 0x48U 00806 #define LSM6DSO_FSM_LONG_COUNTER_H 0x49U 00807 #define LSM6DSO_FSM_LONG_COUNTER_CLEAR 0x4AU 00808 typedef struct { 00809 uint8_t fsm_lc_clr : 2; /* fsm_lc_cleared + fsm_lc_clear */ 00810 uint8_t not_used_01 : 6; 00811 } lsm6dso_fsm_long_counter_clear_t; 00812 00813 #define LSM6DSO_FSM_OUTS1 0x4CU 00814 typedef struct { 00815 uint8_t n_v : 1; 00816 uint8_t p_v : 1; 00817 uint8_t n_z : 1; 00818 uint8_t p_z : 1; 00819 uint8_t n_y : 1; 00820 uint8_t p_y : 1; 00821 uint8_t n_x : 1; 00822 uint8_t p_x : 1; 00823 } lsm6dso_fsm_outs1_t; 00824 00825 #define LSM6DSO_FSM_OUTS2 0x4DU 00826 typedef struct { 00827 uint8_t n_v : 1; 00828 uint8_t p_v : 1; 00829 uint8_t n_z : 1; 00830 uint8_t p_z : 1; 00831 uint8_t n_y : 1; 00832 uint8_t p_y : 1; 00833 uint8_t n_x : 1; 00834 uint8_t p_x : 1; 00835 } lsm6dso_fsm_outs2_t; 00836 00837 #define LSM6DSO_FSM_OUTS3 0x4EU 00838 typedef struct { 00839 uint8_t n_v : 1; 00840 uint8_t p_v : 1; 00841 uint8_t n_z : 1; 00842 uint8_t p_z : 1; 00843 uint8_t n_y : 1; 00844 uint8_t p_y : 1; 00845 uint8_t n_x : 1; 00846 uint8_t p_x : 1; 00847 } lsm6dso_fsm_outs3_t; 00848 00849 #define LSM6DSO_FSM_OUTS4 0x4FU 00850 typedef struct { 00851 uint8_t n_v : 1; 00852 uint8_t p_v : 1; 00853 uint8_t n_z : 1; 00854 uint8_t p_z : 1; 00855 uint8_t n_y : 1; 00856 uint8_t p_y : 1; 00857 uint8_t n_x : 1; 00858 uint8_t p_x : 1; 00859 } lsm6dso_fsm_outs4_t; 00860 00861 #define LSM6DSO_FSM_OUTS5 0x50U 00862 typedef struct { 00863 uint8_t n_v : 1; 00864 uint8_t p_v : 1; 00865 uint8_t n_z : 1; 00866 uint8_t p_z : 1; 00867 uint8_t n_y : 1; 00868 uint8_t p_y : 1; 00869 uint8_t n_x : 1; 00870 uint8_t p_x : 1; 00871 } lsm6dso_fsm_outs5_t; 00872 00873 #define LSM6DSO_FSM_OUTS6 0x51U 00874 typedef struct { 00875 uint8_t n_v : 1; 00876 uint8_t p_v : 1; 00877 uint8_t n_z : 1; 00878 uint8_t p_z : 1; 00879 uint8_t n_y : 1; 00880 uint8_t p_y : 1; 00881 uint8_t n_x : 1; 00882 uint8_t p_x : 1; 00883 } lsm6dso_fsm_outs6_t; 00884 00885 #define LSM6DSO_FSM_OUTS7 0x52U 00886 typedef struct { 00887 uint8_t n_v : 1; 00888 uint8_t p_v : 1; 00889 uint8_t n_z : 1; 00890 uint8_t p_z : 1; 00891 uint8_t n_y : 1; 00892 uint8_t p_y : 1; 00893 uint8_t n_x : 1; 00894 uint8_t p_x : 1; 00895 } lsm6dso_fsm_outs7_t; 00896 00897 #define LSM6DSO_FSM_OUTS8 0x53U 00898 typedef struct { 00899 uint8_t n_v : 1; 00900 uint8_t p_v : 1; 00901 uint8_t n_z : 1; 00902 uint8_t p_z : 1; 00903 uint8_t n_y : 1; 00904 uint8_t p_y : 1; 00905 uint8_t n_x : 1; 00906 uint8_t p_x : 1; 00907 } lsm6dso_fsm_outs8_t; 00908 00909 #define LSM6DSO_FSM_OUTS9 0x54U 00910 typedef struct { 00911 uint8_t n_v : 1; 00912 uint8_t p_v : 1; 00913 uint8_t n_z : 1; 00914 uint8_t p_z : 1; 00915 uint8_t n_y : 1; 00916 uint8_t p_y : 1; 00917 uint8_t n_x : 1; 00918 uint8_t p_x : 1; 00919 } lsm6dso_fsm_outs9_t; 00920 00921 #define LSM6DSO_FSM_OUTS10 0x55U 00922 typedef struct { 00923 uint8_t n_v : 1; 00924 uint8_t p_v : 1; 00925 uint8_t n_z : 1; 00926 uint8_t p_z : 1; 00927 uint8_t n_y : 1; 00928 uint8_t p_y : 1; 00929 uint8_t n_x : 1; 00930 uint8_t p_x : 1; 00931 } lsm6dso_fsm_outs10_t; 00932 00933 #define LSM6DSO_FSM_OUTS11 0x56U 00934 typedef struct { 00935 uint8_t n_v : 1; 00936 uint8_t p_v : 1; 00937 uint8_t n_z : 1; 00938 uint8_t p_z : 1; 00939 uint8_t n_y : 1; 00940 uint8_t p_y : 1; 00941 uint8_t n_x : 1; 00942 uint8_t p_x : 1; 00943 } lsm6dso_fsm_outs11_t; 00944 00945 #define LSM6DSO_FSM_OUTS12 0x57U 00946 typedef struct { 00947 uint8_t n_v : 1; 00948 uint8_t p_v : 1; 00949 uint8_t n_z : 1; 00950 uint8_t p_z : 1; 00951 uint8_t n_y : 1; 00952 uint8_t p_y : 1; 00953 uint8_t n_x : 1; 00954 uint8_t p_x : 1; 00955 } lsm6dso_fsm_outs12_t; 00956 00957 #define LSM6DSO_FSM_OUTS13 0x58U 00958 typedef struct { 00959 uint8_t n_v : 1; 00960 uint8_t p_v : 1; 00961 uint8_t n_z : 1; 00962 uint8_t p_z : 1; 00963 uint8_t n_y : 1; 00964 uint8_t p_y : 1; 00965 uint8_t n_x : 1; 00966 uint8_t p_x : 1; 00967 } lsm6dso_fsm_outs13_t; 00968 00969 #define LSM6DSO_FSM_OUTS14 0x59U 00970 typedef struct { 00971 uint8_t n_v : 1; 00972 uint8_t p_v : 1; 00973 uint8_t n_z : 1; 00974 uint8_t p_z : 1; 00975 uint8_t n_y : 1; 00976 uint8_t p_y : 1; 00977 uint8_t n_x : 1; 00978 uint8_t p_x : 1; 00979 } lsm6dso_fsm_outs14_t; 00980 00981 #define LSM6DSO_FSM_OUTS15 0x5AU 00982 typedef struct { 00983 uint8_t n_v : 1; 00984 uint8_t p_v : 1; 00985 uint8_t n_z : 1; 00986 uint8_t p_z : 1; 00987 uint8_t n_y : 1; 00988 uint8_t p_y : 1; 00989 uint8_t n_x : 1; 00990 uint8_t p_x : 1; 00991 } lsm6dso_fsm_outs15_t; 00992 00993 #define LSM6DSO_FSM_OUTS16 0x5BU 00994 typedef struct { 00995 uint8_t n_v : 1; 00996 uint8_t p_v : 1; 00997 uint8_t n_z : 1; 00998 uint8_t p_z : 1; 00999 uint8_t n_y : 1; 01000 uint8_t p_y : 1; 01001 uint8_t n_x : 1; 01002 uint8_t p_x : 1; 01003 } lsm6dso_fsm_outs16_t; 01004 01005 #define LSM6DSO_EMB_FUNC_ODR_CFG_B 0x5FU 01006 typedef struct { 01007 uint8_t not_used_01 : 3; 01008 uint8_t fsm_odr : 2; 01009 uint8_t not_used_02 : 3; 01010 } lsm6dso_emb_func_odr_cfg_b_t; 01011 01012 #define LSM6DSO_STEP_COUNTER_L 0x62U 01013 #define LSM6DSO_STEP_COUNTER_H 0x63U 01014 #define LSM6DSO_EMB_FUNC_SRC 0x64U 01015 typedef struct { 01016 uint8_t not_used_01 : 2; 01017 uint8_t stepcounter_bit_set : 1; 01018 uint8_t step_overflow : 1; 01019 uint8_t step_count_delta_ia : 1; 01020 uint8_t step_detected : 1; 01021 uint8_t not_used_02 : 1; 01022 uint8_t pedo_rst_step : 1; 01023 } lsm6dso_emb_func_src_t; 01024 01025 #define LSM6DSO_EMB_FUNC_INIT_A 0x66U 01026 typedef struct { 01027 uint8_t not_used_01 : 3; 01028 uint8_t step_det_init : 1; 01029 uint8_t tilt_init : 1; 01030 uint8_t sig_mot_init : 1; 01031 uint8_t not_used_02 : 2; 01032 } lsm6dso_emb_func_init_a_t; 01033 01034 #define LSM6DSO_EMB_FUNC_INIT_B 0x67U 01035 typedef struct { 01036 uint8_t fsm_init : 1; 01037 uint8_t not_used_01 : 2; 01038 uint8_t fifo_compr_init : 1; 01039 uint8_t not_used_02 : 4; 01040 } lsm6dso_emb_func_init_b_t; 01041 01042 #define LSM6DSO_MAG_SENSITIVITY_L 0xBAU 01043 #define LSM6DSO_MAG_SENSITIVITY_H 0xBBU 01044 #define LSM6DSO_MAG_OFFX_L 0xC0U 01045 #define LSM6DSO_MAG_OFFX_H 0xC1U 01046 #define LSM6DSO_MAG_OFFY_L 0xC2U 01047 #define LSM6DSO_MAG_OFFY_H 0xC3U 01048 #define LSM6DSO_MAG_OFFZ_L 0xC4U 01049 #define LSM6DSO_MAG_OFFZ_H 0xC5U 01050 #define LSM6DSO_MAG_SI_XX_L 0xC6U 01051 #define LSM6DSO_MAG_SI_XX_H 0xC7U 01052 #define LSM6DSO_MAG_SI_XY_L 0xC8U 01053 #define LSM6DSO_MAG_SI_XY_H 0xC9U 01054 #define LSM6DSO_MAG_SI_XZ_L 0xCAU 01055 #define LSM6DSO_MAG_SI_XZ_H 0xCBU 01056 #define LSM6DSO_MAG_SI_YY_L 0xCCU 01057 #define LSM6DSO_MAG_SI_YY_H 0xCDU 01058 #define LSM6DSO_MAG_SI_YZ_L 0xCEU 01059 #define LSM6DSO_MAG_SI_YZ_H 0xCFU 01060 #define LSM6DSO_MAG_SI_ZZ_L 0xD0U 01061 #define LSM6DSO_MAG_SI_ZZ_H 0xD1U 01062 #define LSM6DSO_MAG_CFG_A 0xD4U 01063 typedef struct { 01064 uint8_t mag_z_axis : 3; 01065 uint8_t not_used_01 : 1; 01066 uint8_t mag_y_axis : 3; 01067 uint8_t not_used_02 : 1; 01068 } lsm6dso_mag_cfg_a_t; 01069 01070 #define LSM6DSO_MAG_CFG_B 0xD5U 01071 typedef struct { 01072 uint8_t mag_x_axis : 3; 01073 uint8_t not_used_01 : 5; 01074 } lsm6dso_mag_cfg_b_t; 01075 01076 #define LSM6DSO_FSM_LC_TIMEOUT_L 0x17AU 01077 #define LSM6DSO_FSM_LC_TIMEOUT_H 0x17BU 01078 #define LSM6DSO_FSM_PROGRAMS 0x17CU 01079 #define LSM6DSO_FSM_START_ADD_L 0x17EU 01080 #define LSM6DSO_FSM_START_ADD_H 0x17FU 01081 #define LSM6DSO_PEDO_CMD_REG 0x183U 01082 typedef struct { 01083 uint8_t ad_det_en : 1; 01084 uint8_t not_used_01 : 1; 01085 uint8_t fp_rejection_en : 1; 01086 uint8_t carry_count_en : 1; 01087 uint8_t not_used_02 : 4; 01088 } lsm6dso_pedo_cmd_reg_t; 01089 01090 #define LSM6DSO_PEDO_DEB_STEPS_CONF 0x184U 01091 #define LSM6DSO_PEDO_SC_DELTAT_L 0x1D0U 01092 #define LSM6DSO_PEDO_SC_DELTAT_H 0x1D1U 01093 #define LSM6DSO_SENSOR_HUB_1 0x02U 01094 typedef struct { 01095 uint8_t bit0 : 1; 01096 uint8_t bit1 : 1; 01097 uint8_t bit2 : 1; 01098 uint8_t bit3 : 1; 01099 uint8_t bit4 : 1; 01100 uint8_t bit5 : 1; 01101 uint8_t bit6 : 1; 01102 uint8_t bit7 : 1; 01103 } lsm6dso_sensor_hub_1_t; 01104 01105 #define LSM6DSO_SENSOR_HUB_2 0x03U 01106 typedef struct { 01107 uint8_t bit0 : 1; 01108 uint8_t bit1 : 1; 01109 uint8_t bit2 : 1; 01110 uint8_t bit3 : 1; 01111 uint8_t bit4 : 1; 01112 uint8_t bit5 : 1; 01113 uint8_t bit6 : 1; 01114 uint8_t bit7 : 1; 01115 } lsm6dso_sensor_hub_2_t; 01116 01117 #define LSM6DSO_SENSOR_HUB_3 0x04U 01118 typedef struct { 01119 uint8_t bit0 : 1; 01120 uint8_t bit1 : 1; 01121 uint8_t bit2 : 1; 01122 uint8_t bit3 : 1; 01123 uint8_t bit4 : 1; 01124 uint8_t bit5 : 1; 01125 uint8_t bit6 : 1; 01126 uint8_t bit7 : 1; 01127 } lsm6dso_sensor_hub_3_t; 01128 01129 #define LSM6DSO_SENSOR_HUB_4 0x05U 01130 typedef struct { 01131 uint8_t bit0 : 1; 01132 uint8_t bit1 : 1; 01133 uint8_t bit2 : 1; 01134 uint8_t bit3 : 1; 01135 uint8_t bit4 : 1; 01136 uint8_t bit5 : 1; 01137 uint8_t bit6 : 1; 01138 uint8_t bit7 : 1; 01139 } lsm6dso_sensor_hub_4_t; 01140 01141 #define LSM6DSO_SENSOR_HUB_5 0x06U 01142 typedef struct { 01143 uint8_t bit0 : 1; 01144 uint8_t bit1 : 1; 01145 uint8_t bit2 : 1; 01146 uint8_t bit3 : 1; 01147 uint8_t bit4 : 1; 01148 uint8_t bit5 : 1; 01149 uint8_t bit6 : 1; 01150 uint8_t bit7 : 1; 01151 } lsm6dso_sensor_hub_5_t; 01152 01153 #define LSM6DSO_SENSOR_HUB_6 0x07U 01154 typedef struct { 01155 uint8_t bit0 : 1; 01156 uint8_t bit1 : 1; 01157 uint8_t bit2 : 1; 01158 uint8_t bit3 : 1; 01159 uint8_t bit4 : 1; 01160 uint8_t bit5 : 1; 01161 uint8_t bit6 : 1; 01162 uint8_t bit7 : 1; 01163 } lsm6dso_sensor_hub_6_t; 01164 01165 #define LSM6DSO_SENSOR_HUB_7 0x08U 01166 typedef struct { 01167 uint8_t bit0 : 1; 01168 uint8_t bit1 : 1; 01169 uint8_t bit2 : 1; 01170 uint8_t bit3 : 1; 01171 uint8_t bit4 : 1; 01172 uint8_t bit5 : 1; 01173 uint8_t bit6 : 1; 01174 uint8_t bit7 : 1; 01175 } lsm6dso_sensor_hub_7_t; 01176 01177 #define LSM6DSO_SENSOR_HUB_8 0x09U 01178 typedef struct { 01179 uint8_t bit0 : 1; 01180 uint8_t bit1 : 1; 01181 uint8_t bit2 : 1; 01182 uint8_t bit3 : 1; 01183 uint8_t bit4 : 1; 01184 uint8_t bit5 : 1; 01185 uint8_t bit6 : 1; 01186 uint8_t bit7 : 1; 01187 } lsm6dso_sensor_hub_8_t; 01188 01189 #define LSM6DSO_SENSOR_HUB_9 0x0AU 01190 typedef struct { 01191 uint8_t bit0 : 1; 01192 uint8_t bit1 : 1; 01193 uint8_t bit2 : 1; 01194 uint8_t bit3 : 1; 01195 uint8_t bit4 : 1; 01196 uint8_t bit5 : 1; 01197 uint8_t bit6 : 1; 01198 uint8_t bit7 : 1; 01199 } lsm6dso_sensor_hub_9_t; 01200 01201 #define LSM6DSO_SENSOR_HUB_10 0x0BU 01202 typedef struct { 01203 uint8_t bit0 : 1; 01204 uint8_t bit1 : 1; 01205 uint8_t bit2 : 1; 01206 uint8_t bit3 : 1; 01207 uint8_t bit4 : 1; 01208 uint8_t bit5 : 1; 01209 uint8_t bit6 : 1; 01210 uint8_t bit7 : 1; 01211 } lsm6dso_sensor_hub_10_t; 01212 01213 #define LSM6DSO_SENSOR_HUB_11 0x0CU 01214 typedef struct { 01215 uint8_t bit0 : 1; 01216 uint8_t bit1 : 1; 01217 uint8_t bit2 : 1; 01218 uint8_t bit3 : 1; 01219 uint8_t bit4 : 1; 01220 uint8_t bit5 : 1; 01221 uint8_t bit6 : 1; 01222 uint8_t bit7 : 1; 01223 } lsm6dso_sensor_hub_11_t; 01224 01225 #define LSM6DSO_SENSOR_HUB_12 0x0DU 01226 typedef struct { 01227 uint8_t bit0 : 1; 01228 uint8_t bit1 : 1; 01229 uint8_t bit2 : 1; 01230 uint8_t bit3 : 1; 01231 uint8_t bit4 : 1; 01232 uint8_t bit5 : 1; 01233 uint8_t bit6 : 1; 01234 uint8_t bit7 : 1; 01235 } lsm6dso_sensor_hub_12_t; 01236 01237 #define LSM6DSO_SENSOR_HUB_13 0x0EU 01238 typedef struct { 01239 uint8_t bit0 : 1; 01240 uint8_t bit1 : 1; 01241 uint8_t bit2 : 1; 01242 uint8_t bit3 : 1; 01243 uint8_t bit4 : 1; 01244 uint8_t bit5 : 1; 01245 uint8_t bit6 : 1; 01246 uint8_t bit7 : 1; 01247 } lsm6dso_sensor_hub_13_t; 01248 01249 #define LSM6DSO_SENSOR_HUB_14 0x0FU 01250 typedef struct { 01251 uint8_t bit0 : 1; 01252 uint8_t bit1 : 1; 01253 uint8_t bit2 : 1; 01254 uint8_t bit3 : 1; 01255 uint8_t bit4 : 1; 01256 uint8_t bit5 : 1; 01257 uint8_t bit6 : 1; 01258 uint8_t bit7 : 1; 01259 } lsm6dso_sensor_hub_14_t; 01260 01261 #define LSM6DSO_SENSOR_HUB_15 0x10U 01262 typedef struct { 01263 uint8_t bit0 : 1; 01264 uint8_t bit1 : 1; 01265 uint8_t bit2 : 1; 01266 uint8_t bit3 : 1; 01267 uint8_t bit4 : 1; 01268 uint8_t bit5 : 1; 01269 uint8_t bit6 : 1; 01270 uint8_t bit7 : 1; 01271 } lsm6dso_sensor_hub_15_t; 01272 01273 #define LSM6DSO_SENSOR_HUB_16 0x11U 01274 typedef struct { 01275 uint8_t bit0 : 1; 01276 uint8_t bit1 : 1; 01277 uint8_t bit2 : 1; 01278 uint8_t bit3 : 1; 01279 uint8_t bit4 : 1; 01280 uint8_t bit5 : 1; 01281 uint8_t bit6 : 1; 01282 uint8_t bit7 : 1; 01283 } lsm6dso_sensor_hub_16_t; 01284 01285 #define LSM6DSO_SENSOR_HUB_17 0x12U 01286 typedef struct { 01287 uint8_t bit0 : 1; 01288 uint8_t bit1 : 1; 01289 uint8_t bit2 : 1; 01290 uint8_t bit3 : 1; 01291 uint8_t bit4 : 1; 01292 uint8_t bit5 : 1; 01293 uint8_t bit6 : 1; 01294 uint8_t bit7 : 1; 01295 } lsm6dso_sensor_hub_17_t; 01296 01297 #define LSM6DSO_SENSOR_HUB_18 0x13U 01298 typedef struct { 01299 uint8_t bit0 : 1; 01300 uint8_t bit1 : 1; 01301 uint8_t bit2 : 1; 01302 uint8_t bit3 : 1; 01303 uint8_t bit4 : 1; 01304 uint8_t bit5 : 1; 01305 uint8_t bit6 : 1; 01306 uint8_t bit7 : 1; 01307 } lsm6dso_sensor_hub_18_t; 01308 01309 #define LSM6DSO_MASTER_CONFIG 0x14U 01310 typedef struct { 01311 uint8_t aux_sens_on : 2; 01312 uint8_t master_on : 1; 01313 uint8_t shub_pu_en : 1; 01314 uint8_t pass_through_mode : 1; 01315 uint8_t start_config : 1; 01316 uint8_t write_once : 1; 01317 uint8_t rst_master_regs : 1; 01318 } lsm6dso_master_config_t; 01319 01320 #define LSM6DSO_SLV0_ADD 0x15U 01321 typedef struct { 01322 uint8_t rw_0 : 1; 01323 uint8_t slave0 : 7; 01324 } lsm6dso_slv0_add_t; 01325 01326 #define LSM6DSO_SLV0_SUBADD 0x16U 01327 typedef struct { 01328 uint8_t slave0_reg : 8; 01329 } lsm6dso_slv0_subadd_t; 01330 01331 #define LSM6DSO_SLV0_CONFIG 0x17U 01332 typedef struct { 01333 uint8_t slave0_numop : 3; 01334 uint8_t batch_ext_sens_0_en : 1; 01335 uint8_t not_used_01 : 2; 01336 uint8_t shub_odr : 2; 01337 } lsm6dso_slv0_config_t; 01338 01339 #define LSM6DSO_SLV1_ADD 0x18U 01340 typedef struct { 01341 uint8_t r_1 : 1; 01342 uint8_t slave1_add : 7; 01343 } lsm6dso_slv1_add_t; 01344 01345 #define LSM6DSO_SLV1_SUBADD 0x19U 01346 typedef struct { 01347 uint8_t slave1_reg : 8; 01348 } lsm6dso_slv1_subadd_t; 01349 01350 #define LSM6DSO_SLV1_CONFIG 0x1AU 01351 typedef struct { 01352 uint8_t slave1_numop : 3; 01353 uint8_t batch_ext_sens_1_en : 1; 01354 uint8_t not_used_01 : 4; 01355 } lsm6dso_slv1_config_t; 01356 01357 #define LSM6DSO_SLV2_ADD 0x1BU 01358 typedef struct { 01359 uint8_t r_2 : 1; 01360 uint8_t slave2_add : 7; 01361 } lsm6dso_slv2_add_t; 01362 01363 #define LSM6DSO_SLV2_SUBADD 0x1CU 01364 typedef struct { 01365 uint8_t slave2_reg : 8; 01366 } lsm6dso_slv2_subadd_t; 01367 01368 #define LSM6DSO_SLV2_CONFIG 0x1DU 01369 typedef struct { 01370 uint8_t slave2_numop : 3; 01371 uint8_t batch_ext_sens_2_en : 1; 01372 uint8_t not_used_01 : 4; 01373 } lsm6dso_slv2_config_t; 01374 01375 #define LSM6DSO_SLV3_ADD 0x1EU 01376 typedef struct { 01377 uint8_t r_3 : 1; 01378 uint8_t slave3_add : 7; 01379 } lsm6dso_slv3_add_t; 01380 01381 #define LSM6DSO_SLV3_SUBADD 0x1FU 01382 typedef struct { 01383 uint8_t slave3_reg : 8; 01384 } lsm6dso_slv3_subadd_t; 01385 01386 #define LSM6DSO_SLV3_CONFIG 0x20U 01387 typedef struct { 01388 uint8_t slave3_numop : 3; 01389 uint8_t batch_ext_sens_3_en : 1; 01390 uint8_t not_used_01 : 4; 01391 } lsm6dso_slv3_config_t; 01392 01393 #define LSM6DSO_DATAWRITE_SLV0 0x21U 01394 typedef struct { 01395 uint8_t slave0_dataw : 8; 01396 } lsm6dso_datawrite_src_mode_sub_slv0_t; 01397 01398 #define LSM6DSO_STATUS_MASTER 0x22U 01399 typedef struct { 01400 uint8_t sens_hub_endop : 1; 01401 uint8_t not_used_01 : 2; 01402 uint8_t slave0_nack : 1; 01403 uint8_t slave1_nack : 1; 01404 uint8_t slave2_nack : 1; 01405 uint8_t slave3_nack : 1; 01406 uint8_t wr_once_done : 1; 01407 } lsm6dso_status_master_t; 01408 01409 #define LSM6DSO_START_FSM_ADD 0x0400U 01410 01411 /** 01412 * @defgroup LSM6DSO_Register_Union 01413 * @brief This union group all the registers that has a bitfield 01414 * description. 01415 * This union is useful but not need by the driver. 01416 * 01417 * REMOVING this union you are compliant with: 01418 * MISRA-C 2012 [Rule 19.2] -> " Union are not allowed " 01419 * 01420 * @{ 01421 * 01422 */ 01423 typedef union { 01424 lsm6dso_func_cfg_access_t func_cfg_access; 01425 lsm6dso_pin_ctrl_t pin_ctrl; 01426 lsm6dso_fifo_ctrl1_t fifo_ctrl1; 01427 lsm6dso_fifo_ctrl2_t fifo_ctrl2; 01428 lsm6dso_fifo_ctrl3_t fifo_ctrl3; 01429 lsm6dso_fifo_ctrl4_t fifo_ctrl4; 01430 lsm6dso_counter_bdr_reg1_t counter_bdr_reg1; 01431 lsm6dso_counter_bdr_reg2_t counter_bdr_reg2; 01432 lsm6dso_int1_ctrl_t int1_ctrl; 01433 lsm6dso_int2_ctrl_t int2_ctrl; 01434 lsm6dso_ctrl1_xl_t ctrl1_xl; 01435 lsm6dso_ctrl2_g_t ctrl2_g; 01436 lsm6dso_ctrl3_c_t ctrl3_c; 01437 lsm6dso_ctrl4_c_t ctrl4_c; 01438 lsm6dso_ctrl5_c_t ctrl5_c; 01439 lsm6dso_ctrl6_c_t ctrl6_c; 01440 lsm6dso_ctrl7_g_t ctrl7_g; 01441 lsm6dso_ctrl8_xl_t ctrl8_xl; 01442 lsm6dso_ctrl9_xl_t ctrl9_xl; 01443 lsm6dso_ctrl10_c_t ctrl10_c; 01444 lsm6dso_all_int_src_t all_int_src; 01445 lsm6dso_wake_up_src_t wake_up_src; 01446 lsm6dso_tap_src_t tap_src; 01447 lsm6dso_d6d_src_t d6d_src; 01448 lsm6dso_status_reg_t status_reg; 01449 lsm6dso_status_spiaux_t status_spiaux; 01450 lsm6dso_fifo_status1_t fifo_status1; 01451 lsm6dso_fifo_status2_t fifo_status2; 01452 lsm6dso_tap_cfg0_t tap_cfg0; 01453 lsm6dso_tap_cfg1_t tap_cfg1; 01454 lsm6dso_tap_cfg2_t tap_cfg2; 01455 lsm6dso_tap_ths_6d_t tap_ths_6d; 01456 lsm6dso_int_dur2_t int_dur2; 01457 lsm6dso_wake_up_ths_t wake_up_ths; 01458 lsm6dso_wake_up_dur_t wake_up_dur; 01459 lsm6dso_free_fall_t free_fall; 01460 lsm6dso_md1_cfg_t md1_cfg; 01461 lsm6dso_md2_cfg_t md2_cfg; 01462 lsm6dso_i3c_bus_avb_t i3c_bus_avb; 01463 lsm6dso_internal_freq_fine_t internal_freq_fine; 01464 lsm6dso_int_ois_t int_ois; 01465 lsm6dso_ctrl1_ois_t ctrl1_ois; 01466 lsm6dso_ctrl2_ois_t ctrl2_ois; 01467 lsm6dso_ctrl3_ois_t ctrl3_ois; 01468 lsm6dso_fifo_data_out_tag_t fifo_data_out_tag; 01469 lsm6dso_page_sel_t page_sel; 01470 lsm6dso_emb_func_en_a_t emb_func_en_a; 01471 lsm6dso_emb_func_en_b_t emb_func_en_b; 01472 lsm6dso_page_address_t page_address; 01473 lsm6dso_page_value_t page_value; 01474 lsm6dso_emb_func_int1_t emb_func_int1; 01475 lsm6dso_fsm_int1_a_t fsm_int1_a; 01476 lsm6dso_fsm_int1_b_t fsm_int1_b; 01477 lsm6dso_emb_func_int2_t emb_func_int2; 01478 lsm6dso_fsm_int2_a_t fsm_int2_a; 01479 lsm6dso_fsm_int2_b_t fsm_int2_b; 01480 lsm6dso_emb_func_status_t emb_func_status; 01481 lsm6dso_fsm_status_a_t fsm_status_a; 01482 lsm6dso_fsm_status_b_t fsm_status_b; 01483 lsm6dso_page_rw_t page_rw; 01484 lsm6dso_emb_func_fifo_cfg_t emb_func_fifo_cfg; 01485 lsm6dso_fsm_enable_a_t fsm_enable_a; 01486 lsm6dso_fsm_enable_b_t fsm_enable_b; 01487 lsm6dso_fsm_long_counter_clear_t fsm_long_counter_clear; 01488 lsm6dso_fsm_outs1_t fsm_outs1; 01489 lsm6dso_fsm_outs2_t fsm_outs2; 01490 lsm6dso_fsm_outs3_t fsm_outs3; 01491 lsm6dso_fsm_outs4_t fsm_outs4; 01492 lsm6dso_fsm_outs5_t fsm_outs5; 01493 lsm6dso_fsm_outs6_t fsm_outs6; 01494 lsm6dso_fsm_outs7_t fsm_outs7; 01495 lsm6dso_fsm_outs8_t fsm_outs8; 01496 lsm6dso_fsm_outs9_t fsm_outs9; 01497 lsm6dso_fsm_outs10_t fsm_outs10; 01498 lsm6dso_fsm_outs11_t fsm_outs11; 01499 lsm6dso_fsm_outs12_t fsm_outs12; 01500 lsm6dso_fsm_outs13_t fsm_outs13; 01501 lsm6dso_fsm_outs14_t fsm_outs14; 01502 lsm6dso_fsm_outs15_t fsm_outs15; 01503 lsm6dso_fsm_outs16_t fsm_outs16; 01504 lsm6dso_emb_func_odr_cfg_b_t emb_func_odr_cfg_b; 01505 lsm6dso_emb_func_src_t emb_func_src; 01506 lsm6dso_emb_func_init_a_t emb_func_init_a; 01507 lsm6dso_emb_func_init_b_t emb_func_init_b; 01508 lsm6dso_mag_cfg_a_t mag_cfg_a; 01509 lsm6dso_mag_cfg_b_t mag_cfg_b; 01510 lsm6dso_pedo_cmd_reg_t pedo_cmd_reg; 01511 lsm6dso_sensor_hub_1_t sensor_hub_1; 01512 lsm6dso_sensor_hub_2_t sensor_hub_2; 01513 lsm6dso_sensor_hub_3_t sensor_hub_3; 01514 lsm6dso_sensor_hub_4_t sensor_hub_4; 01515 lsm6dso_sensor_hub_5_t sensor_hub_5; 01516 lsm6dso_sensor_hub_6_t sensor_hub_6; 01517 lsm6dso_sensor_hub_7_t sensor_hub_7; 01518 lsm6dso_sensor_hub_8_t sensor_hub_8; 01519 lsm6dso_sensor_hub_9_t sensor_hub_9; 01520 lsm6dso_sensor_hub_10_t sensor_hub_10; 01521 lsm6dso_sensor_hub_11_t sensor_hub_11; 01522 lsm6dso_sensor_hub_12_t sensor_hub_12; 01523 lsm6dso_sensor_hub_13_t sensor_hub_13; 01524 lsm6dso_sensor_hub_14_t sensor_hub_14; 01525 lsm6dso_sensor_hub_15_t sensor_hub_15; 01526 lsm6dso_sensor_hub_16_t sensor_hub_16; 01527 lsm6dso_sensor_hub_17_t sensor_hub_17; 01528 lsm6dso_sensor_hub_18_t sensor_hub_18; 01529 lsm6dso_master_config_t master_config; 01530 lsm6dso_slv0_add_t slv0_add; 01531 lsm6dso_slv0_subadd_t slv0_subadd; 01532 lsm6dso_slv0_config_t slv0_config; 01533 lsm6dso_slv1_add_t slv1_add; 01534 lsm6dso_slv1_subadd_t slv1_subadd; 01535 lsm6dso_slv1_config_t slv1_config; 01536 lsm6dso_slv2_add_t slv2_add; 01537 lsm6dso_slv2_subadd_t slv2_subadd; 01538 lsm6dso_slv2_config_t slv2_config; 01539 lsm6dso_slv3_add_t slv3_add; 01540 lsm6dso_slv3_subadd_t slv3_subadd; 01541 lsm6dso_slv3_config_t slv3_config; 01542 lsm6dso_datawrite_src_mode_sub_slv0_t datawrite_src_mode_sub_slv0; 01543 lsm6dso_status_master_t status_master; 01544 bitwise_t bitwise; 01545 uint8_t byte; 01546 } lsm6dso_reg_t; 01547 01548 /** 01549 * @} 01550 * 01551 */ 01552 01553 int32_t lsm6dso_read_reg(lsm6dso_ctx_t *ctx, uint8_t reg, uint8_t *data, 01554 uint16_t len); 01555 int32_t lsm6dso_write_reg(lsm6dso_ctx_t *ctx, uint8_t reg, uint8_t *data, 01556 uint16_t len); 01557 01558 extern float_t lsm6dso_from_fs2_to_mg(int16_t lsb); 01559 extern float_t lsm6dso_from_fs4_to_mg(int16_t lsb); 01560 extern float_t lsm6dso_from_fs8_to_mg(int16_t lsb); 01561 extern float_t lsm6dso_from_fs16_to_mg(int16_t lsb); 01562 extern float_t lsm6dso_from_fs125_to_mdps(int16_t lsb); 01563 extern float_t lsm6dso_from_fs500_to_mdps(int16_t lsb); 01564 extern float_t lsm6dso_from_fs250_to_mdps(int16_t lsb); 01565 extern float_t lsm6dso_from_fs1000_to_mdps(int16_t lsb); 01566 extern float_t lsm6dso_from_fs2000_to_mdps(int16_t lsb); 01567 extern float_t lsm6dso_from_lsb_to_celsius(int16_t lsb); 01568 extern float_t lsm6dso_from_lsb_to_nsec(int16_t lsb); 01569 01570 typedef enum { 01571 LSM6DSO_2g = 0, 01572 LSM6DSO_16g = 1, /* if XL_FS_MODE = ‘1’ -> LSM6DSO_2g */ 01573 LSM6DSO_4g = 2, 01574 LSM6DSO_8g = 3, 01575 } lsm6dso_fs_xl_t; 01576 int32_t lsm6dso_xl_full_scale_set(lsm6dso_ctx_t *ctx, lsm6dso_fs_xl_t val); 01577 int32_t lsm6dso_xl_full_scale_get(lsm6dso_ctx_t *ctx, lsm6dso_fs_xl_t *val); 01578 01579 typedef enum { 01580 LSM6DSO_XL_ODR_OFF = 0, 01581 LSM6DSO_XL_ODR_12Hz5 = 1, 01582 LSM6DSO_XL_ODR_26Hz = 2, 01583 LSM6DSO_XL_ODR_52Hz = 3, 01584 LSM6DSO_XL_ODR_104Hz = 4, 01585 LSM6DSO_XL_ODR_208Hz = 5, 01586 LSM6DSO_XL_ODR_417Hz = 6, 01587 LSM6DSO_XL_ODR_833Hz = 7, 01588 LSM6DSO_XL_ODR_1667Hz = 8, 01589 LSM6DSO_XL_ODR_3333Hz = 9, 01590 LSM6DSO_XL_ODR_6667Hz = 10, 01591 LSM6DSO_XL_ODR_6Hz5 = 11, /* (low power only) */ 01592 } lsm6dso_odr_xl_t; 01593 int32_t lsm6dso_xl_data_rate_set(lsm6dso_ctx_t *ctx, lsm6dso_odr_xl_t val); 01594 int32_t lsm6dso_xl_data_rate_get(lsm6dso_ctx_t *ctx, lsm6dso_odr_xl_t *val); 01595 01596 typedef enum { 01597 LSM6DSO_250dps = 0, 01598 LSM6DSO_125dps = 1, 01599 LSM6DSO_500dps = 2, 01600 LSM6DSO_1000dps = 4, 01601 LSM6DSO_2000dps = 6, 01602 } lsm6dso_fs_g_t; 01603 int32_t lsm6dso_gy_full_scale_set(lsm6dso_ctx_t *ctx, lsm6dso_fs_g_t val); 01604 int32_t lsm6dso_gy_full_scale_get(lsm6dso_ctx_t *ctx, lsm6dso_fs_g_t *val); 01605 01606 typedef enum { 01607 LSM6DSO_GY_ODR_OFF = 0, 01608 LSM6DSO_GY_ODR_12Hz5 = 1, 01609 LSM6DSO_GY_ODR_26Hz = 2, 01610 LSM6DSO_GY_ODR_52Hz = 3, 01611 LSM6DSO_GY_ODR_104Hz = 4, 01612 LSM6DSO_GY_ODR_208Hz = 5, 01613 LSM6DSO_GY_ODR_417Hz = 6, 01614 LSM6DSO_GY_ODR_833Hz = 7, 01615 LSM6DSO_GY_ODR_1667Hz = 8, 01616 LSM6DSO_GY_ODR_3333Hz = 9, 01617 LSM6DSO_GY_ODR_6667Hz = 10, 01618 } lsm6dso_odr_g_t; 01619 int32_t lsm6dso_gy_data_rate_set(lsm6dso_ctx_t *ctx, lsm6dso_odr_g_t val); 01620 int32_t lsm6dso_gy_data_rate_get(lsm6dso_ctx_t *ctx, lsm6dso_odr_g_t *val); 01621 01622 int32_t lsm6dso_block_data_update_set(lsm6dso_ctx_t *ctx, uint8_t val); 01623 int32_t lsm6dso_block_data_update_get(lsm6dso_ctx_t *ctx, uint8_t *val); 01624 01625 typedef enum { 01626 LSM6DSO_LSb_1mg = 0, 01627 LSM6DSO_LSb_16mg = 1, 01628 } lsm6dso_usr_off_w_t; 01629 int32_t lsm6dso_xl_offset_weight_set(lsm6dso_ctx_t *ctx, 01630 lsm6dso_usr_off_w_t val); 01631 int32_t lsm6dso_xl_offset_weight_get(lsm6dso_ctx_t *ctx, 01632 lsm6dso_usr_off_w_t *val); 01633 01634 typedef enum { 01635 LSM6DSO_HIGH_PERFORMANCE_MD = 0, 01636 LSM6DSO_LOW_NORMAL_POWER_MD = 1, 01637 LSM6DSO_ULTRA_LOW_POWER_MD = 2, 01638 } lsm6dso_xl_hm_mode_t; 01639 int32_t lsm6dso_xl_power_mode_set(lsm6dso_ctx_t *ctx, 01640 lsm6dso_xl_hm_mode_t val); 01641 int32_t lsm6dso_xl_power_mode_get(lsm6dso_ctx_t *ctx, 01642 lsm6dso_xl_hm_mode_t *val); 01643 01644 typedef enum { 01645 LSM6DSO_GY_HIGH_PERFORMANCE = 0, 01646 LSM6DSO_GY_NORMAL = 1, 01647 } lsm6dso_g_hm_mode_t; 01648 int32_t lsm6dso_gy_power_mode_set(lsm6dso_ctx_t *ctx, 01649 lsm6dso_g_hm_mode_t val); 01650 int32_t lsm6dso_gy_power_mode_get(lsm6dso_ctx_t *ctx, 01651 lsm6dso_g_hm_mode_t *val); 01652 01653 typedef struct { 01654 lsm6dso_all_int_src_t all_int_src; 01655 lsm6dso_wake_up_src_t wake_up_src; 01656 lsm6dso_tap_src_t tap_src; 01657 lsm6dso_d6d_src_t d6d_src; 01658 lsm6dso_status_reg_t status_reg; 01659 lsm6dso_emb_func_status_t emb_func_status; 01660 lsm6dso_fsm_status_a_t fsm_status_a; 01661 lsm6dso_fsm_status_b_t fsm_status_b; 01662 } lsm6dso_all_sources_t; 01663 int32_t lsm6dso_all_sources_get(lsm6dso_ctx_t *ctx, 01664 lsm6dso_all_sources_t *val); 01665 01666 int32_t lsm6dso_status_reg_get(lsm6dso_ctx_t *ctx, 01667 lsm6dso_status_reg_t *val); 01668 01669 int32_t lsm6dso_xl_flag_data_ready_get(lsm6dso_ctx_t *ctx, uint8_t *val); 01670 01671 int32_t lsm6dso_gy_flag_data_ready_get(lsm6dso_ctx_t *ctx, uint8_t *val); 01672 01673 int32_t lsm6dso_temp_flag_data_ready_get(lsm6dso_ctx_t *ctx, uint8_t *val); 01674 01675 int32_t lsm6dso_xl_usr_offset_x_set(lsm6dso_ctx_t *ctx, uint8_t *buff); 01676 int32_t lsm6dso_xl_usr_offset_x_get(lsm6dso_ctx_t *ctx, uint8_t *buff); 01677 01678 int32_t lsm6dso_xl_usr_offset_y_set(lsm6dso_ctx_t *ctx, uint8_t *buff); 01679 int32_t lsm6dso_xl_usr_offset_y_get(lsm6dso_ctx_t *ctx, uint8_t *buff); 01680 01681 int32_t lsm6dso_xl_usr_offset_z_set(lsm6dso_ctx_t *ctx, uint8_t *buff); 01682 int32_t lsm6dso_xl_usr_offset_z_get(lsm6dso_ctx_t *ctx, uint8_t *buff); 01683 01684 int32_t lsm6dso_xl_usr_offset_set(lsm6dso_ctx_t *ctx, uint8_t val); 01685 int32_t lsm6dso_xl_usr_offset_get(lsm6dso_ctx_t *ctx, uint8_t *val); 01686 01687 int32_t lsm6dso_timestamp_set(lsm6dso_ctx_t *ctx, uint8_t val); 01688 int32_t lsm6dso_timestamp_get(lsm6dso_ctx_t *ctx, uint8_t *val); 01689 01690 int32_t lsm6dso_timestamp_raw_get(lsm6dso_ctx_t *ctx, uint8_t *buff); 01691 01692 typedef enum { 01693 LSM6DSO_NO_ROUND = 0, 01694 LSM6DSO_ROUND_XL = 1, 01695 LSM6DSO_ROUND_GY = 2, 01696 LSM6DSO_ROUND_GY_XL = 3, 01697 } lsm6dso_rounding_t; 01698 int32_t lsm6dso_rounding_mode_set(lsm6dso_ctx_t *ctx, 01699 lsm6dso_rounding_t val); 01700 int32_t lsm6dso_rounding_mode_get(lsm6dso_ctx_t *ctx, 01701 lsm6dso_rounding_t *val); 01702 01703 int32_t lsm6dso_temperature_raw_get(lsm6dso_ctx_t *ctx, uint8_t *buff); 01704 01705 int32_t lsm6dso_angular_rate_raw_get(lsm6dso_ctx_t *ctx, uint8_t *buff); 01706 01707 int32_t lsm6dso_acceleration_raw_get(lsm6dso_ctx_t *ctx, uint8_t *buff); 01708 01709 int32_t lsm6dso_fifo_out_raw_get(lsm6dso_ctx_t *ctx, uint8_t *buff); 01710 01711 int32_t lsm6dso_number_of_steps_get(lsm6dso_ctx_t *ctx, uint8_t *buff); 01712 01713 int32_t lsm6dso_steps_reset(lsm6dso_ctx_t *ctx); 01714 01715 int32_t lsm6dso_odr_cal_reg_set(lsm6dso_ctx_t *ctx, uint8_t val); 01716 int32_t lsm6dso_odr_cal_reg_get(lsm6dso_ctx_t *ctx, uint8_t *val); 01717 01718 typedef enum { 01719 LSM6DSO_USER_BANK = 0, 01720 LSM6DSO_SENSOR_HUB_BANK = 1, 01721 LSM6DSO_EMBEDDED_FUNC_BANK = 2, 01722 } lsm6dso_reg_access_t; 01723 int32_t lsm6dso_mem_bank_set(lsm6dso_ctx_t *ctx, lsm6dso_reg_access_t val); 01724 int32_t lsm6dso_mem_bank_get(lsm6dso_ctx_t *ctx, lsm6dso_reg_access_t *val); 01725 01726 int32_t lsm6dso_ln_pg_write_byte(lsm6dso_ctx_t *ctx, uint16_t address, 01727 uint8_t *val); 01728 int32_t lsm6dso_ln_pg_read_byte(lsm6dso_ctx_t *ctx, uint16_t address, 01729 uint8_t *val); 01730 int32_t lsm6dso_ln_pg_write(lsm6dso_ctx_t *ctx, uint16_t address, 01731 uint8_t *buf, uint8_t len); 01732 int32_t lsm6dso_ln_pg_read(lsm6dso_ctx_t *ctx, uint16_t address, 01733 uint8_t *val); 01734 01735 typedef enum { 01736 LSM6DSO_DRDY_LATCHED = 0, 01737 LSM6DSO_DRDY_PULSED = 1, 01738 } lsm6dso_dataready_pulsed_t; 01739 int32_t lsm6dso_data_ready_mode_set(lsm6dso_ctx_t *ctx, 01740 lsm6dso_dataready_pulsed_t val); 01741 int32_t lsm6dso_data_ready_mode_get(lsm6dso_ctx_t *ctx, 01742 lsm6dso_dataready_pulsed_t *val); 01743 01744 int32_t lsm6dso_device_id_get(lsm6dso_ctx_t *ctx, uint8_t *buff); 01745 01746 int32_t lsm6dso_reset_set(lsm6dso_ctx_t *ctx, uint8_t val); 01747 int32_t lsm6dso_reset_get(lsm6dso_ctx_t *ctx, uint8_t *val); 01748 01749 int32_t lsm6dso_auto_increment_set(lsm6dso_ctx_t *ctx, uint8_t val); 01750 int32_t lsm6dso_auto_increment_get(lsm6dso_ctx_t *ctx, uint8_t *val); 01751 01752 int32_t lsm6dso_boot_set(lsm6dso_ctx_t *ctx, uint8_t val); 01753 int32_t lsm6dso_boot_get(lsm6dso_ctx_t *ctx, uint8_t *val); 01754 01755 typedef enum { 01756 LSM6DSO_XL_ST_DISABLE = 0, 01757 LSM6DSO_XL_ST_POSITIVE = 1, 01758 LSM6DSO_XL_ST_NEGATIVE = 2, 01759 } lsm6dso_st_xl_t; 01760 int32_t lsm6dso_xl_self_test_set(lsm6dso_ctx_t *ctx, lsm6dso_st_xl_t val); 01761 int32_t lsm6dso_xl_self_test_get(lsm6dso_ctx_t *ctx, lsm6dso_st_xl_t *val); 01762 01763 typedef enum { 01764 LSM6DSO_GY_ST_DISABLE = 0, 01765 LSM6DSO_GY_ST_POSITIVE = 1, 01766 LSM6DSO_GY_ST_NEGATIVE = 3, 01767 } lsm6dso_st_g_t; 01768 int32_t lsm6dso_gy_self_test_set(lsm6dso_ctx_t *ctx, lsm6dso_st_g_t val); 01769 int32_t lsm6dso_gy_self_test_get(lsm6dso_ctx_t *ctx, lsm6dso_st_g_t *val); 01770 01771 int32_t lsm6dso_xl_filter_lp2_set(lsm6dso_ctx_t *ctx, uint8_t val); 01772 int32_t lsm6dso_xl_filter_lp2_get(lsm6dso_ctx_t *ctx, uint8_t *val); 01773 01774 int32_t lsm6dso_gy_filter_lp1_set(lsm6dso_ctx_t *ctx, uint8_t val); 01775 int32_t lsm6dso_gy_filter_lp1_get(lsm6dso_ctx_t *ctx, uint8_t *val); 01776 01777 int32_t lsm6dso_filter_settling_mask_set(lsm6dso_ctx_t *ctx, 01778 uint8_t val); 01779 int32_t lsm6dso_filter_settling_mask_get(lsm6dso_ctx_t *ctx, 01780 uint8_t *val); 01781 01782 typedef enum { 01783 LSM6DSO_ULTRA_LIGHT = 0, 01784 LSM6DSO_VERY_LIGHT = 1, 01785 LSM6DSO_LIGHT = 2, 01786 LSM6DSO_MEDIUM = 3, 01787 LSM6DSO_STRONG = 4, /* not available for data rate > 1k670Hz */ 01788 LSM6DSO_VERY_STRONG = 5, /* not available for data rate > 1k670Hz */ 01789 LSM6DSO_AGGRESSIVE = 6, /* not available for data rate > 1k670Hz */ 01790 LSM6DSO_XTREME = 7, /* not available for data rate > 1k670Hz */ 01791 } lsm6dso_ftype_t; 01792 int32_t lsm6dso_gy_lp1_bandwidth_set(lsm6dso_ctx_t *ctx, 01793 lsm6dso_ftype_t val); 01794 int32_t lsm6dso_gy_lp1_bandwidth_get(lsm6dso_ctx_t *ctx, 01795 lsm6dso_ftype_t *val); 01796 01797 int32_t lsm6dso_xl_lp2_on_6d_set(lsm6dso_ctx_t *ctx, uint8_t val); 01798 int32_t lsm6dso_xl_lp2_on_6d_get(lsm6dso_ctx_t *ctx, uint8_t *val); 01799 01800 typedef enum { 01801 LSM6DSO_HP_PATH_DISABLE_ON_OUT = 0x00, 01802 LSM6DSO_SLOPE_ODR_DIV_4 = 0x10, 01803 LSM6DSO_HP_ODR_DIV_10 = 0x11, 01804 LSM6DSO_HP_ODR_DIV_20 = 0x12, 01805 LSM6DSO_HP_ODR_DIV_45 = 0x13, 01806 LSM6DSO_HP_ODR_DIV_100 = 0x14, 01807 LSM6DSO_HP_ODR_DIV_200 = 0x15, 01808 LSM6DSO_HP_ODR_DIV_400 = 0x16, 01809 LSM6DSO_HP_ODR_DIV_800 = 0x17, 01810 LSM6DSO_HP_REF_MD_ODR_DIV_10 = 0x31, 01811 LSM6DSO_HP_REF_MD_ODR_DIV_20 = 0x32, 01812 LSM6DSO_HP_REF_MD_ODR_DIV_45 = 0x33, 01813 LSM6DSO_HP_REF_MD_ODR_DIV_100 = 0x34, 01814 LSM6DSO_HP_REF_MD_ODR_DIV_200 = 0x35, 01815 LSM6DSO_HP_REF_MD_ODR_DIV_400 = 0x36, 01816 LSM6DSO_HP_REF_MD_ODR_DIV_800 = 0x37, 01817 LSM6DSO_LP_ODR_DIV_10 = 0x01, 01818 LSM6DSO_LP_ODR_DIV_20 = 0x02, 01819 LSM6DSO_LP_ODR_DIV_45 = 0x03, 01820 LSM6DSO_LP_ODR_DIV_100 = 0x04, 01821 LSM6DSO_LP_ODR_DIV_200 = 0x05, 01822 LSM6DSO_LP_ODR_DIV_400 = 0x06, 01823 LSM6DSO_LP_ODR_DIV_800 = 0x07, 01824 } lsm6dso_hp_slope_xl_en_t; 01825 int32_t lsm6dso_xl_hp_path_on_out_set(lsm6dso_ctx_t *ctx, 01826 lsm6dso_hp_slope_xl_en_t val); 01827 int32_t lsm6dso_xl_hp_path_on_out_get(lsm6dso_ctx_t *ctx, 01828 lsm6dso_hp_slope_xl_en_t *val); 01829 01830 int32_t lsm6dso_xl_fast_settling_set(lsm6dso_ctx_t *ctx, uint8_t val); 01831 int32_t lsm6dso_xl_fast_settling_get(lsm6dso_ctx_t *ctx, uint8_t *val); 01832 01833 typedef enum { 01834 LSM6DSO_USE_SLOPE = 0, 01835 LSM6DSO_USE_HPF = 1, 01836 } lsm6dso_slope_fds_t; 01837 int32_t lsm6dso_xl_hp_path_internal_set(lsm6dso_ctx_t *ctx, 01838 lsm6dso_slope_fds_t val); 01839 int32_t lsm6dso_xl_hp_path_internal_get(lsm6dso_ctx_t *ctx, 01840 lsm6dso_slope_fds_t *val); 01841 01842 typedef enum { 01843 LSM6DSO_HP_FILTER_NONE = 0x00, 01844 LSM6DSO_HP_FILTER_16mHz = 0x80, 01845 LSM6DSO_HP_FILTER_65mHz = 0x81, 01846 LSM6DSO_HP_FILTER_260mHz = 0x82, 01847 LSM6DSO_HP_FILTER_1Hz04 = 0x83, 01848 } lsm6dso_hpm_g_t; 01849 int32_t lsm6dso_gy_hp_path_internal_set(lsm6dso_ctx_t *ctx, 01850 lsm6dso_hpm_g_t val); 01851 int32_t lsm6dso_gy_hp_path_internal_get(lsm6dso_ctx_t *ctx, 01852 lsm6dso_hpm_g_t *val); 01853 01854 typedef enum { 01855 LSM6DSO_AUX_PULL_UP_DISC = 0, 01856 LSM6DSO_AUX_PULL_UP_CONNECT = 1, 01857 } lsm6dso_ois_pu_dis_t; 01858 int32_t lsm6dso_aux_sdo_ocs_mode_set(lsm6dso_ctx_t *ctx, 01859 lsm6dso_ois_pu_dis_t val); 01860 int32_t lsm6dso_aux_sdo_ocs_mode_get(lsm6dso_ctx_t *ctx, 01861 lsm6dso_ois_pu_dis_t *val); 01862 01863 typedef enum { 01864 LSM6DSO_AUX_ON = 1, 01865 LSM6DSO_AUX_ON_BY_AUX_INTERFACE = 0, 01866 } lsm6dso_ois_on_t; 01867 int32_t lsm6dso_aux_pw_on_ctrl_set(lsm6dso_ctx_t *ctx, lsm6dso_ois_on_t val); 01868 int32_t lsm6dso_aux_pw_on_ctrl_get(lsm6dso_ctx_t *ctx, lsm6dso_ois_on_t *val); 01869 01870 typedef enum { 01871 LSM6DSO_USE_SAME_XL_FS = 0, 01872 LSM6DSO_USE_DIFFERENT_XL_FS = 1, 01873 } lsm6dso_xl_fs_mode_t; 01874 int32_t lsm6dso_aux_xl_fs_mode_set(lsm6dso_ctx_t *ctx, 01875 lsm6dso_xl_fs_mode_t val); 01876 int32_t lsm6dso_aux_xl_fs_mode_get(lsm6dso_ctx_t *ctx, 01877 lsm6dso_xl_fs_mode_t *val); 01878 01879 int32_t lsm6dso_aux_status_reg_get(lsm6dso_ctx_t *ctx, 01880 lsm6dso_status_spiaux_t *val); 01881 01882 int32_t lsm6dso_aux_xl_flag_data_ready_get(lsm6dso_ctx_t *ctx, uint8_t *val); 01883 01884 int32_t lsm6dso_aux_gy_flag_data_ready_get(lsm6dso_ctx_t *ctx, uint8_t *val); 01885 01886 int32_t lsm6dso_aux_gy_flag_settling_get(lsm6dso_ctx_t *ctx, uint8_t *val); 01887 01888 typedef enum { 01889 LSM6DSO_AUX_XL_DISABLE = 0, 01890 LSM6DSO_AUX_XL_POS = 1, 01891 LSM6DSO_AUX_XL_NEG = 2, 01892 } lsm6dso_st_xl_ois_t; 01893 int32_t lsm6dso_aux_xl_self_test_set(lsm6dso_ctx_t *ctx, 01894 lsm6dso_st_xl_ois_t val); 01895 int32_t lsm6dso_aux_xl_self_test_get(lsm6dso_ctx_t *ctx, 01896 lsm6dso_st_xl_ois_t *val); 01897 01898 typedef enum { 01899 LSM6DSO_AUX_DEN_ACTIVE_LOW = 0, 01900 LSM6DSO_AUX_DEN_ACTIVE_HIGH = 1, 01901 } lsm6dso_den_lh_ois_t; 01902 int32_t lsm6dso_aux_den_polarity_set(lsm6dso_ctx_t *ctx, 01903 lsm6dso_den_lh_ois_t val); 01904 int32_t lsm6dso_aux_den_polarity_get(lsm6dso_ctx_t *ctx, 01905 lsm6dso_den_lh_ois_t *val); 01906 01907 typedef enum { 01908 LSM6DSO_AUX_DEN_DISABLE = 0, 01909 LSM6DSO_AUX_DEN_LEVEL_LATCH = 3, 01910 LSM6DSO_AUX_DEN_LEVEL_TRIG = 2, 01911 } lsm6dso_lvl2_ois_t; 01912 int32_t lsm6dso_aux_den_mode_set(lsm6dso_ctx_t *ctx, lsm6dso_lvl2_ois_t val); 01913 int32_t lsm6dso_aux_den_mode_get(lsm6dso_ctx_t *ctx, lsm6dso_lvl2_ois_t *val); 01914 01915 int32_t lsm6dso_aux_drdy_on_int2_set(lsm6dso_ctx_t *ctx, uint8_t val); 01916 int32_t lsm6dso_aux_drdy_on_int2_get(lsm6dso_ctx_t *ctx, uint8_t *val); 01917 01918 typedef enum { 01919 LSM6DSO_AUX_DISABLE = 0, 01920 LSM6DSO_MODE_3_GY = 1, 01921 LSM6DSO_MODE_4_GY_XL = 3, 01922 } lsm6dso_ois_en_spi2_t; 01923 int32_t lsm6dso_aux_mode_set(lsm6dso_ctx_t *ctx, lsm6dso_ois_en_spi2_t val); 01924 int32_t lsm6dso_aux_mode_get(lsm6dso_ctx_t *ctx, lsm6dso_ois_en_spi2_t *val); 01925 01926 typedef enum { 01927 LSM6DSO_250dps_AUX = 0, 01928 LSM6DSO_125dps_AUX = 1, 01929 LSM6DSO_500dps_AUX = 2, 01930 LSM6DSO_1000dps_AUX = 4, 01931 LSM6DSO_2000dps_AUX = 6, 01932 } lsm6dso_fs_g_ois_t; 01933 int32_t lsm6dso_aux_gy_full_scale_set(lsm6dso_ctx_t *ctx, 01934 lsm6dso_fs_g_ois_t val); 01935 int32_t lsm6dso_aux_gy_full_scale_get(lsm6dso_ctx_t *ctx, 01936 lsm6dso_fs_g_ois_t *val); 01937 01938 typedef enum { 01939 LSM6DSO_AUX_SPI_4_WIRE = 0, 01940 LSM6DSO_AUX_SPI_3_WIRE = 1, 01941 } lsm6dso_sim_ois_t; 01942 int32_t lsm6dso_aux_spi_mode_set(lsm6dso_ctx_t *ctx, lsm6dso_sim_ois_t val); 01943 int32_t lsm6dso_aux_spi_mode_get(lsm6dso_ctx_t *ctx, lsm6dso_sim_ois_t *val); 01944 01945 typedef enum { 01946 LSM6DSO_351Hz39 = 0, 01947 LSM6DSO_236Hz63 = 1, 01948 LSM6DSO_172Hz70 = 2, 01949 LSM6DSO_937Hz91 = 3, 01950 } lsm6dso_ftype_ois_t; 01951 int32_t lsm6dso_aux_gy_lp1_bandwidth_set(lsm6dso_ctx_t *ctx, 01952 lsm6dso_ftype_ois_t val); 01953 int32_t lsm6dso_aux_gy_lp1_bandwidth_get(lsm6dso_ctx_t *ctx, 01954 lsm6dso_ftype_ois_t *val); 01955 01956 typedef enum { 01957 LSM6DSO_AUX_HP_DISABLE = 0x00, 01958 LSM6DSO_AUX_HP_Hz016 = 0x10, 01959 LSM6DSO_AUX_HP_Hz065 = 0x11, 01960 LSM6DSO_AUX_HP_Hz260 = 0x12, 01961 LSM6DSO_AUX_HP_1Hz040 = 0x13, 01962 } lsm6dso_hpm_ois_t; 01963 int32_t lsm6dso_aux_gy_hp_bandwidth_set(lsm6dso_ctx_t *ctx, 01964 lsm6dso_hpm_ois_t val); 01965 int32_t lsm6dso_aux_gy_hp_bandwidth_get(lsm6dso_ctx_t *ctx, 01966 lsm6dso_hpm_ois_t *val); 01967 01968 typedef enum { 01969 LSM6DSO_ENABLE_CLAMP = 0, 01970 LSM6DSO_DISABLE_CLAMP = 1, 01971 } lsm6dso_st_ois_clampdis_t; 01972 int32_t lsm6dso_aux_gy_clamp_set(lsm6dso_ctx_t *ctx, 01973 lsm6dso_st_ois_clampdis_t val); 01974 int32_t lsm6dso_aux_gy_clamp_get(lsm6dso_ctx_t *ctx, 01975 lsm6dso_st_ois_clampdis_t *val); 01976 01977 typedef enum { 01978 LSM6DSO_AUX_GY_DISABLE = 0, 01979 LSM6DSO_AUX_GY_POS = 1, 01980 LSM6DSO_AUX_GY_NEG = 3, 01981 } lsm6dso_st_ois_t; 01982 int32_t lsm6dso_aux_gy_self_test_set(lsm6dso_ctx_t *ctx, 01983 lsm6dso_st_ois_t val); 01984 int32_t lsm6dso_aux_gy_self_test_get(lsm6dso_ctx_t *ctx, 01985 lsm6dso_st_ois_t *val); 01986 01987 typedef enum { 01988 LSM6DSO_289Hz = 0, 01989 LSM6DSO_258Hz = 1, 01990 LSM6DSO_120Hz = 2, 01991 LSM6DSO_65Hz2 = 3, 01992 LSM6DSO_33Hz2 = 4, 01993 LSM6DSO_16Hz6 = 5, 01994 LSM6DSO_8Hz30 = 6, 01995 LSM6DSO_4Hz15 = 7, 01996 } lsm6dso_filter_xl_conf_ois_t; 01997 int32_t lsm6dso_aux_xl_bandwidth_set(lsm6dso_ctx_t *ctx, 01998 lsm6dso_filter_xl_conf_ois_t val); 01999 int32_t lsm6dso_aux_xl_bandwidth_get(lsm6dso_ctx_t *ctx, 02000 lsm6dso_filter_xl_conf_ois_t *val); 02001 02002 typedef enum { 02003 LSM6DSO_AUX_2g = 0, 02004 LSM6DSO_AUX_16g = 1, 02005 LSM6DSO_AUX_4g = 2, 02006 LSM6DSO_AUX_8g = 3, 02007 } lsm6dso_fs_xl_ois_t; 02008 int32_t lsm6dso_aux_xl_full_scale_set(lsm6dso_ctx_t *ctx, 02009 lsm6dso_fs_xl_ois_t val); 02010 int32_t lsm6dso_aux_xl_full_scale_get(lsm6dso_ctx_t *ctx, 02011 lsm6dso_fs_xl_ois_t *val); 02012 02013 typedef enum { 02014 LSM6DSO_PULL_UP_DISC = 0, 02015 LSM6DSO_PULL_UP_CONNECT = 1, 02016 } lsm6dso_sdo_pu_en_t; 02017 int32_t lsm6dso_sdo_sa0_mode_set(lsm6dso_ctx_t *ctx, 02018 lsm6dso_sdo_pu_en_t val); 02019 int32_t lsm6dso_sdo_sa0_mode_get(lsm6dso_ctx_t *ctx, 02020 lsm6dso_sdo_pu_en_t *val); 02021 02022 typedef enum { 02023 LSM6DSO_SPI_4_WIRE = 0, 02024 LSM6DSO_SPI_3_WIRE = 1, 02025 } lsm6dso_sim_t; 02026 int32_t lsm6dso_spi_mode_set(lsm6dso_ctx_t *ctx, lsm6dso_sim_t val); 02027 int32_t lsm6dso_spi_mode_get(lsm6dso_ctx_t *ctx, lsm6dso_sim_t *val); 02028 02029 typedef enum { 02030 LSM6DSO_I2C_ENABLE = 0, 02031 LSM6DSO_I2C_DISABLE = 1, 02032 } lsm6dso_i2c_disable_t; 02033 int32_t lsm6dso_i2c_interface_set(lsm6dso_ctx_t *ctx, 02034 lsm6dso_i2c_disable_t val); 02035 int32_t lsm6dso_i2c_interface_get(lsm6dso_ctx_t *ctx, 02036 lsm6dso_i2c_disable_t *val); 02037 02038 typedef enum { 02039 LSM6DSO_I3C_DISABLE = 0x80, 02040 LSM6DSO_I3C_ENABLE_T_50us = 0x00, 02041 LSM6DSO_I3C_ENABLE_T_2us = 0x01, 02042 LSM6DSO_I3C_ENABLE_T_1ms = 0x02, 02043 LSM6DSO_I3C_ENABLE_T_25ms = 0x03, 02044 } lsm6dso_i3c_disable_t; 02045 int32_t lsm6dso_i3c_disable_set(lsm6dso_ctx_t *ctx, 02046 lsm6dso_i3c_disable_t val); 02047 int32_t lsm6dso_i3c_disable_get(lsm6dso_ctx_t *ctx, 02048 lsm6dso_i3c_disable_t *val); 02049 02050 typedef enum { 02051 LSM6DSO_PULL_DOWN_DISC = 0, 02052 LSM6DSO_PULL_DOWN_CONNECT = 1, 02053 } lsm6dso_int1_pd_en_t; 02054 int32_t lsm6dso_int1_mode_set(lsm6dso_ctx_t *ctx, 02055 lsm6dso_int1_pd_en_t val); 02056 int32_t lsm6dso_int1_mode_get(lsm6dso_ctx_t *ctx, 02057 lsm6dso_int1_pd_en_t *val); 02058 02059 typedef struct { 02060 lsm6dso_int1_ctrl_t int1_ctrl; 02061 lsm6dso_md1_cfg_t md1_cfg; 02062 lsm6dso_emb_func_int1_t emb_func_int1; 02063 lsm6dso_fsm_int1_a_t fsm_int1_a; 02064 lsm6dso_fsm_int1_b_t fsm_int1_b; 02065 } lsm6dso_pin_int1_route_t; 02066 int32_t lsm6dso_pin_int1_route_set(lsm6dso_ctx_t *ctx, 02067 lsm6dso_pin_int1_route_t *val); 02068 int32_t lsm6dso_pin_int1_route_get(lsm6dso_ctx_t *ctx, 02069 lsm6dso_pin_int1_route_t *val); 02070 02071 typedef struct { 02072 lsm6dso_int2_ctrl_t int2_ctrl; 02073 lsm6dso_md2_cfg_t md2_cfg; 02074 lsm6dso_emb_func_int2_t emb_func_int2; 02075 lsm6dso_fsm_int2_a_t fsm_int2_a; 02076 lsm6dso_fsm_int2_b_t fsm_int2_b; 02077 } lsm6dso_pin_int2_route_t; 02078 int32_t lsm6dso_pin_int2_route_set(lsm6dso_ctx_t *ctx, 02079 lsm6dso_pin_int2_route_t *val); 02080 int32_t lsm6dso_pin_int2_route_get(lsm6dso_ctx_t *ctx, 02081 lsm6dso_pin_int2_route_t *val); 02082 02083 typedef enum { 02084 LSM6DSO_PUSH_PULL = 0, 02085 LSM6DSO_OPEN_DRAIN = 1, 02086 } lsm6dso_pp_od_t; 02087 int32_t lsm6dso_pin_mode_set(lsm6dso_ctx_t *ctx, lsm6dso_pp_od_t val); 02088 int32_t lsm6dso_pin_mode_get(lsm6dso_ctx_t *ctx, lsm6dso_pp_od_t *val); 02089 02090 typedef enum { 02091 LSM6DSO_ACTIVE_HIGH = 0, 02092 LSM6DSO_ACTIVE_LOW = 1, 02093 } lsm6dso_h_lactive_t; 02094 int32_t lsm6dso_pin_polarity_set(lsm6dso_ctx_t *ctx, 02095 lsm6dso_h_lactive_t val); 02096 int32_t lsm6dso_pin_polarity_get(lsm6dso_ctx_t *ctx, 02097 lsm6dso_h_lactive_t *val); 02098 02099 int32_t lsm6dso_all_on_int1_set(lsm6dso_ctx_t *ctx, uint8_t val); 02100 int32_t lsm6dso_all_on_int1_get(lsm6dso_ctx_t *ctx, uint8_t *val); 02101 02102 typedef enum { 02103 LSM6DSO_ALL_INT_PULSED = 0, 02104 LSM6DSO_BASE_LATCHED_EMB_PULSED = 1, 02105 LSM6DSO_BASE_PULSED_EMB_LATCHED = 2, 02106 LSM6DSO_ALL_INT_LATCHED = 3, 02107 } lsm6dso_lir_t; 02108 int32_t lsm6dso_int_notification_set(lsm6dso_ctx_t *ctx, lsm6dso_lir_t val); 02109 int32_t lsm6dso_int_notification_get(lsm6dso_ctx_t *ctx, lsm6dso_lir_t *val); 02110 02111 typedef enum { 02112 LSM6DSO_LSb_FS_DIV_64 = 0, 02113 LSM6DSO_LSb_FS_DIV_256 = 1, 02114 } lsm6dso_wake_ths_w_t; 02115 int32_t lsm6dso_wkup_ths_weight_set(lsm6dso_ctx_t *ctx, 02116 lsm6dso_wake_ths_w_t val); 02117 int32_t lsm6dso_wkup_ths_weight_get(lsm6dso_ctx_t *ctx, 02118 lsm6dso_wake_ths_w_t *val); 02119 02120 int32_t lsm6dso_wkup_threshold_set(lsm6dso_ctx_t *ctx, uint8_t val); 02121 int32_t lsm6dso_wkup_threshold_get(lsm6dso_ctx_t *ctx, uint8_t *val); 02122 02123 int32_t lsm6dso_xl_usr_offset_on_wkup_set(lsm6dso_ctx_t *ctx, uint8_t val); 02124 int32_t lsm6dso_xl_usr_offset_on_wkup_get(lsm6dso_ctx_t *ctx, uint8_t *val); 02125 02126 int32_t lsm6dso_wkup_dur_set(lsm6dso_ctx_t *ctx, uint8_t val); 02127 int32_t lsm6dso_wkup_dur_get(lsm6dso_ctx_t *ctx, uint8_t *val); 02128 02129 int32_t lsm6dso_gy_sleep_mode_set(lsm6dso_ctx_t *ctx, uint8_t val); 02130 int32_t lsm6dso_gy_sleep_mode_get(lsm6dso_ctx_t *ctx, uint8_t *val); 02131 02132 typedef enum { 02133 LSM6DSO_DRIVE_SLEEP_CHG_EVENT = 0, 02134 LSM6DSO_DRIVE_SLEEP_STATUS = 1, 02135 } lsm6dso_sleep_status_on_int_t; 02136 int32_t lsm6dso_act_pin_notification_set(lsm6dso_ctx_t *ctx, 02137 lsm6dso_sleep_status_on_int_t val); 02138 int32_t lsm6dso_act_pin_notification_get(lsm6dso_ctx_t *ctx, 02139 lsm6dso_sleep_status_on_int_t *val); 02140 02141 typedef enum { 02142 LSM6DSO_XL_AND_GY_NOT_AFFECTED = 0, 02143 LSM6DSO_XL_12Hz5_GY_NOT_AFFECTED = 1, 02144 LSM6DSO_XL_12Hz5_GY_SLEEP = 2, 02145 LSM6DSO_XL_12Hz5_GY_PD = 3, 02146 } lsm6dso_inact_en_t; 02147 int32_t lsm6dso_act_mode_set(lsm6dso_ctx_t *ctx, lsm6dso_inact_en_t val); 02148 int32_t lsm6dso_act_mode_get(lsm6dso_ctx_t *ctx, lsm6dso_inact_en_t *val); 02149 02150 int32_t lsm6dso_act_sleep_dur_set(lsm6dso_ctx_t *ctx, uint8_t val); 02151 int32_t lsm6dso_act_sleep_dur_get(lsm6dso_ctx_t *ctx, uint8_t *val); 02152 02153 int32_t lsm6dso_tap_detection_on_z_set(lsm6dso_ctx_t *ctx, uint8_t val); 02154 int32_t lsm6dso_tap_detection_on_z_get(lsm6dso_ctx_t *ctx, uint8_t *val); 02155 02156 int32_t lsm6dso_tap_detection_on_y_set(lsm6dso_ctx_t *ctx, uint8_t val); 02157 int32_t lsm6dso_tap_detection_on_y_get(lsm6dso_ctx_t *ctx, uint8_t *val); 02158 02159 int32_t lsm6dso_tap_detection_on_x_set(lsm6dso_ctx_t *ctx, uint8_t val); 02160 int32_t lsm6dso_tap_detection_on_x_get(lsm6dso_ctx_t *ctx, uint8_t *val); 02161 02162 int32_t lsm6dso_tap_threshold_x_set(lsm6dso_ctx_t *ctx, uint8_t val); 02163 int32_t lsm6dso_tap_threshold_x_get(lsm6dso_ctx_t *ctx, uint8_t *val); 02164 02165 typedef enum { 02166 LSM6DSO_XYZ = 0, 02167 LSM6DSO_YXZ = 1, 02168 LSM6DSO_XZY = 2, 02169 LSM6DSO_ZYX = 3, 02170 LSM6DSO_YZX = 5, 02171 LSM6DSO_ZXY = 6, 02172 } lsm6dso_tap_priority_t; 02173 int32_t lsm6dso_tap_axis_priority_set(lsm6dso_ctx_t *ctx, 02174 lsm6dso_tap_priority_t val); 02175 int32_t lsm6dso_tap_axis_priority_get(lsm6dso_ctx_t *ctx, 02176 lsm6dso_tap_priority_t *val); 02177 02178 int32_t lsm6dso_tap_threshold_y_set(lsm6dso_ctx_t *ctx, uint8_t val); 02179 int32_t lsm6dso_tap_threshold_y_get(lsm6dso_ctx_t *ctx, uint8_t *val); 02180 02181 int32_t lsm6dso_tap_threshold_z_set(lsm6dso_ctx_t *ctx, uint8_t val); 02182 int32_t lsm6dso_tap_threshold_z_get(lsm6dso_ctx_t *ctx, uint8_t *val); 02183 02184 int32_t lsm6dso_tap_shock_set(lsm6dso_ctx_t *ctx, uint8_t val); 02185 int32_t lsm6dso_tap_shock_get(lsm6dso_ctx_t *ctx, uint8_t *val); 02186 02187 int32_t lsm6dso_tap_quiet_set(lsm6dso_ctx_t *ctx, uint8_t val); 02188 int32_t lsm6dso_tap_quiet_get(lsm6dso_ctx_t *ctx, uint8_t *val); 02189 02190 int32_t lsm6dso_tap_dur_set(lsm6dso_ctx_t *ctx, uint8_t val); 02191 int32_t lsm6dso_tap_dur_get(lsm6dso_ctx_t *ctx, uint8_t *val); 02192 02193 typedef enum { 02194 LSM6DSO_ONLY_SINGLE = 0, 02195 LSM6DSO_BOTH_SINGLE_DOUBLE = 1, 02196 } lsm6dso_single_double_tap_t; 02197 int32_t lsm6dso_tap_mode_set(lsm6dso_ctx_t *ctx, 02198 lsm6dso_single_double_tap_t val); 02199 int32_t lsm6dso_tap_mode_get(lsm6dso_ctx_t *ctx, 02200 lsm6dso_single_double_tap_t *val); 02201 02202 typedef enum { 02203 LSM6DSO_DEG_80 = 0, 02204 LSM6DSO_DEG_70 = 1, 02205 LSM6DSO_DEG_60 = 2, 02206 LSM6DSO_DEG_50 = 3, 02207 } lsm6dso_sixd_ths_t; 02208 int32_t lsm6dso_6d_threshold_set(lsm6dso_ctx_t *ctx, lsm6dso_sixd_ths_t val); 02209 int32_t lsm6dso_6d_threshold_get(lsm6dso_ctx_t *ctx, lsm6dso_sixd_ths_t *val); 02210 02211 int32_t lsm6dso_4d_mode_set(lsm6dso_ctx_t *ctx, uint8_t val); 02212 int32_t lsm6dso_4d_mode_get(lsm6dso_ctx_t *ctx, uint8_t *val); 02213 02214 typedef enum { 02215 LSM6DSO_FF_TSH_156mg = 0, 02216 LSM6DSO_FF_TSH_219mg = 1, 02217 LSM6DSO_FF_TSH_250mg = 2, 02218 LSM6DSO_FF_TSH_312mg = 3, 02219 LSM6DSO_FF_TSH_344mg = 4, 02220 LSM6DSO_FF_TSH_406mg = 5, 02221 LSM6DSO_FF_TSH_469mg = 6, 02222 LSM6DSO_FF_TSH_500mg = 7, 02223 } lsm6dso_ff_ths_t; 02224 int32_t lsm6dso_ff_threshold_set(lsm6dso_ctx_t *ctx, lsm6dso_ff_ths_t val); 02225 int32_t lsm6dso_ff_threshold_get(lsm6dso_ctx_t *ctx, lsm6dso_ff_ths_t *val); 02226 02227 int32_t lsm6dso_ff_dur_set(lsm6dso_ctx_t *ctx, uint8_t val); 02228 int32_t lsm6dso_ff_dur_get(lsm6dso_ctx_t *ctx, uint8_t *val); 02229 02230 int32_t lsm6dso_fifo_watermark_set(lsm6dso_ctx_t *ctx, uint16_t val); 02231 int32_t lsm6dso_fifo_watermark_get(lsm6dso_ctx_t *ctx, uint16_t *val); 02232 02233 int32_t lsm6dso_compression_algo_init_set(lsm6dso_ctx_t *ctx, uint8_t val); 02234 int32_t lsm6dso_compression_algo_init_get(lsm6dso_ctx_t *ctx, uint8_t *val); 02235 02236 typedef enum { 02237 LSM6DSO_CMP_DISABLE = 0x00, 02238 LSM6DSO_CMP_ALWAYS = 0x04, 02239 LSM6DSO_CMP_8_TO_1 = 0x05, 02240 LSM6DSO_CMP_16_TO_1 = 0x06, 02241 LSM6DSO_CMP_32_TO_1 = 0x07, 02242 } lsm6dso_uncoptr_rate_t; 02243 int32_t lsm6dso_compression_algo_set(lsm6dso_ctx_t *ctx, 02244 lsm6dso_uncoptr_rate_t val); 02245 int32_t lsm6dso_compression_algo_get(lsm6dso_ctx_t *ctx, 02246 lsm6dso_uncoptr_rate_t *val); 02247 02248 int32_t lsm6dso_fifo_virtual_sens_odr_chg_set(lsm6dso_ctx_t *ctx, 02249 uint8_t val); 02250 int32_t lsm6dso_fifo_virtual_sens_odr_chg_get(lsm6dso_ctx_t *ctx, 02251 uint8_t *val); 02252 02253 int32_t lsm6dso_compression_algo_real_time_set(lsm6dso_ctx_t *ctx, 02254 uint8_t val); 02255 int32_t lsm6dso_compression_algo_real_time_get(lsm6dso_ctx_t *ctx, 02256 uint8_t *val); 02257 02258 int32_t lsm6dso_fifo_stop_on_wtm_set(lsm6dso_ctx_t *ctx, uint8_t val); 02259 int32_t lsm6dso_fifo_stop_on_wtm_get(lsm6dso_ctx_t *ctx, uint8_t *val); 02260 02261 typedef enum { 02262 LSM6DSO_XL_NOT_BATCHED = 0, 02263 LSM6DSO_XL_BATCHED_AT_12Hz5 = 1, 02264 LSM6DSO_XL_BATCHED_AT_26Hz = 2, 02265 LSM6DSO_XL_BATCHED_AT_52Hz = 3, 02266 LSM6DSO_XL_BATCHED_AT_104Hz = 4, 02267 LSM6DSO_XL_BATCHED_AT_208Hz = 5, 02268 LSM6DSO_XL_BATCHED_AT_417Hz = 6, 02269 LSM6DSO_XL_BATCHED_AT_833Hz = 7, 02270 LSM6DSO_XL_BATCHED_AT_1667Hz = 8, 02271 LSM6DSO_XL_BATCHED_AT_3333Hz = 9, 02272 LSM6DSO_XL_BATCHED_AT_6667Hz = 10, 02273 LSM6DSO_XL_BATCHED_AT_6Hz5 = 11, 02274 } lsm6dso_bdr_xl_t; 02275 int32_t lsm6dso_fifo_xl_batch_set(lsm6dso_ctx_t *ctx, lsm6dso_bdr_xl_t val); 02276 int32_t lsm6dso_fifo_xl_batch_get(lsm6dso_ctx_t *ctx, lsm6dso_bdr_xl_t *val); 02277 02278 typedef enum { 02279 LSM6DSO_GY_NOT_BATCHED = 0, 02280 LSM6DSO_GY_BATCHED_AT_12Hz5 = 1, 02281 LSM6DSO_GY_BATCHED_AT_26Hz = 2, 02282 LSM6DSO_GY_BATCHED_AT_52Hz = 3, 02283 LSM6DSO_GY_BATCHED_AT_104Hz = 4, 02284 LSM6DSO_GY_BATCHED_AT_208Hz = 5, 02285 LSM6DSO_GY_BATCHED_AT_417Hz = 6, 02286 LSM6DSO_GY_BATCHED_AT_833Hz = 7, 02287 LSM6DSO_GY_BATCHED_AT_1667Hz = 8, 02288 LSM6DSO_GY_BATCHED_AT_3333Hz = 9, 02289 LSM6DSO_GY_BATCHED_AT_6667Hz = 10, 02290 LSM6DSO_GY_BATCHED_AT_6Hz5 = 11, 02291 } lsm6dso_bdr_gy_t; 02292 int32_t lsm6dso_fifo_gy_batch_set(lsm6dso_ctx_t *ctx, lsm6dso_bdr_gy_t val); 02293 int32_t lsm6dso_fifo_gy_batch_get(lsm6dso_ctx_t *ctx, lsm6dso_bdr_gy_t *val); 02294 02295 typedef enum { 02296 LSM6DSO_BYPASS_MODE = 0, 02297 LSM6DSO_FIFO_MODE = 1, 02298 LSM6DSO_STREAM_TO_FIFO_MODE = 3, 02299 LSM6DSO_BYPASS_TO_STREAM_MODE = 4, 02300 LSM6DSO_STREAM_MODE = 6, 02301 LSM6DSO_BYPASS_TO_FIFO_MODE = 7, 02302 } lsm6dso_fifo_mode_t; 02303 int32_t lsm6dso_fifo_mode_set(lsm6dso_ctx_t *ctx, lsm6dso_fifo_mode_t val); 02304 int32_t lsm6dso_fifo_mode_get(lsm6dso_ctx_t *ctx, lsm6dso_fifo_mode_t *val); 02305 02306 typedef enum { 02307 LSM6DSO_TEMP_NOT_BATCHED = 0, 02308 LSM6DSO_TEMP_BATCHED_AT_1Hz6 = 1, 02309 LSM6DSO_TEMP_BATCHED_AT_12Hz5 = 2, 02310 LSM6DSO_TEMP_BATCHED_AT_52Hz = 3, 02311 } lsm6dso_odr_t_batch_t; 02312 int32_t lsm6dso_fifo_temp_batch_set(lsm6dso_ctx_t *ctx, 02313 lsm6dso_odr_t_batch_t val); 02314 int32_t lsm6dso_fifo_temp_batch_get(lsm6dso_ctx_t *ctx, 02315 lsm6dso_odr_t_batch_t *val); 02316 02317 typedef enum { 02318 LSM6DSO_NO_DECIMATION = 0, 02319 LSM6DSO_DEC_1 = 1, 02320 LSM6DSO_DEC_8 = 2, 02321 LSM6DSO_DEC_32 = 3, 02322 } lsm6dso_odr_ts_batch_t; 02323 int32_t lsm6dso_fifo_timestamp_decimation_set(lsm6dso_ctx_t *ctx, 02324 lsm6dso_odr_ts_batch_t val); 02325 int32_t lsm6dso_fifo_timestamp_decimation_get(lsm6dso_ctx_t *ctx, 02326 lsm6dso_odr_ts_batch_t *val); 02327 02328 typedef enum { 02329 LSM6DSO_XL_BATCH_EVENT = 0, 02330 LSM6DSO_GYRO_BATCH_EVENT = 1, 02331 } lsm6dso_trig_counter_bdr_t; 02332 02333 typedef enum { 02334 LSM6DSO_GYRO_NC_TAG = 1, 02335 LSM6DSO_XL_NC_TAG, 02336 LSM6DSO_TEMPERATURE_TAG, 02337 LSM6DSO_TIMESTAMP_TAG, 02338 LSM6DSO_CFG_CHANGE_TAG, 02339 LSM6DSO_XL_NC_T_2_TAG, 02340 LSM6DSO_XL_NC_T_1_TAG, 02341 LSM6DSO_XL_2XC_TAG, 02342 LSM6DSO_XL_3XC_TAG, 02343 LSM6DSO_GYRO_NC_T_2_TAG, 02344 LSM6DSO_GYRO_NC_T_1_TAG, 02345 LSM6DSO_GYRO_2XC_TAG, 02346 LSM6DSO_GYRO_3XC_TAG, 02347 LSM6DSO_SENSORHUB_SLAVE0_TAG, 02348 LSM6DSO_SENSORHUB_SLAVE1_TAG, 02349 LSM6DSO_SENSORHUB_SLAVE2_TAG, 02350 LSM6DSO_SENSORHUB_SLAVE3_TAG, 02351 LSM6DSO_STEP_CPUNTER_TAG, 02352 LSM6DSO_GAME_ROTATION_TAG, 02353 LSM6DSO_GEOMAG_ROTATION_TAG, 02354 LSM6DSO_ROTATION_TAG, 02355 LSM6DSO_SENSORHUB_NACK_TAG = 0x19, 02356 } lsm6dso_fifo_tag_t; 02357 int32_t lsm6dso_fifo_cnt_event_batch_set(lsm6dso_ctx_t *ctx, 02358 lsm6dso_trig_counter_bdr_t val); 02359 int32_t lsm6dso_fifo_cnt_event_batch_get(lsm6dso_ctx_t *ctx, 02360 lsm6dso_trig_counter_bdr_t *val); 02361 02362 int32_t lsm6dso_rst_batch_counter_set(lsm6dso_ctx_t *ctx, uint8_t val); 02363 int32_t lsm6dso_rst_batch_counter_get(lsm6dso_ctx_t *ctx, uint8_t *val); 02364 02365 int32_t lsm6dso_batch_counter_threshold_set(lsm6dso_ctx_t *ctx, 02366 uint16_t val); 02367 int32_t lsm6dso_batch_counter_threshold_get(lsm6dso_ctx_t *ctx, 02368 uint16_t *val); 02369 02370 int32_t lsm6dso_fifo_data_level_get(lsm6dso_ctx_t *ctx, uint16_t *val); 02371 02372 int32_t lsm6dso_fifo_status_get(lsm6dso_ctx_t *ctx, 02373 lsm6dso_fifo_status2_t *val); 02374 02375 int32_t lsm6dso_fifo_full_flag_get(lsm6dso_ctx_t *ctx, uint8_t *val); 02376 02377 int32_t lsm6dso_fifo_ovr_flag_get(lsm6dso_ctx_t *ctx, uint8_t *val); 02378 02379 int32_t lsm6dso_fifo_wtm_flag_get(lsm6dso_ctx_t *ctx, uint8_t *val); 02380 02381 int32_t lsm6dso_fifo_sensor_tag_get(lsm6dso_ctx_t *ctx, 02382 lsm6dso_fifo_tag_t *val); 02383 02384 int32_t lsm6dso_fifo_pedo_batch_set(lsm6dso_ctx_t *ctx, uint8_t val); 02385 int32_t lsm6dso_fifo_pedo_batch_get(lsm6dso_ctx_t *ctx, uint8_t *val); 02386 02387 int32_t lsm6dso_sh_batch_slave_0_set(lsm6dso_ctx_t *ctx, uint8_t val); 02388 int32_t lsm6dso_sh_batch_slave_0_get(lsm6dso_ctx_t *ctx, uint8_t *val); 02389 02390 int32_t lsm6dso_sh_batch_slave_1_set(lsm6dso_ctx_t *ctx, uint8_t val); 02391 int32_t lsm6dso_sh_batch_slave_1_get(lsm6dso_ctx_t *ctx, uint8_t *val); 02392 02393 int32_t lsm6dso_sh_batch_slave_2_set(lsm6dso_ctx_t *ctx, uint8_t val); 02394 int32_t lsm6dso_sh_batch_slave_2_get(lsm6dso_ctx_t *ctx, uint8_t *val); 02395 02396 int32_t lsm6dso_sh_batch_slave_3_set(lsm6dso_ctx_t *ctx, uint8_t val); 02397 int32_t lsm6dso_sh_batch_slave_3_get(lsm6dso_ctx_t *ctx, uint8_t *val); 02398 02399 typedef enum { 02400 LSM6DSO_DEN_DISABLE = 0, 02401 LSM6DSO_LEVEL_FIFO = 6, 02402 LSM6DSO_LEVEL_LETCHED = 3, 02403 LSM6DSO_LEVEL_TRIGGER = 2, 02404 LSM6DSO_EDGE_TRIGGER = 4, 02405 } lsm6dso_den_mode_t; 02406 int32_t lsm6dso_den_mode_set(lsm6dso_ctx_t *ctx, lsm6dso_den_mode_t val); 02407 int32_t lsm6dso_den_mode_get(lsm6dso_ctx_t *ctx, lsm6dso_den_mode_t *val); 02408 02409 typedef enum { 02410 LSM6DSO_DEN_ACT_LOW = 0, 02411 LSM6DSO_DEN_ACT_HIGH = 1, 02412 } lsm6dso_den_lh_t; 02413 int32_t lsm6dso_den_polarity_set(lsm6dso_ctx_t *ctx, lsm6dso_den_lh_t val); 02414 int32_t lsm6dso_den_polarity_get(lsm6dso_ctx_t *ctx, lsm6dso_den_lh_t *val); 02415 02416 typedef enum { 02417 LSM6DSO_STAMP_IN_GY_DATA = 0, 02418 LSM6DSO_STAMP_IN_XL_DATA = 1, 02419 LSM6DSO_STAMP_IN_GY_XL_DATA = 2, 02420 } lsm6dso_den_xl_g_t; 02421 int32_t lsm6dso_den_enable_set(lsm6dso_ctx_t *ctx, lsm6dso_den_xl_g_t val); 02422 int32_t lsm6dso_den_enable_get(lsm6dso_ctx_t *ctx, lsm6dso_den_xl_g_t *val); 02423 02424 int32_t lsm6dso_den_mark_axis_x_set(lsm6dso_ctx_t *ctx, uint8_t val); 02425 int32_t lsm6dso_den_mark_axis_x_get(lsm6dso_ctx_t *ctx, uint8_t *val); 02426 02427 int32_t lsm6dso_den_mark_axis_y_set(lsm6dso_ctx_t *ctx, uint8_t val); 02428 int32_t lsm6dso_den_mark_axis_y_get(lsm6dso_ctx_t *ctx, uint8_t *val); 02429 02430 int32_t lsm6dso_den_mark_axis_z_set(lsm6dso_ctx_t *ctx, uint8_t val); 02431 int32_t lsm6dso_den_mark_axis_z_get(lsm6dso_ctx_t *ctx, uint8_t *val); 02432 02433 typedef enum { 02434 LSM6DSO_PEDO_DISABLE = 0x00, 02435 LSM6DSO_PEDO_BASE_MODE = 0x01, 02436 LSM6DSO_PEDO_ADV_MODE = 0x03, 02437 LSM6DSO_FALSE_STEP_REJ = 0x13, 02438 LSM6DSO_FALSE_STEP_REJ_ADV_MODE = 0x33, 02439 } lsm6dso_pedo_md_t; 02440 int32_t lsm6dso_pedo_sens_set(lsm6dso_ctx_t *ctx, lsm6dso_pedo_md_t val); 02441 int32_t lsm6dso_pedo_sens_get(lsm6dso_ctx_t *ctx, lsm6dso_pedo_md_t *val); 02442 02443 int32_t lsm6dso_pedo_step_detect_get(lsm6dso_ctx_t *ctx, uint8_t *val); 02444 02445 int32_t lsm6dso_pedo_debounce_steps_set(lsm6dso_ctx_t *ctx, 02446 uint8_t *buff); 02447 int32_t lsm6dso_pedo_debounce_steps_get(lsm6dso_ctx_t *ctx, 02448 uint8_t *buff); 02449 02450 int32_t lsm6dso_pedo_steps_period_set(lsm6dso_ctx_t *ctx, uint8_t *buff); 02451 int32_t lsm6dso_pedo_steps_period_get(lsm6dso_ctx_t *ctx, uint8_t *buff); 02452 02453 typedef enum { 02454 LSM6DSO_EVERY_STEP = 0, 02455 LSM6DSO_COUNT_OVERFLOW = 1, 02456 } lsm6dso_carry_count_en_t; 02457 int32_t lsm6dso_pedo_int_mode_set(lsm6dso_ctx_t *ctx, 02458 lsm6dso_carry_count_en_t val); 02459 int32_t lsm6dso_pedo_int_mode_get(lsm6dso_ctx_t *ctx, 02460 lsm6dso_carry_count_en_t *val); 02461 02462 int32_t lsm6dso_motion_sens_set(lsm6dso_ctx_t *ctx, uint8_t val); 02463 int32_t lsm6dso_motion_sens_get(lsm6dso_ctx_t *ctx, uint8_t *val); 02464 02465 int32_t lsm6dso_motion_flag_data_ready_get(lsm6dso_ctx_t *ctx, 02466 uint8_t *val); 02467 02468 int32_t lsm6dso_tilt_sens_set(lsm6dso_ctx_t *ctx, uint8_t val); 02469 int32_t lsm6dso_tilt_sens_get(lsm6dso_ctx_t *ctx, uint8_t *val); 02470 02471 int32_t lsm6dso_tilt_flag_data_ready_get(lsm6dso_ctx_t *ctx, 02472 uint8_t *val); 02473 02474 int32_t lsm6dso_mag_sensitivity_set(lsm6dso_ctx_t *ctx, uint8_t *buff); 02475 int32_t lsm6dso_mag_sensitivity_get(lsm6dso_ctx_t *ctx, uint8_t *buff); 02476 02477 int32_t lsm6dso_mag_offset_set(lsm6dso_ctx_t *ctx, uint8_t *buff); 02478 int32_t lsm6dso_mag_offset_get(lsm6dso_ctx_t *ctx, uint8_t *buff); 02479 02480 int32_t lsm6dso_mag_soft_iron_set(lsm6dso_ctx_t *ctx, uint8_t *buff); 02481 int32_t lsm6dso_mag_soft_iron_get(lsm6dso_ctx_t *ctx, uint8_t *buff); 02482 02483 typedef enum { 02484 LSM6DSO_Z_EQ_Y = 0, 02485 LSM6DSO_Z_EQ_MIN_Y = 1, 02486 LSM6DSO_Z_EQ_X = 2, 02487 LSM6DSO_Z_EQ_MIN_X = 3, 02488 LSM6DSO_Z_EQ_MIN_Z = 4, 02489 LSM6DSO_Z_EQ_Z = 5, 02490 } lsm6dso_mag_z_axis_t; 02491 int32_t lsm6dso_mag_z_orient_set(lsm6dso_ctx_t *ctx, 02492 lsm6dso_mag_z_axis_t val); 02493 int32_t lsm6dso_mag_z_orient_get(lsm6dso_ctx_t *ctx, 02494 lsm6dso_mag_z_axis_t *val); 02495 02496 typedef enum { 02497 LSM6DSO_Y_EQ_Y = 0, 02498 LSM6DSO_Y_EQ_MIN_Y = 1, 02499 LSM6DSO_Y_EQ_X = 2, 02500 LSM6DSO_Y_EQ_MIN_X = 3, 02501 LSM6DSO_Y_EQ_MIN_Z = 4, 02502 LSM6DSO_Y_EQ_Z = 5, 02503 } lsm6dso_mag_y_axis_t; 02504 int32_t lsm6dso_mag_y_orient_set(lsm6dso_ctx_t *ctx, 02505 lsm6dso_mag_y_axis_t val); 02506 int32_t lsm6dso_mag_y_orient_get(lsm6dso_ctx_t *ctx, 02507 lsm6dso_mag_y_axis_t *val); 02508 02509 typedef enum { 02510 LSM6DSO_X_EQ_Y = 0, 02511 LSM6DSO_X_EQ_MIN_Y = 1, 02512 LSM6DSO_X_EQ_X = 2, 02513 LSM6DSO_X_EQ_MIN_X = 3, 02514 LSM6DSO_X_EQ_MIN_Z = 4, 02515 LSM6DSO_X_EQ_Z = 5, 02516 } lsm6dso_mag_x_axis_t; 02517 int32_t lsm6dso_mag_x_orient_set(lsm6dso_ctx_t *ctx, 02518 lsm6dso_mag_x_axis_t val); 02519 int32_t lsm6dso_mag_x_orient_get(lsm6dso_ctx_t *ctx, 02520 lsm6dso_mag_x_axis_t *val); 02521 02522 int32_t lsm6dso_long_cnt_flag_data_ready_get(lsm6dso_ctx_t *ctx, 02523 uint8_t *val); 02524 02525 int32_t lsm6dso_emb_fsm_en_set(lsm6dso_ctx_t *ctx, uint8_t val); 02526 int32_t lsm6dso_emb_fsm_en_get(lsm6dso_ctx_t *ctx, uint8_t *val); 02527 02528 typedef struct { 02529 lsm6dso_fsm_enable_a_t fsm_enable_a; 02530 lsm6dso_fsm_enable_b_t fsm_enable_b; 02531 } lsm6dso_emb_fsm_enable_t; 02532 int32_t lsm6dso_fsm_enable_set(lsm6dso_ctx_t *ctx, 02533 lsm6dso_emb_fsm_enable_t *val); 02534 int32_t lsm6dso_fsm_enable_get(lsm6dso_ctx_t *ctx, 02535 lsm6dso_emb_fsm_enable_t *val); 02536 02537 int32_t lsm6dso_long_cnt_set(lsm6dso_ctx_t *ctx, uint8_t *buff); 02538 int32_t lsm6dso_long_cnt_get(lsm6dso_ctx_t *ctx, uint8_t *buff); 02539 02540 typedef enum { 02541 LSM6DSO_LC_NORMAL = 0, 02542 LSM6DSO_LC_CLEAR = 1, 02543 LSM6DSO_LC_CLEAR_DONE = 2, 02544 } lsm6dso_fsm_lc_clr_t; 02545 int32_t lsm6dso_long_clr_set(lsm6dso_ctx_t *ctx, lsm6dso_fsm_lc_clr_t val); 02546 int32_t lsm6dso_long_clr_get(lsm6dso_ctx_t *ctx, lsm6dso_fsm_lc_clr_t *val); 02547 02548 typedef struct { 02549 lsm6dso_fsm_outs1_t fsm_outs1; 02550 lsm6dso_fsm_outs2_t fsm_outs2; 02551 lsm6dso_fsm_outs3_t fsm_outs3; 02552 lsm6dso_fsm_outs4_t fsm_outs4; 02553 lsm6dso_fsm_outs5_t fsm_outs5; 02554 lsm6dso_fsm_outs6_t fsm_outs6; 02555 lsm6dso_fsm_outs7_t fsm_outs7; 02556 lsm6dso_fsm_outs8_t fsm_outs8; 02557 lsm6dso_fsm_outs9_t fsm_outs9; 02558 lsm6dso_fsm_outs10_t fsm_outs10; 02559 lsm6dso_fsm_outs11_t fsm_outs11; 02560 lsm6dso_fsm_outs12_t fsm_outs12; 02561 lsm6dso_fsm_outs13_t fsm_outs13; 02562 lsm6dso_fsm_outs14_t fsm_outs14; 02563 lsm6dso_fsm_outs15_t fsm_outs15; 02564 lsm6dso_fsm_outs16_t fsm_outs16; 02565 } lsm6dso_fsm_out_t; 02566 int32_t lsm6dso_fsm_out_get(lsm6dso_ctx_t *ctx, lsm6dso_fsm_out_t *val); 02567 02568 typedef enum { 02569 LSM6DSO_ODR_FSM_12Hz5 = 0, 02570 LSM6DSO_ODR_FSM_26Hz = 1, 02571 LSM6DSO_ODR_FSM_52Hz = 2, 02572 LSM6DSO_ODR_FSM_104Hz = 3, 02573 } lsm6dso_fsm_odr_t; 02574 int32_t lsm6dso_fsm_data_rate_set(lsm6dso_ctx_t *ctx, lsm6dso_fsm_odr_t val); 02575 int32_t lsm6dso_fsm_data_rate_get(lsm6dso_ctx_t *ctx, lsm6dso_fsm_odr_t *val); 02576 02577 int32_t lsm6dso_fsm_init_set(lsm6dso_ctx_t *ctx, uint8_t val); 02578 int32_t lsm6dso_fsm_init_get(lsm6dso_ctx_t *ctx, uint8_t *val); 02579 02580 int32_t lsm6dso_long_cnt_int_value_set(lsm6dso_ctx_t *ctx, uint16_t val); 02581 int32_t lsm6dso_long_cnt_int_value_get(lsm6dso_ctx_t *ctx, uint16_t *val); 02582 02583 int32_t lsm6dso_fsm_number_of_programs_set(lsm6dso_ctx_t *ctx, uint8_t val); 02584 int32_t lsm6dso_fsm_number_of_programs_get(lsm6dso_ctx_t *ctx, uint8_t *val); 02585 02586 int32_t lsm6dso_fsm_start_address_set(lsm6dso_ctx_t *ctx, uint16_t val); 02587 int32_t lsm6dso_fsm_start_address_get(lsm6dso_ctx_t *ctx, uint16_t *val); 02588 02589 int32_t lsm6dso_sh_read_data_raw_get(lsm6dso_ctx_t *ctx, uint8_t *val, 02590 uint8_t len); 02591 02592 typedef enum { 02593 LSM6DSO_SLV_0 = 0, 02594 LSM6DSO_SLV_0_1 = 1, 02595 LSM6DSO_SLV_0_1_2 = 2, 02596 LSM6DSO_SLV_0_1_2_3 = 3, 02597 } lsm6dso_aux_sens_on_t; 02598 int32_t lsm6dso_sh_slave_connected_set(lsm6dso_ctx_t *ctx, 02599 lsm6dso_aux_sens_on_t val); 02600 int32_t lsm6dso_sh_slave_connected_get(lsm6dso_ctx_t *ctx, 02601 lsm6dso_aux_sens_on_t *val); 02602 02603 int32_t lsm6dso_sh_master_set(lsm6dso_ctx_t *ctx, uint8_t val); 02604 int32_t lsm6dso_sh_master_get(lsm6dso_ctx_t *ctx, uint8_t *val); 02605 02606 typedef enum { 02607 LSM6DSO_EXT_PULL_UP = 0, 02608 LSM6DSO_INTERNAL_PULL_UP = 1, 02609 } lsm6dso_shub_pu_en_t; 02610 int32_t lsm6dso_sh_pin_mode_set(lsm6dso_ctx_t *ctx, lsm6dso_shub_pu_en_t val); 02611 int32_t lsm6dso_sh_pin_mode_get(lsm6dso_ctx_t *ctx, lsm6dso_shub_pu_en_t *val); 02612 02613 int32_t lsm6dso_sh_pass_through_set(lsm6dso_ctx_t *ctx, uint8_t val); 02614 int32_t lsm6dso_sh_pass_through_get(lsm6dso_ctx_t *ctx, uint8_t *val); 02615 02616 typedef enum { 02617 LSM6DSO_EXT_ON_INT2_PIN = 0, 02618 LSM6DSO_XL_GY_DRDY = 1, 02619 } lsm6dso_start_config_t; 02620 int32_t lsm6dso_sh_syncro_mode_set(lsm6dso_ctx_t *ctx, 02621 lsm6dso_start_config_t val); 02622 int32_t lsm6dso_sh_syncro_mode_get(lsm6dso_ctx_t *ctx, 02623 lsm6dso_start_config_t *val); 02624 02625 typedef enum { 02626 LSM6DSO_EACH_SH_CYCLE = 0, 02627 LSM6DSO_ONLY_FIRST_CYCLE = 1, 02628 } lsm6dso_write_once_t; 02629 int32_t lsm6dso_sh_write_mode_set(lsm6dso_ctx_t *ctx, 02630 lsm6dso_write_once_t val); 02631 int32_t lsm6dso_sh_write_mode_get(lsm6dso_ctx_t *ctx, 02632 lsm6dso_write_once_t *val); 02633 02634 int32_t lsm6dso_sh_reset_set(lsm6dso_ctx_t *ctx); 02635 int32_t lsm6dso_sh_reset_get(lsm6dso_ctx_t *ctx, uint8_t *val); 02636 02637 typedef enum { 02638 LSM6DSO_SH_ODR_104Hz = 0, 02639 LSM6DSO_SH_ODR_52Hz = 1, 02640 LSM6DSO_SH_ODR_26Hz = 2, 02641 LSM6DSO_SH_ODR_13Hz = 3, 02642 } lsm6dso_shub_odr_t; 02643 int32_t lsm6dso_sh_data_rate_set(lsm6dso_ctx_t *ctx, lsm6dso_shub_odr_t val); 02644 int32_t lsm6dso_sh_data_rate_get(lsm6dso_ctx_t *ctx, lsm6dso_shub_odr_t *val); 02645 02646 typedef struct { 02647 uint8_t slv0_add; 02648 uint8_t slv0_subadd; 02649 uint8_t slv0_data; 02650 } lsm6dso_sh_cfg_write_t; 02651 int32_t lsm6dso_sh_cfg_write(lsm6dso_ctx_t *ctx, lsm6dso_sh_cfg_write_t *val); 02652 02653 typedef struct { 02654 uint8_t slv_add; 02655 uint8_t slv_subadd; 02656 uint8_t slv_len; 02657 } lsm6dso_sh_cfg_read_t; 02658 int32_t lsm6dso_sh_slv0_cfg_read(lsm6dso_ctx_t *ctx, 02659 lsm6dso_sh_cfg_read_t *val); 02660 int32_t lsm6dso_sh_slv1_cfg_read(lsm6dso_ctx_t *ctx, 02661 lsm6dso_sh_cfg_read_t *val); 02662 int32_t lsm6dso_sh_slv2_cfg_read(lsm6dso_ctx_t *ctx, 02663 lsm6dso_sh_cfg_read_t *val); 02664 int32_t lsm6dso_sh_slv3_cfg_read(lsm6dso_ctx_t *ctx, 02665 lsm6dso_sh_cfg_read_t *val); 02666 02667 int32_t lsm6dso_sh_status_get(lsm6dso_ctx_t *ctx, 02668 lsm6dso_status_master_t *val); 02669 02670 /** 02671 * @} 02672 * 02673 */ 02674 02675 #ifdef __cplusplus 02676 } 02677 #endif 02678 02679 #endif /*LSM6DSO_DRIVER_H */ 02680 02681 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
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