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watchdog.cpp@173:1198e6c31b4a, 2018-09-24 (annotated)
- Committer:
- hakusan270
- Date:
- Mon Sep 24 15:11:03 2018 +0000
- Revision:
- 173:1198e6c31b4a
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Who changed what in which revision?
User | Revision | Line number | New contents of line |
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hakusan270 | 173:1198e6c31b4a | 1 | /// @file Watchdog.cpp provides the interface to the Watchdog module |
hakusan270 | 173:1198e6c31b4a | 2 | /// |
hakusan270 | 173:1198e6c31b4a | 3 | /// This provides basic Watchdog service for the mbed. You can configure |
hakusan270 | 173:1198e6c31b4a | 4 | /// various timeout intervals that meet your system needs. Additionally, |
hakusan270 | 173:1198e6c31b4a | 5 | /// it is possible to identify if the Watchdog was the cause of any |
hakusan270 | 173:1198e6c31b4a | 6 | /// system restart. |
hakusan270 | 173:1198e6c31b4a | 7 | /// |
hakusan270 | 173:1198e6c31b4a | 8 | /// Adapted from Simon's Watchdog code from http://mbed.org/forum/mbed/topic/508/ |
hakusan270 | 173:1198e6c31b4a | 9 | /// |
hakusan270 | 173:1198e6c31b4a | 10 | /// @note Copyright © 2011 by Smartware Computing, all rights reserved. |
hakusan270 | 173:1198e6c31b4a | 11 | /// This software may be used to derive new software, as long as |
hakusan270 | 173:1198e6c31b4a | 12 | /// this copyright statement remains in the source file. |
hakusan270 | 173:1198e6c31b4a | 13 | /// @author David Smart |
hakusan270 | 173:1198e6c31b4a | 14 | /// |
hakusan270 | 173:1198e6c31b4a | 15 | /// @note Copyright © 2015 by NBRemond, all rights reserved. |
hakusan270 | 173:1198e6c31b4a | 16 | /// This software may be used to derive new software, as long as |
hakusan270 | 173:1198e6c31b4a | 17 | /// this copyright statement remains in the source file. |
hakusan270 | 173:1198e6c31b4a | 18 | /// |
hakusan270 | 173:1198e6c31b4a | 19 | /// Added support for STM32 Nucleo platforms |
hakusan270 | 173:1198e6c31b4a | 20 | /// |
hakusan270 | 173:1198e6c31b4a | 21 | /// @author Bernaérd Remond |
hakusan270 | 173:1198e6c31b4a | 22 | /// |
hakusan270 | 173:1198e6c31b4a | 23 | |
hakusan270 | 173:1198e6c31b4a | 24 | //#define LPC |
hakusan270 | 173:1198e6c31b4a | 25 | #define ST_NUCLEO |
hakusan270 | 173:1198e6c31b4a | 26 | |
hakusan270 | 173:1198e6c31b4a | 27 | |
hakusan270 | 173:1198e6c31b4a | 28 | #include "mbed.h" |
hakusan270 | 173:1198e6c31b4a | 29 | #include "watchdog.h" |
hakusan270 | 173:1198e6c31b4a | 30 | |
hakusan270 | 173:1198e6c31b4a | 31 | |
hakusan270 | 173:1198e6c31b4a | 32 | /// Watchdog gets instantiated at the module level |
hakusan270 | 173:1198e6c31b4a | 33 | Watchdog::Watchdog() { |
hakusan270 | 173:1198e6c31b4a | 34 | #ifdef LPC |
hakusan270 | 173:1198e6c31b4a | 35 | wdreset = (LPC_WDT->WDMOD >> 2) & 1; // capture the cause of the previous reset |
hakusan270 | 173:1198e6c31b4a | 36 | #endif |
hakusan270 | 173:1198e6c31b4a | 37 | #ifdef ST_NUCLEO |
hakusan270 | 173:1198e6c31b4a | 38 | // capture the cause of the previous reset |
hakusan270 | 173:1198e6c31b4a | 39 | /* Check if the system has resumed from IWDG reset */ |
hakusan270 | 173:1198e6c31b4a | 40 | /* |
hakusan270 | 173:1198e6c31b4a | 41 | if (__HAL_RCC_GET_FLAG(RCC_FLAG_IWDGRST)) { |
hakusan270 | 173:1198e6c31b4a | 42 | wdreset = true; |
hakusan270 | 173:1198e6c31b4a | 43 | } |
hakusan270 | 173:1198e6c31b4a | 44 | else { |
hakusan270 | 173:1198e6c31b4a | 45 | wdreset = false; |
hakusan270 | 173:1198e6c31b4a | 46 | } |
hakusan270 | 173:1198e6c31b4a | 47 | */ |
hakusan270 | 173:1198e6c31b4a | 48 | wdreset = false; |
hakusan270 | 173:1198e6c31b4a | 49 | #endif |
hakusan270 | 173:1198e6c31b4a | 50 | |
hakusan270 | 173:1198e6c31b4a | 51 | } |
hakusan270 | 173:1198e6c31b4a | 52 | |
hakusan270 | 173:1198e6c31b4a | 53 | /// Load timeout value in watchdog timer and enable |
hakusan270 | 173:1198e6c31b4a | 54 | void Watchdog::Configure(float timeout) { |
hakusan270 | 173:1198e6c31b4a | 55 | #ifdef LPC |
hakusan270 | 173:1198e6c31b4a | 56 | LPC_WDT->WDCLKSEL = 0x1; // Set CLK src to PCLK |
hakusan270 | 173:1198e6c31b4a | 57 | uint32_t clk = SystemCoreClock / 16; // WD has a fixed /4 prescaler, PCLK default is /4 |
hakusan270 | 173:1198e6c31b4a | 58 | LPC_WDT->WDTC = (uint32_t)(timeout * (float)clk); |
hakusan270 | 173:1198e6c31b4a | 59 | LPC_WDT->WDMOD = 0x3; // Enabled and Reset |
hakusan270 | 173:1198e6c31b4a | 60 | #endif |
hakusan270 | 173:1198e6c31b4a | 61 | #ifdef ST_NUCLEO |
hakusan270 | 173:1198e6c31b4a | 62 | // see http://embedded-lab.com/blog/?p=9662 |
hakusan270 | 173:1198e6c31b4a | 63 | #define LsiFreq (45000) |
hakusan270 | 173:1198e6c31b4a | 64 | |
hakusan270 | 173:1198e6c31b4a | 65 | uint16_t PrescalerCode; |
hakusan270 | 173:1198e6c31b4a | 66 | uint16_t Prescaler; |
hakusan270 | 173:1198e6c31b4a | 67 | uint16_t ReloadValue; |
hakusan270 | 173:1198e6c31b4a | 68 | float Calculated_timeout; |
hakusan270 | 173:1198e6c31b4a | 69 | |
hakusan270 | 173:1198e6c31b4a | 70 | if ((timeout * (LsiFreq/4)) < 0x7FF) { |
hakusan270 | 173:1198e6c31b4a | 71 | PrescalerCode = IWDG_PRESCALER_4; |
hakusan270 | 173:1198e6c31b4a | 72 | Prescaler = 4; |
hakusan270 | 173:1198e6c31b4a | 73 | } |
hakusan270 | 173:1198e6c31b4a | 74 | else if ((timeout * (LsiFreq/8)) < 0xFF0) { |
hakusan270 | 173:1198e6c31b4a | 75 | PrescalerCode = IWDG_PRESCALER_8; |
hakusan270 | 173:1198e6c31b4a | 76 | Prescaler = 8; |
hakusan270 | 173:1198e6c31b4a | 77 | } |
hakusan270 | 173:1198e6c31b4a | 78 | else if ((timeout * (LsiFreq/16)) < 0xFF0) { |
hakusan270 | 173:1198e6c31b4a | 79 | PrescalerCode = IWDG_PRESCALER_16; |
hakusan270 | 173:1198e6c31b4a | 80 | Prescaler = 16; |
hakusan270 | 173:1198e6c31b4a | 81 | } |
hakusan270 | 173:1198e6c31b4a | 82 | else if ((timeout * (LsiFreq/32)) < 0xFF0) { |
hakusan270 | 173:1198e6c31b4a | 83 | PrescalerCode = IWDG_PRESCALER_32; |
hakusan270 | 173:1198e6c31b4a | 84 | Prescaler = 32; |
hakusan270 | 173:1198e6c31b4a | 85 | } |
hakusan270 | 173:1198e6c31b4a | 86 | else if ((timeout * (LsiFreq/64)) < 0xFF0) { |
hakusan270 | 173:1198e6c31b4a | 87 | PrescalerCode = IWDG_PRESCALER_64; |
hakusan270 | 173:1198e6c31b4a | 88 | Prescaler = 64; |
hakusan270 | 173:1198e6c31b4a | 89 | } |
hakusan270 | 173:1198e6c31b4a | 90 | else if ((timeout * (LsiFreq/128)) < 0xFF0) { |
hakusan270 | 173:1198e6c31b4a | 91 | PrescalerCode = IWDG_PRESCALER_128; |
hakusan270 | 173:1198e6c31b4a | 92 | Prescaler = 128; |
hakusan270 | 173:1198e6c31b4a | 93 | } |
hakusan270 | 173:1198e6c31b4a | 94 | else { |
hakusan270 | 173:1198e6c31b4a | 95 | PrescalerCode = IWDG_PRESCALER_256; |
hakusan270 | 173:1198e6c31b4a | 96 | Prescaler = 256; |
hakusan270 | 173:1198e6c31b4a | 97 | } |
hakusan270 | 173:1198e6c31b4a | 98 | |
hakusan270 | 173:1198e6c31b4a | 99 | // specifies the IWDG Reload value. This parameter must be a number between 0 and 0x0FFF. |
hakusan270 | 173:1198e6c31b4a | 100 | ReloadValue = (uint32_t)(timeout * (LsiFreq/Prescaler)); |
hakusan270 | 173:1198e6c31b4a | 101 | |
hakusan270 | 173:1198e6c31b4a | 102 | Calculated_timeout = ((float)(Prescaler * ReloadValue)) / LsiFreq; |
hakusan270 | 173:1198e6c31b4a | 103 | printf("WATCHDOG set with prescaler:%d reload value: 0x%X - timeout:%f\n",Prescaler, ReloadValue, Calculated_timeout); |
hakusan270 | 173:1198e6c31b4a | 104 | |
hakusan270 | 173:1198e6c31b4a | 105 | IWDG->KR = 0x5555; //Disable write protection of IWDG registers |
hakusan270 | 173:1198e6c31b4a | 106 | IWDG->PR = PrescalerCode; //Set PR value |
hakusan270 | 173:1198e6c31b4a | 107 | IWDG->RLR = ReloadValue; //Set RLR value |
hakusan270 | 173:1198e6c31b4a | 108 | IWDG->KR = 0xAAAA; //Reload IWDG |
hakusan270 | 173:1198e6c31b4a | 109 | IWDG->KR = 0xCCCC; //Start IWDG - See more at: http://embedded-lab.com/blog/?p=9662#sthash.6VNxVSn0.dpuf |
hakusan270 | 173:1198e6c31b4a | 110 | #endif |
hakusan270 | 173:1198e6c31b4a | 111 | |
hakusan270 | 173:1198e6c31b4a | 112 | Service(); |
hakusan270 | 173:1198e6c31b4a | 113 | } |
hakusan270 | 173:1198e6c31b4a | 114 | |
hakusan270 | 173:1198e6c31b4a | 115 | /// "Service", "kick" or "feed" the dog - reset the watchdog timer |
hakusan270 | 173:1198e6c31b4a | 116 | /// by writing this required bit pattern |
hakusan270 | 173:1198e6c31b4a | 117 | void Watchdog::Service() { |
hakusan270 | 173:1198e6c31b4a | 118 | #ifdef LPC |
hakusan270 | 173:1198e6c31b4a | 119 | LPC_WDT->WDFEED = 0xAA; |
hakusan270 | 173:1198e6c31b4a | 120 | LPC_WDT->WDFEED = 0x55; |
hakusan270 | 173:1198e6c31b4a | 121 | #endif |
hakusan270 | 173:1198e6c31b4a | 122 | #ifdef ST_NUCLEO |
hakusan270 | 173:1198e6c31b4a | 123 | IWDG->KR = 0xAAAA; //Reload IWDG - See more at: http://embedded-lab.com/blog/?p=9662#sthash.6VNxVSn0.dpuf |
hakusan270 | 173:1198e6c31b4a | 124 | #endif |
hakusan270 | 173:1198e6c31b4a | 125 | } |
hakusan270 | 173:1198e6c31b4a | 126 | |
hakusan270 | 173:1198e6c31b4a | 127 | /// get the flag to indicate if the watchdog causes the reset |
hakusan270 | 173:1198e6c31b4a | 128 | bool Watchdog::WatchdogCausedReset() { |
hakusan270 | 173:1198e6c31b4a | 129 | return wdreset; |
hakusan270 | 173:1198e6c31b4a | 130 | } |
hakusan270 | 173:1198e6c31b4a | 131 |