interrupt handling
host.c@12:336524cf63de, 2015-04-10 (annotated)
- Committer:
- soumi_ghsoh
- Date:
- Fri Apr 10 23:16:44 2015 +0000
- Revision:
- 12:336524cf63de
- Parent:
- 9:9266e0109d26
PollNFC(), FindNFC(), tagFound
Who changed what in which revision?
User | Revision | Line number | New contents of line |
---|---|---|---|
soumi_ghsoh | 6:3c510c297e2f | 1 | ////void trf797xInitialSettings(void) |
soumi_ghsoh | 6:3c510c297e2f | 2 | ////// * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * |
soumi_ghsoh | 6:3c510c297e2f | 3 | ////// trf797xInitialSettings() |
soumi_ghsoh | 6:3c510c297e2f | 4 | ////// * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * |
soumi_ghsoh | 6:3c510c297e2f | 5 | ////{ |
soumi_ghsoh | 6:3c510c297e2f | 6 | //// uint8_t mod_control[2]; |
soumi_ghsoh | 6:3c510c297e2f | 7 | //// |
soumi_ghsoh | 6:3c510c297e2f | 8 | //// mod_control[0] = SOFT_INIT; |
soumi_ghsoh | 6:3c510c297e2f | 9 | //// trf797xDirectCommand(mod_control); |
soumi_ghsoh | 6:3c510c297e2f | 10 | //// |
soumi_ghsoh | 6:3c510c297e2f | 11 | //// mod_control[0] = IDLE; |
soumi_ghsoh | 6:3c510c297e2f | 12 | //// trf797xDirectCommand(mod_control); |
soumi_ghsoh | 6:3c510c297e2f | 13 | //// |
soumi_ghsoh | 6:3c510c297e2f | 14 | //// mod_control[0] = MODULATOR_CONTROL; |
soumi_ghsoh | 6:3c510c297e2f | 15 | //// mod_control[1] = 0x21; // 6.78 MHz, OOK 100% |
soumi_ghsoh | 6:3c510c297e2f | 16 | //// trf797xWriteSingle(mod_control, 2); |
soumi_ghsoh | 6:3c510c297e2f | 17 | //// |
soumi_ghsoh | 6:3c510c297e2f | 18 | //// mod_control[0] = MODULATOR_CONTROL; |
soumi_ghsoh | 6:3c510c297e2f | 19 | //// trf797xReadSingle(mod_control, 1); |
soumi_ghsoh | 6:3c510c297e2f | 20 | ////// printf("\r\nMOD: 0x%02X 0x%02X\r\n", mod_control[0], mod_control[1]); |
soumi_ghsoh | 6:3c510c297e2f | 21 | //// |
soumi_ghsoh | 6:3c510c297e2f | 22 | //// /* |
soumi_ghsoh | 6:3c510c297e2f | 23 | //// mod_control[0] = CHIP_STATUS_CONTROL; |
soumi_ghsoh | 6:3c510c297e2f | 24 | //// mod_control[1] = 0x01; |
soumi_ghsoh | 6:3c510c297e2f | 25 | //// trf797xWriteSingle(mod_control, 2); |
soumi_ghsoh | 6:3c510c297e2f | 26 | //// |
soumi_ghsoh | 6:3c510c297e2f | 27 | //// mod_control[0] = CHIP_STATUS_CONTROL; |
soumi_ghsoh | 6:3c510c297e2f | 28 | //// trf797xReadSingle(mod_control, 1); |
soumi_ghsoh | 6:3c510c297e2f | 29 | //// printf("CHIP: 0x%02X 0x%02X\r\n", mod_control[0], mod_control[1]); |
soumi_ghsoh | 6:3c510c297e2f | 30 | //// |
soumi_ghsoh | 6:3c510c297e2f | 31 | //// mod_control[0] = ISO_CONTROL; |
soumi_ghsoh | 6:3c510c297e2f | 32 | //// mod_control[1] = 0x02; |
soumi_ghsoh | 6:3c510c297e2f | 33 | //// trf797xWriteSingle(mod_control, 2); |
soumi_ghsoh | 6:3c510c297e2f | 34 | //// |
soumi_ghsoh | 6:3c510c297e2f | 35 | //// mod_control[0] = ISO_CONTROL; |
soumi_ghsoh | 6:3c510c297e2f | 36 | //// mod_control[1] = ISO_CONTROL; |
soumi_ghsoh | 6:3c510c297e2f | 37 | //// trf797xReadSingle(mod_control, 1); |
soumi_ghsoh | 6:3c510c297e2f | 38 | //// printf("ISO: 0x%02X 0x%02X\r\n", mod_control[0], mod_control[1]); |
soumi_ghsoh | 6:3c510c297e2f | 39 | //// |
soumi_ghsoh | 6:3c510c297e2f | 40 | //// mod_control[0] = RX_SPECIAL_SETTINGS; |
soumi_ghsoh | 6:3c510c297e2f | 41 | //// mod_control[1] = 0x40; |
soumi_ghsoh | 6:3c510c297e2f | 42 | //// trf797xWriteSingle(mod_control, 2); |
soumi_ghsoh | 6:3c510c297e2f | 43 | //// |
soumi_ghsoh | 6:3c510c297e2f | 44 | //// mod_control[0] = RX_SPECIAL_SETTINGS; |
soumi_ghsoh | 6:3c510c297e2f | 45 | //// mod_control[1] = RX_SPECIAL_SETTINGS; |
soumi_ghsoh | 6:3c510c297e2f | 46 | //// trf797xReadSingle(mod_control, 1); |
soumi_ghsoh | 6:3c510c297e2f | 47 | //// printf("RX: 0x%02X 0x%02X\r\n", mod_control[0], mod_control[1]); |
soumi_ghsoh | 6:3c510c297e2f | 48 | //// */ |
soumi_ghsoh | 6:3c510c297e2f | 49 | //// /* |
soumi_ghsoh | 6:3c510c297e2f | 50 | //// command[0] = CHIP_STATUS_CONTROL; |
soumi_ghsoh | 6:3c510c297e2f | 51 | //// command[1] = CHIP_STATUS_CONTROL; |
soumi_ghsoh | 6:3c510c297e2f | 52 | //// command[1] = 0x01; // Set bit 0 => Vin = 5V |
soumi_ghsoh | 6:3c510c297e2f | 53 | //// trf797xWriteSingle(command, 2); |
soumi_ghsoh | 6:3c510c297e2f | 54 | //// |
soumi_ghsoh | 6:3c510c297e2f | 55 | //// command[0] = CHIP_STATUS_CONTROL; |
soumi_ghsoh | 6:3c510c297e2f | 56 | //// command[1] = CHIP_STATUS_CONTROL; |
soumi_ghsoh | 6:3c510c297e2f | 57 | //// trf797xReadSingle(command, 1); |
soumi_ghsoh | 6:3c510c297e2f | 58 | //// printf("CHIP 0x%02X 0x%02X\r\n", command[0], command[1]); |
soumi_ghsoh | 6:3c510c297e2f | 59 | //// */ |
soumi_ghsoh | 6:3c510c297e2f | 60 | ////} // End of trf797xInitialSettings() |
soumi_ghsoh | 6:3c510c297e2f | 61 | // |
soumi_ghsoh | 6:3c510c297e2f | 62 | // |
soumi_ghsoh | 6:3c510c297e2f | 63 | // |
soumi_ghsoh | 6:3c510c297e2f | 64 | //void trf797xTxNextSlot(void) |
soumi_ghsoh | 6:3c510c297e2f | 65 | //// * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * |
soumi_ghsoh | 6:3c510c297e2f | 66 | //// trf797xTxNextSlot() |
soumi_ghsoh | 6:3c510c297e2f | 67 | //// * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * |
soumi_ghsoh | 6:3c510c297e2f | 68 | //{ |
soumi_ghsoh | 6:3c510c297e2f | 69 | // command[0] = TRANSMIT_NEXT_SLOT; |
soumi_ghsoh | 6:3c510c297e2f | 70 | // trf797xDirectCommand(command); |
soumi_ghsoh | 6:3c510c297e2f | 71 | //} |
soumi_ghsoh | 6:3c510c297e2f | 72 | // |
soumi_ghsoh | 6:3c510c297e2f | 73 | //void trf797xDisableSlotCounter(void) |
soumi_ghsoh | 6:3c510c297e2f | 74 | //// * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * |
soumi_ghsoh | 6:3c510c297e2f | 75 | //// trf797xDisableSlotCounter() |
soumi_ghsoh | 6:3c510c297e2f | 76 | //// * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * |
soumi_ghsoh | 6:3c510c297e2f | 77 | //{ |
soumi_ghsoh | 6:3c510c297e2f | 78 | // buf[40] = IRQ_MASK; |
soumi_ghsoh | 6:3c510c297e2f | 79 | // buf[41] = IRQ_MASK; |
soumi_ghsoh | 6:3c510c297e2f | 80 | // trf797xReadSingle(&buf[41], 1); |
soumi_ghsoh | 6:3c510c297e2f | 81 | // buf[41] &= 0xFE; |
soumi_ghsoh | 6:3c510c297e2f | 82 | // trf797xWriteSingle(&buf[40], 2); |
soumi_ghsoh | 6:3c510c297e2f | 83 | //} |
soumi_ghsoh | 6:3c510c297e2f | 84 | // |
soumi_ghsoh | 6:3c510c297e2f | 85 | //void trf797xReset(void) |
soumi_ghsoh | 6:3c510c297e2f | 86 | //// * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * |
soumi_ghsoh | 6:3c510c297e2f | 87 | //// trf797xReset() |
soumi_ghsoh | 6:3c510c297e2f | 88 | //// * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * |
soumi_ghsoh | 6:3c510c297e2f | 89 | //{ |
soumi_ghsoh | 6:3c510c297e2f | 90 | // command[0] = RESET; |
soumi_ghsoh | 6:3c510c297e2f | 91 | // trf797xDirectCommand(command); |
soumi_ghsoh | 6:3c510c297e2f | 92 | //} |
soumi_ghsoh | 6:3c510c297e2f | 93 | // |
soumi_ghsoh | 6:3c510c297e2f | 94 | //void trf797xTurnRfOn(void) |
soumi_ghsoh | 6:3c510c297e2f | 95 | //// * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * |
soumi_ghsoh | 6:3c510c297e2f | 96 | //// trf797xTurnRfOn() |
soumi_ghsoh | 6:3c510c297e2f | 97 | //// * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * |
soumi_ghsoh | 6:3c510c297e2f | 98 | //{ |
soumi_ghsoh | 6:3c510c297e2f | 99 | // command[0] = CHIP_STATUS_CONTROL; |
soumi_ghsoh | 6:3c510c297e2f | 100 | // command[1] = CHIP_STATUS_CONTROL; |
soumi_ghsoh | 6:3c510c297e2f | 101 | // trf797xReadSingle(&command[1], 1); |
soumi_ghsoh | 6:3c510c297e2f | 102 | // command[1] &= 0x3F; |
soumi_ghsoh | 6:3c510c297e2f | 103 | // command[1] |= 0x21; // Oroiginal code has 0x20 !!! |
soumi_ghsoh | 6:3c510c297e2f | 104 | //// printf("\r\nCHIP 0x%02X 0x%02X\r\n", command[0], command[1]); |
soumi_ghsoh | 6:3c510c297e2f | 105 | // trf797xWriteSingle(command, 2); |
soumi_ghsoh | 6:3c510c297e2f | 106 | //// printf("\r\nCHIP 0x%02X 0x%02X\r\n", command[0], command[1]); |
soumi_ghsoh | 6:3c510c297e2f | 107 | //} // End of trf797xTurnRfOn() |
soumi_ghsoh | 6:3c510c297e2f | 108 | // |
soumi_ghsoh | 6:3c510c297e2f | 109 | //void trf797xTurnRfOff(void) |
soumi_ghsoh | 6:3c510c297e2f | 110 | //// * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * |
soumi_ghsoh | 6:3c510c297e2f | 111 | //// trf797xTurnRfOff() |
soumi_ghsoh | 6:3c510c297e2f | 112 | //// * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * |
soumi_ghsoh | 6:3c510c297e2f | 113 | //{ |
soumi_ghsoh | 6:3c510c297e2f | 114 | // command[0] = CHIP_STATUS_CONTROL; |
soumi_ghsoh | 6:3c510c297e2f | 115 | // command[1] = CHIP_STATUS_CONTROL; |
soumi_ghsoh | 6:3c510c297e2f | 116 | // trf797xReadSingle(&command[1], 1); |
soumi_ghsoh | 6:3c510c297e2f | 117 | // command[1] &= 0x1F; |
soumi_ghsoh | 6:3c510c297e2f | 118 | // trf797xWriteSingle(command, 2); |
soumi_ghsoh | 6:3c510c297e2f | 119 | //} // End of trf797xTurnRfOff() |
soumi_ghsoh | 6:3c510c297e2f | 120 | // |
soumi_ghsoh | 6:3c510c297e2f | 121 | //void trf797xWriteIsoControl(uint8_t iso_control) |
soumi_ghsoh | 6:3c510c297e2f | 122 | //// * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * |
soumi_ghsoh | 6:3c510c297e2f | 123 | //// trf797xWriteIsoControl() |
soumi_ghsoh | 6:3c510c297e2f | 124 | //// * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * |
soumi_ghsoh | 6:3c510c297e2f | 125 | //{ |
soumi_ghsoh | 6:3c510c297e2f | 126 | // uint8_t write[4]; |
soumi_ghsoh | 6:3c510c297e2f | 127 | // |
soumi_ghsoh | 6:3c510c297e2f | 128 | // if ((iso_control & BIT5) == BIT5) { |
soumi_ghsoh | 6:3c510c297e2f | 129 | // printf("iso_control bit5 != 0\r\n"); |
soumi_ghsoh | 6:3c510c297e2f | 130 | // return; |
soumi_ghsoh | 6:3c510c297e2f | 131 | // } |
soumi_ghsoh | 6:3c510c297e2f | 132 | // |
soumi_ghsoh | 6:3c510c297e2f | 133 | // write[0] = ISO_CONTROL; |
soumi_ghsoh | 6:3c510c297e2f | 134 | // write[1] = iso_control; |
soumi_ghsoh | 6:3c510c297e2f | 135 | // write[1] &= ~BIT5; |
soumi_ghsoh | 6:3c510c297e2f | 136 | // trf797xWriteSingle(write, 2); |
soumi_ghsoh | 6:3c510c297e2f | 137 | // iso_control &= 0x1F; |
soumi_ghsoh | 6:3c510c297e2f | 138 | //} // End of trf797xWriteIsoControl() |
soumi_ghsoh | 6:3c510c297e2f | 139 | // |
soumi_ghsoh | 6:3c510c297e2f | 140 | //void iso15693FindTag(void) |
soumi_ghsoh | 6:3c510c297e2f | 141 | //// * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * |
soumi_ghsoh | 6:3c510c297e2f | 142 | //// iso15693FindTag() |
soumi_ghsoh | 6:3c510c297e2f | 143 | //// Description: Used to detect ISO15693 conforming tags. |
soumi_ghsoh | 6:3c510c297e2f | 144 | //// If an ISO15693 conforming tag is found ISO15693LED is turned ON. |
soumi_ghsoh | 6:3c510c297e2f | 145 | //// 1) Turn RF ON |
soumi_ghsoh | 6:3c510c297e2f | 146 | //// 2) Perform a complete anticollision sequence |
soumi_ghsoh | 6:3c510c297e2f | 147 | //// 3) Turn RF OFF |
soumi_ghsoh | 6:3c510c297e2f | 148 | //// * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * |
soumi_ghsoh | 6:3c510c297e2f | 149 | //{ // testPin=1; |
soumi_ghsoh | 6:3c510c297e2f | 150 | // trf797xTurnRfOn(); |
soumi_ghsoh | 6:3c510c297e2f | 151 | // // testPin=0; |
soumi_ghsoh | 6:3c510c297e2f | 152 | // //=======================================================diable interrupt from trf797x |
soumi_ghsoh | 6:3c510c297e2f | 153 | // // readerInt.disable_irq(); // comment: has no effect in detectecting interrupt from trf797x, works without disabling too $SG |
soumi_ghsoh | 6:3c510c297e2f | 154 | // //=======================================================diable interrupt from trf797x $SG |
soumi_ghsoh | 6:3c510c297e2f | 155 | // // testPin=1; |
soumi_ghsoh | 6:3c510c297e2f | 156 | // trf797xWriteIsoControl(0x02); |
soumi_ghsoh | 6:3c510c297e2f | 157 | // // testPin=0; |
soumi_ghsoh | 6:3c510c297e2f | 158 | // wait_ms(6); // The VCD should wait at least 1 ms after it activated the |
soumi_ghsoh | 6:3c510c297e2f | 159 | // // powering field before sending the first request, to |
soumi_ghsoh | 6:3c510c297e2f | 160 | // // ensure that the VICCs are ready to receive it. (ISO15693-3) |
soumi_ghsoh | 6:3c510c297e2f | 161 | // /* |
soumi_ghsoh | 6:3c510c297e2f | 162 | // // Field Level Test: |
soumi_ghsoh | 6:3c510c297e2f | 163 | // buffer[0] = RUN_DECODERS; // Enable receiver |
soumi_ghsoh | 6:3c510c297e2f | 164 | // trf797xDirectCommand(buffer); |
soumi_ghsoh | 6:3c510c297e2f | 165 | // buffer[0] = CHIP_STATUS_CONTROL; |
soumi_ghsoh | 6:3c510c297e2f | 166 | // buffer[1] = 0x23; |
soumi_ghsoh | 6:3c510c297e2f | 167 | // trf797xWriteSingle(buffer, 2); |
soumi_ghsoh | 6:3c510c297e2f | 168 | // wait_ms(1); |
soumi_ghsoh | 6:3c510c297e2f | 169 | // buffer[0] = CHECK_INTERNAL_RF; |
soumi_ghsoh | 6:3c510c297e2f | 170 | // trf797xDirectCommand(buffer); |
soumi_ghsoh | 6:3c510c297e2f | 171 | // buffer[0] = RSSI_LEVELS; |
soumi_ghsoh | 6:3c510c297e2f | 172 | // trf797xReadSingle(buffer, 1); |
soumi_ghsoh | 6:3c510c297e2f | 173 | // printf("RSSI: 0x%X\r\n", buffer[0]); |
soumi_ghsoh | 6:3c510c297e2f | 174 | // // Result: RSSI = 0x5C (Range is 0x40 to 0x7F) |
soumi_ghsoh | 6:3c510c297e2f | 175 | // */ |
soumi_ghsoh | 6:3c510c297e2f | 176 | // |
soumi_ghsoh | 6:3c510c297e2f | 177 | // flags = SIXTEEN_SLOTS; // SIXTEEN_SLOTS = 0x06 |
soumi_ghsoh | 6:3c510c297e2f | 178 | //// flags = ONE_SLOT; // ONE_SLOT = 0x26 |
soumi_ghsoh | 6:3c510c297e2f | 179 | // buf[20] = 0x00; |
soumi_ghsoh | 6:3c510c297e2f | 180 | // // debug2LED = LED_ON; |
soumi_ghsoh | 6:3c510c297e2f | 181 | // |
soumi_ghsoh | 6:3c510c297e2f | 182 | // iso15693Anticollision(&buf[20],0x00); // Send Inventory request |
soumi_ghsoh | 6:3c510c297e2f | 183 | // |
soumi_ghsoh | 6:3c510c297e2f | 184 | // trf797xTurnRfOff(); |
soumi_ghsoh | 6:3c510c297e2f | 185 | // trf797xResetIrqStatus(); |
soumi_ghsoh | 6:3c510c297e2f | 186 | // // Clear any IRQs |
soumi_ghsoh | 6:3c510c297e2f | 187 | //} // End of iso15693FindTag() |
soumi_ghsoh | 6:3c510c297e2f | 188 | // |
soumi_ghsoh | 6:3c510c297e2f | 189 | //void iso15693Anticollision(uint8_t *mask, uint8_t length) |
soumi_ghsoh | 6:3c510c297e2f | 190 | //// * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * |
soumi_ghsoh | 6:3c510c297e2f | 191 | //// iso15693Anticollision() |
soumi_ghsoh | 6:3c510c297e2f | 192 | //// Description: Used to perform an inventory cycle of 1 or 16 timeslots. |
soumi_ghsoh | 6:3c510c297e2f | 193 | //// Send command, receive response and send response to host. |
soumi_ghsoh | 6:3c510c297e2f | 194 | //// Parameters: *mask = mask value |
soumi_ghsoh | 6:3c510c297e2f | 195 | //// length = number of significant bits of mask value |
soumi_ghsoh | 6:3c510c297e2f | 196 | //// * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * |
soumi_ghsoh | 6:3c510c297e2f | 197 | //{ |
soumi_ghsoh | 6:3c510c297e2f | 198 | // uint8_t i = 1, j = 1, command[2], no_slots, found = 0; |
soumi_ghsoh | 6:3c510c297e2f | 199 | // uint8_t *p_slot_no, slot_no[17]; |
soumi_ghsoh | 6:3c510c297e2f | 200 | // uint8_t new_mask[8], new_length, mask_size; |
soumi_ghsoh | 6:3c510c297e2f | 201 | // uint32_t size; |
soumi_ghsoh | 6:3c510c297e2f | 202 | // uint8_t fifo_length = 0; |
soumi_ghsoh | 6:3c510c297e2f | 203 | // uint16_t k = 0; |
soumi_ghsoh | 6:3c510c297e2f | 204 | //// uint8_t irqStatus[2], iso_control; |
soumi_ghsoh | 6:3c510c297e2f | 205 | // |
soumi_ghsoh | 6:3c510c297e2f | 206 | // slot_no[0] = 0x00; |
soumi_ghsoh | 6:3c510c297e2f | 207 | // if ((flags & BIT5) == 0x00) { // flags<5> is the number of slots testPin |
soumi_ghsoh | 6:3c510c297e2f | 208 | // no_slots = 16; // 16 slots if flags<5> is cleared |
soumi_ghsoh | 6:3c510c297e2f | 209 | // } |
soumi_ghsoh | 6:3c510c297e2f | 210 | // else { |
soumi_ghsoh | 6:3c510c297e2f | 211 | // no_slots = 1; // 1 slot if flags<5> is set |
soumi_ghsoh | 6:3c510c297e2f | 212 | // } |
soumi_ghsoh | 6:3c510c297e2f | 213 | // |
soumi_ghsoh | 6:3c510c297e2f | 214 | // p_slot_no = &slot_no[0]; // slot number pointer |
soumi_ghsoh | 6:3c510c297e2f | 215 | // mask_size = (((length >> 2) + 1) >> 1); // mask_size is 1 for length = 4 or 8 |
soumi_ghsoh | 6:3c510c297e2f | 216 | // buf[0] = 0x8F; // RESET |
soumi_ghsoh | 6:3c510c297e2f | 217 | // buf[1] = 0x91; // send with CRC |
soumi_ghsoh | 6:3c510c297e2f | 218 | // buf[2] = 0x3D; // write continuous from 1D |
soumi_ghsoh | 6:3c510c297e2f | 219 | // buf[5] = flags; // ISO15693 flags |
soumi_ghsoh | 6:3c510c297e2f | 220 | // buf[6] = 0x01; // anticollision command code |
soumi_ghsoh | 6:3c510c297e2f | 221 | // |
soumi_ghsoh | 6:3c510c297e2f | 222 | // if (flags & 0x10) { // mask_size is 2 for length = 12 or 16 and so on |
soumi_ghsoh | 6:3c510c297e2f | 223 | // size = mask_size + 4; // mask value + mask length + afi + command code + flags |
soumi_ghsoh | 6:3c510c297e2f | 224 | // buf[7] = afi; |
soumi_ghsoh | 6:3c510c297e2f | 225 | // buf[8] = length; // mask length |
soumi_ghsoh | 6:3c510c297e2f | 226 | // if (length > 0) { |
soumi_ghsoh | 6:3c510c297e2f | 227 | // for(i = 0; i < mask_size; i++) { |
soumi_ghsoh | 6:3c510c297e2f | 228 | // buf[9 + i] = *(mask + i); |
soumi_ghsoh | 6:3c510c297e2f | 229 | // } |
soumi_ghsoh | 6:3c510c297e2f | 230 | // } |
soumi_ghsoh | 6:3c510c297e2f | 231 | // fifo_length = 9; |
soumi_ghsoh | 6:3c510c297e2f | 232 | // } |
soumi_ghsoh | 6:3c510c297e2f | 233 | // else { // mask_size is 2 for length = 12 or 16 and so on |
soumi_ghsoh | 6:3c510c297e2f | 234 | // size = mask_size + 3; // mask value + mask length + command code + flags |
soumi_ghsoh | 6:3c510c297e2f | 235 | // buf[7] = length; // mask length |
soumi_ghsoh | 6:3c510c297e2f | 236 | // if(length > 0) { |
soumi_ghsoh | 6:3c510c297e2f | 237 | // for(i = 0; i < mask_size; i++) { |
soumi_ghsoh | 6:3c510c297e2f | 238 | // buf[8 + i] = *(mask + i); |
soumi_ghsoh | 6:3c510c297e2f | 239 | // } |
soumi_ghsoh | 6:3c510c297e2f | 240 | // } |
soumi_ghsoh | 6:3c510c297e2f | 241 | // fifo_length = 8; |
soumi_ghsoh | 6:3c510c297e2f | 242 | // } |
soumi_ghsoh | 6:3c510c297e2f | 243 | // |
soumi_ghsoh | 6:3c510c297e2f | 244 | // buf[3] = (char) (size >> 8); |
soumi_ghsoh | 6:3c510c297e2f | 245 | // buf[4] = (char) (size << 4); |
soumi_ghsoh | 6:3c510c297e2f | 246 | // |
soumi_ghsoh | 6:3c510c297e2f | 247 | // |
soumi_ghsoh | 6:3c510c297e2f | 248 | // |
soumi_ghsoh | 6:3c510c297e2f | 249 | // trf797xResetIrqStatus(); |
soumi_ghsoh | 6:3c510c297e2f | 250 | // |
soumi_ghsoh | 6:3c510c297e2f | 251 | // // ***** Original code sets up a 30 ms counter here ***** |
soumi_ghsoh | 6:3c510c297e2f | 252 | // // ***** Original code enables IRQ here ***** |
soumi_ghsoh | 6:3c510c297e2f | 253 | // // ***** nRF51422 clear IRQ register ***** |
soumi_ghsoh | 6:3c510c297e2f | 254 | // readerInt.enable_irq(); |
soumi_ghsoh | 6:3c510c297e2f | 255 | // |
soumi_ghsoh | 6:3c510c297e2f | 256 | // trf797xRawWrite(&buf[0], mask_size + fifo_length); // Write to FIFO |
soumi_ghsoh | 6:3c510c297e2f | 257 | // |
soumi_ghsoh | 6:3c510c297e2f | 258 | // //===================================================runs till here !$SG |
soumi_ghsoh | 6:3c510c297e2f | 259 | // irqRegister = 0x01; |
soumi_ghsoh | 6:3c510c297e2f | 260 | // irqFlag = 0x00; |
soumi_ghsoh | 6:3c510c297e2f | 261 | // |
soumi_ghsoh | 6:3c510c297e2f | 262 | // |
soumi_ghsoh | 6:3c510c297e2f | 263 | // |
soumi_ghsoh | 6:3c510c297e2f | 264 | // // |
soumi_ghsoh | 6:3c510c297e2f | 265 | // for (j = 1; j <= no_slots; j++) { // 1 or 16 available timeslots |
soumi_ghsoh | 6:3c510c297e2f | 266 | // rxtxState = 1; |
soumi_ghsoh | 6:3c510c297e2f | 267 | // // ***** Original code sets up a 20 ms counter and starts it here ***** |
soumi_ghsoh | 6:3c510c297e2f | 268 | // //irqFlag = 0x00; |
soumi_ghsoh | 6:3c510c297e2f | 269 | // // while(1) |
soumi_ghsoh | 6:3c510c297e2f | 270 | // while(irqFlag == 0x00) |
soumi_ghsoh | 6:3c510c297e2f | 271 | // { ; |
soumi_ghsoh | 6:3c510c297e2f | 272 | // } |
soumi_ghsoh | 6:3c510c297e2f | 273 | // |
soumi_ghsoh | 6:3c510c297e2f | 274 | // // ISO15693LED = LED_ON; |
soumi_ghsoh | 6:3c510c297e2f | 275 | // // wait_ms(1000); |
soumi_ghsoh | 6:3c510c297e2f | 276 | // // ISO15693LED = LED_OFF; |
soumi_ghsoh | 6:3c510c297e2f | 277 | // irqRegister = 0x01; |
soumi_ghsoh | 6:3c510c297e2f | 278 | // // Wait for interrupt |
soumi_ghsoh | 6:3c510c297e2f | 279 | // // ***** Original code stops the counter here ***** |
soumi_ghsoh | 6:3c510c297e2f | 280 | // // |
soumi_ghsoh | 6:3c510c297e2f | 281 | // while(irqRegister == 0x01) { // Wait for RX complete |
soumi_ghsoh | 6:3c510c297e2f | 282 | // k++; |
soumi_ghsoh | 6:3c510c297e2f | 283 | // if (k == 0xFFF0) { //printf("k == 0xFFF0 _MAIN \r\n"); |
soumi_ghsoh | 6:3c510c297e2f | 284 | // irqRegister = 0x00; |
soumi_ghsoh | 6:3c510c297e2f | 285 | // rxErrorFlag = 0x00; |
soumi_ghsoh | 6:3c510c297e2f | 286 | // } |
soumi_ghsoh | 6:3c510c297e2f | 287 | // } |
soumi_ghsoh | 6:3c510c297e2f | 288 | // |
soumi_ghsoh | 6:3c510c297e2f | 289 | // |
soumi_ghsoh | 6:3c510c297e2f | 290 | // |
soumi_ghsoh | 6:3c510c297e2f | 291 | // |
soumi_ghsoh | 6:3c510c297e2f | 292 | ////wait_us(1000); |
soumi_ghsoh | 6:3c510c297e2f | 293 | // |
soumi_ghsoh | 6:3c510c297e2f | 294 | // command[0] = RSSI_LEVELS; // Read RSSI levels |
soumi_ghsoh | 6:3c510c297e2f | 295 | // trf797xReadSingle(command, 1); |
soumi_ghsoh | 6:3c510c297e2f | 296 | // |
soumi_ghsoh | 6:3c510c297e2f | 297 | // switch (irqRegister) { |
soumi_ghsoh | 6:3c510c297e2f | 298 | // case 0xFF: // If received UID in buffer //0xff changed to 0x01 $SG |
soumi_ghsoh | 6:3c510c297e2f | 299 | // found = 1; |
soumi_ghsoh | 6:3c510c297e2f | 300 | // printf("\r\nISO15693: [ "); |
soumi_ghsoh | 6:3c510c297e2f | 301 | // for (i=3; i < 11; i++) { |
soumi_ghsoh | 6:3c510c297e2f | 302 | // printf("%c", buf[i]); |
soumi_ghsoh | 6:3c510c297e2f | 303 | // } |
soumi_ghsoh | 6:3c510c297e2f | 304 | // printf(", %d ]\r\n", command[0]); |
soumi_ghsoh | 6:3c510c297e2f | 305 | // break; |
soumi_ghsoh | 6:3c510c297e2f | 306 | // |
soumi_ghsoh | 6:3c510c297e2f | 307 | // case 0x02: printf("collision occured _MAIN \r\n"); // Collision occurred |
soumi_ghsoh | 6:3c510c297e2f | 308 | // p_slot_no++; // Remember a collision was detected |
soumi_ghsoh | 6:3c510c297e2f | 309 | // *p_slot_no = j; |
soumi_ghsoh | 6:3c510c297e2f | 310 | // break; |
soumi_ghsoh | 6:3c510c297e2f | 311 | // |
soumi_ghsoh | 6:3c510c297e2f | 312 | // case 0x00: // printf("Timer interrupt \r\n"); // Timer interrupt |
soumi_ghsoh | 6:3c510c297e2f | 313 | // // ***** Original code does nothing! ***** |
soumi_ghsoh | 6:3c510c297e2f | 314 | // break; |
soumi_ghsoh | 6:3c510c297e2f | 315 | // |
soumi_ghsoh | 6:3c510c297e2f | 316 | // default: |
soumi_ghsoh | 6:3c510c297e2f | 317 | // // ***** Original code does nothing ***** |
soumi_ghsoh | 6:3c510c297e2f | 318 | // break; |
soumi_ghsoh | 6:3c510c297e2f | 319 | // } // switch (irqRegister) |
soumi_ghsoh | 6:3c510c297e2f | 320 | // |
soumi_ghsoh | 6:3c510c297e2f | 321 | // command[0] = RESET; // FIFO must be reset before receiving the next response |
soumi_ghsoh | 6:3c510c297e2f | 322 | // trf797xDirectCommand(command); |
soumi_ghsoh | 6:3c510c297e2f | 323 | // |
soumi_ghsoh | 6:3c510c297e2f | 324 | // if ((no_slots == 16) && (j < 16)) { // If 16 slots used then send EOF (next slot) |
soumi_ghsoh | 6:3c510c297e2f | 325 | // trf797xStopDecoders(); |
soumi_ghsoh | 6:3c510c297e2f | 326 | // trf797xRunDecoders(); |
soumi_ghsoh | 6:3c510c297e2f | 327 | // command[0] = RESET; // new |
soumi_ghsoh | 6:3c510c297e2f | 328 | // trf797xDirectCommand(command); // new |
soumi_ghsoh | 6:3c510c297e2f | 329 | // trf797xTxNextSlot(); // RESET must precede txNextSlot, see "TRF7970A FW Design Hints SLOA159. |
soumi_ghsoh | 6:3c510c297e2f | 330 | // } |
soumi_ghsoh | 6:3c510c297e2f | 331 | // else if ((no_slots == 16) && (j == 16)) { // At end of slot 16, stop the slot counter |
soumi_ghsoh | 6:3c510c297e2f | 332 | // trf797xStopDecoders(); |
soumi_ghsoh | 6:3c510c297e2f | 333 | // trf797xDisableSlotCounter(); |
soumi_ghsoh | 6:3c510c297e2f | 334 | // } |
soumi_ghsoh | 6:3c510c297e2f | 335 | // else if (no_slots == 1) { // 1 slot is used |
soumi_ghsoh | 6:3c510c297e2f | 336 | // break; |
soumi_ghsoh | 6:3c510c297e2f | 337 | // } |
soumi_ghsoh | 6:3c510c297e2f | 338 | // } // for (j = 1; j <= no_slots; j++) |
soumi_ghsoh | 6:3c510c297e2f | 339 | // //================================================ |
soumi_ghsoh | 6:3c510c297e2f | 340 | // //=================================================== |
soumi_ghsoh | 6:3c510c297e2f | 341 | // if (found == 1) { |
soumi_ghsoh | 6:3c510c297e2f | 342 | // ISO15693LED = LED_ON; |
soumi_ghsoh | 6:3c510c297e2f | 343 | // } |
soumi_ghsoh | 6:3c510c297e2f | 344 | // else {printf("tag not read \r\n"); |
soumi_ghsoh | 6:3c510c297e2f | 345 | // ISO15693LED = LED_OFF; |
soumi_ghsoh | 6:3c510c297e2f | 346 | // } |
soumi_ghsoh | 6:3c510c297e2f | 347 | //// |
soumi_ghsoh | 6:3c510c297e2f | 348 | // new_length = length + 4; // The mask length is a multiple of 4 bits |
soumi_ghsoh | 6:3c510c297e2f | 349 | // mask_size = (((new_length >> 2) + 1) >> 1); |
soumi_ghsoh | 6:3c510c297e2f | 350 | // while ((*p_slot_no != 0x00) && (no_slots == 16) && (new_length < 61) && (slot_no[16] != 16)) { |
soumi_ghsoh | 6:3c510c297e2f | 351 | // *p_slot_no = *p_slot_no - 1; |
soumi_ghsoh | 6:3c510c297e2f | 352 | // |
soumi_ghsoh | 6:3c510c297e2f | 353 | // for(i = 0; i < 8; i++) |
soumi_ghsoh | 6:3c510c297e2f | 354 | // { |
soumi_ghsoh | 6:3c510c297e2f | 355 | // new_mask[i] = *(mask + i); // First the whole mask is copied |
soumi_ghsoh | 6:3c510c297e2f | 356 | // } |
soumi_ghsoh | 6:3c510c297e2f | 357 | // |
soumi_ghsoh | 6:3c510c297e2f | 358 | // if((new_length & BIT2) == 0x00) |
soumi_ghsoh | 6:3c510c297e2f | 359 | // { |
soumi_ghsoh | 6:3c510c297e2f | 360 | // *p_slot_no = *p_slot_no << 4; |
soumi_ghsoh | 6:3c510c297e2f | 361 | // } |
soumi_ghsoh | 6:3c510c297e2f | 362 | // else |
soumi_ghsoh | 6:3c510c297e2f | 363 | // { |
soumi_ghsoh | 6:3c510c297e2f | 364 | // for(i = 7; i > 0; i--) |
soumi_ghsoh | 6:3c510c297e2f | 365 | // { |
soumi_ghsoh | 6:3c510c297e2f | 366 | // new_mask[i] = new_mask[i - 1]; |
soumi_ghsoh | 6:3c510c297e2f | 367 | // } |
soumi_ghsoh | 6:3c510c297e2f | 368 | // new_mask[0] &= 0x00; |
soumi_ghsoh | 6:3c510c297e2f | 369 | // } |
soumi_ghsoh | 6:3c510c297e2f | 370 | // new_mask[0] |= *p_slot_no; // The mask is changed |
soumi_ghsoh | 6:3c510c297e2f | 371 | // wait_ms(2); |
soumi_ghsoh | 6:3c510c297e2f | 372 | // |
soumi_ghsoh | 6:3c510c297e2f | 373 | // |
soumi_ghsoh | 6:3c510c297e2f | 374 | // printf("Idx: 0x%02X Buf: 0x%02X, ", bufIdx, debugBuffer[bufIdx-1]); |
soumi_ghsoh | 6:3c510c297e2f | 375 | // |
soumi_ghsoh | 6:3c510c297e2f | 376 | // iso15693Anticollision(&new_mask[0], new_length); // Recursive call with new Mask |
soumi_ghsoh | 6:3c510c297e2f | 377 | // |
soumi_ghsoh | 6:3c510c297e2f | 378 | // p_slot_no--; |
soumi_ghsoh | 6:3c510c297e2f | 379 | // |
soumi_ghsoh | 6:3c510c297e2f | 380 | // } |
soumi_ghsoh | 6:3c510c297e2f | 381 | // //================================================== |
soumi_ghsoh | 6:3c510c297e2f | 382 | // // ***** Original code disables IRQ here ***** |
soumi_ghsoh | 6:3c510c297e2f | 383 | // //readerInt.disable_irq(); |
soumi_ghsoh | 6:3c510c297e2f | 384 | // //debug2LED = LED_OFF; |
soumi_ghsoh | 6:3c510c297e2f | 385 | //} // End of iso15693Anticollision() |
soumi_ghsoh | 6:3c510c297e2f | 386 | ///* |
soumi_ghsoh | 6:3c510c297e2f | 387 | // Header file for main.cpp |
soumi_ghsoh | 9:9266e0109d26 | 388 | //*/ |
soumi_ghsoh | 9:9266e0109d26 | 389 | |
soumi_ghsoh | 9:9266e0109d26 | 390 | |
soumi_ghsoh | 9:9266e0109d26 | 391 | |
soumi_ghsoh | 9:9266e0109d26 | 392 | |
soumi_ghsoh | 9:9266e0109d26 | 393 | |
soumi_ghsoh | 9:9266e0109d26 | 394 | |
soumi_ghsoh | 9:9266e0109d26 | 395 | |
soumi_ghsoh | 9:9266e0109d26 | 396 | |
soumi_ghsoh | 9:9266e0109d26 | 397 | |
soumi_ghsoh | 9:9266e0109d26 | 398 | |
soumi_ghsoh | 9:9266e0109d26 | 399 | |
soumi_ghsoh | 9:9266e0109d26 | 400 | |
soumi_ghsoh | 9:9266e0109d26 | 401 | |
soumi_ghsoh | 9:9266e0109d26 | 402 | |
soumi_ghsoh | 9:9266e0109d26 | 403 | |
soumi_ghsoh | 9:9266e0109d26 | 404 | |
soumi_ghsoh | 9:9266e0109d26 | 405 | |
soumi_ghsoh | 9:9266e0109d26 | 406 | |
soumi_ghsoh | 9:9266e0109d26 | 407 | //// Setup LEDs |
soumi_ghsoh | 9:9266e0109d26 | 408 | // heartbeatLED = LED_OFF; |
soumi_ghsoh | 9:9266e0109d26 | 409 | // ISO15693LED = LED_OFF; |
soumi_ghsoh | 9:9266e0109d26 | 410 | // debug1LED = LED_OFF; |
soumi_ghsoh | 9:9266e0109d26 | 411 | // debug2LED = LED_OFF; |
soumi_ghsoh | 9:9266e0109d26 | 412 | |
soumi_ghsoh | 9:9266e0109d26 | 413 | //for (uint8_t i=0; i<4; i++) { |
soumi_ghsoh | 9:9266e0109d26 | 414 | // heartbeatLED = LED_ON; |
soumi_ghsoh | 9:9266e0109d26 | 415 | // ISO15693LED = LED_ON; |
soumi_ghsoh | 9:9266e0109d26 | 416 | // debug1LED = LED_ON; |
soumi_ghsoh | 9:9266e0109d26 | 417 | // wait_ms(100); |
soumi_ghsoh | 9:9266e0109d26 | 418 | // heartbeatLED = LED_OFF; |
soumi_ghsoh | 9:9266e0109d26 | 419 | // ISO15693LED = LED_OFF; |
soumi_ghsoh | 9:9266e0109d26 | 420 | // debug1LED = LED_OFF; |
soumi_ghsoh | 9:9266e0109d26 | 421 | // wait_ms(100); |
soumi_ghsoh | 9:9266e0109d26 | 422 | // } |
soumi_ghsoh | 9:9266e0109d26 | 423 | // |
soumi_ghsoh | 9:9266e0109d26 | 424 | // Ticker heartbeat; |
soumi_ghsoh | 9:9266e0109d26 | 425 | // heartbeat.attach(blinkHeartbeatLED, 1); |
soumi_ghsoh | 9:9266e0109d26 | 426 | // printf("LEDs, "); |
soumi_ghsoh | 9:9266e0109d26 | 427 | //=============================================================== |
soumi_ghsoh | 9:9266e0109d26 | 428 | // Setup the SPI interface |
soumi_ghsoh | 9:9266e0109d26 | 429 | // spi.format(8, 1); // 8 bit data, mode = 1 (transition on rising edge, sample on falling edge) |
soumi_ghsoh | 9:9266e0109d26 | 430 | // spi.frequency(1000000); // SCLK = 1 MHz |
soumi_ghsoh | 9:9266e0109d26 | 431 | //// printf("SPI, "); |
soumi_ghsoh | 9:9266e0109d26 | 432 | // |
soumi_ghsoh | 9:9266e0109d26 | 433 | // // Set On-Off Keying modulation |
soumi_ghsoh | 9:9266e0109d26 | 434 | // ook_ask.output(); |
soumi_ghsoh | 9:9266e0109d26 | 435 | // ook_ask = 1; |
soumi_ghsoh | 9:9266e0109d26 | 436 | //// printf("OOK, "); |
soumi_ghsoh | 9:9266e0109d26 | 437 | // |
soumi_ghsoh | 9:9266e0109d26 | 438 | // // Apply initial settings to the TRF7970 |
soumi_ghsoh | 9:9266e0109d26 | 439 | // testPin=1; |
soumi_ghsoh | 9:9266e0109d26 | 440 | // trf797xInitialSettings(); |
soumi_ghsoh | 9:9266e0109d26 | 441 | //// printf("Initialized, "); |
soumi_ghsoh | 9:9266e0109d26 | 442 | // testPin=0; |
soumi_ghsoh | 9:9266e0109d26 | 443 | // // Tri-state OOK pin |
soumi_ghsoh | 9:9266e0109d26 | 444 | // ook_ask.input(); |
soumi_ghsoh | 9:9266e0109d26 | 445 | // ook_ask.mode(PullUp); |
soumi_ghsoh | 9:9266e0109d26 | 446 | // |
soumi_ghsoh | 9:9266e0109d26 | 447 | // readerMode = 0x00; |
soumi_ghsoh | 9:9266e0109d26 | 448 | //============================================================= |
soumi_ghsoh | 9:9266e0109d26 | 449 | /* |
soumi_ghsoh | 9:9266e0109d26 | 450 | // Test: Write 0xAA to MODULATOR_CONTROL, then verify by reading MODULATOR_CONTROL. |
soumi_ghsoh | 9:9266e0109d26 | 451 | // printf("\r\n"); |
soumi_ghsoh | 9:9266e0109d26 | 452 | buffer[0] = MODULATOR_CONTROL; |
soumi_ghsoh | 9:9266e0109d26 | 453 | buffer[1] = 0xAA; |
soumi_ghsoh | 9:9266e0109d26 | 454 | // printf("BEFORE WR: buffer[0]: %X buffer[1]: %X\r\n", buffer[0], buffer[1]); |
soumi_ghsoh | 9:9266e0109d26 | 455 | spiWriteSingle(buffer, 2); |
soumi_ghsoh | 9:9266e0109d26 | 456 | // printf("AFTER WR: buffer[0]: %X buffer[1]: %X\r\n", buffer[0], buffer[1]); |
soumi_ghsoh | 9:9266e0109d26 | 457 | spiReadSingle(buffer, 1); |
soumi_ghsoh | 9:9266e0109d26 | 458 | // printf("AFTER RD: buffer[0]: %X buffer[1]: %X\r\n", buffer[0], buffer[1]); |
soumi_ghsoh | 9:9266e0109d26 | 459 | // printf("\r\n"); |
soumi_ghsoh | 9:9266e0109d26 | 460 | */ |
soumi_ghsoh | 9:9266e0109d26 | 461 | |
soumi_ghsoh | 9:9266e0109d26 | 462 | // printf("\r\nFinished Init\r\n"); |
soumi_ghsoh | 9:9266e0109d26 | 463 | |
soumi_ghsoh | 9:9266e0109d26 | 464 | // Setup interrupt from TRF7970 |
soumi_ghsoh | 9:9266e0109d26 | 465 | // testPin=1; |
soumi_ghsoh | 9:9266e0109d26 | 466 | //======================== |
soumi_ghsoh | 9:9266e0109d26 | 467 | // trf797xSetupIrq(); |
soumi_ghsoh | 9:9266e0109d26 | 468 | //====================== |
soumi_ghsoh | 9:9266e0109d26 | 469 | // testPin=0; |
soumi_ghsoh | 9:9266e0109d26 | 470 | // printf("IRQ setup, "); |
soumi_ghsoh | 9:9266e0109d26 | 471 | |
soumi_ghsoh | 9:9266e0109d26 | 472 | // printf("finished init.\r\n\r\n"); |
soumi_ghsoh | 9:9266e0109d26 | 473 | |
soumi_ghsoh | 9:9266e0109d26 | 474 | // while(1) { // changed TRUE to 1 $SG |
soumi_ghsoh | 9:9266e0109d26 | 475 | // iso15693FindTag(); |
soumi_ghsoh | 9:9266e0109d26 | 476 | // } |
soumi_ghsoh | 9:9266e0109d26 | 477 | // |
soumi_ghsoh | 9:9266e0109d26 | 478 | //} // End of main() |