Gymtrack / RFIDTestNFC

interrupt handling

Dependencies:  

readerComm.cpp@1:1eb96189824d, 2015-03-02 (annotated)

Committer:
rwclough
Date:
Mon Mar 02 19:50:31 2015 +0000
Revision:
1:1eb96189824d
Child:
2:bd5afc5aa139
The SPI interface between nRF51-DK and TRF7970 eval board works such that RAM_0 register can be written and read. Test values are 0xAA and 0x55.

Who changed what in which revision?

UserRevisionLine numberNew contents of line
rwclough 1:1eb96189824d 1 /* * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
rwclough 1:1eb96189824d 2 Filename: readerComm.c
rwclough 1:1eb96189824d 3 Description: Functions used to communicate with the TRF7970 eval bd.
rwclough 1:1eb96189824d 4 Communication is by means of an SPI interface between
rwclough 1:1eb96189824d 5 the nRF51-DK board (nRF51422 MCU) and the TRF7970 eval bd.
rwclough 1:1eb96189824d 6 Copyright (C) 2015 Gymtrack, Inc.
rwclough 1:1eb96189824d 7 Author: Ron Clough
rwclough 1:1eb96189824d 8 Date: 2015-02-27
rwclough 1:1eb96189824d 9
rwclough 1:1eb96189824d 10 Changes:
rwclough 1:1eb96189824d 11 Rev Date Who Details
rwclough 1:1eb96189824d 12 ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
rwclough 1:1eb96189824d 13 0.0 2015-02-2 RWC Original version.
rwclough 1:1eb96189824d 14
rwclough 1:1eb96189824d 15 * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * */
rwclough 1:1eb96189824d 16
rwclough 1:1eb96189824d 17 #include "mbed.h"
rwclough 1:1eb96189824d 18 #include "readerComm.h"
rwclough 1:1eb96189824d 19
rwclough 1:1eb96189824d 20 extern SPI spi; // main.cpp
rwclough 1:1eb96189824d 21 extern DigitalOut CS; // main.cpp
rwclough 1:1eb96189824d 22
rwclough 1:1eb96189824d 23 void firstComm(void) {
rwclough 1:1eb96189824d 24 // * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
rwclough 1:1eb96189824d 25 // firstComm()
rwclough 1:1eb96189824d 26 // * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
rwclough 1:1eb96189824d 27 int mod_control[2];
rwclough 1:1eb96189824d 28
rwclough 1:1eb96189824d 29 mod_control[0] = SOFT_INIT;
rwclough 1:1eb96189824d 30 directCommand(mod_control);
rwclough 1:1eb96189824d 31 mod_control[0] = IDLE;
rwclough 1:1eb96189824d 32 directCommand(mod_control);
rwclough 1:1eb96189824d 33 mod_control[0] = MODULATOR_CONTROL;
rwclough 1:1eb96189824d 34 mod_control[1] = 0x21;
rwclough 1:1eb96189824d 35 writeSingle(mod_control, 2);
rwclough 1:1eb96189824d 36 mod_control[0] = MODULATOR_CONTROL;
rwclough 1:1eb96189824d 37 readSingle(mod_control, 1);
rwclough 1:1eb96189824d 38 } // End of firstComm()
rwclough 1:1eb96189824d 39
rwclough 1:1eb96189824d 40 void directCommand(int *buffer) {
rwclough 1:1eb96189824d 41 // * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
rwclough 1:1eb96189824d 42 // directCommand()
rwclough 1:1eb96189824d 43 // Description: Transmit a Direct Command to the reader chip.
rwclough 1:1eb96189824d 44 // Parameter: *buffer = the direct command.
rwclough 1:1eb96189824d 45 // * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
rwclough 1:1eb96189824d 46 *buffer = (0x80 | *buffer); // Setup command mode
rwclough 1:1eb96189824d 47 *buffer = (0x9f & *buffer); // Setup command mode
rwclough 1:1eb96189824d 48 CS = SELECT;
rwclough 1:1eb96189824d 49 spi.write(*buffer);
rwclough 1:1eb96189824d 50 CS = DESELECT;
rwclough 1:1eb96189824d 51 } // End of directCommand()
rwclough 1:1eb96189824d 52
rwclough 1:1eb96189824d 53 void writeSingle(int *buffer, int length) {
rwclough 1:1eb96189824d 54 // * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
rwclough 1:1eb96189824d 55 // writeSingle()
rwclough 1:1eb96189824d 56 // Description: Writes to specified reader registers.
rwclough 1:1eb96189824d 57 // Parameters: *buffer = addresses of the registers followed by the
rwclough 1:1eb96189824d 58 // contends to write.
rwclough 1:1eb96189824d 59 // length = number of registers * 2.
rwclough 1:1eb96189824d 60 // * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
rwclough 1:1eb96189824d 61 int i=0;
rwclough 1:1eb96189824d 62
rwclough 1:1eb96189824d 63 CS = SELECT;
rwclough 1:1eb96189824d 64 while(length > 0) {
rwclough 1:1eb96189824d 65 *buffer = (0x1f & *buffer); // Register address
rwclough 1:1eb96189824d 66 for(i = 0; i < 2; i++) {
rwclough 1:1eb96189824d 67 spi.write(*buffer);
rwclough 1:1eb96189824d 68 buffer++;
rwclough 1:1eb96189824d 69 length--;
rwclough 1:1eb96189824d 70 } // if
rwclough 1:1eb96189824d 71 } // while
rwclough 1:1eb96189824d 72 CS = DESELECT;
rwclough 1:1eb96189824d 73 } // End of writeSingle()
rwclough 1:1eb96189824d 74
rwclough 1:1eb96189824d 75 void readSingle(int *buffer, int number) {
rwclough 1:1eb96189824d 76 // * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
rwclough 1:1eb96189824d 77 // readSingle()
rwclough 1:1eb96189824d 78 // Description: Reads specified reader chip registers and
rwclough 1:1eb96189824d 79 // writes register contents to *buffer.
rwclough 1:1eb96189824d 80 // Parameters: *buffer = addresses of the registers.
rwclough 1:1eb96189824d 81 // number = number of registers.
rwclough 1:1eb96189824d 82 // * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
rwclough 1:1eb96189824d 83 int temp;
rwclough 1:1eb96189824d 84
rwclough 1:1eb96189824d 85 CS = SELECT;
rwclough 1:1eb96189824d 86 while(number > 0) {
rwclough 1:1eb96189824d 87 *buffer = (0x40 | *buffer); // Address, read, single
rwclough 1:1eb96189824d 88 *buffer = (0x5f & *buffer); // Register address
rwclough 1:1eb96189824d 89 temp = spi.write(*buffer);
rwclough 1:1eb96189824d 90 *buffer = spi.write(0x00);
rwclough 1:1eb96189824d 91 buffer++;
rwclough 1:1eb96189824d 92 number--;
rwclough 1:1eb96189824d 93 } // while
rwclough 1:1eb96189824d 94 CS = DESELECT;
rwclough 1:1eb96189824d 95 } // End of readSingle()
rwclough 1:1eb96189824d 96
rwclough 1:1eb96189824d 97 void turnRfOn(void) {
rwclough 1:1eb96189824d 98 // * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
rwclough 1:1eb96189824d 99 // turnRfOn()
rwclough 1:1eb96189824d 100 // * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
rwclough 1:1eb96189824d 101 int command[2];
rwclough 1:1eb96189824d 102
rwclough 1:1eb96189824d 103 command[0] = CHIP_STATUS_CONTROL;
rwclough 1:1eb96189824d 104 command[1] = CHIP_STATUS_CONTROL;
rwclough 1:1eb96189824d 105 readSingle(&command[1], 1);
rwclough 1:1eb96189824d 106 command[1] &= 0x3F;
rwclough 1:1eb96189824d 107 command[1] |= 0x20;
rwclough 1:1eb96189824d 108 writeSingle(command, 2);
rwclough 1:1eb96189824d 109 } // End of turnRfOn()
rwclough 1:1eb96189824d 110
rwclough 1:1eb96189824d 111 void turnRfOff(void) {
rwclough 1:1eb96189824d 112 // * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
rwclough 1:1eb96189824d 113 // turnRfOff()
rwclough 1:1eb96189824d 114 // * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
rwclough 1:1eb96189824d 115 int command[2];
rwclough 1:1eb96189824d 116
rwclough 1:1eb96189824d 117 command[0] = CHIP_STATUS_CONTROL;
rwclough 1:1eb96189824d 118 command[1] = CHIP_STATUS_CONTROL;
rwclough 1:1eb96189824d 119 readSingle(&command[1], 1);
rwclough 1:1eb96189824d 120 command[1] &= 0x1F;
rwclough 1:1eb96189824d 121 writeSingle(command, 2);
rwclough 1:1eb96189824d 122 } // End of turnRfOff()
rwclough 1:1eb96189824d 123
rwclough 1:1eb96189824d 124 void writeIsoControl(int iso_control) {
rwclough 1:1eb96189824d 125 // * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
rwclough 1:1eb96189824d 126 // writeIsoControl()
rwclough 1:1eb96189824d 127 // * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
rwclough 1:1eb96189824d 128 int write[4];
rwclough 1:1eb96189824d 129
rwclough 1:1eb96189824d 130 // if((iso_control & BIT5) == BIT5)
rwclough 1:1eb96189824d 131 // {
rwclough 1:1eb96189824d 132 // return;
rwclough 1:1eb96189824d 133 // }
rwclough 1:1eb96189824d 134
rwclough 1:1eb96189824d 135 write[0] = ISO_CONTROL;
rwclough 1:1eb96189824d 136 write[1] = iso_control;
rwclough 1:1eb96189824d 137 // write[1] &= ~BIT5;
rwclough 1:1eb96189824d 138 writeSingle(write, 2);
rwclough 1:1eb96189824d 139
rwclough 1:1eb96189824d 140 iso_control &= 0x1F;
rwclough 1:1eb96189824d 141 } // End of writeIsoControl()
rwclough 1:1eb96189824d 142
rwclough 1:1eb96189824d 143 void resetIrqStatus(void) {
rwclough 1:1eb96189824d 144 // * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
rwclough 1:1eb96189824d 145 // resetIrqStatus()
rwclough 1:1eb96189824d 146 // * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
rwclough 1:1eb96189824d 147
rwclough 1:1eb96189824d 148 }
rwclough 1:1eb96189824d 149
rwclough 1:1eb96189824d 150 void iso15693FindTag(void) {
rwclough 1:1eb96189824d 151 // * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
rwclough 1:1eb96189824d 152 // iso15693FindTag()
rwclough 1:1eb96189824d 153 // * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
rwclough 1:1eb96189824d 154 turnRfOn();
rwclough 1:1eb96189824d 155
rwclough 1:1eb96189824d 156 writeIsoControl(0x02);
rwclough 1:1eb96189824d 157
rwclough 1:1eb96189824d 158 // The VCD should wait at least 1 ms after it activated the
rwclough 1:1eb96189824d 159 // powering field before sending the first request, to
rwclough 1:1eb96189824d 160 // ensure that the VICCs are ready to receive it. (ISO15693-3)
rwclough 1:1eb96189824d 161 wait_ms(6);
rwclough 1:1eb96189824d 162
rwclough 1:1eb96189824d 163 // flags = SIXTEEN_SLOTS;
rwclough 1:1eb96189824d 164 // flags = ONE_SLOT;
rwclough 1:1eb96189824d 165
rwclough 1:1eb96189824d 166 // buf[20] = 0x00;
rwclough 1:1eb96189824d 167 // Iso15693Anticollision(&buf[20], 0x00); // Send Inventory request
rwclough 1:1eb96189824d 168
rwclough 1:1eb96189824d 169 turnRfOff();
rwclough 1:1eb96189824d 170
rwclough 1:1eb96189824d 171 resetIrqStatus(); // Clear any IRQs
rwclough 1:1eb96189824d 172 } // End of iso15693FindTag()
rwclough 1:1eb96189824d 173
rwclough 1:1eb96189824d 174 void Iso15693Anticollision(int *mask, int length) {
rwclough 1:1eb96189824d 175 // * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
rwclough 1:1eb96189824d 176 // Iso15693Anticollision()
rwclough 1:1eb96189824d 177 // * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
rwclough 1:1eb96189824d 178
rwclough 1:1eb96189824d 179 } // End of Iso15693Anticollision()