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mbed official
targets/cmsis/TARGET_Silicon_Labs/TARGET_EFM32/TARGET_EFM32ZG_STK3200/efm32zg222f32.h@525:c320967f86b9, 2015-04-28 (annotated)
- Committer:
- mbed_official
- Date:
- Tue Apr 28 11:45:12 2015 +0100
- Revision:
- 525:c320967f86b9
Synchronized with git revision 299385b8331142b9dc524da7a986536f60b14553
Full URL: https://github.com/mbedmicro/mbed/commit/299385b8331142b9dc524da7a986536f60b14553/
Add in Silicon Labs targets with asynchronous API support
Who changed what in which revision?
| User | Revision | Line number | New contents of line |
|---|---|---|---|
| mbed_official | 525:c320967f86b9 | 1 | /**************************************************************************//** |
| mbed_official | 525:c320967f86b9 | 2 | * @file efm32zg222f32.h |
| mbed_official | 525:c320967f86b9 | 3 | * @brief CMSIS Cortex-M Peripheral Access Layer Header File |
| mbed_official | 525:c320967f86b9 | 4 | * for EFM32ZG222F32 |
| mbed_official | 525:c320967f86b9 | 5 | * @version 3.20.6 |
| mbed_official | 525:c320967f86b9 | 6 | ****************************************************************************** |
| mbed_official | 525:c320967f86b9 | 7 | * @section License |
| mbed_official | 525:c320967f86b9 | 8 | * <b>(C) Copyright 2014 Silicon Laboratories, Inc. http://www.silabs.com</b> |
| mbed_official | 525:c320967f86b9 | 9 | ****************************************************************************** |
| mbed_official | 525:c320967f86b9 | 10 | * |
| mbed_official | 525:c320967f86b9 | 11 | * Permission is granted to anyone to use this software for any purpose, |
| mbed_official | 525:c320967f86b9 | 12 | * including commercial applications, and to alter it and redistribute it |
| mbed_official | 525:c320967f86b9 | 13 | * freely, subject to the following restrictions: |
| mbed_official | 525:c320967f86b9 | 14 | * |
| mbed_official | 525:c320967f86b9 | 15 | * 1. The origin of this software must not be misrepresented; you must not |
| mbed_official | 525:c320967f86b9 | 16 | * claim that you wrote the original software.@n |
| mbed_official | 525:c320967f86b9 | 17 | * 2. Altered source versions must be plainly marked as such, and must not be |
| mbed_official | 525:c320967f86b9 | 18 | * misrepresented as being the original software.@n |
| mbed_official | 525:c320967f86b9 | 19 | * 3. This notice may not be removed or altered from any source distribution. |
| mbed_official | 525:c320967f86b9 | 20 | * |
| mbed_official | 525:c320967f86b9 | 21 | * DISCLAIMER OF WARRANTY/LIMITATION OF REMEDIES: Silicon Laboratories, Inc. |
| mbed_official | 525:c320967f86b9 | 22 | * has no obligation to support this Software. Silicon Laboratories, Inc. is |
| mbed_official | 525:c320967f86b9 | 23 | * providing the Software "AS IS", with no express or implied warranties of any |
| mbed_official | 525:c320967f86b9 | 24 | * kind, including, but not limited to, any implied warranties of |
| mbed_official | 525:c320967f86b9 | 25 | * merchantability or fitness for any particular purpose or warranties against |
| mbed_official | 525:c320967f86b9 | 26 | * infringement of any proprietary rights of a third party. |
| mbed_official | 525:c320967f86b9 | 27 | * |
| mbed_official | 525:c320967f86b9 | 28 | * Silicon Laboratories, Inc. will not be liable for any consequential, |
| mbed_official | 525:c320967f86b9 | 29 | * incidental, or special damages, or any other relief, or for any claim by |
| mbed_official | 525:c320967f86b9 | 30 | * any third party, arising from your use of this Software. |
| mbed_official | 525:c320967f86b9 | 31 | * |
| mbed_official | 525:c320967f86b9 | 32 | *****************************************************************************/ |
| mbed_official | 525:c320967f86b9 | 33 | |
| mbed_official | 525:c320967f86b9 | 34 | #ifndef __EFM32ZG222F32_H |
| mbed_official | 525:c320967f86b9 | 35 | #define __EFM32ZG222F32_H |
| mbed_official | 525:c320967f86b9 | 36 | |
| mbed_official | 525:c320967f86b9 | 37 | #ifdef __cplusplus |
| mbed_official | 525:c320967f86b9 | 38 | extern "C" { |
| mbed_official | 525:c320967f86b9 | 39 | #endif |
| mbed_official | 525:c320967f86b9 | 40 | |
| mbed_official | 525:c320967f86b9 | 41 | /**************************************************************************//** |
| mbed_official | 525:c320967f86b9 | 42 | * @addtogroup Parts |
| mbed_official | 525:c320967f86b9 | 43 | * @{ |
| mbed_official | 525:c320967f86b9 | 44 | *****************************************************************************/ |
| mbed_official | 525:c320967f86b9 | 45 | |
| mbed_official | 525:c320967f86b9 | 46 | /**************************************************************************//** |
| mbed_official | 525:c320967f86b9 | 47 | * @defgroup EFM32ZG222F32 EFM32ZG222F32 |
| mbed_official | 525:c320967f86b9 | 48 | * @{ |
| mbed_official | 525:c320967f86b9 | 49 | *****************************************************************************/ |
| mbed_official | 525:c320967f86b9 | 50 | |
| mbed_official | 525:c320967f86b9 | 51 | /** Interrupt Number Definition */ |
| mbed_official | 525:c320967f86b9 | 52 | typedef enum IRQn |
| mbed_official | 525:c320967f86b9 | 53 | { |
| mbed_official | 525:c320967f86b9 | 54 | /****** Cortex-M0+ Processor Exceptions Numbers *****************************************/ |
| mbed_official | 525:c320967f86b9 | 55 | NonMaskableInt_IRQn = -14, /*!< 2 Non Maskable Interrupt */ |
| mbed_official | 525:c320967f86b9 | 56 | HardFault_IRQn = -13, /*!< 3 Cortex-M0+ Hard Fault Interrupt */ |
| mbed_official | 525:c320967f86b9 | 57 | SVCall_IRQn = -5, /*!< 11 Cortex-M0+ SV Call Interrupt */ |
| mbed_official | 525:c320967f86b9 | 58 | PendSV_IRQn = -2, /*!< 14 Cortex-M0+ Pend SV Interrupt */ |
| mbed_official | 525:c320967f86b9 | 59 | SysTick_IRQn = -1, /*!< 15 Cortex-M0+ System Tick Interrupt */ |
| mbed_official | 525:c320967f86b9 | 60 | |
| mbed_official | 525:c320967f86b9 | 61 | /****** EFM32ZG Peripheral Interrupt Numbers *********************************************/ |
| mbed_official | 525:c320967f86b9 | 62 | DMA_IRQn = 0, /*!< 16+0 EFM32 DMA Interrupt */ |
| mbed_official | 525:c320967f86b9 | 63 | GPIO_EVEN_IRQn = 1, /*!< 16+1 EFM32 GPIO_EVEN Interrupt */ |
| mbed_official | 525:c320967f86b9 | 64 | TIMER0_IRQn = 2, /*!< 16+2 EFM32 TIMER0 Interrupt */ |
| mbed_official | 525:c320967f86b9 | 65 | ACMP0_IRQn = 3, /*!< 16+3 EFM32 ACMP0 Interrupt */ |
| mbed_official | 525:c320967f86b9 | 66 | ADC0_IRQn = 4, /*!< 16+4 EFM32 ADC0 Interrupt */ |
| mbed_official | 525:c320967f86b9 | 67 | I2C0_IRQn = 5, /*!< 16+5 EFM32 I2C0 Interrupt */ |
| mbed_official | 525:c320967f86b9 | 68 | GPIO_ODD_IRQn = 6, /*!< 16+6 EFM32 GPIO_ODD Interrupt */ |
| mbed_official | 525:c320967f86b9 | 69 | TIMER1_IRQn = 7, /*!< 16+7 EFM32 TIMER1 Interrupt */ |
| mbed_official | 525:c320967f86b9 | 70 | USART1_RX_IRQn = 8, /*!< 16+8 EFM32 USART1_RX Interrupt */ |
| mbed_official | 525:c320967f86b9 | 71 | USART1_TX_IRQn = 9, /*!< 16+9 EFM32 USART1_TX Interrupt */ |
| mbed_official | 525:c320967f86b9 | 72 | LEUART0_IRQn = 10, /*!< 16+10 EFM32 LEUART0 Interrupt */ |
| mbed_official | 525:c320967f86b9 | 73 | PCNT0_IRQn = 11, /*!< 16+11 EFM32 PCNT0 Interrupt */ |
| mbed_official | 525:c320967f86b9 | 74 | RTC_IRQn = 12, /*!< 16+12 EFM32 RTC Interrupt */ |
| mbed_official | 525:c320967f86b9 | 75 | CMU_IRQn = 13, /*!< 16+13 EFM32 CMU Interrupt */ |
| mbed_official | 525:c320967f86b9 | 76 | VCMP_IRQn = 14, /*!< 16+14 EFM32 VCMP Interrupt */ |
| mbed_official | 525:c320967f86b9 | 77 | MSC_IRQn = 15, /*!< 16+15 EFM32 MSC Interrupt */ |
| mbed_official | 525:c320967f86b9 | 78 | AES_IRQn = 16, /*!< 16+16 EFM32 AES Interrupt */ |
| mbed_official | 525:c320967f86b9 | 79 | } IRQn_Type; |
| mbed_official | 525:c320967f86b9 | 80 | |
| mbed_official | 525:c320967f86b9 | 81 | /**************************************************************************//** |
| mbed_official | 525:c320967f86b9 | 82 | * @defgroup EFM32ZG222F32_Core EFM32ZG222F32 Core |
| mbed_official | 525:c320967f86b9 | 83 | * @{ |
| mbed_official | 525:c320967f86b9 | 84 | * @brief Processor and Core Peripheral Section |
| mbed_official | 525:c320967f86b9 | 85 | *****************************************************************************/ |
| mbed_official | 525:c320967f86b9 | 86 | #define __MPU_PRESENT 0 /**< MPU not present */ |
| mbed_official | 525:c320967f86b9 | 87 | #define __VTOR_PRESENT 1 /**< Presence of VTOR register in SCB */ |
| mbed_official | 525:c320967f86b9 | 88 | #define __NVIC_PRIO_BITS 2 /**< NVIC interrupt priority bits */ |
| mbed_official | 525:c320967f86b9 | 89 | #define __Vendor_SysTickConfig 0 /**< Is 1 if different SysTick counter is used */ |
| mbed_official | 525:c320967f86b9 | 90 | |
| mbed_official | 525:c320967f86b9 | 91 | /** @} End of group EFM32ZG222F32_Core */ |
| mbed_official | 525:c320967f86b9 | 92 | |
| mbed_official | 525:c320967f86b9 | 93 | /**************************************************************************//** |
| mbed_official | 525:c320967f86b9 | 94 | * @defgroup EFM32ZG222F32_Part EFM32ZG222F32 Part |
| mbed_official | 525:c320967f86b9 | 95 | * @{ |
| mbed_official | 525:c320967f86b9 | 96 | ******************************************************************************/ |
| mbed_official | 525:c320967f86b9 | 97 | |
| mbed_official | 525:c320967f86b9 | 98 | /** Part family */ |
| mbed_official | 525:c320967f86b9 | 99 | #define _EFM32_ZERO_FAMILY 1 /**< Zero Gecko EFM32ZG MCU Family */ |
| mbed_official | 525:c320967f86b9 | 100 | #define _EFM_DEVICE /**< Silicon Labs EFM-type microcontroller */ |
| mbed_official | 525:c320967f86b9 | 101 | |
| mbed_official | 525:c320967f86b9 | 102 | /* If part number is not defined as compiler option, define it */ |
| mbed_official | 525:c320967f86b9 | 103 | #if !defined(EFM32ZG222F32) |
| mbed_official | 525:c320967f86b9 | 104 | #define EFM32ZG222F32 1 /**< Zero Gecko Part */ |
| mbed_official | 525:c320967f86b9 | 105 | #endif |
| mbed_official | 525:c320967f86b9 | 106 | |
| mbed_official | 525:c320967f86b9 | 107 | /** Configure part number */ |
| mbed_official | 525:c320967f86b9 | 108 | #define PART_NUMBER "EFM32ZG222F32" /**< Part Number */ |
| mbed_official | 525:c320967f86b9 | 109 | |
| mbed_official | 525:c320967f86b9 | 110 | /** Memory Base addresses and limits */ |
| mbed_official | 525:c320967f86b9 | 111 | #define FLASH_MEM_BASE ((uint32_t) 0x0UL) /**< FLASH base address */ |
| mbed_official | 525:c320967f86b9 | 112 | #define FLASH_MEM_SIZE ((uint32_t) 0x10000000UL) /**< FLASH available address space */ |
| mbed_official | 525:c320967f86b9 | 113 | #define FLASH_MEM_END ((uint32_t) 0xFFFFFFFUL) /**< FLASH end address */ |
| mbed_official | 525:c320967f86b9 | 114 | #define FLASH_MEM_BITS ((uint32_t) 0x28UL) /**< FLASH used bits */ |
| mbed_official | 525:c320967f86b9 | 115 | #define AES_MEM_BASE ((uint32_t) 0x400E0000UL) /**< AES base address */ |
| mbed_official | 525:c320967f86b9 | 116 | #define AES_MEM_SIZE ((uint32_t) 0x400UL) /**< AES available address space */ |
| mbed_official | 525:c320967f86b9 | 117 | #define AES_MEM_END ((uint32_t) 0x400E03FFUL) /**< AES end address */ |
| mbed_official | 525:c320967f86b9 | 118 | #define AES_MEM_BITS ((uint32_t) 0x10UL) /**< AES used bits */ |
| mbed_official | 525:c320967f86b9 | 119 | #define PER_MEM_BASE ((uint32_t) 0x40000000UL) /**< PER base address */ |
| mbed_official | 525:c320967f86b9 | 120 | #define PER_MEM_SIZE ((uint32_t) 0xE0000UL) /**< PER available address space */ |
| mbed_official | 525:c320967f86b9 | 121 | #define PER_MEM_END ((uint32_t) 0x400DFFFFUL) /**< PER end address */ |
| mbed_official | 525:c320967f86b9 | 122 | #define PER_MEM_BITS ((uint32_t) 0x20UL) /**< PER used bits */ |
| mbed_official | 525:c320967f86b9 | 123 | #define RAM_MEM_BASE ((uint32_t) 0x20000000UL) /**< RAM base address */ |
| mbed_official | 525:c320967f86b9 | 124 | #define RAM_MEM_SIZE ((uint32_t) 0x40000UL) /**< RAM available address space */ |
| mbed_official | 525:c320967f86b9 | 125 | #define RAM_MEM_END ((uint32_t) 0x2003FFFFUL) /**< RAM end address */ |
| mbed_official | 525:c320967f86b9 | 126 | #define RAM_MEM_BITS ((uint32_t) 0x18UL) /**< RAM used bits */ |
| mbed_official | 525:c320967f86b9 | 127 | #define RAM_CODE_MEM_BASE ((uint32_t) 0x10000000UL) /**< RAM_CODE base address */ |
| mbed_official | 525:c320967f86b9 | 128 | #define RAM_CODE_MEM_SIZE ((uint32_t) 0x20000UL) /**< RAM_CODE available address space */ |
| mbed_official | 525:c320967f86b9 | 129 | #define RAM_CODE_MEM_END ((uint32_t) 0x1001FFFFUL) /**< RAM_CODE end address */ |
| mbed_official | 525:c320967f86b9 | 130 | #define RAM_CODE_MEM_BITS ((uint32_t) 0x17UL) /**< RAM_CODE used bits */ |
| mbed_official | 525:c320967f86b9 | 131 | |
| mbed_official | 525:c320967f86b9 | 132 | /** Flash and SRAM limits for EFM32ZG222F32 */ |
| mbed_official | 525:c320967f86b9 | 133 | #define FLASH_BASE (0x00000000UL) /**< Flash Base Address */ |
| mbed_official | 525:c320967f86b9 | 134 | #define FLASH_SIZE (0x00008000UL) /**< Available Flash Memory */ |
| mbed_official | 525:c320967f86b9 | 135 | #define FLASH_PAGE_SIZE 1024 /**< Flash Memory page size */ |
| mbed_official | 525:c320967f86b9 | 136 | #define SRAM_BASE (0x20000000UL) /**< SRAM Base Address */ |
| mbed_official | 525:c320967f86b9 | 137 | #define SRAM_SIZE (0x00001000UL) /**< Available SRAM Memory */ |
| mbed_official | 525:c320967f86b9 | 138 | #define __CM0PLUS_REV 0x001 /**< Cortex-M0+ Core revision r0p1 */ |
| mbed_official | 525:c320967f86b9 | 139 | #define PRS_CHAN_COUNT 4 /**< Number of PRS channels */ |
| mbed_official | 525:c320967f86b9 | 140 | #define DMA_CHAN_COUNT 4 /**< Number of DMA channels */ |
| mbed_official | 525:c320967f86b9 | 141 | /** AF channels connect the different on-chip peripherals with the af-mux */ |
| mbed_official | 525:c320967f86b9 | 142 | #define AFCHAN_MAX 33 |
| mbed_official | 525:c320967f86b9 | 143 | #define AFCHANLOC_MAX 7 |
| mbed_official | 525:c320967f86b9 | 144 | /** Analog AF channels */ |
| mbed_official | 525:c320967f86b9 | 145 | #define AFACHAN_MAX 25 |
| mbed_official | 525:c320967f86b9 | 146 | |
| mbed_official | 525:c320967f86b9 | 147 | /* Part number capabilities */ |
| mbed_official | 525:c320967f86b9 | 148 | |
| mbed_official | 525:c320967f86b9 | 149 | #define TIMER_PRESENT /**< TIMER is available in this part */ |
| mbed_official | 525:c320967f86b9 | 150 | #define TIMER_COUNT 2 /**< 2 TIMERs available */ |
| mbed_official | 525:c320967f86b9 | 151 | #define ACMP_PRESENT /**< ACMP is available in this part */ |
| mbed_official | 525:c320967f86b9 | 152 | #define ACMP_COUNT 1 /**< 1 ACMPs available */ |
| mbed_official | 525:c320967f86b9 | 153 | #define USART_PRESENT /**< USART is available in this part */ |
| mbed_official | 525:c320967f86b9 | 154 | #define USART_COUNT 1 /**< 1 USARTs available */ |
| mbed_official | 525:c320967f86b9 | 155 | #define IDAC_PRESENT /**< IDAC is available in this part */ |
| mbed_official | 525:c320967f86b9 | 156 | #define IDAC_COUNT 1 /**< 1 IDACs available */ |
| mbed_official | 525:c320967f86b9 | 157 | #define ADC_PRESENT /**< ADC is available in this part */ |
| mbed_official | 525:c320967f86b9 | 158 | #define ADC_COUNT 1 /**< 1 ADCs available */ |
| mbed_official | 525:c320967f86b9 | 159 | #define LEUART_PRESENT /**< LEUART is available in this part */ |
| mbed_official | 525:c320967f86b9 | 160 | #define LEUART_COUNT 1 /**< 1 LEUARTs available */ |
| mbed_official | 525:c320967f86b9 | 161 | #define PCNT_PRESENT /**< PCNT is available in this part */ |
| mbed_official | 525:c320967f86b9 | 162 | #define PCNT_COUNT 1 /**< 1 PCNTs available */ |
| mbed_official | 525:c320967f86b9 | 163 | #define I2C_PRESENT /**< I2C is available in this part */ |
| mbed_official | 525:c320967f86b9 | 164 | #define I2C_COUNT 1 /**< 1 I2Cs available */ |
| mbed_official | 525:c320967f86b9 | 165 | #define AES_PRESENT |
| mbed_official | 525:c320967f86b9 | 166 | #define AES_COUNT 1 |
| mbed_official | 525:c320967f86b9 | 167 | #define DMA_PRESENT |
| mbed_official | 525:c320967f86b9 | 168 | #define DMA_COUNT 1 |
| mbed_official | 525:c320967f86b9 | 169 | #define LE_PRESENT |
| mbed_official | 525:c320967f86b9 | 170 | #define LE_COUNT 1 |
| mbed_official | 525:c320967f86b9 | 171 | #define MSC_PRESENT |
| mbed_official | 525:c320967f86b9 | 172 | #define MSC_COUNT 1 |
| mbed_official | 525:c320967f86b9 | 173 | #define EMU_PRESENT |
| mbed_official | 525:c320967f86b9 | 174 | #define EMU_COUNT 1 |
| mbed_official | 525:c320967f86b9 | 175 | #define RMU_PRESENT |
| mbed_official | 525:c320967f86b9 | 176 | #define RMU_COUNT 1 |
| mbed_official | 525:c320967f86b9 | 177 | #define CMU_PRESENT |
| mbed_official | 525:c320967f86b9 | 178 | #define CMU_COUNT 1 |
| mbed_official | 525:c320967f86b9 | 179 | #define PRS_PRESENT |
| mbed_official | 525:c320967f86b9 | 180 | #define PRS_COUNT 1 |
| mbed_official | 525:c320967f86b9 | 181 | #define GPIO_PRESENT |
| mbed_official | 525:c320967f86b9 | 182 | #define GPIO_COUNT 1 |
| mbed_official | 525:c320967f86b9 | 183 | #define VCMP_PRESENT |
| mbed_official | 525:c320967f86b9 | 184 | #define VCMP_COUNT 1 |
| mbed_official | 525:c320967f86b9 | 185 | #define RTC_PRESENT |
| mbed_official | 525:c320967f86b9 | 186 | #define RTC_COUNT 1 |
| mbed_official | 525:c320967f86b9 | 187 | #define HFXTAL_PRESENT |
| mbed_official | 525:c320967f86b9 | 188 | #define HFXTAL_COUNT 1 |
| mbed_official | 525:c320967f86b9 | 189 | #define LFXTAL_PRESENT |
| mbed_official | 525:c320967f86b9 | 190 | #define LFXTAL_COUNT 1 |
| mbed_official | 525:c320967f86b9 | 191 | #define WDOG_PRESENT |
| mbed_official | 525:c320967f86b9 | 192 | #define WDOG_COUNT 1 |
| mbed_official | 525:c320967f86b9 | 193 | #define DBG_PRESENT |
| mbed_official | 525:c320967f86b9 | 194 | #define DBG_COUNT 1 |
| mbed_official | 525:c320967f86b9 | 195 | #define BOOTLOADER_PRESENT |
| mbed_official | 525:c320967f86b9 | 196 | #define BOOTLOADER_COUNT 1 |
| mbed_official | 525:c320967f86b9 | 197 | #define ANALOG_PRESENT |
| mbed_official | 525:c320967f86b9 | 198 | #define ANALOG_COUNT 1 |
| mbed_official | 525:c320967f86b9 | 199 | |
| mbed_official | 525:c320967f86b9 | 200 | /** @} End of group EFM32ZG222F32_Part */ |
| mbed_official | 525:c320967f86b9 | 201 | |
| mbed_official | 525:c320967f86b9 | 202 | #include "arm_math.h" /* To get __CLZ definitions etc. */ |
| mbed_official | 525:c320967f86b9 | 203 | #include "core_cm0plus.h" /* Cortex-M0+ processor and core peripherals */ |
| mbed_official | 525:c320967f86b9 | 204 | #include "system_efm32zg.h" /* System Header */ |
| mbed_official | 525:c320967f86b9 | 205 | |
| mbed_official | 525:c320967f86b9 | 206 | /**************************************************************************//** |
| mbed_official | 525:c320967f86b9 | 207 | * @defgroup EFM32ZG222F32_Peripheral_TypeDefs EFM32ZG222F32 Peripheral TypeDefs |
| mbed_official | 525:c320967f86b9 | 208 | * @{ |
| mbed_official | 525:c320967f86b9 | 209 | * @brief Device Specific Peripheral Register Structures |
| mbed_official | 525:c320967f86b9 | 210 | *****************************************************************************/ |
| mbed_official | 525:c320967f86b9 | 211 | |
| mbed_official | 525:c320967f86b9 | 212 | #include "efm32zg_aes.h" |
| mbed_official | 525:c320967f86b9 | 213 | #include "efm32zg_dma_ch.h" |
| mbed_official | 525:c320967f86b9 | 214 | #include "efm32zg_dma.h" |
| mbed_official | 525:c320967f86b9 | 215 | #include "efm32zg_msc.h" |
| mbed_official | 525:c320967f86b9 | 216 | #include "efm32zg_emu.h" |
| mbed_official | 525:c320967f86b9 | 217 | #include "efm32zg_rmu.h" |
| mbed_official | 525:c320967f86b9 | 218 | #include "efm32zg_cmu.h" |
| mbed_official | 525:c320967f86b9 | 219 | #include "efm32zg_timer_cc.h" |
| mbed_official | 525:c320967f86b9 | 220 | #include "efm32zg_timer.h" |
| mbed_official | 525:c320967f86b9 | 221 | #include "efm32zg_acmp.h" |
| mbed_official | 525:c320967f86b9 | 222 | #include "efm32zg_usart.h" |
| mbed_official | 525:c320967f86b9 | 223 | #include "efm32zg_prs_ch.h" |
| mbed_official | 525:c320967f86b9 | 224 | #include "efm32zg_prs.h" |
| mbed_official | 525:c320967f86b9 | 225 | #include "efm32zg_idac.h" |
| mbed_official | 525:c320967f86b9 | 226 | #include "efm32zg_gpio_p.h" |
| mbed_official | 525:c320967f86b9 | 227 | #include "efm32zg_gpio.h" |
| mbed_official | 525:c320967f86b9 | 228 | #include "efm32zg_vcmp.h" |
| mbed_official | 525:c320967f86b9 | 229 | #include "efm32zg_adc.h" |
| mbed_official | 525:c320967f86b9 | 230 | #include "efm32zg_leuart.h" |
| mbed_official | 525:c320967f86b9 | 231 | #include "efm32zg_pcnt.h" |
| mbed_official | 525:c320967f86b9 | 232 | #include "efm32zg_i2c.h" |
| mbed_official | 525:c320967f86b9 | 233 | #include "efm32zg_rtc.h" |
| mbed_official | 525:c320967f86b9 | 234 | #include "efm32zg_wdog.h" |
| mbed_official | 525:c320967f86b9 | 235 | #include "efm32zg_dma_descriptor.h" |
| mbed_official | 525:c320967f86b9 | 236 | #include "efm32zg_devinfo.h" |
| mbed_official | 525:c320967f86b9 | 237 | #include "efm32zg_romtable.h" |
| mbed_official | 525:c320967f86b9 | 238 | #include "efm32zg_calibrate.h" |
| mbed_official | 525:c320967f86b9 | 239 | |
| mbed_official | 525:c320967f86b9 | 240 | /** @} End of group EFM32ZG222F32_Peripheral_TypeDefs */ |
| mbed_official | 525:c320967f86b9 | 241 | |
| mbed_official | 525:c320967f86b9 | 242 | /**************************************************************************//** |
| mbed_official | 525:c320967f86b9 | 243 | * @defgroup EFM32ZG222F32_Peripheral_Base EFM32ZG222F32 Peripheral Memory Map |
| mbed_official | 525:c320967f86b9 | 244 | * @{ |
| mbed_official | 525:c320967f86b9 | 245 | *****************************************************************************/ |
| mbed_official | 525:c320967f86b9 | 246 | |
| mbed_official | 525:c320967f86b9 | 247 | #define AES_BASE (0x400E0000UL) /**< AES base address */ |
| mbed_official | 525:c320967f86b9 | 248 | #define DMA_BASE (0x400C2000UL) /**< DMA base address */ |
| mbed_official | 525:c320967f86b9 | 249 | #define MSC_BASE (0x400C0000UL) /**< MSC base address */ |
| mbed_official | 525:c320967f86b9 | 250 | #define EMU_BASE (0x400C6000UL) /**< EMU base address */ |
| mbed_official | 525:c320967f86b9 | 251 | #define RMU_BASE (0x400CA000UL) /**< RMU base address */ |
| mbed_official | 525:c320967f86b9 | 252 | #define CMU_BASE (0x400C8000UL) /**< CMU base address */ |
| mbed_official | 525:c320967f86b9 | 253 | #define TIMER0_BASE (0x40010000UL) /**< TIMER0 base address */ |
| mbed_official | 525:c320967f86b9 | 254 | #define TIMER1_BASE (0x40010400UL) /**< TIMER1 base address */ |
| mbed_official | 525:c320967f86b9 | 255 | #define ACMP0_BASE (0x40001000UL) /**< ACMP0 base address */ |
| mbed_official | 525:c320967f86b9 | 256 | #define USART1_BASE (0x4000C400UL) /**< USART1 base address */ |
| mbed_official | 525:c320967f86b9 | 257 | #define PRS_BASE (0x400CC000UL) /**< PRS base address */ |
| mbed_official | 525:c320967f86b9 | 258 | #define IDAC0_BASE (0x40004000UL) /**< IDAC0 base address */ |
| mbed_official | 525:c320967f86b9 | 259 | #define GPIO_BASE (0x40006000UL) /**< GPIO base address */ |
| mbed_official | 525:c320967f86b9 | 260 | #define VCMP_BASE (0x40000000UL) /**< VCMP base address */ |
| mbed_official | 525:c320967f86b9 | 261 | #define ADC0_BASE (0x40002000UL) /**< ADC0 base address */ |
| mbed_official | 525:c320967f86b9 | 262 | #define LEUART0_BASE (0x40084000UL) /**< LEUART0 base address */ |
| mbed_official | 525:c320967f86b9 | 263 | #define PCNT0_BASE (0x40086000UL) /**< PCNT0 base address */ |
| mbed_official | 525:c320967f86b9 | 264 | #define I2C0_BASE (0x4000A000UL) /**< I2C0 base address */ |
| mbed_official | 525:c320967f86b9 | 265 | #define RTC_BASE (0x40080000UL) /**< RTC base address */ |
| mbed_official | 525:c320967f86b9 | 266 | #define WDOG_BASE (0x40088000UL) /**< WDOG base address */ |
| mbed_official | 525:c320967f86b9 | 267 | #define CALIBRATE_BASE (0x0FE08000UL) /**< CALIBRATE base address */ |
| mbed_official | 525:c320967f86b9 | 268 | #define DEVINFO_BASE (0x0FE081B0UL) /**< DEVINFO base address */ |
| mbed_official | 525:c320967f86b9 | 269 | #define ROMTABLE_BASE (0xF00FFFD0UL) /**< ROMTABLE base address */ |
| mbed_official | 525:c320967f86b9 | 270 | #define LOCKBITS_BASE (0x0FE04000UL) /**< Lock-bits page base address */ |
| mbed_official | 525:c320967f86b9 | 271 | #define USERDATA_BASE (0x0FE00000UL) /**< User data page base address */ |
| mbed_official | 525:c320967f86b9 | 272 | |
| mbed_official | 525:c320967f86b9 | 273 | /** @} End of group EFM32ZG222F32_Peripheral_Base */ |
| mbed_official | 525:c320967f86b9 | 274 | |
| mbed_official | 525:c320967f86b9 | 275 | /**************************************************************************//** |
| mbed_official | 525:c320967f86b9 | 276 | * @defgroup EFM32ZG222F32_Peripheral_Declaration EFM32ZG222F32 Peripheral Declarations |
| mbed_official | 525:c320967f86b9 | 277 | * @{ |
| mbed_official | 525:c320967f86b9 | 278 | *****************************************************************************/ |
| mbed_official | 525:c320967f86b9 | 279 | |
| mbed_official | 525:c320967f86b9 | 280 | #define AES ((AES_TypeDef *) AES_BASE) /**< AES base pointer */ |
| mbed_official | 525:c320967f86b9 | 281 | #define DMA ((DMA_TypeDef *) DMA_BASE) /**< DMA base pointer */ |
| mbed_official | 525:c320967f86b9 | 282 | #define MSC ((MSC_TypeDef *) MSC_BASE) /**< MSC base pointer */ |
| mbed_official | 525:c320967f86b9 | 283 | #define EMU ((EMU_TypeDef *) EMU_BASE) /**< EMU base pointer */ |
| mbed_official | 525:c320967f86b9 | 284 | #define RMU ((RMU_TypeDef *) RMU_BASE) /**< RMU base pointer */ |
| mbed_official | 525:c320967f86b9 | 285 | #define CMU ((CMU_TypeDef *) CMU_BASE) /**< CMU base pointer */ |
| mbed_official | 525:c320967f86b9 | 286 | #define TIMER0 ((TIMER_TypeDef *) TIMER0_BASE) /**< TIMER0 base pointer */ |
| mbed_official | 525:c320967f86b9 | 287 | #define TIMER1 ((TIMER_TypeDef *) TIMER1_BASE) /**< TIMER1 base pointer */ |
| mbed_official | 525:c320967f86b9 | 288 | #define ACMP0 ((ACMP_TypeDef *) ACMP0_BASE) /**< ACMP0 base pointer */ |
| mbed_official | 525:c320967f86b9 | 289 | #define USART1 ((USART_TypeDef *) USART1_BASE) /**< USART1 base pointer */ |
| mbed_official | 525:c320967f86b9 | 290 | #define PRS ((PRS_TypeDef *) PRS_BASE) /**< PRS base pointer */ |
| mbed_official | 525:c320967f86b9 | 291 | #define IDAC0 ((IDAC_TypeDef *) IDAC0_BASE) /**< IDAC0 base pointer */ |
| mbed_official | 525:c320967f86b9 | 292 | #define GPIO ((GPIO_TypeDef *) GPIO_BASE) /**< GPIO base pointer */ |
| mbed_official | 525:c320967f86b9 | 293 | #define VCMP ((VCMP_TypeDef *) VCMP_BASE) /**< VCMP base pointer */ |
| mbed_official | 525:c320967f86b9 | 294 | #define ADC0 ((ADC_TypeDef *) ADC0_BASE) /**< ADC0 base pointer */ |
| mbed_official | 525:c320967f86b9 | 295 | #define LEUART0 ((LEUART_TypeDef *) LEUART0_BASE) /**< LEUART0 base pointer */ |
| mbed_official | 525:c320967f86b9 | 296 | #define PCNT0 ((PCNT_TypeDef *) PCNT0_BASE) /**< PCNT0 base pointer */ |
| mbed_official | 525:c320967f86b9 | 297 | #define I2C0 ((I2C_TypeDef *) I2C0_BASE) /**< I2C0 base pointer */ |
| mbed_official | 525:c320967f86b9 | 298 | #define RTC ((RTC_TypeDef *) RTC_BASE) /**< RTC base pointer */ |
| mbed_official | 525:c320967f86b9 | 299 | #define WDOG ((WDOG_TypeDef *) WDOG_BASE) /**< WDOG base pointer */ |
| mbed_official | 525:c320967f86b9 | 300 | #define CALIBRATE ((CALIBRATE_TypeDef *) CALIBRATE_BASE) /**< CALIBRATE base pointer */ |
| mbed_official | 525:c320967f86b9 | 301 | #define DEVINFO ((DEVINFO_TypeDef *) DEVINFO_BASE) /**< DEVINFO base pointer */ |
| mbed_official | 525:c320967f86b9 | 302 | #define ROMTABLE ((ROMTABLE_TypeDef *) ROMTABLE_BASE) /**< ROMTABLE base pointer */ |
| mbed_official | 525:c320967f86b9 | 303 | |
| mbed_official | 525:c320967f86b9 | 304 | /** @} End of group EFM32ZG222F32_Peripheral_Declaration */ |
| mbed_official | 525:c320967f86b9 | 305 | |
| mbed_official | 525:c320967f86b9 | 306 | /**************************************************************************//** |
| mbed_official | 525:c320967f86b9 | 307 | * @defgroup EFM32ZG222F32_BitFields EFM32ZG222F32 Bit Fields |
| mbed_official | 525:c320967f86b9 | 308 | * @{ |
| mbed_official | 525:c320967f86b9 | 309 | *****************************************************************************/ |
| mbed_official | 525:c320967f86b9 | 310 | |
| mbed_official | 525:c320967f86b9 | 311 | #include "efm32zg_prs_signals.h" |
| mbed_official | 525:c320967f86b9 | 312 | #include "efm32zg_dmareq.h" |
| mbed_official | 525:c320967f86b9 | 313 | #include "efm32zg_dmactrl.h" |
| mbed_official | 525:c320967f86b9 | 314 | |
| mbed_official | 525:c320967f86b9 | 315 | /**************************************************************************//** |
| mbed_official | 525:c320967f86b9 | 316 | * @defgroup EFM32ZG222F32_UNLOCK EFM32ZG222F32 Unlock Codes |
| mbed_official | 525:c320967f86b9 | 317 | * @{ |
| mbed_official | 525:c320967f86b9 | 318 | *****************************************************************************/ |
| mbed_official | 525:c320967f86b9 | 319 | #define MSC_UNLOCK_CODE 0x1B71 /**< MSC unlock code */ |
| mbed_official | 525:c320967f86b9 | 320 | #define EMU_UNLOCK_CODE 0xADE8 /**< EMU unlock code */ |
| mbed_official | 525:c320967f86b9 | 321 | #define CMU_UNLOCK_CODE 0x580E /**< CMU unlock code */ |
| mbed_official | 525:c320967f86b9 | 322 | #define TIMER_UNLOCK_CODE 0xCE80 /**< TIMER unlock code */ |
| mbed_official | 525:c320967f86b9 | 323 | #define GPIO_UNLOCK_CODE 0xA534 /**< GPIO unlock code */ |
| mbed_official | 525:c320967f86b9 | 324 | |
| mbed_official | 525:c320967f86b9 | 325 | /** @} End of group EFM32ZG222F32_UNLOCK */ |
| mbed_official | 525:c320967f86b9 | 326 | |
| mbed_official | 525:c320967f86b9 | 327 | /** @} End of group EFM32ZG222F32_BitFields */ |
| mbed_official | 525:c320967f86b9 | 328 | |
| mbed_official | 525:c320967f86b9 | 329 | /**************************************************************************//** |
| mbed_official | 525:c320967f86b9 | 330 | * @defgroup EFM32ZG222F32_Alternate_Function EFM32ZG222F32 Alternate Function |
| mbed_official | 525:c320967f86b9 | 331 | * @{ |
| mbed_official | 525:c320967f86b9 | 332 | *****************************************************************************/ |
| mbed_official | 525:c320967f86b9 | 333 | |
| mbed_official | 525:c320967f86b9 | 334 | #include "efm32zg_af_ports.h" |
| mbed_official | 525:c320967f86b9 | 335 | #include "efm32zg_af_pins.h" |
| mbed_official | 525:c320967f86b9 | 336 | |
| mbed_official | 525:c320967f86b9 | 337 | /** @} End of group EFM32ZG222F32_Alternate_Function */ |
| mbed_official | 525:c320967f86b9 | 338 | |
| mbed_official | 525:c320967f86b9 | 339 | /**************************************************************************//** |
| mbed_official | 525:c320967f86b9 | 340 | * @brief Set the value of a bit field within a register. |
| mbed_official | 525:c320967f86b9 | 341 | * |
| mbed_official | 525:c320967f86b9 | 342 | * @param REG |
| mbed_official | 525:c320967f86b9 | 343 | * The register to update |
| mbed_official | 525:c320967f86b9 | 344 | * @param MASK |
| mbed_official | 525:c320967f86b9 | 345 | * The mask for the bit field to update |
| mbed_official | 525:c320967f86b9 | 346 | * @param VALUE |
| mbed_official | 525:c320967f86b9 | 347 | * The value to write to the bit field |
| mbed_official | 525:c320967f86b9 | 348 | * @param OFFSET |
| mbed_official | 525:c320967f86b9 | 349 | * The number of bits that the field is offset within the register. |
| mbed_official | 525:c320967f86b9 | 350 | * 0 (zero) means LSB. |
| mbed_official | 525:c320967f86b9 | 351 | *****************************************************************************/ |
| mbed_official | 525:c320967f86b9 | 352 | #define SET_BIT_FIELD(REG, MASK, VALUE, OFFSET) \ |
| mbed_official | 525:c320967f86b9 | 353 | REG = ((REG) &~(MASK)) | (((VALUE) << (OFFSET)) & (MASK)); |
| mbed_official | 525:c320967f86b9 | 354 | |
| mbed_official | 525:c320967f86b9 | 355 | /** @} End of group EFM32ZG222F32 */ |
| mbed_official | 525:c320967f86b9 | 356 | |
| mbed_official | 525:c320967f86b9 | 357 | /** @} End of group Parts */ |
| mbed_official | 525:c320967f86b9 | 358 | |
| mbed_official | 525:c320967f86b9 | 359 | #ifdef __cplusplus |
| mbed_official | 525:c320967f86b9 | 360 | } |
| mbed_official | 525:c320967f86b9 | 361 | #endif |
| mbed_official | 525:c320967f86b9 | 362 | #endif /* __EFM32ZG222F32_H */ |