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targets/hal/TARGET_ARM_SSG/TARGET_MPS2/gpio_irq_api.c@580:3c14cb9b87c5, 2015-07-02 (annotated)

Committer:
mbed_official
Date:
Thu Jul 02 16:15:09 2015 +0100
Revision:
580:3c14cb9b87c5
Synchronized with git revision 213caf296f26963a7bea129b8ec4f33bbd1e6588



Full URL: https://github.com/mbedmicro/mbed/commit/213caf296f26963a7bea129b8ec4f33bbd1e6588/



commit of mps2

Who changed what in which revision?

UserRevisionLine numberNew contents of line
mbed_official 580:3c14cb9b87c5 1 /* mbed Microcontroller Library
mbed_official 580:3c14cb9b87c5 2 * Copyright (c) 2006-2015 ARM Limited
mbed_official 580:3c14cb9b87c5 3 *
mbed_official 580:3c14cb9b87c5 4 * Licensed under the Apache License, Version 2.0 (the "License");
mbed_official 580:3c14cb9b87c5 5 * you may not use this file except in compliance with the License.
mbed_official 580:3c14cb9b87c5 6 * You may obtain a copy of the License at
mbed_official 580:3c14cb9b87c5 7 *
mbed_official 580:3c14cb9b87c5 8 * http://www.apache.org/licenses/LICENSE-2.0
mbed_official 580:3c14cb9b87c5 9 *
mbed_official 580:3c14cb9b87c5 10 * Unless required by applicable law or agreed to in writing, software
mbed_official 580:3c14cb9b87c5 11 * distributed under the License is distributed on an "AS IS" BASIS,
mbed_official 580:3c14cb9b87c5 12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
mbed_official 580:3c14cb9b87c5 13 * See the License for the specific language governing permissions and
mbed_official 580:3c14cb9b87c5 14 * limitations under the License.
mbed_official 580:3c14cb9b87c5 15 */
mbed_official 580:3c14cb9b87c5 16 #include <stddef.h>
mbed_official 580:3c14cb9b87c5 17 #include "cmsis.h"
mbed_official 580:3c14cb9b87c5 18 #include "gpio_irq_api.h"
mbed_official 580:3c14cb9b87c5 19 #include "mbed_error.h"
mbed_official 580:3c14cb9b87c5 20
mbed_official 580:3c14cb9b87c5 21 #define CHANNEL_NUM 32
mbed_official 580:3c14cb9b87c5 22 #define CMSDK_GPIO_0 CMSDK_GPIO0
mbed_official 580:3c14cb9b87c5 23 #define CMSDK_GPIO_1 CMSDK_GPIO1
mbed_official 580:3c14cb9b87c5 24 #define PININT_IRQ 0
mbed_official 580:3c14cb9b87c5 25
mbed_official 580:3c14cb9b87c5 26 static uint32_t channel_ids[CHANNEL_NUM] = {0};
mbed_official 580:3c14cb9b87c5 27 static gpio_irq_handler irq_handler;
mbed_official 580:3c14cb9b87c5 28
mbed_official 580:3c14cb9b87c5 29 static inline void handle_interrupt_in(uint32_t channel) {
mbed_official 580:3c14cb9b87c5 30 uint32_t ch_bit = (1 << channel);
mbed_official 580:3c14cb9b87c5 31 // Return immediately if:
mbed_official 580:3c14cb9b87c5 32 // * The interrupt was already served
mbed_official 580:3c14cb9b87c5 33 // * There is no user handler
mbed_official 580:3c14cb9b87c5 34 // * It is a level interrupt, not an edge interrupt
mbed_official 580:3c14cb9b87c5 35 if (ch_bit <16){
mbed_official 580:3c14cb9b87c5 36 if ( ((CMSDK_GPIO_0->INTSTATUS) == 0) || (channel_ids[channel] == 0) || ((CMSDK_GPIO_0->INTTYPESET) == 0) ) return;
mbed_official 580:3c14cb9b87c5 37
mbed_official 580:3c14cb9b87c5 38 if ((CMSDK_GPIO_0->INTTYPESET & ch_bit) && (CMSDK_GPIO_0->INTPOLSET & ch_bit)) {
mbed_official 580:3c14cb9b87c5 39 irq_handler(channel_ids[channel], IRQ_RISE);
mbed_official 580:3c14cb9b87c5 40 CMSDK_GPIO_0->INTPOLSET = ch_bit;
mbed_official 580:3c14cb9b87c5 41 }
mbed_official 580:3c14cb9b87c5 42 if ((CMSDK_GPIO_0->INTTYPESET & ch_bit) && ~(CMSDK_GPIO_0->INTPOLSET & ch_bit)) {
mbed_official 580:3c14cb9b87c5 43 irq_handler(channel_ids[channel], IRQ_FALL);
mbed_official 580:3c14cb9b87c5 44 }
mbed_official 580:3c14cb9b87c5 45 CMSDK_GPIO_0->INTCLEAR = ch_bit;
mbed_official 580:3c14cb9b87c5 46 }
mbed_official 580:3c14cb9b87c5 47
mbed_official 580:3c14cb9b87c5 48 if (ch_bit>=16) {
mbed_official 580:3c14cb9b87c5 49 if ( ((CMSDK_GPIO_1->INTSTATUS) == 0) || (channel_ids[channel] == 0) || ((CMSDK_GPIO_1->INTTYPESET) == 0) ) return;
mbed_official 580:3c14cb9b87c5 50
mbed_official 580:3c14cb9b87c5 51 if ((CMSDK_GPIO_1->INTTYPESET & ch_bit) && (CMSDK_GPIO_1->INTPOLSET & ch_bit)) {
mbed_official 580:3c14cb9b87c5 52 irq_handler(channel_ids[channel], IRQ_RISE);
mbed_official 580:3c14cb9b87c5 53 CMSDK_GPIO_1->INTPOLSET = ch_bit;
mbed_official 580:3c14cb9b87c5 54 }
mbed_official 580:3c14cb9b87c5 55 if ((CMSDK_GPIO_1->INTTYPESET & ch_bit) && ~(CMSDK_GPIO_1->INTPOLSET & ch_bit)) {
mbed_official 580:3c14cb9b87c5 56 irq_handler(channel_ids[channel], IRQ_FALL);
mbed_official 580:3c14cb9b87c5 57 }
mbed_official 580:3c14cb9b87c5 58 CMSDK_GPIO_1->INTCLEAR = ch_bit;
mbed_official 580:3c14cb9b87c5 59 }
mbed_official 580:3c14cb9b87c5 60 }
mbed_official 580:3c14cb9b87c5 61
mbed_official 580:3c14cb9b87c5 62 void gpio0_irq0(void) {handle_interrupt_in(0);}
mbed_official 580:3c14cb9b87c5 63 void gpio0_irq1(void) {handle_interrupt_in(1);}
mbed_official 580:3c14cb9b87c5 64 void gpio0_irq2(void) {handle_interrupt_in(2);}
mbed_official 580:3c14cb9b87c5 65 void gpio0_irq3(void) {handle_interrupt_in(3);}
mbed_official 580:3c14cb9b87c5 66 void gpio0_irq4(void) {handle_interrupt_in(4);}
mbed_official 580:3c14cb9b87c5 67 void gpio0_irq5(void) {handle_interrupt_in(5);}
mbed_official 580:3c14cb9b87c5 68 void gpio0_irq6(void) {handle_interrupt_in(6);}
mbed_official 580:3c14cb9b87c5 69 void gpio0_irq7(void) {handle_interrupt_in(7);}
mbed_official 580:3c14cb9b87c5 70 void gpio0_irq8(void) {handle_interrupt_in(8);}
mbed_official 580:3c14cb9b87c5 71 void gpio0_irq9(void) {handle_interrupt_in(9);}
mbed_official 580:3c14cb9b87c5 72 void gpio0_irq10(void) {handle_interrupt_in(10);}
mbed_official 580:3c14cb9b87c5 73 void gpio0_irq11(void) {handle_interrupt_in(11);}
mbed_official 580:3c14cb9b87c5 74 void gpio0_irq12(void) {handle_interrupt_in(12);}
mbed_official 580:3c14cb9b87c5 75 void gpio0_irq13(void) {handle_interrupt_in(13);}
mbed_official 580:3c14cb9b87c5 76 void gpio0_irq14(void) {handle_interrupt_in(14);}
mbed_official 580:3c14cb9b87c5 77 void gpio0_irq15(void) {handle_interrupt_in(15);}
mbed_official 580:3c14cb9b87c5 78 void gpio1_irq0(void) {handle_interrupt_in(16);}
mbed_official 580:3c14cb9b87c5 79 void gpio1_irq1(void) {handle_interrupt_in(17);}
mbed_official 580:3c14cb9b87c5 80 void gpio1_irq2(void) {handle_interrupt_in(18);}
mbed_official 580:3c14cb9b87c5 81 void gpio1_irq3(void) {handle_interrupt_in(19);}
mbed_official 580:3c14cb9b87c5 82 void gpio1_irq4(void) {handle_interrupt_in(20);}
mbed_official 580:3c14cb9b87c5 83 void gpio1_irq5(void) {handle_interrupt_in(21);}
mbed_official 580:3c14cb9b87c5 84 void gpio1_irq6(void) {handle_interrupt_in(22);}
mbed_official 580:3c14cb9b87c5 85 void gpio1_irq7(void) {handle_interrupt_in(23);}
mbed_official 580:3c14cb9b87c5 86 void gpio1_irq8(void) {handle_interrupt_in(24);}
mbed_official 580:3c14cb9b87c5 87 void gpio1_irq9(void) {handle_interrupt_in(25);}
mbed_official 580:3c14cb9b87c5 88 void gpio1_irq10(void) {handle_interrupt_in(26);}
mbed_official 580:3c14cb9b87c5 89 void gpio1_irq11(void) {handle_interrupt_in(27);}
mbed_official 580:3c14cb9b87c5 90 void gpio1_irq12(void) {handle_interrupt_in(28);}
mbed_official 580:3c14cb9b87c5 91 void gpio1_irq13(void) {handle_interrupt_in(29);}
mbed_official 580:3c14cb9b87c5 92 void gpio1_irq14(void) {handle_interrupt_in(30);}
mbed_official 580:3c14cb9b87c5 93 void gpio1_irq15(void) {handle_interrupt_in(31);}
mbed_official 580:3c14cb9b87c5 94
mbed_official 580:3c14cb9b87c5 95
mbed_official 580:3c14cb9b87c5 96 int gpio_irq_init(gpio_irq_t *obj, PinName pin, gpio_irq_handler handler, uint32_t id) {
mbed_official 580:3c14cb9b87c5 97 if (pin == NC) {return -1;}
mbed_official 580:3c14cb9b87c5 98 else {
mbed_official 580:3c14cb9b87c5 99
mbed_official 580:3c14cb9b87c5 100 irq_handler = handler;
mbed_official 580:3c14cb9b87c5 101
mbed_official 580:3c14cb9b87c5 102 int found_free_channel = 0;
mbed_official 580:3c14cb9b87c5 103 int i = 0;
mbed_official 580:3c14cb9b87c5 104 for (i=0; i<CHANNEL_NUM; i++) {
mbed_official 580:3c14cb9b87c5 105 if (channel_ids[i] == 0) {
mbed_official 580:3c14cb9b87c5 106 channel_ids[i] = id;
mbed_official 580:3c14cb9b87c5 107 obj->ch = i;
mbed_official 580:3c14cb9b87c5 108 found_free_channel = 1;
mbed_official 580:3c14cb9b87c5 109 break;
mbed_official 580:3c14cb9b87c5 110 }
mbed_official 580:3c14cb9b87c5 111 }
mbed_official 580:3c14cb9b87c5 112 if (!found_free_channel) return -1;
mbed_official 580:3c14cb9b87c5 113
mbed_official 580:3c14cb9b87c5 114
mbed_official 580:3c14cb9b87c5 115 /* To select a pin for any of the eight pin interrupts, write the pin number
mbed_official 580:3c14cb9b87c5 116 * as 0 to 23 for pins PIO0_0 to PIO0_23 and 24 to 55.
mbed_official 580:3c14cb9b87c5 117 * @see: mbed_capi/PinNames.h
mbed_official 580:3c14cb9b87c5 118 */
mbed_official 580:3c14cb9b87c5 119 if (pin <16)
mbed_official 580:3c14cb9b87c5 120 {
mbed_official 580:3c14cb9b87c5 121 CMSDK_GPIO_0->INTENSET |= (0x1 << pin);
mbed_official 580:3c14cb9b87c5 122 }
mbed_official 580:3c14cb9b87c5 123
mbed_official 580:3c14cb9b87c5 124 if (pin >= 16)
mbed_official 580:3c14cb9b87c5 125 {
mbed_official 580:3c14cb9b87c5 126 CMSDK_GPIO_1->INTENSET |= (0x1 << pin);
mbed_official 580:3c14cb9b87c5 127 }
mbed_official 580:3c14cb9b87c5 128
mbed_official 580:3c14cb9b87c5 129 void (*channels_irq)(void) = NULL;
mbed_official 580:3c14cb9b87c5 130 switch (obj->ch) {
mbed_official 580:3c14cb9b87c5 131 case 0: channels_irq = &gpio0_irq0; break;
mbed_official 580:3c14cb9b87c5 132 case 1: channels_irq = &gpio0_irq1; break;
mbed_official 580:3c14cb9b87c5 133 case 2: channels_irq = &gpio0_irq2; break;
mbed_official 580:3c14cb9b87c5 134 case 3: channels_irq = &gpio0_irq3; break;
mbed_official 580:3c14cb9b87c5 135 case 4: channels_irq = &gpio0_irq4; break;
mbed_official 580:3c14cb9b87c5 136 case 5: channels_irq = &gpio0_irq5; break;
mbed_official 580:3c14cb9b87c5 137 case 6: channels_irq = &gpio0_irq6; break;
mbed_official 580:3c14cb9b87c5 138 case 7: channels_irq = &gpio0_irq7; break;
mbed_official 580:3c14cb9b87c5 139 case 8: channels_irq = &gpio0_irq8; break;
mbed_official 580:3c14cb9b87c5 140 case 9: channels_irq = &gpio0_irq9; break;
mbed_official 580:3c14cb9b87c5 141 case 10: channels_irq = &gpio0_irq10; break;
mbed_official 580:3c14cb9b87c5 142 case 11: channels_irq = &gpio0_irq11; break;
mbed_official 580:3c14cb9b87c5 143 case 12: channels_irq = &gpio0_irq12; break;
mbed_official 580:3c14cb9b87c5 144 case 13: channels_irq = &gpio0_irq13; break;
mbed_official 580:3c14cb9b87c5 145 case 14: channels_irq = &gpio0_irq14; break;
mbed_official 580:3c14cb9b87c5 146 case 15: channels_irq = &gpio0_irq15; break;
mbed_official 580:3c14cb9b87c5 147 case 16: channels_irq = &gpio1_irq0; break;
mbed_official 580:3c14cb9b87c5 148 case 17: channels_irq = &gpio1_irq1; break;
mbed_official 580:3c14cb9b87c5 149 case 18: channels_irq = &gpio1_irq2; break;
mbed_official 580:3c14cb9b87c5 150 case 19: channels_irq = &gpio1_irq3; break;
mbed_official 580:3c14cb9b87c5 151 case 20: channels_irq = &gpio1_irq4; break;
mbed_official 580:3c14cb9b87c5 152 case 21: channels_irq = &gpio1_irq5; break;
mbed_official 580:3c14cb9b87c5 153 case 22: channels_irq = &gpio1_irq6; break;
mbed_official 580:3c14cb9b87c5 154 case 23: channels_irq = &gpio1_irq7; break;
mbed_official 580:3c14cb9b87c5 155 case 24: channels_irq = &gpio1_irq8; break;
mbed_official 580:3c14cb9b87c5 156 case 25: channels_irq = &gpio1_irq9; break;
mbed_official 580:3c14cb9b87c5 157 case 26: channels_irq = &gpio1_irq10; break;
mbed_official 580:3c14cb9b87c5 158 case 27: channels_irq = &gpio1_irq11; break;
mbed_official 580:3c14cb9b87c5 159 case 28: channels_irq = &gpio1_irq12; break;
mbed_official 580:3c14cb9b87c5 160 case 29: channels_irq = &gpio1_irq13; break;
mbed_official 580:3c14cb9b87c5 161 case 30: channels_irq = &gpio1_irq14; break;
mbed_official 580:3c14cb9b87c5 162 case 31: channels_irq = &gpio1_irq15; break;
mbed_official 580:3c14cb9b87c5 163
mbed_official 580:3c14cb9b87c5 164 }
mbed_official 580:3c14cb9b87c5 165 NVIC_SetVector((IRQn_Type)(PININT_IRQ + obj->ch), (uint32_t)channels_irq);
mbed_official 580:3c14cb9b87c5 166 NVIC_EnableIRQ((IRQn_Type)(PININT_IRQ + obj->ch));
mbed_official 580:3c14cb9b87c5 167
mbed_official 580:3c14cb9b87c5 168 return 0;
mbed_official 580:3c14cb9b87c5 169 }
mbed_official 580:3c14cb9b87c5 170 }
mbed_official 580:3c14cb9b87c5 171
mbed_official 580:3c14cb9b87c5 172 void gpio_irq_free(gpio_irq_t *obj) {
mbed_official 580:3c14cb9b87c5 173 }
mbed_official 580:3c14cb9b87c5 174
mbed_official 580:3c14cb9b87c5 175 void gpio_irq_set(gpio_irq_t *obj, gpio_irq_event event, uint32_t enable) {
mbed_official 580:3c14cb9b87c5 176 unsigned int ch_bit = (1 << obj->ch);
mbed_official 580:3c14cb9b87c5 177
mbed_official 580:3c14cb9b87c5 178 // Clear interrupt
mbed_official 580:3c14cb9b87c5 179 if (obj->ch <16)
mbed_official 580:3c14cb9b87c5 180 {
mbed_official 580:3c14cb9b87c5 181 if (!(CMSDK_GPIO_0->INTTYPESET & ch_bit))
mbed_official 580:3c14cb9b87c5 182 {
mbed_official 580:3c14cb9b87c5 183 CMSDK_GPIO_0->INTCLEAR = ch_bit;
mbed_official 580:3c14cb9b87c5 184 }
mbed_official 580:3c14cb9b87c5 185 }
mbed_official 580:3c14cb9b87c5 186 if (obj->ch >= 16)
mbed_official 580:3c14cb9b87c5 187 {
mbed_official 580:3c14cb9b87c5 188 if (!(CMSDK_GPIO_1->INTTYPESET & ch_bit))
mbed_official 580:3c14cb9b87c5 189 {
mbed_official 580:3c14cb9b87c5 190 CMSDK_GPIO_1->INTCLEAR = ch_bit;
mbed_official 580:3c14cb9b87c5 191 }
mbed_official 580:3c14cb9b87c5 192 }
mbed_official 580:3c14cb9b87c5 193
mbed_official 580:3c14cb9b87c5 194 // Edge trigger
mbed_official 580:3c14cb9b87c5 195 if (obj->ch <16)
mbed_official 580:3c14cb9b87c5 196 {
mbed_official 580:3c14cb9b87c5 197 CMSDK_GPIO_0->INTTYPESET &= ch_bit;
mbed_official 580:3c14cb9b87c5 198 if (event == IRQ_RISE) {
mbed_official 580:3c14cb9b87c5 199 CMSDK_GPIO_0->INTPOLSET |= ch_bit;
mbed_official 580:3c14cb9b87c5 200 if (enable) {
mbed_official 580:3c14cb9b87c5 201 CMSDK_GPIO_0->INTENSET |= ch_bit;
mbed_official 580:3c14cb9b87c5 202 } else {
mbed_official 580:3c14cb9b87c5 203 CMSDK_GPIO_0->INTENCLR |= ch_bit;
mbed_official 580:3c14cb9b87c5 204 }
mbed_official 580:3c14cb9b87c5 205 } else {
mbed_official 580:3c14cb9b87c5 206 CMSDK_GPIO_0->INTPOLCLR |= ch_bit;
mbed_official 580:3c14cb9b87c5 207 if (enable) {
mbed_official 580:3c14cb9b87c5 208 CMSDK_GPIO_0->INTENSET |= ch_bit;
mbed_official 580:3c14cb9b87c5 209 } else {
mbed_official 580:3c14cb9b87c5 210 CMSDK_GPIO_0->INTENCLR |= ch_bit;
mbed_official 580:3c14cb9b87c5 211 }
mbed_official 580:3c14cb9b87c5 212 }
mbed_official 580:3c14cb9b87c5 213 }
mbed_official 580:3c14cb9b87c5 214 if (obj->ch >= 16)
mbed_official 580:3c14cb9b87c5 215 {
mbed_official 580:3c14cb9b87c5 216 CMSDK_GPIO_1->INTTYPESET &= ch_bit;
mbed_official 580:3c14cb9b87c5 217 if (event == IRQ_RISE) {
mbed_official 580:3c14cb9b87c5 218 CMSDK_GPIO_1->INTPOLSET |= ch_bit;
mbed_official 580:3c14cb9b87c5 219 if (enable) {
mbed_official 580:3c14cb9b87c5 220 CMSDK_GPIO_1->INTENSET |= ch_bit;
mbed_official 580:3c14cb9b87c5 221 } else {
mbed_official 580:3c14cb9b87c5 222 CMSDK_GPIO_1->INTENCLR |= ch_bit;
mbed_official 580:3c14cb9b87c5 223 }
mbed_official 580:3c14cb9b87c5 224 } else {
mbed_official 580:3c14cb9b87c5 225 CMSDK_GPIO_1->INTPOLCLR |= ch_bit;
mbed_official 580:3c14cb9b87c5 226 if (enable) {
mbed_official 580:3c14cb9b87c5 227 CMSDK_GPIO_1->INTENSET |= ch_bit;
mbed_official 580:3c14cb9b87c5 228 } else {
mbed_official 580:3c14cb9b87c5 229 CMSDK_GPIO_1->INTENCLR |= ch_bit;
mbed_official 580:3c14cb9b87c5 230 }
mbed_official 580:3c14cb9b87c5 231 }
mbed_official 580:3c14cb9b87c5 232 }
mbed_official 580:3c14cb9b87c5 233 }
mbed_official 580:3c14cb9b87c5 234
mbed_official 580:3c14cb9b87c5 235 void gpio_irq_enable(gpio_irq_t *obj) {
mbed_official 580:3c14cb9b87c5 236 NVIC_EnableIRQ((IRQn_Type)(PININT_IRQ + obj->ch));
mbed_official 580:3c14cb9b87c5 237 }
mbed_official 580:3c14cb9b87c5 238
mbed_official 580:3c14cb9b87c5 239 void gpio_irq_disable(gpio_irq_t *obj) {
mbed_official 580:3c14cb9b87c5 240 NVIC_DisableIRQ((IRQn_Type)(PININT_IRQ + obj->ch));
mbed_official 580:3c14cb9b87c5 241 }