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targets/hal/TARGET_Freescale/TARGET_K20XX/serial_api.c@445:3312ed629f01, 2015-01-15 (annotated)

Committer:
mbed_official
Date:
Thu Jan 15 19:30:07 2015 +0000
Revision:
445:3312ed629f01
Synchronized with git revision e21c65041d9a718f866ed6438e5791b13f9c6d91



Full URL: https://github.com/mbedmicro/mbed/commit/e21c65041d9a718f866ed6438e5791b13f9c6d91/

Who changed what in which revision?

UserRevisionLine numberNew contents of line
mbed_official 445:3312ed629f01 1 /* mbed Microcontroller Library
mbed_official 445:3312ed629f01 2 * Copyright (c) 2006-2015 ARM Limited
mbed_official 445:3312ed629f01 3 *
mbed_official 445:3312ed629f01 4 * Licensed under the Apache License, Version 2.0 (the "License");
mbed_official 445:3312ed629f01 5 * you may not use this file except in compliance with the License.
mbed_official 445:3312ed629f01 6 * You may obtain a copy of the License at
mbed_official 445:3312ed629f01 7 *
mbed_official 445:3312ed629f01 8 * http://www.apache.org/licenses/LICENSE-2.0
mbed_official 445:3312ed629f01 9 *
mbed_official 445:3312ed629f01 10 * Unless required by applicable law or agreed to in writing, software
mbed_official 445:3312ed629f01 11 * distributed under the License is distributed on an "AS IS" BASIS,
mbed_official 445:3312ed629f01 12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
mbed_official 445:3312ed629f01 13 * See the License for the specific language governing permissions and
mbed_official 445:3312ed629f01 14 * limitations under the License.
mbed_official 445:3312ed629f01 15 */
mbed_official 445:3312ed629f01 16 #include "mbed_assert.h"
mbed_official 445:3312ed629f01 17 #include "serial_api.h"
mbed_official 445:3312ed629f01 18
mbed_official 445:3312ed629f01 19 #include <string.h>
mbed_official 445:3312ed629f01 20
mbed_official 445:3312ed629f01 21 #include "cmsis.h"
mbed_official 445:3312ed629f01 22 #include "pinmap.h"
mbed_official 445:3312ed629f01 23 #include "clk_freqs.h"
mbed_official 445:3312ed629f01 24 #include "PeripheralPins.h"
mbed_official 445:3312ed629f01 25
mbed_official 445:3312ed629f01 26 #define UART_NUM 3
mbed_official 445:3312ed629f01 27
mbed_official 445:3312ed629f01 28 static uint32_t serial_irq_ids[UART_NUM] = {0};
mbed_official 445:3312ed629f01 29 static uart_irq_handler irq_handler;
mbed_official 445:3312ed629f01 30
mbed_official 445:3312ed629f01 31 int stdio_uart_inited = 0;
mbed_official 445:3312ed629f01 32 serial_t stdio_uart;
mbed_official 445:3312ed629f01 33
mbed_official 445:3312ed629f01 34 void serial_init(serial_t *obj, PinName tx, PinName rx) {
mbed_official 445:3312ed629f01 35 // determine the UART to use
mbed_official 445:3312ed629f01 36 UARTName uart_tx = (UARTName)pinmap_peripheral(tx, PinMap_UART_TX);
mbed_official 445:3312ed629f01 37 UARTName uart_rx = (UARTName)pinmap_peripheral(rx, PinMap_UART_RX);
mbed_official 445:3312ed629f01 38 UARTName uart = (UARTName)pinmap_merge(uart_tx, uart_rx);
mbed_official 445:3312ed629f01 39 MBED_ASSERT((int)uart != NC);
mbed_official 445:3312ed629f01 40
mbed_official 445:3312ed629f01 41 obj->uart = (UART_Type *)uart;
mbed_official 445:3312ed629f01 42 // enable clk
mbed_official 445:3312ed629f01 43 switch (uart) {
mbed_official 445:3312ed629f01 44 case UART_0:
mbed_official 445:3312ed629f01 45 mcgpllfll_frequency();
mbed_official 445:3312ed629f01 46 SIM->SCGC4 |= SIM_SCGC4_UART0_MASK;
mbed_official 445:3312ed629f01 47 break;
mbed_official 445:3312ed629f01 48 case UART_1:
mbed_official 445:3312ed629f01 49 mcgpllfll_frequency();
mbed_official 445:3312ed629f01 50 SIM->SCGC4 |= SIM_SCGC4_UART1_MASK;
mbed_official 445:3312ed629f01 51 break;
mbed_official 445:3312ed629f01 52 case UART_2:
mbed_official 445:3312ed629f01 53 SIM->SCGC4 |= SIM_SCGC4_UART2_MASK;
mbed_official 445:3312ed629f01 54 break;
mbed_official 445:3312ed629f01 55 }
mbed_official 445:3312ed629f01 56 // Disable UART before changing registers
mbed_official 445:3312ed629f01 57 obj->uart->C2 &= ~(UART_C2_RE_MASK | UART_C2_TE_MASK);
mbed_official 445:3312ed629f01 58
mbed_official 445:3312ed629f01 59 switch (uart) {
mbed_official 445:3312ed629f01 60 case UART_0:
mbed_official 445:3312ed629f01 61 obj->index = 0;
mbed_official 445:3312ed629f01 62 break;
mbed_official 445:3312ed629f01 63 case UART_1:
mbed_official 445:3312ed629f01 64 obj->index = 1;
mbed_official 445:3312ed629f01 65 break;
mbed_official 445:3312ed629f01 66 case UART_2:
mbed_official 445:3312ed629f01 67 obj->index = 2;
mbed_official 445:3312ed629f01 68 break;
mbed_official 445:3312ed629f01 69 }
mbed_official 445:3312ed629f01 70
mbed_official 445:3312ed629f01 71 // set default baud rate and format
mbed_official 445:3312ed629f01 72 serial_baud (obj, 9600);
mbed_official 445:3312ed629f01 73 serial_format(obj, 8, ParityNone, 1);
mbed_official 445:3312ed629f01 74
mbed_official 445:3312ed629f01 75 // pinout the chosen uart
mbed_official 445:3312ed629f01 76 pinmap_pinout(tx, PinMap_UART_TX);
mbed_official 445:3312ed629f01 77 pinmap_pinout(rx, PinMap_UART_RX);
mbed_official 445:3312ed629f01 78
mbed_official 445:3312ed629f01 79 // set rx/tx pins in PullUp mode
mbed_official 445:3312ed629f01 80 if (tx != NC) {
mbed_official 445:3312ed629f01 81 pin_mode(tx, PullUp);
mbed_official 445:3312ed629f01 82 }
mbed_official 445:3312ed629f01 83 if (rx != NC) {
mbed_official 445:3312ed629f01 84 pin_mode(rx, PullUp);
mbed_official 445:3312ed629f01 85 }
mbed_official 445:3312ed629f01 86
mbed_official 445:3312ed629f01 87 obj->uart->C2 |= (UART_C2_RE_MASK | UART_C2_TE_MASK);
mbed_official 445:3312ed629f01 88
mbed_official 445:3312ed629f01 89 if (uart == STDIO_UART) {
mbed_official 445:3312ed629f01 90 stdio_uart_inited = 1;
mbed_official 445:3312ed629f01 91 memcpy(&stdio_uart, obj, sizeof(serial_t));
mbed_official 445:3312ed629f01 92 }
mbed_official 445:3312ed629f01 93 }
mbed_official 445:3312ed629f01 94
mbed_official 445:3312ed629f01 95 void serial_free(serial_t *obj) {
mbed_official 445:3312ed629f01 96 serial_irq_ids[obj->index] = 0;
mbed_official 445:3312ed629f01 97 }
mbed_official 445:3312ed629f01 98
mbed_official 445:3312ed629f01 99 void serial_baud(serial_t *obj, int baudrate) {
mbed_official 445:3312ed629f01 100 // save C2 state
mbed_official 445:3312ed629f01 101 uint8_t c2_state = (obj->uart->C2 & (UART_C2_RE_MASK | UART_C2_TE_MASK));
mbed_official 445:3312ed629f01 102
mbed_official 445:3312ed629f01 103 // Disable UART before changing registers
mbed_official 445:3312ed629f01 104 obj->uart->C2 &= ~(UART_C2_RE_MASK | UART_C2_TE_MASK);
mbed_official 445:3312ed629f01 105
mbed_official 445:3312ed629f01 106 uint32_t PCLK;
mbed_official 445:3312ed629f01 107 if (obj->uart != UART2) {
mbed_official 445:3312ed629f01 108 PCLK = mcgpllfll_frequency();
mbed_official 445:3312ed629f01 109 }
mbed_official 445:3312ed629f01 110 else {
mbed_official 445:3312ed629f01 111 PCLK = bus_frequency();
mbed_official 445:3312ed629f01 112 }
mbed_official 445:3312ed629f01 113
mbed_official 445:3312ed629f01 114 uint16_t DL = PCLK / (16 * baudrate);
mbed_official 445:3312ed629f01 115 uint32_t BRFA = (2 * PCLK) / baudrate - 32 * DL;
mbed_official 445:3312ed629f01 116
mbed_official 445:3312ed629f01 117 // set BDH and BDL
mbed_official 445:3312ed629f01 118 obj->uart->BDH = (obj->uart->BDH & ~(0x1f)) | ((DL >> 8) & 0x1f);
mbed_official 445:3312ed629f01 119 obj->uart->BDL = (obj->uart->BDL & ~(0xff)) | ((DL >> 0) & 0xff);
mbed_official 445:3312ed629f01 120
mbed_official 445:3312ed629f01 121 obj->uart->C4 &= ~0x1F;
mbed_official 445:3312ed629f01 122 obj->uart->C4 |= BRFA & 0x1F;
mbed_official 445:3312ed629f01 123
mbed_official 445:3312ed629f01 124 // restore C2 state
mbed_official 445:3312ed629f01 125 obj->uart->C2 |= c2_state;
mbed_official 445:3312ed629f01 126 }
mbed_official 445:3312ed629f01 127
mbed_official 445:3312ed629f01 128 void serial_format(serial_t *obj, int data_bits, SerialParity parity, int stop_bits) {
mbed_official 445:3312ed629f01 129 MBED_ASSERT((stop_bits == 1) || (stop_bits == 2));
mbed_official 445:3312ed629f01 130 MBED_ASSERT((parity == ParityNone) || (parity == ParityOdd) || (parity == ParityEven));
mbed_official 445:3312ed629f01 131 MBED_ASSERT((data_bits == 8) || (data_bits == 9));
mbed_official 445:3312ed629f01 132
mbed_official 445:3312ed629f01 133 // save C2 state
mbed_official 445:3312ed629f01 134 uint32_t c2_state = (obj->uart->C2 & (UART_C2_RE_MASK | UART_C2_TE_MASK));
mbed_official 445:3312ed629f01 135
mbed_official 445:3312ed629f01 136 // Disable UART before changing registers
mbed_official 445:3312ed629f01 137 obj->uart->C2 &= ~(UART_C2_RE_MASK | UART_C2_TE_MASK);
mbed_official 445:3312ed629f01 138
mbed_official 445:3312ed629f01 139 // 8 data bits = 0 ... 9 data bits = 1
mbed_official 445:3312ed629f01 140 data_bits -= 8;
mbed_official 445:3312ed629f01 141
mbed_official 445:3312ed629f01 142 uint32_t parity_enable, parity_select;
mbed_official 445:3312ed629f01 143 switch (parity) {
mbed_official 445:3312ed629f01 144 case ParityNone:
mbed_official 445:3312ed629f01 145 parity_enable = 0;
mbed_official 445:3312ed629f01 146 parity_select = 0;
mbed_official 445:3312ed629f01 147 break;
mbed_official 445:3312ed629f01 148 case ParityOdd :
mbed_official 445:3312ed629f01 149 parity_enable = 1;
mbed_official 445:3312ed629f01 150 parity_select = 1;
mbed_official 445:3312ed629f01 151 data_bits++;
mbed_official 445:3312ed629f01 152 break;
mbed_official 445:3312ed629f01 153 case ParityEven:
mbed_official 445:3312ed629f01 154 parity_enable = 1;
mbed_official 445:3312ed629f01 155 parity_select = 0;
mbed_official 445:3312ed629f01 156 data_bits++;
mbed_official 445:3312ed629f01 157 break;
mbed_official 445:3312ed629f01 158 default:
mbed_official 445:3312ed629f01 159 break;
mbed_official 445:3312ed629f01 160 }
mbed_official 445:3312ed629f01 161
mbed_official 445:3312ed629f01 162 stop_bits -= 1;
mbed_official 445:3312ed629f01 163
mbed_official 445:3312ed629f01 164 uint32_t m10 = 0;
mbed_official 445:3312ed629f01 165
mbed_official 445:3312ed629f01 166 // 9 data bits + parity - only uart0 support
mbed_official 445:3312ed629f01 167 if (data_bits == 2) {
mbed_official 445:3312ed629f01 168 MBED_ASSERT(obj->index == 0);
mbed_official 445:3312ed629f01 169 data_bits = 0;
mbed_official 445:3312ed629f01 170 m10 = 1;
mbed_official 445:3312ed629f01 171 }
mbed_official 445:3312ed629f01 172
mbed_official 445:3312ed629f01 173 // data bits, parity and parity mode
mbed_official 445:3312ed629f01 174 obj->uart->C1 = ((data_bits << 4)
mbed_official 445:3312ed629f01 175 | (parity_enable << 1)
mbed_official 445:3312ed629f01 176 | (parity_select << 0));
mbed_official 445:3312ed629f01 177
mbed_official 445:3312ed629f01 178 //enable 10bit mode if needed
mbed_official 445:3312ed629f01 179 if (obj->index == 0) {
mbed_official 445:3312ed629f01 180 obj->uart->C4 &= ~UART_C4_M10_MASK;
mbed_official 445:3312ed629f01 181 obj->uart->C4 |= (m10 << UART_C4_M10_SHIFT);
mbed_official 445:3312ed629f01 182 }
mbed_official 445:3312ed629f01 183
mbed_official 445:3312ed629f01 184 // stop bits
mbed_official 445:3312ed629f01 185 obj->uart->BDH &= ~UART_BDH_SBR_MASK;
mbed_official 445:3312ed629f01 186 obj->uart->BDH |= (stop_bits << UART_BDH_SBR_SHIFT);
mbed_official 445:3312ed629f01 187
mbed_official 445:3312ed629f01 188 // restore C2 state
mbed_official 445:3312ed629f01 189 obj->uart->C2 |= c2_state;
mbed_official 445:3312ed629f01 190 }
mbed_official 445:3312ed629f01 191
mbed_official 445:3312ed629f01 192 /******************************************************************************
mbed_official 445:3312ed629f01 193 * INTERRUPTS HANDLING
mbed_official 445:3312ed629f01 194 ******************************************************************************/
mbed_official 445:3312ed629f01 195 static inline void uart_irq(uint8_t status, uint32_t index) {
mbed_official 445:3312ed629f01 196 if (serial_irq_ids[index] != 0) {
mbed_official 445:3312ed629f01 197 if (status & UART_S1_TDRE_MASK)
mbed_official 445:3312ed629f01 198 irq_handler(serial_irq_ids[index], TxIrq);
mbed_official 445:3312ed629f01 199
mbed_official 445:3312ed629f01 200 if (status & UART_S1_RDRF_MASK)
mbed_official 445:3312ed629f01 201 irq_handler(serial_irq_ids[index], RxIrq);
mbed_official 445:3312ed629f01 202 }
mbed_official 445:3312ed629f01 203 }
mbed_official 445:3312ed629f01 204
mbed_official 445:3312ed629f01 205 void uart0_irq() {uart_irq(UART0->S1, 0);}
mbed_official 445:3312ed629f01 206 void uart1_irq() {uart_irq(UART1->S1, 1);}
mbed_official 445:3312ed629f01 207 void uart2_irq() {uart_irq(UART2->S1, 2);}
mbed_official 445:3312ed629f01 208
mbed_official 445:3312ed629f01 209 void serial_irq_handler(serial_t *obj, uart_irq_handler handler, uint32_t id) {
mbed_official 445:3312ed629f01 210 irq_handler = handler;
mbed_official 445:3312ed629f01 211 serial_irq_ids[obj->index] = id;
mbed_official 445:3312ed629f01 212 }
mbed_official 445:3312ed629f01 213
mbed_official 445:3312ed629f01 214 void serial_irq_set(serial_t *obj, SerialIrq irq, uint32_t enable) {
mbed_official 445:3312ed629f01 215 IRQn_Type irq_n = (IRQn_Type)0;
mbed_official 445:3312ed629f01 216 uint32_t vector = 0;
mbed_official 445:3312ed629f01 217 switch ((int)obj->uart) {
mbed_official 445:3312ed629f01 218 case UART_0:
mbed_official 445:3312ed629f01 219 irq_n=UART0_RX_TX_IRQn;
mbed_official 445:3312ed629f01 220 vector = (uint32_t)&uart0_irq;
mbed_official 445:3312ed629f01 221 break;
mbed_official 445:3312ed629f01 222 case UART_1:
mbed_official 445:3312ed629f01 223 irq_n=UART1_RX_TX_IRQn;
mbed_official 445:3312ed629f01 224 vector = (uint32_t)&uart1_irq;
mbed_official 445:3312ed629f01 225 break;
mbed_official 445:3312ed629f01 226 case UART_2:
mbed_official 445:3312ed629f01 227 irq_n=UART2_RX_TX_IRQn;
mbed_official 445:3312ed629f01 228 vector = (uint32_t)&uart2_irq;
mbed_official 445:3312ed629f01 229 break;
mbed_official 445:3312ed629f01 230 }
mbed_official 445:3312ed629f01 231
mbed_official 445:3312ed629f01 232 if (enable) {
mbed_official 445:3312ed629f01 233 switch (irq) {
mbed_official 445:3312ed629f01 234 case RxIrq:
mbed_official 445:3312ed629f01 235 obj->uart->C2 |= (UART_C2_RIE_MASK);
mbed_official 445:3312ed629f01 236 break;
mbed_official 445:3312ed629f01 237 case TxIrq:
mbed_official 445:3312ed629f01 238 obj->uart->C2 |= (UART_C2_TIE_MASK);
mbed_official 445:3312ed629f01 239 break;
mbed_official 445:3312ed629f01 240 }
mbed_official 445:3312ed629f01 241 NVIC_SetVector(irq_n, vector);
mbed_official 445:3312ed629f01 242 NVIC_EnableIRQ(irq_n);
mbed_official 445:3312ed629f01 243
mbed_official 445:3312ed629f01 244 } else { // disable
mbed_official 445:3312ed629f01 245 int all_disabled = 0;
mbed_official 445:3312ed629f01 246 SerialIrq other_irq = (irq == RxIrq) ? (TxIrq) : (RxIrq);
mbed_official 445:3312ed629f01 247 switch (irq) {
mbed_official 445:3312ed629f01 248 case RxIrq:
mbed_official 445:3312ed629f01 249 obj->uart->C2 &= ~(UART_C2_RIE_MASK);
mbed_official 445:3312ed629f01 250 break;
mbed_official 445:3312ed629f01 251 case TxIrq:
mbed_official 445:3312ed629f01 252 obj->uart->C2 &= ~(UART_C2_TIE_MASK);
mbed_official 445:3312ed629f01 253 break;
mbed_official 445:3312ed629f01 254 }
mbed_official 445:3312ed629f01 255 switch (other_irq) {
mbed_official 445:3312ed629f01 256 case RxIrq:
mbed_official 445:3312ed629f01 257 all_disabled = (obj->uart->C2 & (UART_C2_RIE_MASK)) == 0;
mbed_official 445:3312ed629f01 258 break;
mbed_official 445:3312ed629f01 259 case TxIrq:
mbed_official 445:3312ed629f01 260 all_disabled = (obj->uart->C2 & (UART_C2_TIE_MASK)) == 0;
mbed_official 445:3312ed629f01 261 break;
mbed_official 445:3312ed629f01 262 }
mbed_official 445:3312ed629f01 263 if (all_disabled)
mbed_official 445:3312ed629f01 264 NVIC_DisableIRQ(irq_n);
mbed_official 445:3312ed629f01 265 }
mbed_official 445:3312ed629f01 266 }
mbed_official 445:3312ed629f01 267
mbed_official 445:3312ed629f01 268 int serial_getc(serial_t *obj) {
mbed_official 445:3312ed629f01 269 while (!serial_readable(obj));
mbed_official 445:3312ed629f01 270 return obj->uart->D;
mbed_official 445:3312ed629f01 271 }
mbed_official 445:3312ed629f01 272
mbed_official 445:3312ed629f01 273 void serial_putc(serial_t *obj, int c) {
mbed_official 445:3312ed629f01 274 while (!serial_writable(obj));
mbed_official 445:3312ed629f01 275 obj->uart->D = c;
mbed_official 445:3312ed629f01 276 }
mbed_official 445:3312ed629f01 277
mbed_official 445:3312ed629f01 278 int serial_readable(serial_t *obj) {
mbed_official 445:3312ed629f01 279
mbed_official 445:3312ed629f01 280 return (obj->uart->S1 & UART_S1_RDRF_MASK);
mbed_official 445:3312ed629f01 281 }
mbed_official 445:3312ed629f01 282
mbed_official 445:3312ed629f01 283 int serial_writable(serial_t *obj) {
mbed_official 445:3312ed629f01 284
mbed_official 445:3312ed629f01 285 return (obj->uart->S1 & UART_S1_TDRE_MASK);
mbed_official 445:3312ed629f01 286 }
mbed_official 445:3312ed629f01 287
mbed_official 445:3312ed629f01 288 void serial_clear(serial_t *obj) {
mbed_official 445:3312ed629f01 289 }
mbed_official 445:3312ed629f01 290
mbed_official 445:3312ed629f01 291 void serial_pinout_tx(PinName tx) {
mbed_official 445:3312ed629f01 292 pinmap_pinout(tx, PinMap_UART_TX);
mbed_official 445:3312ed629f01 293 }
mbed_official 445:3312ed629f01 294
mbed_official 445:3312ed629f01 295 void serial_break_set(serial_t *obj) {
mbed_official 445:3312ed629f01 296 obj->uart->C2 |= UART_C2_SBK_MASK;
mbed_official 445:3312ed629f01 297 }
mbed_official 445:3312ed629f01 298
mbed_official 445:3312ed629f01 299 void serial_break_clear(serial_t *obj) {
mbed_official 445:3312ed629f01 300 obj->uart->C2 &= ~UART_C2_SBK_MASK;
mbed_official 445:3312ed629f01 301 }