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targets/hal/TARGET_STM/TARGET_STM32F1/gpio_irq_api.c@603:f00c7e78e8b4, 2015-08-09 (annotated)

Committer:
HiAlgoBoost
Date:
Sun Aug 09 05:18:54 2015 +0000
Revision:
603:f00c7e78e8b4
Parent:
508:4f5903e025e6 
Evening of August 8th version

Who changed what in which revision?

UserRevisionLine numberNew contents of line
mbed_official 60:142c6c6f5949 1 /* mbed Microcontroller Library
mbed_official 70:c1fbde68b492 2 *******************************************************************************
mbed_official 70:c1fbde68b492 3 * Copyright (c) 2014, STMicroelectronics
mbed_official 70:c1fbde68b492 4 * All rights reserved.
mbed_official 60:142c6c6f5949 5 *
mbed_official 70:c1fbde68b492 6 * Redistribution and use in source and binary forms, with or without
mbed_official 70:c1fbde68b492 7 * modification, are permitted provided that the following conditions are met:
mbed_official 60:142c6c6f5949 8 *
mbed_official 70:c1fbde68b492 9 * 1. Redistributions of source code must retain the above copyright notice,
mbed_official 70:c1fbde68b492 10 * this list of conditions and the following disclaimer.
mbed_official 70:c1fbde68b492 11 * 2. Redistributions in binary form must reproduce the above copyright notice,
mbed_official 70:c1fbde68b492 12 * this list of conditions and the following disclaimer in the documentation
mbed_official 70:c1fbde68b492 13 * and/or other materials provided with the distribution.
mbed_official 70:c1fbde68b492 14 * 3. Neither the name of STMicroelectronics nor the names of its contributors
mbed_official 70:c1fbde68b492 15 * may be used to endorse or promote products derived from this software
mbed_official 70:c1fbde68b492 16 * without specific prior written permission.
mbed_official 60:142c6c6f5949 17 *
mbed_official 70:c1fbde68b492 18 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
mbed_official 70:c1fbde68b492 19 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
mbed_official 70:c1fbde68b492 20 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
mbed_official 70:c1fbde68b492 21 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
mbed_official 70:c1fbde68b492 22 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
mbed_official 70:c1fbde68b492 23 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
mbed_official 70:c1fbde68b492 24 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
mbed_official 70:c1fbde68b492 25 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
mbed_official 70:c1fbde68b492 26 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
mbed_official 70:c1fbde68b492 27 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
mbed_official 70:c1fbde68b492 28 *******************************************************************************
mbed_official 60:142c6c6f5949 29 */
mbed_official 60:142c6c6f5949 30 #include <stddef.h>
mbed_official 60:142c6c6f5949 31 #include "cmsis.h"
mbed_official 60:142c6c6f5949 32 #include "gpio_irq_api.h"
mbed_official 76:aeb1df146756 33 #include "pinmap.h"
mbed_official 285:31249416b6f9 34 #include "mbed_error.h"
mbed_official 60:142c6c6f5949 35
mbed_official 60:142c6c6f5949 36 #define EDGE_NONE (0)
mbed_official 60:142c6c6f5949 37 #define EDGE_RISE (1)
mbed_official 60:142c6c6f5949 38 #define EDGE_FALL (2)
mbed_official 60:142c6c6f5949 39 #define EDGE_BOTH (3)
mbed_official 60:142c6c6f5949 40
mbed_official 489:119543c9f674 41 // Number of EXTI irq vectors (EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI5_9, EXTI10_15)
mbed_official 156:38b9eb24e1d1 42 #define CHANNEL_NUM (7)
mbed_official 489:119543c9f674 43
mbed_official 454:a07e52520545 44 // Max pins for one line (max with EXTI10_15)
mbed_official 454:a07e52520545 45 #define MAX_PIN_LINE (6)
mbed_official 60:142c6c6f5949 46
mbed_official 454:a07e52520545 47 typedef struct gpio_channel {
mbed_official 454:a07e52520545 48 uint32_t pin_mask; // bitmask representing which pins are configured for receiving interrupts
mbed_official 454:a07e52520545 49 uint32_t channel_ids[MAX_PIN_LINE]; // mbed "gpio_irq_t gpio_irq" field of instance
mbed_official 454:a07e52520545 50 uint32_t channel_gpio[MAX_PIN_LINE]; // base address of gpio port group
mbed_official 454:a07e52520545 51 uint32_t channel_pin[MAX_PIN_LINE]; // pin number in port group
mbed_official 454:a07e52520545 52 } gpio_channel_t;
mbed_official 454:a07e52520545 53
mbed_official 454:a07e52520545 54 static gpio_channel_t channels[CHANNEL_NUM] = {
mbed_official 454:a07e52520545 55 {.pin_mask = 0},
mbed_official 454:a07e52520545 56 {.pin_mask = 0},
mbed_official 454:a07e52520545 57 {.pin_mask = 0},
mbed_official 454:a07e52520545 58 {.pin_mask = 0},
mbed_official 454:a07e52520545 59 {.pin_mask = 0},
mbed_official 454:a07e52520545 60 {.pin_mask = 0},
mbed_official 454:a07e52520545 61 {.pin_mask = 0}
mbed_official 454:a07e52520545 62 };
mbed_official 454:a07e52520545 63
mbed_official 454:a07e52520545 64 // Used to return the index for channels array.
mbed_official 454:a07e52520545 65 static uint32_t pin_base_nr[16] = {
mbed_official 454:a07e52520545 66 // EXTI0
mbed_official 454:a07e52520545 67 0, // pin 0
mbed_official 454:a07e52520545 68 // EXTI1
mbed_official 454:a07e52520545 69 0, // pin 1
mbed_official 454:a07e52520545 70 // EXTI2
mbed_official 454:a07e52520545 71 0, // pin 2
mbed_official 454:a07e52520545 72 // EXTI3
mbed_official 454:a07e52520545 73 0, // pin 3
mbed_official 454:a07e52520545 74 // EXTI4
mbed_official 454:a07e52520545 75 0, // pin 4
mbed_official 454:a07e52520545 76 // EXTI5_9
mbed_official 454:a07e52520545 77 0, // pin 5
mbed_official 454:a07e52520545 78 1, // pin 6
mbed_official 454:a07e52520545 79 2, // pin 7
mbed_official 454:a07e52520545 80 3, // pin 8
mbed_official 454:a07e52520545 81 4, // pin 9
mbed_official 454:a07e52520545 82 // EXTI10_15
mbed_official 454:a07e52520545 83 0, // pin 10
mbed_official 454:a07e52520545 84 1, // pin 11
mbed_official 454:a07e52520545 85 2, // pin 12
mbed_official 454:a07e52520545 86 3, // pin 13
mbed_official 454:a07e52520545 87 4, // pin 14
mbed_official 454:a07e52520545 88 5 // pin 15
mbed_official 454:a07e52520545 89 };
mbed_official 60:142c6c6f5949 90
mbed_official 60:142c6c6f5949 91 static gpio_irq_handler irq_handler;
mbed_official 60:142c6c6f5949 92
mbed_official 454:a07e52520545 93 static void handle_interrupt_in(uint32_t irq_index, uint32_t max_num_pin_line)
mbed_official 402:09075a3b15e3 94 {
mbed_official 454:a07e52520545 95 gpio_channel_t *gpio_channel = &channels[irq_index];
mbed_official 454:a07e52520545 96 uint32_t gpio_idx;
mbed_official 454:a07e52520545 97
mbed_official 454:a07e52520545 98 for (gpio_idx = 0; gpio_idx < max_num_pin_line; gpio_idx++) {
mbed_official 454:a07e52520545 99 uint32_t current_mask = (1 << gpio_idx);
mbed_official 454:a07e52520545 100
mbed_official 454:a07e52520545 101 if (gpio_channel->pin_mask & current_mask) {
mbed_official 454:a07e52520545 102 // Retrieve the gpio and pin that generate the irq
mbed_official 454:a07e52520545 103 GPIO_TypeDef *gpio = (GPIO_TypeDef *)(gpio_channel->channel_gpio[gpio_idx]);
mbed_official 454:a07e52520545 104 uint32_t pin = (uint32_t)(1 << (gpio_channel->channel_pin[gpio_idx]));
mbed_official 156:38b9eb24e1d1 105
mbed_official 454:a07e52520545 106 // Clear interrupt flag
mbed_official 489:119543c9f674 107 if (__HAL_GPIO_EXTI_GET_FLAG(pin) != RESET) {
mbed_official 489:119543c9f674 108 __HAL_GPIO_EXTI_CLEAR_FLAG(pin);
mbed_official 454:a07e52520545 109
mbed_official 454:a07e52520545 110 if (gpio_channel->channel_ids[gpio_idx] == 0) continue;
mbed_official 174:8bb9f3a33240 111
mbed_official 454:a07e52520545 112 // Check which edge has generated the irq
mbed_official 454:a07e52520545 113 if ((gpio->IDR & pin) == 0) {
mbed_official 454:a07e52520545 114 irq_handler(gpio_channel->channel_ids[gpio_idx], IRQ_FALL);
mbed_official 454:a07e52520545 115 } else {
mbed_official 454:a07e52520545 116 irq_handler(gpio_channel->channel_ids[gpio_idx], IRQ_RISE);
mbed_official 454:a07e52520545 117 }
mbed_official 454:a07e52520545 118 }
mbed_official 454:a07e52520545 119 }
mbed_official 60:142c6c6f5949 120 }
mbed_official 60:142c6c6f5949 121 }
mbed_official 60:142c6c6f5949 122
mbed_official 454:a07e52520545 123 // EXTI line 0
mbed_official 402:09075a3b15e3 124 static void gpio_irq0(void)
mbed_official 402:09075a3b15e3 125 {
mbed_official 454:a07e52520545 126 handle_interrupt_in(0, 1);
mbed_official 174:8bb9f3a33240 127 }
mbed_official 454:a07e52520545 128
mbed_official 454:a07e52520545 129 // EXTI line 1
mbed_official 402:09075a3b15e3 130 static void gpio_irq1(void)
mbed_official 402:09075a3b15e3 131 {
mbed_official 454:a07e52520545 132 handle_interrupt_in(1, 1);
mbed_official 174:8bb9f3a33240 133 }
mbed_official 454:a07e52520545 134
mbed_official 454:a07e52520545 135 // EXTI line 2
mbed_official 402:09075a3b15e3 136 static void gpio_irq2(void)
mbed_official 402:09075a3b15e3 137 {
mbed_official 454:a07e52520545 138 handle_interrupt_in(2, 1);
mbed_official 174:8bb9f3a33240 139 }
mbed_official 454:a07e52520545 140
mbed_official 454:a07e52520545 141 // EXTI line 3
mbed_official 402:09075a3b15e3 142 static void gpio_irq3(void)
mbed_official 402:09075a3b15e3 143 {
mbed_official 454:a07e52520545 144 handle_interrupt_in(3, 1);
mbed_official 174:8bb9f3a33240 145 }
mbed_official 454:a07e52520545 146
mbed_official 454:a07e52520545 147 // EXTI line 4
mbed_official 402:09075a3b15e3 148 static void gpio_irq4(void)
mbed_official 402:09075a3b15e3 149 {
mbed_official 454:a07e52520545 150 handle_interrupt_in(4, 1);
mbed_official 174:8bb9f3a33240 151 }
mbed_official 454:a07e52520545 152
mbed_official 454:a07e52520545 153 // EXTI lines 5 to 9
mbed_official 402:09075a3b15e3 154 static void gpio_irq5(void)
mbed_official 402:09075a3b15e3 155 {
mbed_official 454:a07e52520545 156 handle_interrupt_in(5, 5);
mbed_official 174:8bb9f3a33240 157 }
mbed_official 454:a07e52520545 158
mbed_official 454:a07e52520545 159 // EXTI lines 10 to 15
mbed_official 402:09075a3b15e3 160 static void gpio_irq6(void)
mbed_official 402:09075a3b15e3 161 {
mbed_official 454:a07e52520545 162 handle_interrupt_in(6, 6);
mbed_official 174:8bb9f3a33240 163 }
mbed_official 76:aeb1df146756 164
mbed_official 76:aeb1df146756 165 extern uint32_t Set_GPIO_Clock(uint32_t port_idx);
mbed_official 60:142c6c6f5949 166
mbed_official 402:09075a3b15e3 167 int gpio_irq_init(gpio_irq_t *obj, PinName pin, gpio_irq_handler handler, uint32_t id)
mbed_official 402:09075a3b15e3 168 {
mbed_official 76:aeb1df146756 169 IRQn_Type irq_n = (IRQn_Type)0;
mbed_official 60:142c6c6f5949 170 uint32_t vector = 0;
mbed_official 76:aeb1df146756 171 uint32_t irq_index;
mbed_official 454:a07e52520545 172 gpio_channel_t *gpio_channel;
mbed_official 454:a07e52520545 173 uint32_t gpio_idx;
mbed_official 76:aeb1df146756 174
mbed_official 60:142c6c6f5949 175 if (pin == NC) return -1;
mbed_official 60:142c6c6f5949 176
mbed_official 76:aeb1df146756 177 uint32_t port_index = STM_PORT(pin);
mbed_official 76:aeb1df146756 178 uint32_t pin_index = STM_PIN(pin);
mbed_official 76:aeb1df146756 179
mbed_official 76:aeb1df146756 180 // Select irq number and interrupt routine
mbed_official 156:38b9eb24e1d1 181 switch (pin_index) {
mbed_official 156:38b9eb24e1d1 182 case 0:
mbed_official 156:38b9eb24e1d1 183 irq_n = EXTI0_IRQn;
mbed_official 60:142c6c6f5949 184 vector = (uint32_t)&gpio_irq0;
mbed_official 76:aeb1df146756 185 irq_index = 0;
mbed_official 60:142c6c6f5949 186 break;
mbed_official 156:38b9eb24e1d1 187 case 1:
mbed_official 156:38b9eb24e1d1 188 irq_n = EXTI1_IRQn;
mbed_official 76:aeb1df146756 189 vector = (uint32_t)&gpio_irq1;
mbed_official 76:aeb1df146756 190 irq_index = 1;
mbed_official 60:142c6c6f5949 191 break;
mbed_official 156:38b9eb24e1d1 192 case 2:
mbed_official 156:38b9eb24e1d1 193 irq_n = EXTI2_IRQn;
mbed_official 76:aeb1df146756 194 vector = (uint32_t)&gpio_irq2;
mbed_official 76:aeb1df146756 195 irq_index = 2;
mbed_official 76:aeb1df146756 196 break;
mbed_official 156:38b9eb24e1d1 197 case 3:
mbed_official 156:38b9eb24e1d1 198 irq_n = EXTI3_IRQn;
mbed_official 76:aeb1df146756 199 vector = (uint32_t)&gpio_irq3;
mbed_official 76:aeb1df146756 200 irq_index = 3;
mbed_official 60:142c6c6f5949 201 break;
mbed_official 156:38b9eb24e1d1 202 case 4:
mbed_official 156:38b9eb24e1d1 203 irq_n = EXTI4_IRQn;
mbed_official 156:38b9eb24e1d1 204 vector = (uint32_t)&gpio_irq4;
mbed_official 156:38b9eb24e1d1 205 irq_index = 4;
mbed_official 156:38b9eb24e1d1 206 break;
mbed_official 156:38b9eb24e1d1 207 case 5:
mbed_official 156:38b9eb24e1d1 208 case 6:
mbed_official 156:38b9eb24e1d1 209 case 7:
mbed_official 156:38b9eb24e1d1 210 case 8:
mbed_official 156:38b9eb24e1d1 211 case 9:
mbed_official 156:38b9eb24e1d1 212 irq_n = EXTI9_5_IRQn;
mbed_official 156:38b9eb24e1d1 213 vector = (uint32_t)&gpio_irq5;
mbed_official 156:38b9eb24e1d1 214 irq_index = 5;
mbed_official 156:38b9eb24e1d1 215 break;
mbed_official 156:38b9eb24e1d1 216 case 10:
mbed_official 156:38b9eb24e1d1 217 case 11:
mbed_official 156:38b9eb24e1d1 218 case 12:
mbed_official 156:38b9eb24e1d1 219 case 13:
mbed_official 156:38b9eb24e1d1 220 case 14:
mbed_official 156:38b9eb24e1d1 221 case 15:
mbed_official 156:38b9eb24e1d1 222 irq_n = EXTI15_10_IRQn;
mbed_official 156:38b9eb24e1d1 223 vector = (uint32_t)&gpio_irq6;
mbed_official 156:38b9eb24e1d1 224 irq_index = 6;
mbed_official 156:38b9eb24e1d1 225 break;
mbed_official 60:142c6c6f5949 226 default:
mbed_official 156:38b9eb24e1d1 227 error("InterruptIn error: pin not supported.\n");
mbed_official 60:142c6c6f5949 228 return -1;
mbed_official 60:142c6c6f5949 229 }
mbed_official 76:aeb1df146756 230
mbed_official 76:aeb1df146756 231 // Enable GPIO clock
mbed_official 76:aeb1df146756 232 uint32_t gpio_add = Set_GPIO_Clock(port_index);
mbed_official 174:8bb9f3a33240 233
mbed_official 489:119543c9f674 234 // Configure GPIO
mbed_official 489:119543c9f674 235 pin_function(pin, STM_PIN_DATA(STM_MODE_IT_FALLING, GPIO_NOPULL, 0));
mbed_official 60:142c6c6f5949 236
mbed_official 489:119543c9f674 237 // Enable EXTI interrupt
mbed_official 60:142c6c6f5949 238 NVIC_SetVector(irq_n, vector);
mbed_official 60:142c6c6f5949 239 NVIC_EnableIRQ(irq_n);
mbed_official 60:142c6c6f5949 240
mbed_official 76:aeb1df146756 241 // Save informations for future use
mbed_official 60:142c6c6f5949 242 obj->irq_n = irq_n;
mbed_official 76:aeb1df146756 243 obj->irq_index = irq_index;
mbed_official 60:142c6c6f5949 244 obj->event = EDGE_NONE;
mbed_official 454:a07e52520545 245 obj->pin = pin;
mbed_official 454:a07e52520545 246
mbed_official 454:a07e52520545 247 gpio_channel = &channels[irq_index];
mbed_official 454:a07e52520545 248 gpio_idx = pin_base_nr[pin_index];
mbed_official 454:a07e52520545 249 gpio_channel->pin_mask |= (1 << gpio_idx);
mbed_official 454:a07e52520545 250 gpio_channel->channel_ids[gpio_idx] = id;
mbed_official 454:a07e52520545 251 gpio_channel->channel_gpio[gpio_idx] = gpio_add;
mbed_official 454:a07e52520545 252 gpio_channel->channel_pin[gpio_idx] = pin_index;
mbed_official 174:8bb9f3a33240 253
mbed_official 174:8bb9f3a33240 254 irq_handler = handler;
mbed_official 174:8bb9f3a33240 255
mbed_official 60:142c6c6f5949 256 return 0;
mbed_official 60:142c6c6f5949 257 }
mbed_official 60:142c6c6f5949 258
mbed_official 402:09075a3b15e3 259 void gpio_irq_free(gpio_irq_t *obj)
mbed_official 402:09075a3b15e3 260 {
mbed_official 454:a07e52520545 261 gpio_channel_t *gpio_channel = &channels[obj->irq_index];
mbed_official 454:a07e52520545 262 uint32_t pin_index = STM_PIN(obj->pin);
mbed_official 454:a07e52520545 263 uint32_t gpio_idx = pin_base_nr[pin_index];
mbed_official 454:a07e52520545 264
mbed_official 454:a07e52520545 265 gpio_channel->pin_mask &= ~(1 << gpio_idx);
mbed_official 454:a07e52520545 266 gpio_channel->channel_ids[gpio_idx] = 0;
mbed_official 454:a07e52520545 267 gpio_channel->channel_gpio[gpio_idx] = 0;
mbed_official 454:a07e52520545 268 gpio_channel->channel_pin[gpio_idx] = 0;
mbed_official 454:a07e52520545 269
mbed_official 60:142c6c6f5949 270 // Disable EXTI line
mbed_official 489:119543c9f674 271 pin_function(obj->pin, STM_PIN_DATA(STM_MODE_INPUT, GPIO_NOPULL, 0));
mbed_official 60:142c6c6f5949 272 obj->event = EDGE_NONE;
mbed_official 60:142c6c6f5949 273 }
mbed_official 60:142c6c6f5949 274
mbed_official 402:09075a3b15e3 275 void gpio_irq_set(gpio_irq_t *obj, gpio_irq_event event, uint32_t enable)
mbed_official 402:09075a3b15e3 276 {
mbed_official 489:119543c9f674 277 uint32_t mode = STM_MODE_IT_EVT_RESET;
mbed_official 489:119543c9f674 278 uint32_t pull = GPIO_NOPULL;
mbed_official 174:8bb9f3a33240 279
mbed_official 331:098575c6d2c8 280 if (enable) {
mbed_official 331:098575c6d2c8 281 if (event == IRQ_RISE) {
mbed_official 331:098575c6d2c8 282 if ((obj->event == EDGE_FALL) || (obj->event == EDGE_BOTH)) {
mbed_official 489:119543c9f674 283 mode = STM_MODE_IT_RISING_FALLING;
mbed_official 331:098575c6d2c8 284 obj->event = EDGE_BOTH;
mbed_official 331:098575c6d2c8 285 } else { // NONE or RISE
mbed_official 489:119543c9f674 286 mode = STM_MODE_IT_RISING;
mbed_official 331:098575c6d2c8 287 obj->event = EDGE_RISE;
mbed_official 331:098575c6d2c8 288 }
mbed_official 331:098575c6d2c8 289 }
mbed_official 331:098575c6d2c8 290 if (event == IRQ_FALL) {
mbed_official 331:098575c6d2c8 291 if ((obj->event == EDGE_RISE) || (obj->event == EDGE_BOTH)) {
mbed_official 489:119543c9f674 292 mode = STM_MODE_IT_RISING_FALLING;
mbed_official 331:098575c6d2c8 293 obj->event = EDGE_BOTH;
mbed_official 331:098575c6d2c8 294 } else { // NONE or FALL
mbed_official 489:119543c9f674 295 mode = STM_MODE_IT_FALLING;
mbed_official 331:098575c6d2c8 296 obj->event = EDGE_FALL;
mbed_official 331:098575c6d2c8 297 }
mbed_official 60:142c6c6f5949 298 }
mbed_official 402:09075a3b15e3 299 } else { // Disable
mbed_official 331:098575c6d2c8 300 if (event == IRQ_RISE) {
mbed_official 331:098575c6d2c8 301 if ((obj->event == EDGE_FALL) || (obj->event == EDGE_BOTH)) {
mbed_official 489:119543c9f674 302 mode = STM_MODE_IT_FALLING;
mbed_official 331:098575c6d2c8 303 obj->event = EDGE_FALL;
mbed_official 331:098575c6d2c8 304 } else { // NONE or RISE
mbed_official 489:119543c9f674 305 mode = STM_MODE_IT_EVT_RESET;
mbed_official 331:098575c6d2c8 306 obj->event = EDGE_NONE;
mbed_official 331:098575c6d2c8 307 }
mbed_official 60:142c6c6f5949 308 }
mbed_official 331:098575c6d2c8 309 if (event == IRQ_FALL) {
mbed_official 331:098575c6d2c8 310 if ((obj->event == EDGE_RISE) || (obj->event == EDGE_BOTH)) {
mbed_official 489:119543c9f674 311 mode = STM_MODE_IT_RISING;
mbed_official 331:098575c6d2c8 312 obj->event = EDGE_RISE;
mbed_official 331:098575c6d2c8 313 } else { // NONE or FALL
mbed_official 489:119543c9f674 314 mode = STM_MODE_IT_EVT_RESET;
mbed_official 331:098575c6d2c8 315 obj->event = EDGE_NONE;
mbed_official 331:098575c6d2c8 316 }
mbed_official 402:09075a3b15e3 317 }
mbed_official 60:142c6c6f5949 318 }
mbed_official 174:8bb9f3a33240 319
mbed_official 489:119543c9f674 320 pin_function(obj->pin, STM_PIN_DATA(mode, pull, 0));
mbed_official 60:142c6c6f5949 321 }
mbed_official 60:142c6c6f5949 322
mbed_official 402:09075a3b15e3 323 void gpio_irq_enable(gpio_irq_t *obj)
mbed_official 402:09075a3b15e3 324 {
mbed_official 60:142c6c6f5949 325 NVIC_EnableIRQ(obj->irq_n);
mbed_official 60:142c6c6f5949 326 }
mbed_official 60:142c6c6f5949 327
mbed_official 402:09075a3b15e3 328 void gpio_irq_disable(gpio_irq_t *obj)
mbed_official 402:09075a3b15e3 329 {
mbed_official 60:142c6c6f5949 330 NVIC_DisableIRQ(obj->irq_n);
mbed_official 60:142c6c6f5949 331 obj->event = EDGE_NONE;
mbed_official 60:142c6c6f5949 332 }