GRT_FS2019_VoiceCoil / Mbed 2 deprecated GRT_VC_PIDT1

Control of VoiceCoil Lab#7

Dependencies:   mbed

EncoderCounter.cpp@2:91678e836872, 2019-05-24 (annotated)

Committer:
altb2
Date:
Fri May 24 10:06:51 2019 +0000
Revision:
2:91678e836872
Parent:
0:05dd1de8cc3f 
Final G3

Who changed what in which revision?

UserRevisionLine numberNew contents of line
altb2 0:05dd1de8cc3f 1 /*
altb2 0:05dd1de8cc3f 2 * EncoderCounter.cpp
altb2 0:05dd1de8cc3f 3 * Copyright (c) 2017, ZHAW
altb2 0:05dd1de8cc3f 4 * All rights reserved.
altb2 0:05dd1de8cc3f 5 */
altb2 0:05dd1de8cc3f 6
altb2 0:05dd1de8cc3f 7 #include "EncoderCounter.h"
altb2 0:05dd1de8cc3f 8
altb2 0:05dd1de8cc3f 9 using namespace std;
altb2 0:05dd1de8cc3f 10
altb2 0:05dd1de8cc3f 11 /**
altb2 0:05dd1de8cc3f 12 * Creates and initializes the driver to read the quadrature
altb2 0:05dd1de8cc3f 13 * encoder counter of the STM32 microcontroller.
altb2 0:05dd1de8cc3f 14 * @param a the input pin for the channel A.
altb2 0:05dd1de8cc3f 15 * @param b the input pin for the channel B.
altb2 0:05dd1de8cc3f 16 */
altb2 0:05dd1de8cc3f 17 EncoderCounter::EncoderCounter(PinName a, PinName b) {
altb2 0:05dd1de8cc3f 18
altb2 0:05dd1de8cc3f 19 // check pins
altb2 0:05dd1de8cc3f 20
altb2 0:05dd1de8cc3f 21 if ((a == PA_6) && (b == PC_7)) {
altb2 0:05dd1de8cc3f 22
altb2 0:05dd1de8cc3f 23 // pinmap OK for TIM3 CH1 and CH2
altb2 0:05dd1de8cc3f 24
altb2 0:05dd1de8cc3f 25 TIM = TIM3;
altb2 0:05dd1de8cc3f 26
altb2 0:05dd1de8cc3f 27 // configure reset and clock control registers
altb2 0:05dd1de8cc3f 28
altb2 0:05dd1de8cc3f 29 RCC->AHB1ENR |= RCC_AHB1ENR_GPIOCEN; // manually enable port C (port A enabled by mbed library)
altb2 0:05dd1de8cc3f 30
altb2 0:05dd1de8cc3f 31 // configure general purpose I/O registers
altb2 0:05dd1de8cc3f 32
altb2 0:05dd1de8cc3f 33 GPIOA->MODER &= ~GPIO_MODER_MODER6; // reset port A6
altb2 0:05dd1de8cc3f 34 GPIOA->MODER |= GPIO_MODER_MODER6_1; // set alternate mode of port A6
altb2 0:05dd1de8cc3f 35 GPIOA->PUPDR &= ~GPIO_PUPDR_PUPDR6; // reset pull-up/pull-down on port A6
altb2 0:05dd1de8cc3f 36 GPIOA->PUPDR |= GPIO_PUPDR_PUPDR6_1; // set input as pull-down
altb2 0:05dd1de8cc3f 37 GPIOA->AFR[0] &= ~(0xF << 4*6); // reset alternate function of port A6
altb2 0:05dd1de8cc3f 38 GPIOA->AFR[0] |= 2 << 4*6; // set alternate funtion 2 of port A6
altb2 0:05dd1de8cc3f 39
altb2 0:05dd1de8cc3f 40 GPIOC->MODER &= ~GPIO_MODER_MODER7; // reset port C7
altb2 0:05dd1de8cc3f 41 GPIOC->MODER |= GPIO_MODER_MODER7_1; // set alternate mode of port C7
altb2 0:05dd1de8cc3f 42 GPIOC->PUPDR &= ~GPIO_PUPDR_PUPDR7; // reset pull-up/pull-down on port C7
altb2 0:05dd1de8cc3f 43 GPIOC->PUPDR |= GPIO_PUPDR_PUPDR7_1; // set input as pull-down
altb2 0:05dd1de8cc3f 44 GPIOC->AFR[0] &= ~0xF0000000; // reset alternate function of port C7
altb2 0:05dd1de8cc3f 45 GPIOC->AFR[0] |= 2 << 4*7; // set alternate funtion 2 of port C7
altb2 0:05dd1de8cc3f 46
altb2 0:05dd1de8cc3f 47 // configure reset and clock control registers
altb2 0:05dd1de8cc3f 48
altb2 0:05dd1de8cc3f 49 RCC->APB1RSTR |= RCC_APB1RSTR_TIM3RST; //reset TIM3 controller
altb2 0:05dd1de8cc3f 50 RCC->APB1RSTR &= ~RCC_APB1RSTR_TIM3RST;
altb2 0:05dd1de8cc3f 51
altb2 0:05dd1de8cc3f 52 RCC->APB1ENR |= RCC_APB1ENR_TIM3EN; // TIM3 clock enable
altb2 0:05dd1de8cc3f 53
altb2 0:05dd1de8cc3f 54 } else if ((a == PB_6) && (b == PB_7)) {
altb2 0:05dd1de8cc3f 55
altb2 0:05dd1de8cc3f 56 // pinmap OK for TIM4 CH1 and CH2
altb2 0:05dd1de8cc3f 57
altb2 0:05dd1de8cc3f 58 TIM = TIM4;
altb2 0:05dd1de8cc3f 59
altb2 0:05dd1de8cc3f 60 // configure reset and clock control registers
altb2 0:05dd1de8cc3f 61
altb2 0:05dd1de8cc3f 62 RCC->AHB1ENR |= RCC_AHB1ENR_GPIOBEN; // manually enable port B (port A enabled by mbed library)
altb2 0:05dd1de8cc3f 63
altb2 0:05dd1de8cc3f 64 // configure general purpose I/O registers
altb2 0:05dd1de8cc3f 65
altb2 0:05dd1de8cc3f 66 GPIOB->MODER &= ~GPIO_MODER_MODER6; // reset port B6
altb2 0:05dd1de8cc3f 67 GPIOB->MODER |= GPIO_MODER_MODER6_1; // set alternate mode of port B6
altb2 0:05dd1de8cc3f 68 GPIOB->PUPDR &= ~GPIO_PUPDR_PUPDR6; // reset pull-up/pull-down on port B6
altb2 0:05dd1de8cc3f 69 GPIOB->PUPDR |= GPIO_PUPDR_PUPDR6_1; // set input as pull-down
altb2 0:05dd1de8cc3f 70 GPIOB->AFR[0] &= ~(0xF << 4*6); // reset alternate function of port B6
altb2 0:05dd1de8cc3f 71 GPIOB->AFR[0] |= 2 << 4*6; // set alternate funtion 2 of port B6
altb2 0:05dd1de8cc3f 72
altb2 0:05dd1de8cc3f 73 GPIOB->MODER &= ~GPIO_MODER_MODER7; // reset port B7
altb2 0:05dd1de8cc3f 74 GPIOB->MODER |= GPIO_MODER_MODER7_1; // set alternate mode of port B7
altb2 0:05dd1de8cc3f 75 GPIOB->PUPDR &= ~GPIO_PUPDR_PUPDR7; // reset pull-up/pull-down on port B7
altb2 0:05dd1de8cc3f 76 GPIOB->PUPDR |= GPIO_PUPDR_PUPDR7_1; // set input as pull-down
altb2 0:05dd1de8cc3f 77 GPIOB->AFR[0] &= ~0xF0000000; // reset alternate function of port B7
altb2 0:05dd1de8cc3f 78 GPIOB->AFR[0] |= 2 << 4*7; // set alternate funtion 2 of port B7
altb2 0:05dd1de8cc3f 79
altb2 0:05dd1de8cc3f 80 // configure reset and clock control registers
altb2 0:05dd1de8cc3f 81
altb2 0:05dd1de8cc3f 82 RCC->APB1RSTR |= RCC_APB1RSTR_TIM4RST; //reset TIM4 controller
altb2 0:05dd1de8cc3f 83 RCC->APB1RSTR &= ~RCC_APB1RSTR_TIM4RST;
altb2 0:05dd1de8cc3f 84
altb2 0:05dd1de8cc3f 85 RCC->APB1ENR |= RCC_APB1ENR_TIM4EN; // TIM4 clock enable
altb2 0:05dd1de8cc3f 86
altb2 0:05dd1de8cc3f 87 } else {
altb2 0:05dd1de8cc3f 88
altb2 0:05dd1de8cc3f 89 printf("pinmap not found for peripheral\n");
altb2 0:05dd1de8cc3f 90 }
altb2 0:05dd1de8cc3f 91
altb2 0:05dd1de8cc3f 92 // configure general purpose timer 3 or 4
altb2 0:05dd1de8cc3f 93
altb2 0:05dd1de8cc3f 94 TIM->CR1 = 0x0000; // counter disable
altb2 0:05dd1de8cc3f 95 TIM->CR2 = 0x0000; // reset master mode selection
altb2 0:05dd1de8cc3f 96 TIM->SMCR = TIM_SMCR_SMS_1 | TIM_SMCR_SMS_0; // counting on both TI1 & TI2 edges
altb2 0:05dd1de8cc3f 97 TIM->CCMR1 = TIM_CCMR1_CC2S_0 | TIM_CCMR1_CC1S_0;
altb2 0:05dd1de8cc3f 98 TIM->CCMR2 = 0x0000; // reset capture mode register 2
altb2 0:05dd1de8cc3f 99 TIM->CCER = TIM_CCER_CC2E | TIM_CCER_CC1E;
altb2 0:05dd1de8cc3f 100 TIM->CNT = 0x0000; // reset counter value
altb2 0:05dd1de8cc3f 101 TIM->ARR = 0xFFFF; // auto reload register
altb2 0:05dd1de8cc3f 102 TIM->CR1 = TIM_CR1_CEN; // counter enable
altb2 0:05dd1de8cc3f 103 }
altb2 0:05dd1de8cc3f 104
altb2 0:05dd1de8cc3f 105 EncoderCounter::~EncoderCounter() {}
altb2 0:05dd1de8cc3f 106
altb2 0:05dd1de8cc3f 107 /**
altb2 0:05dd1de8cc3f 108 * Resets the counter value to zero.
altb2 0:05dd1de8cc3f 109 */
altb2 0:05dd1de8cc3f 110 void EncoderCounter::reset() {
altb2 0:05dd1de8cc3f 111
altb2 0:05dd1de8cc3f 112 TIM->CNT = 0x0000;
altb2 0:05dd1de8cc3f 113 }
altb2 0:05dd1de8cc3f 114
altb2 0:05dd1de8cc3f 115 /**
altb2 0:05dd1de8cc3f 116 * Resets the counter value to a given offset value.
altb2 0:05dd1de8cc3f 117 * @param offset the offset value to reset the counter to.
altb2 0:05dd1de8cc3f 118 */
altb2 0:05dd1de8cc3f 119 void EncoderCounter::reset(short offset) {
altb2 0:05dd1de8cc3f 120
altb2 0:05dd1de8cc3f 121 TIM->CNT = -offset;
altb2 0:05dd1de8cc3f 122 }
altb2 0:05dd1de8cc3f 123
altb2 0:05dd1de8cc3f 124 /**
altb2 0:05dd1de8cc3f 125 * Reads the quadrature encoder counter value.
altb2 0:05dd1de8cc3f 126 * @return the quadrature encoder counter as a signed 16-bit integer value.
altb2 0:05dd1de8cc3f 127 */
altb2 0:05dd1de8cc3f 128 short EncoderCounter::read() {
altb2 0:05dd1de8cc3f 129
altb2 0:05dd1de8cc3f 130 return (short)(-TIM->CNT);
altb2 0:05dd1de8cc3f 131 }
altb2 0:05dd1de8cc3f 132
altb2 0:05dd1de8cc3f 133 /**
altb2 0:05dd1de8cc3f 134 * The empty operator is a shorthand notation of the <code>read()</code> method.
altb2 0:05dd1de8cc3f 135 */
altb2 0:05dd1de8cc3f 136 EncoderCounter::operator short() {
altb2 0:05dd1de8cc3f 137
altb2 0:05dd1de8cc3f 138 return read();
altb2 0:05dd1de8cc3f 139 }