Diff: targets/hal/TARGET_Freescale/TARGET_KLXX/pwmout_api.c

Revision:

363:12a245e5c745

Parent:

264:91fcbf887208

--- a/targets/hal/TARGET_Freescale/TARGET_KLXX/pwmout_api.c	Tue Oct 21 16:30:07 2014 +0100
+++ b/targets/hal/TARGET_Freescale/TARGET_KLXX/pwmout_api.c	Thu Oct 23 09:45:08 2014 +0100
@@ -30,6 +30,16 @@
 
     uint32_t clkdiv = 0;
     float clkval;
+
+#if defined(TARGET_KL43Z)
+    if (mcgirc_frequency()) {
+        SIM->SOPT2 |= SIM_SOPT2_TPMSRC(3); // Clock source: MCGIRCLK
+        clkval = mcgirc_frequency() / 1000000.0f;
+    } else {
+        SIM->SOPT2 |= SIM_SOPT2_TPMSRC(1); // Clock source: IRC48M
+        clkval = CPU_INT_IRC_CLK_HZ / 1000000.0f;
+    }
+#else
     if (mcgpllfll_frequency()) {
         SIM->SOPT2 |= SIM_SOPT2_TPMSRC(1); // Clock source: MCGFLLCLK or MCGPLLCLK
         clkval = mcgpllfll_frequency() / 1000000.0f;
@@ -37,7 +47,7 @@
         SIM->SOPT2 |= SIM_SOPT2_TPMSRC(2); // Clock source: ExtOsc
         clkval = extosc_frequency() / 1000000.0f;
     }
-    
+#endif
     while (clkval > 1) {
         clkdiv++;
         clkval /= 2.0;
@@ -46,9 +56,9 @@
     }
     
     pwm_clock = clkval;
-    unsigned int port = (unsigned int)pin >> PORT_SHIFT;
+    unsigned int port  = (unsigned int)pin >> PORT_SHIFT;
     unsigned int tpm_n = (pwm >> TPM_SHIFT);
-    unsigned int ch_n = (pwm & 0xFF);
+    unsigned int ch_n  = (pwm & 0xFF);
 
     SIM->SCGC5 |= 1 << (SIM_SCGC5_PORTA_SHIFT + port);
     SIM->SCGC6 |= 1 << (SIM_SCGC6_TPM0_SHIFT + tpm_n);