Important changes to repositories hosted on mbed.com
Mbed hosted mercurial repositories are deprecated and are due to be permanently deleted in July 2026.
To keep a copy of this software download the repository Zip archive or clone locally using Mercurial.
It is also possible to export all your personal repositories from the account settings page.
Fork of mbed-dev by
targets/cmsis/TARGET_RENESAS/TARGET_RZ_A1H/pl310.c@144:ef7eb2e8f9f7, 2016-09-02 (annotated)
- Committer:
- <>
- Date:
- Fri Sep 02 15:07:44 2016 +0100
- Revision:
- 144:ef7eb2e8f9f7
- Parent:
- 0:9b334a45a8ff
This updates the lib to the mbed lib v125
Who changed what in which revision?
User | Revision | Line number | New contents of line |
---|---|---|---|
<> | 144:ef7eb2e8f9f7 | 1 | /**************************************************************************//** |
<> | 144:ef7eb2e8f9f7 | 2 | * @file pl310.c |
<> | 144:ef7eb2e8f9f7 | 3 | * @brief Implementation of PL310 PrimeCell Level 2 Cache Controller functions |
<> | 144:ef7eb2e8f9f7 | 4 | * @version |
<> | 144:ef7eb2e8f9f7 | 5 | * @date 3 December 2014 |
<> | 144:ef7eb2e8f9f7 | 6 | * |
<> | 144:ef7eb2e8f9f7 | 7 | * @note |
<> | 144:ef7eb2e8f9f7 | 8 | * |
<> | 144:ef7eb2e8f9f7 | 9 | ******************************************************************************/ |
<> | 144:ef7eb2e8f9f7 | 10 | /* Copyright (c) 2011 - 2013 ARM LIMITED |
<> | 144:ef7eb2e8f9f7 | 11 | |
<> | 144:ef7eb2e8f9f7 | 12 | All rights reserved. |
<> | 144:ef7eb2e8f9f7 | 13 | Redistribution and use in source and binary forms, with or without |
<> | 144:ef7eb2e8f9f7 | 14 | modification, are permitted provided that the following conditions are met: |
<> | 144:ef7eb2e8f9f7 | 15 | - Redistributions of source code must retain the above copyright |
<> | 144:ef7eb2e8f9f7 | 16 | notice, this list of conditions and the following disclaimer. |
<> | 144:ef7eb2e8f9f7 | 17 | - Redistributions in binary form must reproduce the above copyright |
<> | 144:ef7eb2e8f9f7 | 18 | notice, this list of conditions and the following disclaimer in the |
<> | 144:ef7eb2e8f9f7 | 19 | documentation and/or other materials provided with the distribution. |
<> | 144:ef7eb2e8f9f7 | 20 | - Neither the name of ARM nor the names of its contributors may be used |
<> | 144:ef7eb2e8f9f7 | 21 | to endorse or promote products derived from this software without |
<> | 144:ef7eb2e8f9f7 | 22 | specific prior written permission. |
<> | 144:ef7eb2e8f9f7 | 23 | * |
<> | 144:ef7eb2e8f9f7 | 24 | THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
<> | 144:ef7eb2e8f9f7 | 25 | AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
<> | 144:ef7eb2e8f9f7 | 26 | IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE |
<> | 144:ef7eb2e8f9f7 | 27 | ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE |
<> | 144:ef7eb2e8f9f7 | 28 | LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR |
<> | 144:ef7eb2e8f9f7 | 29 | CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF |
<> | 144:ef7eb2e8f9f7 | 30 | SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS |
<> | 144:ef7eb2e8f9f7 | 31 | INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN |
<> | 144:ef7eb2e8f9f7 | 32 | CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) |
<> | 144:ef7eb2e8f9f7 | 33 | ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE |
<> | 144:ef7eb2e8f9f7 | 34 | POSSIBILITY OF SUCH DAMAGE. |
<> | 144:ef7eb2e8f9f7 | 35 | ---------------------------------------------------------------------------*/ |
<> | 144:ef7eb2e8f9f7 | 36 | #include "MBRZA1H.h" |
<> | 144:ef7eb2e8f9f7 | 37 | |
<> | 144:ef7eb2e8f9f7 | 38 | //Cache Sync operation |
<> | 144:ef7eb2e8f9f7 | 39 | void PL310_Sync(void) |
<> | 144:ef7eb2e8f9f7 | 40 | { |
<> | 144:ef7eb2e8f9f7 | 41 | PL310->CACHE_SYNC = 0x0; |
<> | 144:ef7eb2e8f9f7 | 42 | } |
<> | 144:ef7eb2e8f9f7 | 43 | |
<> | 144:ef7eb2e8f9f7 | 44 | //return Cache controller cache ID |
<> | 144:ef7eb2e8f9f7 | 45 | int PL310_GetID (void) |
<> | 144:ef7eb2e8f9f7 | 46 | { |
<> | 144:ef7eb2e8f9f7 | 47 | return PL310->CACHE_ID; |
<> | 144:ef7eb2e8f9f7 | 48 | } |
<> | 144:ef7eb2e8f9f7 | 49 | |
<> | 144:ef7eb2e8f9f7 | 50 | //return Cache controller cache Type |
<> | 144:ef7eb2e8f9f7 | 51 | int PL310_GetType (void) |
<> | 144:ef7eb2e8f9f7 | 52 | { |
<> | 144:ef7eb2e8f9f7 | 53 | return PL310->CACHE_TYPE; |
<> | 144:ef7eb2e8f9f7 | 54 | } |
<> | 144:ef7eb2e8f9f7 | 55 | |
<> | 144:ef7eb2e8f9f7 | 56 | //Invalidate all cache by way |
<> | 144:ef7eb2e8f9f7 | 57 | void PL310_InvAllByWay (void) |
<> | 144:ef7eb2e8f9f7 | 58 | { |
<> | 144:ef7eb2e8f9f7 | 59 | unsigned int assoc; |
<> | 144:ef7eb2e8f9f7 | 60 | |
<> | 144:ef7eb2e8f9f7 | 61 | if (PL310->AUX_CNT & (1<<16)) |
<> | 144:ef7eb2e8f9f7 | 62 | assoc = 16; |
<> | 144:ef7eb2e8f9f7 | 63 | else |
<> | 144:ef7eb2e8f9f7 | 64 | assoc = 8; |
<> | 144:ef7eb2e8f9f7 | 65 | |
<> | 144:ef7eb2e8f9f7 | 66 | PL310->INV_WAY = (1 << assoc) - 1; |
<> | 144:ef7eb2e8f9f7 | 67 | while(PL310->INV_WAY & ((1 << assoc) - 1)); //poll invalidate |
<> | 144:ef7eb2e8f9f7 | 68 | |
<> | 144:ef7eb2e8f9f7 | 69 | PL310_Sync(); |
<> | 144:ef7eb2e8f9f7 | 70 | } |
<> | 144:ef7eb2e8f9f7 | 71 | |
<> | 144:ef7eb2e8f9f7 | 72 | //Clean and Invalidate all cache by way |
<> | 144:ef7eb2e8f9f7 | 73 | void PL310_CleanInvAllByWay (void) |
<> | 144:ef7eb2e8f9f7 | 74 | { |
<> | 144:ef7eb2e8f9f7 | 75 | unsigned int assoc; |
<> | 144:ef7eb2e8f9f7 | 76 | |
<> | 144:ef7eb2e8f9f7 | 77 | if (PL310->AUX_CNT & (1<<16)) |
<> | 144:ef7eb2e8f9f7 | 78 | assoc = 16; |
<> | 144:ef7eb2e8f9f7 | 79 | else |
<> | 144:ef7eb2e8f9f7 | 80 | assoc = 8; |
<> | 144:ef7eb2e8f9f7 | 81 | |
<> | 144:ef7eb2e8f9f7 | 82 | PL310->CLEAN_INV_WAY = (1 << assoc) - 1; |
<> | 144:ef7eb2e8f9f7 | 83 | while(PL310->CLEAN_INV_WAY & ((1 << assoc) - 1)); //poll invalidate |
<> | 144:ef7eb2e8f9f7 | 84 | |
<> | 144:ef7eb2e8f9f7 | 85 | PL310_Sync(); |
<> | 144:ef7eb2e8f9f7 | 86 | } |
<> | 144:ef7eb2e8f9f7 | 87 | |
<> | 144:ef7eb2e8f9f7 | 88 | //Enable Cache |
<> | 144:ef7eb2e8f9f7 | 89 | void PL310_Enable(void) |
<> | 144:ef7eb2e8f9f7 | 90 | { |
<> | 144:ef7eb2e8f9f7 | 91 | PL310->CONTROL = 0; |
<> | 144:ef7eb2e8f9f7 | 92 | PL310->INTERRUPT_CLEAR = 0x000001FFuL; |
<> | 144:ef7eb2e8f9f7 | 93 | PL310->DEBUG_CONTROL = 0; |
<> | 144:ef7eb2e8f9f7 | 94 | PL310->DATA_LOCK_0_WAY = 0; |
<> | 144:ef7eb2e8f9f7 | 95 | PL310->CACHE_SYNC = 0; |
<> | 144:ef7eb2e8f9f7 | 96 | |
<> | 144:ef7eb2e8f9f7 | 97 | PL310->CONTROL = 0x01; |
<> | 144:ef7eb2e8f9f7 | 98 | PL310_Sync(); |
<> | 144:ef7eb2e8f9f7 | 99 | } |
<> | 144:ef7eb2e8f9f7 | 100 | //Disable Cache |
<> | 144:ef7eb2e8f9f7 | 101 | void PL310_Disable(void) |
<> | 144:ef7eb2e8f9f7 | 102 | { |
<> | 144:ef7eb2e8f9f7 | 103 | PL310->CONTROL = 0x00; |
<> | 144:ef7eb2e8f9f7 | 104 | PL310_Sync(); |
<> | 144:ef7eb2e8f9f7 | 105 | } |
<> | 144:ef7eb2e8f9f7 | 106 | |
<> | 144:ef7eb2e8f9f7 | 107 | //Invalidate cache by physical address |
<> | 144:ef7eb2e8f9f7 | 108 | void PL310_InvPa (void *pa) |
<> | 144:ef7eb2e8f9f7 | 109 | { |
<> | 144:ef7eb2e8f9f7 | 110 | PL310->INV_LINE_PA = (unsigned int)pa; |
<> | 144:ef7eb2e8f9f7 | 111 | PL310_Sync(); |
<> | 144:ef7eb2e8f9f7 | 112 | } |
<> | 144:ef7eb2e8f9f7 | 113 | |
<> | 144:ef7eb2e8f9f7 | 114 | //Clean cache by physical address |
<> | 144:ef7eb2e8f9f7 | 115 | void PL310_CleanPa (void *pa) |
<> | 144:ef7eb2e8f9f7 | 116 | { |
<> | 144:ef7eb2e8f9f7 | 117 | PL310->CLEAN_LINE_PA = (unsigned int)pa; |
<> | 144:ef7eb2e8f9f7 | 118 | PL310_Sync(); |
<> | 144:ef7eb2e8f9f7 | 119 | } |
<> | 144:ef7eb2e8f9f7 | 120 | |
<> | 144:ef7eb2e8f9f7 | 121 | //Clean and invalidate cache by physical address |
<> | 144:ef7eb2e8f9f7 | 122 | void PL310_CleanInvPa (void *pa) |
<> | 144:ef7eb2e8f9f7 | 123 | { |
<> | 144:ef7eb2e8f9f7 | 124 | PL310->CLEAN_INV_LINE_PA = (unsigned int)pa; |
<> | 144:ef7eb2e8f9f7 | 125 | PL310_Sync(); |
<> | 144:ef7eb2e8f9f7 | 126 | } |
<> | 144:ef7eb2e8f9f7 | 127 | |
<> | 144:ef7eb2e8f9f7 | 128 |