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targets/hal/TARGET_NXP/TARGET_LPC11U6X/analogin_api.c@0:9b334a45a8ff, 2015-10-01 (annotated)

Committer:
bogdanm
Date:
Thu Oct 01 15:25:22 2015 +0300
Revision:
0:9b334a45a8ff
Child:
144:ef7eb2e8f9f7
Initial commit on mbed-dev



Replaces mbed-src (now inactive)

Who changed what in which revision?

UserRevisionLine numberNew contents of line
bogdanm 0:9b334a45a8ff 1 /* mbed Microcontroller Library
bogdanm 0:9b334a45a8ff 2 * Copyright (c) 2006-2013 ARM Limited
bogdanm 0:9b334a45a8ff 3 *
bogdanm 0:9b334a45a8ff 4 * Licensed under the Apache License, Version 2.0 (the "License");
bogdanm 0:9b334a45a8ff 5 * you may not use this file except in compliance with the License.
bogdanm 0:9b334a45a8ff 6 * You may obtain a copy of the License at
bogdanm 0:9b334a45a8ff 7 *
bogdanm 0:9b334a45a8ff 8 * http://www.apache.org/licenses/LICENSE-2.0
bogdanm 0:9b334a45a8ff 9 *
bogdanm 0:9b334a45a8ff 10 * Unless required by applicable law or agreed to in writing, software
bogdanm 0:9b334a45a8ff 11 * distributed under the License is distributed on an "AS IS" BASIS,
bogdanm 0:9b334a45a8ff 12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
bogdanm 0:9b334a45a8ff 13 * See the License for the specific language governing permissions and
bogdanm 0:9b334a45a8ff 14 * limitations under the License.
bogdanm 0:9b334a45a8ff 15 */
bogdanm 0:9b334a45a8ff 16 #include "mbed_assert.h"
bogdanm 0:9b334a45a8ff 17 #include "analogin_api.h"
bogdanm 0:9b334a45a8ff 18 #include "cmsis.h"
bogdanm 0:9b334a45a8ff 19 #include "pinmap.h"
bogdanm 0:9b334a45a8ff 20 #include "mbed_error.h"
bogdanm 0:9b334a45a8ff 21
bogdanm 0:9b334a45a8ff 22 #if DEVICE_ANALOGIN
bogdanm 0:9b334a45a8ff 23
bogdanm 0:9b334a45a8ff 24 #define ANALOGIN_MEDIAN_FILTER 1
bogdanm 0:9b334a45a8ff 25
bogdanm 0:9b334a45a8ff 26 #define ADC_10BIT_RANGE 0x3FF
bogdanm 0:9b334a45a8ff 27 #define ADC_12BIT_RANGE 0xFFF
bogdanm 0:9b334a45a8ff 28 #define PDRUN_VALID_BITS 0x000025FFL
bogdanm 0:9b334a45a8ff 29 #define PDRUN_RESERVED_ONE 0x0000C800L
bogdanm 0:9b334a45a8ff 30
bogdanm 0:9b334a45a8ff 31 #define ADC_RANGE ADC_12BIT_RANGE
bogdanm 0:9b334a45a8ff 32
bogdanm 0:9b334a45a8ff 33 static const PinMap PinMap_ADC[] = {
bogdanm 0:9b334a45a8ff 34 {P1_9 , ADC_0, 3},
bogdanm 0:9b334a45a8ff 35 {P0_23, ADC_1, 1},
bogdanm 0:9b334a45a8ff 36 {P0_16, ADC_2, 1},
bogdanm 0:9b334a45a8ff 37 {P0_15, ADC_3, 3},
bogdanm 0:9b334a45a8ff 38 {P1_22, ADC_4, 3},
bogdanm 0:9b334a45a8ff 39 {P1_3 , ADC_5, 4},
bogdanm 0:9b334a45a8ff 40 {P0_14, ADC_6, 2},
bogdanm 0:9b334a45a8ff 41 {P0_13, ADC_7, 2},
bogdanm 0:9b334a45a8ff 42 {P0_12, ADC_8, 2},
bogdanm 0:9b334a45a8ff 43 {P0_11, ADC_9, 2},
bogdanm 0:9b334a45a8ff 44 {P1_29, ADC_10,4},
bogdanm 0:9b334a45a8ff 45 {P0_22, ADC_11,1},
bogdanm 0:9b334a45a8ff 46 {NC , NC ,0}
bogdanm 0:9b334a45a8ff 47 };
bogdanm 0:9b334a45a8ff 48
bogdanm 0:9b334a45a8ff 49
bogdanm 0:9b334a45a8ff 50 void analogin_init(analogin_t *obj, PinName pin) {
bogdanm 0:9b334a45a8ff 51 volatile uint32_t tmp;
bogdanm 0:9b334a45a8ff 52 obj->adc = (ADCName)pinmap_peripheral(pin, PinMap_ADC);
bogdanm 0:9b334a45a8ff 53 MBED_ASSERT(obj->adc != (ADCName)NC);
bogdanm 0:9b334a45a8ff 54
bogdanm 0:9b334a45a8ff 55 pinmap_pinout(pin, PinMap_ADC);
bogdanm 0:9b334a45a8ff 56
bogdanm 0:9b334a45a8ff 57 __IO uint32_t *reg = (__IO uint32_t*)(LPC_IOCON_BASE + (pin & 0x1FF));
bogdanm 0:9b334a45a8ff 58 // set pin to ADC mode
bogdanm 0:9b334a45a8ff 59 *reg &= ~(1 << 7); // set ADMODE = 0 (analog mode)
bogdanm 0:9b334a45a8ff 60
bogdanm 0:9b334a45a8ff 61 // ADC Powered
bogdanm 0:9b334a45a8ff 62 tmp = (LPC_SYSCON->PDRUNCFG & PDRUN_VALID_BITS);
bogdanm 0:9b334a45a8ff 63 tmp &= ~((1 << 4) & PDRUN_VALID_BITS);
bogdanm 0:9b334a45a8ff 64 LPC_SYSCON->PDRUNCFG = (tmp | PDRUN_RESERVED_ONE);
bogdanm 0:9b334a45a8ff 65
bogdanm 0:9b334a45a8ff 66 // Enable clock for ADC
bogdanm 0:9b334a45a8ff 67 LPC_SYSCON->SYSAHBCLKCTRL |= (1 << 13);
bogdanm 0:9b334a45a8ff 68
bogdanm 0:9b334a45a8ff 69 // Determine the clock divider for a 500kHz ADC clock during calibration
bogdanm 0:9b334a45a8ff 70 uint32_t clkdiv = (SystemCoreClock / 500000) - 1;
bogdanm 0:9b334a45a8ff 71
bogdanm 0:9b334a45a8ff 72 // Perform a self-calibration
bogdanm 0:9b334a45a8ff 73 LPC_ADC->CTRL = (1UL << 30) | (clkdiv & 0xFF);
bogdanm 0:9b334a45a8ff 74 while ((LPC_ADC->CTRL & (1UL << 30)) != 0);
bogdanm 0:9b334a45a8ff 75
bogdanm 0:9b334a45a8ff 76 // Sampling clock: SystemClock divided by 1
bogdanm 0:9b334a45a8ff 77 LPC_ADC->CTRL = 0;
bogdanm 0:9b334a45a8ff 78 }
bogdanm 0:9b334a45a8ff 79
bogdanm 0:9b334a45a8ff 80 static inline uint32_t adc_read(analogin_t *obj) {
bogdanm 0:9b334a45a8ff 81
bogdanm 0:9b334a45a8ff 82 // select channel
bogdanm 0:9b334a45a8ff 83 LPC_ADC->SEQA_CTRL &= ~(0xFFF);
bogdanm 0:9b334a45a8ff 84 LPC_ADC->SEQA_CTRL |= (1UL << obj->adc);
bogdanm 0:9b334a45a8ff 85
bogdanm 0:9b334a45a8ff 86 // start conversion, sequence enable with async mode
bogdanm 0:9b334a45a8ff 87 LPC_ADC->SEQA_CTRL |= ((1UL << 26) | (1UL << 31) | (1UL << 19));
bogdanm 0:9b334a45a8ff 88
bogdanm 0:9b334a45a8ff 89 // Repeatedly get the sample data until DONE bit
bogdanm 0:9b334a45a8ff 90 volatile uint32_t data;
bogdanm 0:9b334a45a8ff 91 do {
bogdanm 0:9b334a45a8ff 92 data = LPC_ADC->SEQA_GDAT;
bogdanm 0:9b334a45a8ff 93 } while ((data & (1UL << 31)) == 0);
bogdanm 0:9b334a45a8ff 94 data = LPC_ADC->DAT[obj->adc];
bogdanm 0:9b334a45a8ff 95
bogdanm 0:9b334a45a8ff 96 // Stop conversion
bogdanm 0:9b334a45a8ff 97 LPC_ADC->SEQA_CTRL &= ~(1UL << 31);
bogdanm 0:9b334a45a8ff 98
bogdanm 0:9b334a45a8ff 99 return ((data >> 4) & ADC_RANGE);
bogdanm 0:9b334a45a8ff 100 }
bogdanm 0:9b334a45a8ff 101
bogdanm 0:9b334a45a8ff 102 static inline void order(uint32_t *a, uint32_t *b) {
bogdanm 0:9b334a45a8ff 103 if (*a > *b) {
bogdanm 0:9b334a45a8ff 104 uint32_t t = *a;
bogdanm 0:9b334a45a8ff 105 *a = *b;
bogdanm 0:9b334a45a8ff 106 *b = t;
bogdanm 0:9b334a45a8ff 107 }
bogdanm 0:9b334a45a8ff 108 }
bogdanm 0:9b334a45a8ff 109
bogdanm 0:9b334a45a8ff 110 static inline uint32_t adc_read_u32(analogin_t *obj) {
bogdanm 0:9b334a45a8ff 111 uint32_t value;
bogdanm 0:9b334a45a8ff 112 #if ANALOGIN_MEDIAN_FILTER
bogdanm 0:9b334a45a8ff 113 uint32_t v1 = adc_read(obj);
bogdanm 0:9b334a45a8ff 114 uint32_t v2 = adc_read(obj);
bogdanm 0:9b334a45a8ff 115 uint32_t v3 = adc_read(obj);
bogdanm 0:9b334a45a8ff 116 order(&v1, &v2);
bogdanm 0:9b334a45a8ff 117 order(&v2, &v3);
bogdanm 0:9b334a45a8ff 118 order(&v1, &v2);
bogdanm 0:9b334a45a8ff 119 value = v2;
bogdanm 0:9b334a45a8ff 120 #else
bogdanm 0:9b334a45a8ff 121 value = adc_read(obj);
bogdanm 0:9b334a45a8ff 122 #endif
bogdanm 0:9b334a45a8ff 123 return value;
bogdanm 0:9b334a45a8ff 124 }
bogdanm 0:9b334a45a8ff 125
bogdanm 0:9b334a45a8ff 126 uint16_t analogin_read_u16(analogin_t *obj) {
bogdanm 0:9b334a45a8ff 127 uint32_t value = adc_read_u32(obj);
bogdanm 0:9b334a45a8ff 128 return (value << 4) | ((value >> 8) & 0x000F); // 12 bit
bogdanm 0:9b334a45a8ff 129 }
bogdanm 0:9b334a45a8ff 130
bogdanm 0:9b334a45a8ff 131 float analogin_read(analogin_t *obj) {
bogdanm 0:9b334a45a8ff 132 uint32_t value = adc_read_u32(obj);
bogdanm 0:9b334a45a8ff 133 return (float)value * (1.0f / (float)ADC_RANGE);
bogdanm 0:9b334a45a8ff 134 }
bogdanm 0:9b334a45a8ff 135
bogdanm 0:9b334a45a8ff 136 #endif