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targets/TARGET_NXP/TARGET_LPC15XX/device/TOOLCHAIN_GCC_CR/startup_LPC15xx.cpp@149:156823d33999, 2016-10-28 (annotated)

Committer:
<>
Date:
Fri Oct 28 11:17:30 2016 +0100
Revision:
149:156823d33999
Parent:
targets/cmsis/TARGET_NXP/TARGET_LPC15XX/TOOLCHAIN_GCC_CR/startup_LPC15xx.cpp@147:30b64687e01f 
This updates the lib to the mbed lib v128



NOTE: This release includes a restructuring of the file and directory locations and thus some

include paths in your code may need updating accordingly.

Who changed what in which revision?

UserRevisionLine numberNew contents of line
<> 144:ef7eb2e8f9f7 1 extern "C" {
<> 144:ef7eb2e8f9f7 2
<> 144:ef7eb2e8f9f7 3 #include "LPC15xx.h"
<> 144:ef7eb2e8f9f7 4
<> 144:ef7eb2e8f9f7 5 #define WEAK __attribute__ ((weak))
<> 144:ef7eb2e8f9f7 6 #define ALIAS(f) __attribute__ ((weak, alias (#f)))
<> 144:ef7eb2e8f9f7 7 #define AFTER_VECTORS __attribute__ ((section(".after_vectors")))void ResetISR(void);
<> 144:ef7eb2e8f9f7 8
<> 144:ef7eb2e8f9f7 9 extern unsigned int __data_section_table;
<> 144:ef7eb2e8f9f7 10 extern unsigned int __data_section_table_end;
<> 144:ef7eb2e8f9f7 11 extern unsigned int __bss_section_table;
<> 144:ef7eb2e8f9f7 12 extern unsigned int __bss_section_table_end;
<> 144:ef7eb2e8f9f7 13
<> 144:ef7eb2e8f9f7 14
<> 144:ef7eb2e8f9f7 15 extern void __libc_init_array(void);
<> 144:ef7eb2e8f9f7 16 extern int main(void);
<> 144:ef7eb2e8f9f7 17 extern void _vStackTop(void);
<> 144:ef7eb2e8f9f7 18 extern void (* const g_pfnVectors[])(void);
<> 144:ef7eb2e8f9f7 19
<> 144:ef7eb2e8f9f7 20 void ResetISR (void);
<> 144:ef7eb2e8f9f7 21 WEAK void NMI_Handler(void);
<> 144:ef7eb2e8f9f7 22 WEAK void HardFault_Handler(void);
<> 144:ef7eb2e8f9f7 23 WEAK void MemManage_Handler(void);
<> 144:ef7eb2e8f9f7 24 WEAK void BusFault_Handler(void);
<> 144:ef7eb2e8f9f7 25 WEAK void UsageFault_Handler(void);
<> 144:ef7eb2e8f9f7 26 WEAK void SVC_Handler(void);
<> 144:ef7eb2e8f9f7 27 WEAK void DebugMon_Handler(void);
<> 144:ef7eb2e8f9f7 28 WEAK void PendSV_Handler(void);
<> 144:ef7eb2e8f9f7 29 WEAK void SysTick_Handler(void);
<> 144:ef7eb2e8f9f7 30 WEAK void IntDefaultHandler(void);
<> 144:ef7eb2e8f9f7 31
<> 144:ef7eb2e8f9f7 32
<> 144:ef7eb2e8f9f7 33 void WDT_IRQHandler(void) ALIAS(IntDefaultHandler);
<> 144:ef7eb2e8f9f7 34 void BOD_IRQHandler(void) ALIAS(IntDefaultHandler);
<> 144:ef7eb2e8f9f7 35 void FMC_IRQHandler(void) ALIAS(IntDefaultHandler);
<> 144:ef7eb2e8f9f7 36 void EEPROM_IRQHandler(void) ALIAS(IntDefaultHandler);
<> 144:ef7eb2e8f9f7 37 void DMA_IRQHandler(void) ALIAS(IntDefaultHandler);
<> 144:ef7eb2e8f9f7 38 void GINT0_IRQHandler(void) ALIAS(IntDefaultHandler);
<> 144:ef7eb2e8f9f7 39 void GINT1_IRQHandler(void) ALIAS(IntDefaultHandler);
<> 144:ef7eb2e8f9f7 40 void PIN_INT0_IRQHandler(void) ALIAS(IntDefaultHandler);
<> 144:ef7eb2e8f9f7 41 void PIN_INT1_IRQHandler(void) ALIAS(IntDefaultHandler);
<> 144:ef7eb2e8f9f7 42 void PIN_INT2_IRQHandler(void) ALIAS(IntDefaultHandler);
<> 144:ef7eb2e8f9f7 43 void PIN_INT3_IRQHandler(void) ALIAS(IntDefaultHandler);
<> 144:ef7eb2e8f9f7 44 void PIN_INT4_IRQHandler(void) ALIAS(IntDefaultHandler);
<> 144:ef7eb2e8f9f7 45 void PIN_INT5_IRQHandler(void) ALIAS(IntDefaultHandler);
<> 144:ef7eb2e8f9f7 46 void PIN_INT6_IRQHandler(void) ALIAS(IntDefaultHandler);
<> 144:ef7eb2e8f9f7 47 void PIN_INT7_IRQHandler(void) ALIAS(IntDefaultHandler);
<> 144:ef7eb2e8f9f7 48 void RIT_IRQHandler(void) ALIAS(IntDefaultHandler);
<> 144:ef7eb2e8f9f7 49 void SCT0_IRQHandler(void) ALIAS(IntDefaultHandler);
<> 144:ef7eb2e8f9f7 50 void SCT1_IRQHandler(void) ALIAS(IntDefaultHandler);
<> 144:ef7eb2e8f9f7 51 void SCT2_IRQHandler(void) ALIAS(IntDefaultHandler);
<> 144:ef7eb2e8f9f7 52 void SCT3_IRQHandler(void) ALIAS(IntDefaultHandler);
<> 144:ef7eb2e8f9f7 53 void MRT_IRQHandler(void) ALIAS(IntDefaultHandler);
<> 144:ef7eb2e8f9f7 54 void UART0_IRQHandler(void) ALIAS(IntDefaultHandler);
<> 144:ef7eb2e8f9f7 55 void UART1_IRQHandler(void) ALIAS(IntDefaultHandler);
<> 144:ef7eb2e8f9f7 56 void UART2_IRQHandler(void) ALIAS(IntDefaultHandler);
<> 144:ef7eb2e8f9f7 57 void I2C0_IRQHandler(void) ALIAS(IntDefaultHandler);
<> 144:ef7eb2e8f9f7 58 void SPI0_IRQHandler(void) ALIAS(IntDefaultHandler);
<> 144:ef7eb2e8f9f7 59 void SPI1_IRQHandler(void) ALIAS(IntDefaultHandler);
<> 144:ef7eb2e8f9f7 60 void CAN_IRQHandler(void) ALIAS(IntDefaultHandler);
<> 144:ef7eb2e8f9f7 61 void USB_IRQHandler(void) ALIAS(IntDefaultHandler);
<> 144:ef7eb2e8f9f7 62 void USB_FIQHandler(void) ALIAS(IntDefaultHandler);
<> 144:ef7eb2e8f9f7 63 void USBWakeup_IRQHandler(void) ALIAS(IntDefaultHandler);
<> 144:ef7eb2e8f9f7 64 void ADC0A_IRQHandler(void) ALIAS(IntDefaultHandler);
<> 144:ef7eb2e8f9f7 65 void ADC0B_IRQHandler(void) ALIAS(IntDefaultHandler);
<> 144:ef7eb2e8f9f7 66 void ADC0_THCMP_IRQHandler(void) ALIAS(IntDefaultHandler);
<> 144:ef7eb2e8f9f7 67 void ADC0_OVR_IRQHandler(void) ALIAS(IntDefaultHandler);
<> 144:ef7eb2e8f9f7 68 void ADC1A_IRQHandler(void) ALIAS(IntDefaultHandler);
<> 144:ef7eb2e8f9f7 69 void ADC1B_IRQHandler(void) ALIAS(IntDefaultHandler);
<> 144:ef7eb2e8f9f7 70 void ADC1_THCMP_IRQHandler(void) ALIAS(IntDefaultHandler);
<> 144:ef7eb2e8f9f7 71 void ADC1_OVR_IRQHandler(void) ALIAS(IntDefaultHandler);
<> 144:ef7eb2e8f9f7 72 void DAC_IRQHandler(void) ALIAS(IntDefaultHandler);
<> 144:ef7eb2e8f9f7 73 void ACMP0_IRQHandler(void) ALIAS(IntDefaultHandler);
<> 144:ef7eb2e8f9f7 74 void ACMP1_IRQHandler(void) ALIAS(IntDefaultHandler);
<> 144:ef7eb2e8f9f7 75 void ACMP2_IRQHandler(void) ALIAS(IntDefaultHandler);
<> 144:ef7eb2e8f9f7 76 void ACMP3_IRQHandler(void) ALIAS(IntDefaultHandler);
<> 144:ef7eb2e8f9f7 77 void QEI_IRQHandler(void) ALIAS(IntDefaultHandler);
<> 144:ef7eb2e8f9f7 78 void RTC_ALARM_IRQHandler(void) ALIAS(IntDefaultHandler);
<> 144:ef7eb2e8f9f7 79 void RTC_WAKE_IRQHandler(void) ALIAS(IntDefaultHandler);
<> 144:ef7eb2e8f9f7 80
<> 144:ef7eb2e8f9f7 81
<> 144:ef7eb2e8f9f7 82 __attribute__ ((section(".isr_vector")))
<> 144:ef7eb2e8f9f7 83 void (* const g_pfnVectors[])(void) = {
<> 144:ef7eb2e8f9f7 84 // Core Level - CM3
<> 144:ef7eb2e8f9f7 85 &_vStackTop, // The initial stack pointer
<> 144:ef7eb2e8f9f7 86 ResetISR, // The reset handler
<> 144:ef7eb2e8f9f7 87 NMI_Handler, // The NMI handler
<> 144:ef7eb2e8f9f7 88 HardFault_Handler, // The hard fault handler
<> 144:ef7eb2e8f9f7 89 MemManage_Handler, // The MPU fault handler
<> 144:ef7eb2e8f9f7 90 BusFault_Handler, // The bus fault handler
<> 144:ef7eb2e8f9f7 91 UsageFault_Handler, // The usage fault handler
<> 144:ef7eb2e8f9f7 92 0, // Reserved
<> 144:ef7eb2e8f9f7 93 0, // Reserved
<> 144:ef7eb2e8f9f7 94 0, // Reserved
<> 144:ef7eb2e8f9f7 95 0, // Reserved
<> 144:ef7eb2e8f9f7 96 SVC_Handler, // SVCall handler
<> 144:ef7eb2e8f9f7 97 DebugMon_Handler, // Debug monitor handler
<> 144:ef7eb2e8f9f7 98 0, // Reserved
<> 144:ef7eb2e8f9f7 99 PendSV_Handler, // The PendSV handler
<> 144:ef7eb2e8f9f7 100 SysTick_Handler, // The SysTick handler
<> 144:ef7eb2e8f9f7 101
<> 144:ef7eb2e8f9f7 102 // Chip Level - LPC15xx
<> 144:ef7eb2e8f9f7 103 WDT_IRQHandler, // 0 - Windowed watchdog timer
<> 144:ef7eb2e8f9f7 104 BOD_IRQHandler, // 1 - BOD
<> 144:ef7eb2e8f9f7 105 FMC_IRQHandler, // 2 - Flash controller
<> 144:ef7eb2e8f9f7 106 EEPROM_IRQHandler, // 3 - EEPROM controller
<> 144:ef7eb2e8f9f7 107 DMA_IRQHandler, // 4 - DMA
<> 144:ef7eb2e8f9f7 108 GINT0_IRQHandler, // 5 - GINT0
<> 144:ef7eb2e8f9f7 109 GINT1_IRQHandler, // 6 - GINT1
<> 144:ef7eb2e8f9f7 110 PIN_INT0_IRQHandler, // 7 - PIO INT0
<> 144:ef7eb2e8f9f7 111 PIN_INT1_IRQHandler, // 8 - PIO INT1
<> 144:ef7eb2e8f9f7 112 PIN_INT2_IRQHandler, // 9 - PIO INT2
<> 144:ef7eb2e8f9f7 113 PIN_INT3_IRQHandler, // 10 - PIO INT3
<> 144:ef7eb2e8f9f7 114 PIN_INT4_IRQHandler, // 11 - PIO INT4
<> 144:ef7eb2e8f9f7 115 PIN_INT5_IRQHandler, // 12 - PIO INT5
<> 144:ef7eb2e8f9f7 116 PIN_INT6_IRQHandler, // 13 - PIO INT6
<> 144:ef7eb2e8f9f7 117 PIN_INT7_IRQHandler, // 14 - PIO INT7
<> 144:ef7eb2e8f9f7 118 RIT_IRQHandler, // 15 - RIT
<> 144:ef7eb2e8f9f7 119 SCT0_IRQHandler, // 16 - State configurable timer
<> 144:ef7eb2e8f9f7 120 SCT1_IRQHandler, // 17 - State configurable timer
<> 144:ef7eb2e8f9f7 121 SCT2_IRQHandler, // 18 - State configurable timer
<> 144:ef7eb2e8f9f7 122 SCT3_IRQHandler, // 19 - State configurable timer
<> 144:ef7eb2e8f9f7 123 MRT_IRQHandler, // 20 - Multi-Rate Timer
<> 144:ef7eb2e8f9f7 124 UART0_IRQHandler, // 21 - UART0
<> 144:ef7eb2e8f9f7 125 UART1_IRQHandler, // 22 - UART1
<> 144:ef7eb2e8f9f7 126 UART2_IRQHandler, // 23 - UART2
<> 144:ef7eb2e8f9f7 127 I2C0_IRQHandler, // 24 - I2C0 controller
<> 144:ef7eb2e8f9f7 128 SPI0_IRQHandler, // 25 - SPI0 controller
<> 144:ef7eb2e8f9f7 129 SPI1_IRQHandler, // 26 - SPI1 controller
<> 144:ef7eb2e8f9f7 130 CAN_IRQHandler, // 27 - C_CAN0
<> 144:ef7eb2e8f9f7 131 USB_IRQHandler, // 28 - USB IRQ
<> 144:ef7eb2e8f9f7 132 USB_FIQHandler, // 29 - USB FIQ
<> 144:ef7eb2e8f9f7 133 USBWakeup_IRQHandler, // 30 - USB wake-up
<> 144:ef7eb2e8f9f7 134 ADC0A_IRQHandler, // 31 - ADC0 sequence A completion
<> 144:ef7eb2e8f9f7 135 ADC0B_IRQHandler, // 32 - ADC0 sequence B completion
<> 144:ef7eb2e8f9f7 136 ADC0_THCMP_IRQHandler, // 33 - ADC0 threshold compare
<> 144:ef7eb2e8f9f7 137 ADC0_OVR_IRQHandler, // 34 - ADC0 overrun
<> 144:ef7eb2e8f9f7 138 ADC1A_IRQHandler, // 35 - ADC1 sequence A completion
<> 144:ef7eb2e8f9f7 139 ADC1B_IRQHandler, // 36 - ADC1 sequence B completion
<> 144:ef7eb2e8f9f7 140 ADC1_THCMP_IRQHandler, // 37 - ADC1 threshold compare
<> 144:ef7eb2e8f9f7 141 ADC1_OVR_IRQHandler, // 38 - ADC1 overrun
<> 144:ef7eb2e8f9f7 142 DAC_IRQHandler, // 39 - DAC
<> 144:ef7eb2e8f9f7 143 ACMP0_IRQHandler, // 40 - Analog Comparator 0
<> 144:ef7eb2e8f9f7 144 ACMP1_IRQHandler, // 41 - Analog Comparator 1
<> 144:ef7eb2e8f9f7 145 ACMP2_IRQHandler, // 42 - Analog Comparator 2
<> 144:ef7eb2e8f9f7 146 ACMP3_IRQHandler, // 43 - Analog Comparator 3
<> 144:ef7eb2e8f9f7 147 QEI_IRQHandler, // 44 - QEI
<> 144:ef7eb2e8f9f7 148 RTC_ALARM_IRQHandler, // 45 - RTC alarm
<> 144:ef7eb2e8f9f7 149 RTC_WAKE_IRQHandler, // 46 - RTC wake-up
<> 144:ef7eb2e8f9f7 150
<> 144:ef7eb2e8f9f7 151 };
<> 144:ef7eb2e8f9f7 152 /* End Vector */
<> 144:ef7eb2e8f9f7 153
<> 144:ef7eb2e8f9f7 154 AFTER_VECTORS void data_init(unsigned int romstart, unsigned int start, unsigned int len) {
<> 144:ef7eb2e8f9f7 155 unsigned int *pulDest = (unsigned int*) start;
<> 144:ef7eb2e8f9f7 156 unsigned int *pulSrc = (unsigned int*) romstart;
<> 144:ef7eb2e8f9f7 157 unsigned int loop;
<> 144:ef7eb2e8f9f7 158 for (loop = 0; loop < len; loop = loop + 4) *pulDest++ = *pulSrc++;
<> 144:ef7eb2e8f9f7 159 }
<> 144:ef7eb2e8f9f7 160
<> 144:ef7eb2e8f9f7 161 AFTER_VECTORS void bss_init(unsigned int start, unsigned int len) {
<> 144:ef7eb2e8f9f7 162 unsigned int *pulDest = (unsigned int*) start;
<> 144:ef7eb2e8f9f7 163 unsigned int loop;
<> 144:ef7eb2e8f9f7 164 for (loop = 0; loop < len; loop = loop + 4) *pulDest++ = 0;
<> 144:ef7eb2e8f9f7 165 }
<> 144:ef7eb2e8f9f7 166
<> 144:ef7eb2e8f9f7 167
<> 144:ef7eb2e8f9f7 168 /* Reset entry point*/
<> 147:30b64687e01f 169 extern "C" void software_init_hook(void);
<> 147:30b64687e01f 170 extern "C" void pre_main(void) __attribute__((weak));
<> 144:ef7eb2e8f9f7 171
<> 144:ef7eb2e8f9f7 172 AFTER_VECTORS void ResetISR(void) {
<> 144:ef7eb2e8f9f7 173 unsigned int LoadAddr, ExeAddr, SectionLen;
<> 144:ef7eb2e8f9f7 174 unsigned int *SectionTableAddr;
<> 144:ef7eb2e8f9f7 175
<> 144:ef7eb2e8f9f7 176 SectionTableAddr = &__data_section_table;
<> 144:ef7eb2e8f9f7 177
<> 144:ef7eb2e8f9f7 178 while (SectionTableAddr < &__data_section_table_end) {
<> 144:ef7eb2e8f9f7 179 LoadAddr = *SectionTableAddr++;
<> 144:ef7eb2e8f9f7 180 ExeAddr = *SectionTableAddr++;
<> 144:ef7eb2e8f9f7 181 SectionLen = *SectionTableAddr++;
<> 144:ef7eb2e8f9f7 182 data_init(LoadAddr, ExeAddr, SectionLen);
<> 144:ef7eb2e8f9f7 183 }
<> 144:ef7eb2e8f9f7 184 while (SectionTableAddr < &__bss_section_table_end) {
<> 144:ef7eb2e8f9f7 185 ExeAddr = *SectionTableAddr++;
<> 144:ef7eb2e8f9f7 186 SectionLen = *SectionTableAddr++;
<> 144:ef7eb2e8f9f7 187 bss_init(ExeAddr, SectionLen);
<> 144:ef7eb2e8f9f7 188 }
<> 144:ef7eb2e8f9f7 189
<> 144:ef7eb2e8f9f7 190 SystemInit();
<> 147:30b64687e01f 191 if (pre_main) { // give control to the RTOS
<> 147:30b64687e01f 192 software_init_hook(); // this will also call __libc_init_array
<> 147:30b64687e01f 193 }
<> 147:30b64687e01f 194 else { // for BareMetal (non-RTOS) build
<> 144:ef7eb2e8f9f7 195 __libc_init_array();
<> 144:ef7eb2e8f9f7 196 main();
<> 144:ef7eb2e8f9f7 197 }
<> 144:ef7eb2e8f9f7 198 while (1) {;}
<> 144:ef7eb2e8f9f7 199 }
<> 144:ef7eb2e8f9f7 200
<> 144:ef7eb2e8f9f7 201 AFTER_VECTORS void NMI_Handler (void) {}
<> 144:ef7eb2e8f9f7 202 AFTER_VECTORS void HardFault_Handler (void) {}
<> 144:ef7eb2e8f9f7 203 AFTER_VECTORS void MemManage_Handler (void) {}
<> 144:ef7eb2e8f9f7 204 AFTER_VECTORS void BusFault_Handler (void) {}
<> 144:ef7eb2e8f9f7 205 AFTER_VECTORS void UsageFault_Handler(void) {}
<> 144:ef7eb2e8f9f7 206 AFTER_VECTORS void SVC_Handler (void) {}
<> 144:ef7eb2e8f9f7 207 AFTER_VECTORS void DebugMon_Handler (void) {}
<> 144:ef7eb2e8f9f7 208 AFTER_VECTORS void PendSV_Handler (void) {}
<> 144:ef7eb2e8f9f7 209 AFTER_VECTORS void SysTick_Handler (void) {}
<> 144:ef7eb2e8f9f7 210 AFTER_VECTORS void IntDefaultHandler (void) {}
<> 144:ef7eb2e8f9f7 211
<> 144:ef7eb2e8f9f7 212 int __aeabi_atexit(void *object, void (*destructor)(void *), void *dso_handle) {return 0;}
<> 144:ef7eb2e8f9f7 213 }