FMF-ART / mbed-dev-lib

Important changes to repositories hosted on mbed.com

Mbed hosted mercurial repositories are deprecated and are due to be permanently deleted in July 2026.

To keep a copy of this software download the repository Zip archive or clone locally using Mercurial.

It is also possible to export all your personal repositories from the account settings page.

Fork of mbed-dev by mbed official

targets/TARGET_Maxim/TARGET_MAX32620/device/pt_regs.h@149:156823d33999, 2016-10-28 (annotated)

Committer:
<>
Date:
Fri Oct 28 11:17:30 2016 +0100
Revision:
149:156823d33999
Parent:
targets/cmsis/TARGET_Maxim/TARGET_MAX32620/pt_regs.h@144:ef7eb2e8f9f7 
This updates the lib to the mbed lib v128



NOTE: This release includes a restructuring of the file and directory locations and thus some

include paths in your code may need updating accordingly.

Who changed what in which revision?

UserRevisionLine numberNew contents of line
<> 144:ef7eb2e8f9f7 1 /*******************************************************************************
<> 144:ef7eb2e8f9f7 2 * Copyright (C) 2016 Maxim Integrated Products, Inc., All Rights Reserved.
<> 144:ef7eb2e8f9f7 3 *
<> 144:ef7eb2e8f9f7 4 * Permission is hereby granted, free of charge, to any person obtaining a
<> 144:ef7eb2e8f9f7 5 * copy of this software and associated documentation files (the "Software"),
<> 144:ef7eb2e8f9f7 6 * to deal in the Software without restriction, including without limitation
<> 144:ef7eb2e8f9f7 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
<> 144:ef7eb2e8f9f7 8 * and/or sell copies of the Software, and to permit persons to whom the
<> 144:ef7eb2e8f9f7 9 * Software is furnished to do so, subject to the following conditions:
<> 144:ef7eb2e8f9f7 10 *
<> 144:ef7eb2e8f9f7 11 * The above copyright notice and this permission notice shall be included
<> 144:ef7eb2e8f9f7 12 * in all copies or substantial portions of the Software.
<> 144:ef7eb2e8f9f7 13 *
<> 144:ef7eb2e8f9f7 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
<> 144:ef7eb2e8f9f7 15 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
<> 144:ef7eb2e8f9f7 16 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
<> 144:ef7eb2e8f9f7 17 * IN NO EVENT SHALL MAXIM INTEGRATED BE LIABLE FOR ANY CLAIM, DAMAGES
<> 144:ef7eb2e8f9f7 18 * OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
<> 144:ef7eb2e8f9f7 19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
<> 144:ef7eb2e8f9f7 20 * OTHER DEALINGS IN THE SOFTWARE.
<> 144:ef7eb2e8f9f7 21 *
<> 144:ef7eb2e8f9f7 22 * Except as contained in this notice, the name of Maxim Integrated
<> 144:ef7eb2e8f9f7 23 * Products, Inc. shall not be used except as stated in the Maxim Integrated
<> 144:ef7eb2e8f9f7 24 * Products, Inc. Branding Policy.
<> 144:ef7eb2e8f9f7 25 *
<> 144:ef7eb2e8f9f7 26 * The mere transfer of this software does not imply any licenses
<> 144:ef7eb2e8f9f7 27 * of trade secrets, proprietary technology, copyrights, patents,
<> 144:ef7eb2e8f9f7 28 * trademarks, maskwork rights, or any other form of intellectual
<> 144:ef7eb2e8f9f7 29 * property whatsoever. Maxim Integrated Products, Inc. retains all
<> 144:ef7eb2e8f9f7 30 * ownership rights.
<> 144:ef7eb2e8f9f7 31 *******************************************************************************
<> 144:ef7eb2e8f9f7 32 */
<> 144:ef7eb2e8f9f7 33
<> 144:ef7eb2e8f9f7 34 #ifndef _MXC_PT_REGS_H_
<> 144:ef7eb2e8f9f7 35 #define _MXC_PT_REGS_H_
<> 144:ef7eb2e8f9f7 36
<> 144:ef7eb2e8f9f7 37 #ifdef __cplusplus
<> 144:ef7eb2e8f9f7 38 extern "C" {
<> 144:ef7eb2e8f9f7 39 #endif
<> 144:ef7eb2e8f9f7 40
<> 144:ef7eb2e8f9f7 41 #include <stdint.h>
<> 144:ef7eb2e8f9f7 42
<> 144:ef7eb2e8f9f7 43 /*
<> 144:ef7eb2e8f9f7 44 If types are not defined elsewhere (CMSIS) define them here
<> 144:ef7eb2e8f9f7 45 */
<> 144:ef7eb2e8f9f7 46 #ifndef __IO
<> 144:ef7eb2e8f9f7 47 #define __IO volatile
<> 144:ef7eb2e8f9f7 48 #endif
<> 144:ef7eb2e8f9f7 49 #ifndef __I
<> 144:ef7eb2e8f9f7 50 #define __I volatile const
<> 144:ef7eb2e8f9f7 51 #endif
<> 144:ef7eb2e8f9f7 52 #ifndef __O
<> 144:ef7eb2e8f9f7 53 #define __O volatile
<> 144:ef7eb2e8f9f7 54 #endif
<> 144:ef7eb2e8f9f7 55
<> 144:ef7eb2e8f9f7 56
<> 144:ef7eb2e8f9f7 57 /*
<> 144:ef7eb2e8f9f7 58 Typedefed structure(s) for module registers (per instance or section) with direct 32-bit
<> 144:ef7eb2e8f9f7 59 access to each register in module.
<> 144:ef7eb2e8f9f7 60 */
<> 144:ef7eb2e8f9f7 61
<> 144:ef7eb2e8f9f7 62 /* Offset Register Description
<> 144:ef7eb2e8f9f7 63 ============= ============================================================================ */
<> 144:ef7eb2e8f9f7 64 typedef struct {
<> 144:ef7eb2e8f9f7 65 __IO uint32_t enable; /* 0x0000 Global Enable/Disable Controls for All Pulse Trains */
<> 144:ef7eb2e8f9f7 66 __IO uint32_t resync; /* 0x0004 Global Resync (All Pulse Trains) Control */
<> 144:ef7eb2e8f9f7 67 __IO uint32_t intfl; /* 0x0008 Pulse Train Interrupt Flags */
<> 144:ef7eb2e8f9f7 68 __IO uint32_t inten; /* 0x000C Pulse Train Interrupt Enable/Disable */
<> 144:ef7eb2e8f9f7 69 } mxc_ptg_regs_t;
<> 144:ef7eb2e8f9f7 70
<> 144:ef7eb2e8f9f7 71
<> 144:ef7eb2e8f9f7 72 /* Offset Register Description
<> 144:ef7eb2e8f9f7 73 ============= ============================================================================ */
<> 144:ef7eb2e8f9f7 74 typedef struct {
<> 144:ef7eb2e8f9f7 75 __IO uint32_t rate_length; /* 0x0000 Pulse Train Configuration */
<> 144:ef7eb2e8f9f7 76 __IO uint32_t train; /* 0x0004 Pulse Train Output Pattern */
<> 144:ef7eb2e8f9f7 77 __IO uint32_t loop; /* 0x0008 Pulse Train Loop Count */
<> 144:ef7eb2e8f9f7 78 } mxc_pt_regs_t;
<> 144:ef7eb2e8f9f7 79
<> 144:ef7eb2e8f9f7 80
<> 144:ef7eb2e8f9f7 81 /*
<> 144:ef7eb2e8f9f7 82 Register offsets for module PT.
<> 144:ef7eb2e8f9f7 83 */
<> 144:ef7eb2e8f9f7 84
<> 144:ef7eb2e8f9f7 85 #define MXC_R_PTG_OFFS_ENABLE ((uint32_t)0x00000000UL)
<> 144:ef7eb2e8f9f7 86 #define MXC_R_PTG_OFFS_RESYNC ((uint32_t)0x00000004UL)
<> 144:ef7eb2e8f9f7 87 #define MXC_R_PTG_OFFS_INTFL ((uint32_t)0x00000008UL)
<> 144:ef7eb2e8f9f7 88 #define MXC_R_PTG_OFFS_INTEN ((uint32_t)0x0000000CUL)
<> 144:ef7eb2e8f9f7 89 #define MXC_R_PT_OFFS_RATE_LENGTH ((uint32_t)0x00000000UL)
<> 144:ef7eb2e8f9f7 90 #define MXC_R_PT_OFFS_TRAIN ((uint32_t)0x00000004UL)
<> 144:ef7eb2e8f9f7 91 #define MXC_R_PT_OFFS_LOOP ((uint32_t)0x00000008UL)
<> 144:ef7eb2e8f9f7 92
<> 144:ef7eb2e8f9f7 93
<> 144:ef7eb2e8f9f7 94 /*
<> 144:ef7eb2e8f9f7 95 Field positions and masks for module PT.
<> 144:ef7eb2e8f9f7 96 */
<> 144:ef7eb2e8f9f7 97
<> 144:ef7eb2e8f9f7 98 #define MXC_F_PT_ENABLE_PT0_POS 0
<> 144:ef7eb2e8f9f7 99 #define MXC_F_PT_ENABLE_PT0 ((uint32_t)(0x00000001UL << MXC_F_PT_ENABLE_PT0_POS))
<> 144:ef7eb2e8f9f7 100 #define MXC_F_PT_ENABLE_PT1_POS 1
<> 144:ef7eb2e8f9f7 101 #define MXC_F_PT_ENABLE_PT1 ((uint32_t)(0x00000001UL << MXC_F_PT_ENABLE_PT1_POS))
<> 144:ef7eb2e8f9f7 102 #define MXC_F_PT_ENABLE_PT2_POS 2
<> 144:ef7eb2e8f9f7 103 #define MXC_F_PT_ENABLE_PT2 ((uint32_t)(0x00000001UL << MXC_F_PT_ENABLE_PT2_POS))
<> 144:ef7eb2e8f9f7 104 #define MXC_F_PT_ENABLE_PT3_POS 3
<> 144:ef7eb2e8f9f7 105 #define MXC_F_PT_ENABLE_PT3 ((uint32_t)(0x00000001UL << MXC_F_PT_ENABLE_PT3_POS))
<> 144:ef7eb2e8f9f7 106 #define MXC_F_PT_ENABLE_PT4_POS 4
<> 144:ef7eb2e8f9f7 107 #define MXC_F_PT_ENABLE_PT4 ((uint32_t)(0x00000001UL << MXC_F_PT_ENABLE_PT4_POS))
<> 144:ef7eb2e8f9f7 108 #define MXC_F_PT_ENABLE_PT5_POS 5
<> 144:ef7eb2e8f9f7 109 #define MXC_F_PT_ENABLE_PT5 ((uint32_t)(0x00000001UL << MXC_F_PT_ENABLE_PT5_POS))
<> 144:ef7eb2e8f9f7 110 #define MXC_F_PT_ENABLE_PT6_POS 6
<> 144:ef7eb2e8f9f7 111 #define MXC_F_PT_ENABLE_PT6 ((uint32_t)(0x00000001UL << MXC_F_PT_ENABLE_PT6_POS))
<> 144:ef7eb2e8f9f7 112 #define MXC_F_PT_ENABLE_PT7_POS 7
<> 144:ef7eb2e8f9f7 113 #define MXC_F_PT_ENABLE_PT7 ((uint32_t)(0x00000001UL << MXC_F_PT_ENABLE_PT7_POS))
<> 144:ef7eb2e8f9f7 114 #define MXC_F_PT_ENABLE_PT8_POS 8
<> 144:ef7eb2e8f9f7 115 #define MXC_F_PT_ENABLE_PT8 ((uint32_t)(0x00000001UL << MXC_F_PT_ENABLE_PT8_POS))
<> 144:ef7eb2e8f9f7 116 #define MXC_F_PT_ENABLE_PT9_POS 9
<> 144:ef7eb2e8f9f7 117 #define MXC_F_PT_ENABLE_PT9 ((uint32_t)(0x00000001UL << MXC_F_PT_ENABLE_PT9_POS))
<> 144:ef7eb2e8f9f7 118 #define MXC_F_PT_ENABLE_PT10_POS 10
<> 144:ef7eb2e8f9f7 119 #define MXC_F_PT_ENABLE_PT10 ((uint32_t)(0x00000001UL << MXC_F_PT_ENABLE_PT10_POS))
<> 144:ef7eb2e8f9f7 120 #define MXC_F_PT_ENABLE_PT11_POS 11
<> 144:ef7eb2e8f9f7 121 #define MXC_F_PT_ENABLE_PT11 ((uint32_t)(0x00000001UL << MXC_F_PT_ENABLE_PT11_POS))
<> 144:ef7eb2e8f9f7 122 #define MXC_F_PT_ENABLE_PT12_POS 12
<> 144:ef7eb2e8f9f7 123 #define MXC_F_PT_ENABLE_PT12 ((uint32_t)(0x00000001UL << MXC_F_PT_ENABLE_PT12_POS))
<> 144:ef7eb2e8f9f7 124 #define MXC_F_PT_ENABLE_PT13_POS 13
<> 144:ef7eb2e8f9f7 125 #define MXC_F_PT_ENABLE_PT13 ((uint32_t)(0x00000001UL << MXC_F_PT_ENABLE_PT13_POS))
<> 144:ef7eb2e8f9f7 126 #define MXC_F_PT_ENABLE_PT14_POS 14
<> 144:ef7eb2e8f9f7 127 #define MXC_F_PT_ENABLE_PT14 ((uint32_t)(0x00000001UL << MXC_F_PT_ENABLE_PT14_POS))
<> 144:ef7eb2e8f9f7 128 #define MXC_F_PT_ENABLE_PT15_POS 15
<> 144:ef7eb2e8f9f7 129 #define MXC_F_PT_ENABLE_PT15 ((uint32_t)(0x00000001UL << MXC_F_PT_ENABLE_PT15_POS))
<> 144:ef7eb2e8f9f7 130
<> 144:ef7eb2e8f9f7 131 #define MXC_F_PT_RESYNC_PT0_POS 0
<> 144:ef7eb2e8f9f7 132 #define MXC_F_PT_RESYNC_PT0 ((uint32_t)(0x00000001UL << MXC_F_PT_RESYNC_PT0_POS))
<> 144:ef7eb2e8f9f7 133 #define MXC_F_PT_RESYNC_PT1_POS 1
<> 144:ef7eb2e8f9f7 134 #define MXC_F_PT_RESYNC_PT1 ((uint32_t)(0x00000001UL << MXC_F_PT_RESYNC_PT1_POS))
<> 144:ef7eb2e8f9f7 135 #define MXC_F_PT_RESYNC_PT2_POS 2
<> 144:ef7eb2e8f9f7 136 #define MXC_F_PT_RESYNC_PT2 ((uint32_t)(0x00000001UL << MXC_F_PT_RESYNC_PT2_POS))
<> 144:ef7eb2e8f9f7 137 #define MXC_F_PT_RESYNC_PT3_POS 3
<> 144:ef7eb2e8f9f7 138 #define MXC_F_PT_RESYNC_PT3 ((uint32_t)(0x00000001UL << MXC_F_PT_RESYNC_PT3_POS))
<> 144:ef7eb2e8f9f7 139 #define MXC_F_PT_RESYNC_PT4_POS 4
<> 144:ef7eb2e8f9f7 140 #define MXC_F_PT_RESYNC_PT4 ((uint32_t)(0x00000001UL << MXC_F_PT_RESYNC_PT4_POS))
<> 144:ef7eb2e8f9f7 141 #define MXC_F_PT_RESYNC_PT5_POS 5
<> 144:ef7eb2e8f9f7 142 #define MXC_F_PT_RESYNC_PT5 ((uint32_t)(0x00000001UL << MXC_F_PT_RESYNC_PT5_POS))
<> 144:ef7eb2e8f9f7 143 #define MXC_F_PT_RESYNC_PT6_POS 6
<> 144:ef7eb2e8f9f7 144 #define MXC_F_PT_RESYNC_PT6 ((uint32_t)(0x00000001UL << MXC_F_PT_RESYNC_PT6_POS))
<> 144:ef7eb2e8f9f7 145 #define MXC_F_PT_RESYNC_PT7_POS 7
<> 144:ef7eb2e8f9f7 146 #define MXC_F_PT_RESYNC_PT7 ((uint32_t)(0x00000001UL << MXC_F_PT_RESYNC_PT7_POS))
<> 144:ef7eb2e8f9f7 147 #define MXC_F_PT_RESYNC_PT8_POS 8
<> 144:ef7eb2e8f9f7 148 #define MXC_F_PT_RESYNC_PT8 ((uint32_t)(0x00000001UL << MXC_F_PT_RESYNC_PT8_POS))
<> 144:ef7eb2e8f9f7 149 #define MXC_F_PT_RESYNC_PT9_POS 9
<> 144:ef7eb2e8f9f7 150 #define MXC_F_PT_RESYNC_PT9 ((uint32_t)(0x00000001UL << MXC_F_PT_RESYNC_PT9_POS))
<> 144:ef7eb2e8f9f7 151 #define MXC_F_PT_RESYNC_PT10_POS 10
<> 144:ef7eb2e8f9f7 152 #define MXC_F_PT_RESYNC_PT10 ((uint32_t)(0x00000001UL << MXC_F_PT_RESYNC_PT10_POS))
<> 144:ef7eb2e8f9f7 153 #define MXC_F_PT_RESYNC_PT11_POS 11
<> 144:ef7eb2e8f9f7 154 #define MXC_F_PT_RESYNC_PT11 ((uint32_t)(0x00000001UL << MXC_F_PT_RESYNC_PT11_POS))
<> 144:ef7eb2e8f9f7 155 #define MXC_F_PT_RESYNC_PT12_POS 12
<> 144:ef7eb2e8f9f7 156 #define MXC_F_PT_RESYNC_PT12 ((uint32_t)(0x00000001UL << MXC_F_PT_RESYNC_PT12_POS))
<> 144:ef7eb2e8f9f7 157 #define MXC_F_PT_RESYNC_PT13_POS 13
<> 144:ef7eb2e8f9f7 158 #define MXC_F_PT_RESYNC_PT13 ((uint32_t)(0x00000001UL << MXC_F_PT_RESYNC_PT13_POS))
<> 144:ef7eb2e8f9f7 159 #define MXC_F_PT_RESYNC_PT14_POS 14
<> 144:ef7eb2e8f9f7 160 #define MXC_F_PT_RESYNC_PT14 ((uint32_t)(0x00000001UL << MXC_F_PT_RESYNC_PT14_POS))
<> 144:ef7eb2e8f9f7 161 #define MXC_F_PT_RESYNC_PT15_POS 15
<> 144:ef7eb2e8f9f7 162 #define MXC_F_PT_RESYNC_PT15 ((uint32_t)(0x00000001UL << MXC_F_PT_RESYNC_PT15_POS))
<> 144:ef7eb2e8f9f7 163
<> 144:ef7eb2e8f9f7 164 #define MXC_F_PT_INTFL_PT0_POS 0
<> 144:ef7eb2e8f9f7 165 #define MXC_F_PT_INTFL_PT0 ((uint32_t)(0x00000001UL << MXC_F_PT_INTFL_PT0_POS))
<> 144:ef7eb2e8f9f7 166 #define MXC_F_PT_INTFL_PT1_POS 1
<> 144:ef7eb2e8f9f7 167 #define MXC_F_PT_INTFL_PT1 ((uint32_t)(0x00000001UL << MXC_F_PT_INTFL_PT1_POS))
<> 144:ef7eb2e8f9f7 168 #define MXC_F_PT_INTFL_PT2_POS 2
<> 144:ef7eb2e8f9f7 169 #define MXC_F_PT_INTFL_PT2 ((uint32_t)(0x00000001UL << MXC_F_PT_INTFL_PT2_POS))
<> 144:ef7eb2e8f9f7 170 #define MXC_F_PT_INTFL_PT3_POS 3
<> 144:ef7eb2e8f9f7 171 #define MXC_F_PT_INTFL_PT3 ((uint32_t)(0x00000001UL << MXC_F_PT_INTFL_PT3_POS))
<> 144:ef7eb2e8f9f7 172 #define MXC_F_PT_INTFL_PT4_POS 4
<> 144:ef7eb2e8f9f7 173 #define MXC_F_PT_INTFL_PT4 ((uint32_t)(0x00000001UL << MXC_F_PT_INTFL_PT4_POS))
<> 144:ef7eb2e8f9f7 174 #define MXC_F_PT_INTFL_PT5_POS 5
<> 144:ef7eb2e8f9f7 175 #define MXC_F_PT_INTFL_PT5 ((uint32_t)(0x00000001UL << MXC_F_PT_INTFL_PT5_POS))
<> 144:ef7eb2e8f9f7 176 #define MXC_F_PT_INTFL_PT6_POS 6
<> 144:ef7eb2e8f9f7 177 #define MXC_F_PT_INTFL_PT6 ((uint32_t)(0x00000001UL << MXC_F_PT_INTFL_PT6_POS))
<> 144:ef7eb2e8f9f7 178 #define MXC_F_PT_INTFL_PT7_POS 7
<> 144:ef7eb2e8f9f7 179 #define MXC_F_PT_INTFL_PT7 ((uint32_t)(0x00000001UL << MXC_F_PT_INTFL_PT7_POS))
<> 144:ef7eb2e8f9f7 180 #define MXC_F_PT_INTFL_PT8_POS 8
<> 144:ef7eb2e8f9f7 181 #define MXC_F_PT_INTFL_PT8 ((uint32_t)(0x00000001UL << MXC_F_PT_INTFL_PT8_POS))
<> 144:ef7eb2e8f9f7 182 #define MXC_F_PT_INTFL_PT9_POS 9
<> 144:ef7eb2e8f9f7 183 #define MXC_F_PT_INTFL_PT9 ((uint32_t)(0x00000001UL << MXC_F_PT_INTFL_PT9_POS))
<> 144:ef7eb2e8f9f7 184 #define MXC_F_PT_INTFL_PT10_POS 10
<> 144:ef7eb2e8f9f7 185 #define MXC_F_PT_INTFL_PT10 ((uint32_t)(0x00000001UL << MXC_F_PT_INTFL_PT10_POS))
<> 144:ef7eb2e8f9f7 186 #define MXC_F_PT_INTFL_PT11_POS 11
<> 144:ef7eb2e8f9f7 187 #define MXC_F_PT_INTFL_PT11 ((uint32_t)(0x00000001UL << MXC_F_PT_INTFL_PT11_POS))
<> 144:ef7eb2e8f9f7 188 #define MXC_F_PT_INTFL_PT12_POS 12
<> 144:ef7eb2e8f9f7 189 #define MXC_F_PT_INTFL_PT12 ((uint32_t)(0x00000001UL << MXC_F_PT_INTFL_PT12_POS))
<> 144:ef7eb2e8f9f7 190 #define MXC_F_PT_INTFL_PT13_POS 13
<> 144:ef7eb2e8f9f7 191 #define MXC_F_PT_INTFL_PT13 ((uint32_t)(0x00000001UL << MXC_F_PT_INTFL_PT13_POS))
<> 144:ef7eb2e8f9f7 192 #define MXC_F_PT_INTFL_PT14_POS 14
<> 144:ef7eb2e8f9f7 193 #define MXC_F_PT_INTFL_PT14 ((uint32_t)(0x00000001UL << MXC_F_PT_INTFL_PT14_POS))
<> 144:ef7eb2e8f9f7 194 #define MXC_F_PT_INTFL_PT15_POS 15
<> 144:ef7eb2e8f9f7 195 #define MXC_F_PT_INTFL_PT15 ((uint32_t)(0x00000001UL << MXC_F_PT_INTFL_PT15_POS))
<> 144:ef7eb2e8f9f7 196
<> 144:ef7eb2e8f9f7 197 #define MXC_F_PT_INTEN_PT0_POS 0
<> 144:ef7eb2e8f9f7 198 #define MXC_F_PT_INTEN_PT0 ((uint32_t)(0x00000001UL << MXC_F_PT_INTEN_PT0_POS))
<> 144:ef7eb2e8f9f7 199 #define MXC_F_PT_INTEN_PT1_POS 1
<> 144:ef7eb2e8f9f7 200 #define MXC_F_PT_INTEN_PT1 ((uint32_t)(0x00000001UL << MXC_F_PT_INTEN_PT1_POS))
<> 144:ef7eb2e8f9f7 201 #define MXC_F_PT_INTEN_PT2_POS 2
<> 144:ef7eb2e8f9f7 202 #define MXC_F_PT_INTEN_PT2 ((uint32_t)(0x00000001UL << MXC_F_PT_INTEN_PT2_POS))
<> 144:ef7eb2e8f9f7 203 #define MXC_F_PT_INTEN_PT3_POS 3
<> 144:ef7eb2e8f9f7 204 #define MXC_F_PT_INTEN_PT3 ((uint32_t)(0x00000001UL << MXC_F_PT_INTEN_PT3_POS))
<> 144:ef7eb2e8f9f7 205 #define MXC_F_PT_INTEN_PT4_POS 4
<> 144:ef7eb2e8f9f7 206 #define MXC_F_PT_INTEN_PT4 ((uint32_t)(0x00000001UL << MXC_F_PT_INTEN_PT4_POS))
<> 144:ef7eb2e8f9f7 207 #define MXC_F_PT_INTEN_PT5_POS 5
<> 144:ef7eb2e8f9f7 208 #define MXC_F_PT_INTEN_PT5 ((uint32_t)(0x00000001UL << MXC_F_PT_INTEN_PT5_POS))
<> 144:ef7eb2e8f9f7 209 #define MXC_F_PT_INTEN_PT6_POS 6
<> 144:ef7eb2e8f9f7 210 #define MXC_F_PT_INTEN_PT6 ((uint32_t)(0x00000001UL << MXC_F_PT_INTEN_PT6_POS))
<> 144:ef7eb2e8f9f7 211 #define MXC_F_PT_INTEN_PT7_POS 7
<> 144:ef7eb2e8f9f7 212 #define MXC_F_PT_INTEN_PT7 ((uint32_t)(0x00000001UL << MXC_F_PT_INTEN_PT7_POS))
<> 144:ef7eb2e8f9f7 213 #define MXC_F_PT_INTEN_PT8_POS 8
<> 144:ef7eb2e8f9f7 214 #define MXC_F_PT_INTEN_PT8 ((uint32_t)(0x00000001UL << MXC_F_PT_INTEN_PT8_POS))
<> 144:ef7eb2e8f9f7 215 #define MXC_F_PT_INTEN_PT9_POS 9
<> 144:ef7eb2e8f9f7 216 #define MXC_F_PT_INTEN_PT9 ((uint32_t)(0x00000001UL << MXC_F_PT_INTEN_PT9_POS))
<> 144:ef7eb2e8f9f7 217 #define MXC_F_PT_INTEN_PT10_POS 10
<> 144:ef7eb2e8f9f7 218 #define MXC_F_PT_INTEN_PT10 ((uint32_t)(0x00000001UL << MXC_F_PT_INTEN_PT10_POS))
<> 144:ef7eb2e8f9f7 219 #define MXC_F_PT_INTEN_PT11_POS 11
<> 144:ef7eb2e8f9f7 220 #define MXC_F_PT_INTEN_PT11 ((uint32_t)(0x00000001UL << MXC_F_PT_INTEN_PT11_POS))
<> 144:ef7eb2e8f9f7 221 #define MXC_F_PT_INTEN_PT12_POS 12
<> 144:ef7eb2e8f9f7 222 #define MXC_F_PT_INTEN_PT12 ((uint32_t)(0x00000001UL << MXC_F_PT_INTEN_PT12_POS))
<> 144:ef7eb2e8f9f7 223 #define MXC_F_PT_INTEN_PT13_POS 13
<> 144:ef7eb2e8f9f7 224 #define MXC_F_PT_INTEN_PT13 ((uint32_t)(0x00000001UL << MXC_F_PT_INTEN_PT13_POS))
<> 144:ef7eb2e8f9f7 225 #define MXC_F_PT_INTEN_PT14_POS 14
<> 144:ef7eb2e8f9f7 226 #define MXC_F_PT_INTEN_PT14 ((uint32_t)(0x00000001UL << MXC_F_PT_INTEN_PT14_POS))
<> 144:ef7eb2e8f9f7 227 #define MXC_F_PT_INTEN_PT15_POS 15
<> 144:ef7eb2e8f9f7 228 #define MXC_F_PT_INTEN_PT15 ((uint32_t)(0x00000001UL << MXC_F_PT_INTEN_PT15_POS))
<> 144:ef7eb2e8f9f7 229
<> 144:ef7eb2e8f9f7 230 #define MXC_F_PT_RATE_LENGTH_RATE_CONTROL_POS 0
<> 144:ef7eb2e8f9f7 231 #define MXC_F_PT_RATE_LENGTH_RATE_CONTROL ((uint32_t)(0x07FFFFFFUL << MXC_F_PT_RATE_LENGTH_RATE_CONTROL_POS))
<> 144:ef7eb2e8f9f7 232 #define MXC_F_PT_RATE_LENGTH_MODE_POS 27
<> 144:ef7eb2e8f9f7 233 #define MXC_F_PT_RATE_LENGTH_MODE ((uint32_t)(0x0000001FUL << MXC_F_PT_RATE_LENGTH_MODE_POS))
<> 144:ef7eb2e8f9f7 234
<> 144:ef7eb2e8f9f7 235
<> 144:ef7eb2e8f9f7 236
<> 144:ef7eb2e8f9f7 237 /*
<> 144:ef7eb2e8f9f7 238 Field values and shifted values for module PT.
<> 144:ef7eb2e8f9f7 239 */
<> 144:ef7eb2e8f9f7 240
<> 144:ef7eb2e8f9f7 241 #define MXC_V_PT_RATE_LENGTH_MODE_32_BIT ((uint32_t)(0x00000000UL))
<> 144:ef7eb2e8f9f7 242 #define MXC_V_PT_RATE_LENGTH_MODE_SQUARE_WAVE ((uint32_t)(0x00000001UL))
<> 144:ef7eb2e8f9f7 243 #define MXC_V_PT_RATE_LENGTH_MODE_2_BIT ((uint32_t)(0x00000002UL))
<> 144:ef7eb2e8f9f7 244 #define MXC_V_PT_RATE_LENGTH_MODE_3_BIT ((uint32_t)(0x00000003UL))
<> 144:ef7eb2e8f9f7 245 #define MXC_V_PT_RATE_LENGTH_MODE_4_BIT ((uint32_t)(0x00000004UL))
<> 144:ef7eb2e8f9f7 246 #define MXC_V_PT_RATE_LENGTH_MODE_5_BIT ((uint32_t)(0x00000005UL))
<> 144:ef7eb2e8f9f7 247 #define MXC_V_PT_RATE_LENGTH_MODE_6_BIT ((uint32_t)(0x00000006UL))
<> 144:ef7eb2e8f9f7 248 #define MXC_V_PT_RATE_LENGTH_MODE_7_BIT ((uint32_t)(0x00000007UL))
<> 144:ef7eb2e8f9f7 249 #define MXC_V_PT_RATE_LENGTH_MODE_8_BIT ((uint32_t)(0x00000008UL))
<> 144:ef7eb2e8f9f7 250 #define MXC_V_PT_RATE_LENGTH_MODE_9_BIT ((uint32_t)(0x00000009UL))
<> 144:ef7eb2e8f9f7 251 #define MXC_V_PT_RATE_LENGTH_MODE_10_BIT ((uint32_t)(0x0000000AUL))
<> 144:ef7eb2e8f9f7 252 #define MXC_V_PT_RATE_LENGTH_MODE_11_BIT ((uint32_t)(0x0000000BUL))
<> 144:ef7eb2e8f9f7 253 #define MXC_V_PT_RATE_LENGTH_MODE_12_BIT ((uint32_t)(0x0000000CUL))
<> 144:ef7eb2e8f9f7 254 #define MXC_V_PT_RATE_LENGTH_MODE_13_BIT ((uint32_t)(0x0000000DUL))
<> 144:ef7eb2e8f9f7 255 #define MXC_V_PT_RATE_LENGTH_MODE_14_BIT ((uint32_t)(0x0000000EUL))
<> 144:ef7eb2e8f9f7 256 #define MXC_V_PT_RATE_LENGTH_MODE_15_BIT ((uint32_t)(0x0000000FUL))
<> 144:ef7eb2e8f9f7 257 #define MXC_V_PT_RATE_LENGTH_MODE_16_BIT ((uint32_t)(0x00000010UL))
<> 144:ef7eb2e8f9f7 258 #define MXC_V_PT_RATE_LENGTH_MODE_17_BIT ((uint32_t)(0x00000011UL))
<> 144:ef7eb2e8f9f7 259 #define MXC_V_PT_RATE_LENGTH_MODE_18_BIT ((uint32_t)(0x00000012UL))
<> 144:ef7eb2e8f9f7 260 #define MXC_V_PT_RATE_LENGTH_MODE_19_BIT ((uint32_t)(0x00000013UL))
<> 144:ef7eb2e8f9f7 261 #define MXC_V_PT_RATE_LENGTH_MODE_20_BIT ((uint32_t)(0x00000014UL))
<> 144:ef7eb2e8f9f7 262 #define MXC_V_PT_RATE_LENGTH_MODE_21_BIT ((uint32_t)(0x00000015UL))
<> 144:ef7eb2e8f9f7 263 #define MXC_V_PT_RATE_LENGTH_MODE_22_BIT ((uint32_t)(0x00000016UL))
<> 144:ef7eb2e8f9f7 264 #define MXC_V_PT_RATE_LENGTH_MODE_23_BIT ((uint32_t)(0x00000017UL))
<> 144:ef7eb2e8f9f7 265 #define MXC_V_PT_RATE_LENGTH_MODE_24_BIT ((uint32_t)(0x00000018UL))
<> 144:ef7eb2e8f9f7 266 #define MXC_V_PT_RATE_LENGTH_MODE_25_BIT ((uint32_t)(0x00000019UL))
<> 144:ef7eb2e8f9f7 267 #define MXC_V_PT_RATE_LENGTH_MODE_26_BIT ((uint32_t)(0x0000001AUL))
<> 144:ef7eb2e8f9f7 268 #define MXC_V_PT_RATE_LENGTH_MODE_27_BIT ((uint32_t)(0x0000001BUL))
<> 144:ef7eb2e8f9f7 269 #define MXC_V_PT_RATE_LENGTH_MODE_28_BIT ((uint32_t)(0x0000001CUL))
<> 144:ef7eb2e8f9f7 270 #define MXC_V_PT_RATE_LENGTH_MODE_29_BIT ((uint32_t)(0x0000001DUL))
<> 144:ef7eb2e8f9f7 271 #define MXC_V_PT_RATE_LENGTH_MODE_30_BIT ((uint32_t)(0x0000001EUL))
<> 144:ef7eb2e8f9f7 272 #define MXC_V_PT_RATE_LENGTH_MODE_31_BIT ((uint32_t)(0x0000001FUL))
<> 144:ef7eb2e8f9f7 273
<> 144:ef7eb2e8f9f7 274 #define MXC_S_PT_RATE_LENGTH_MODE_32_BIT ((uint32_t)(MXC_V_PT_RATE_LENGTH_MODE_32_BIT << MXC_F_PT_RATE_LENGTH_MODE_POS))
<> 144:ef7eb2e8f9f7 275 #define MXC_S_PT_RATE_LENGTH_MODE_SQUARE_WAVE ((uint32_t)(MXC_V_PT_RATE_LENGTH_MODE_SQUARE_WAVE << MXC_F_PT_RATE_LENGTH_MODE_POS))
<> 144:ef7eb2e8f9f7 276 #define MXC_S_PT_RATE_LENGTH_MODE_2_BIT ((uint32_t)(MXC_V_PT_RATE_LENGTH_MODE_2_BIT << MXC_F_PT_RATE_LENGTH_MODE_POS))
<> 144:ef7eb2e8f9f7 277 #define MXC_S_PT_RATE_LENGTH_MODE_3_BIT ((uint32_t)(MXC_V_PT_RATE_LENGTH_MODE_3_BIT << MXC_F_PT_RATE_LENGTH_MODE_POS))
<> 144:ef7eb2e8f9f7 278 #define MXC_S_PT_RATE_LENGTH_MODE_4_BIT ((uint32_t)(MXC_V_PT_RATE_LENGTH_MODE_4_BIT << MXC_F_PT_RATE_LENGTH_MODE_POS))
<> 144:ef7eb2e8f9f7 279 #define MXC_S_PT_RATE_LENGTH_MODE_5_BIT ((uint32_t)(MXC_V_PT_RATE_LENGTH_MODE_5_BIT << MXC_F_PT_RATE_LENGTH_MODE_POS))
<> 144:ef7eb2e8f9f7 280 #define MXC_S_PT_RATE_LENGTH_MODE_6_BIT ((uint32_t)(MXC_V_PT_RATE_LENGTH_MODE_6_BIT << MXC_F_PT_RATE_LENGTH_MODE_POS))
<> 144:ef7eb2e8f9f7 281 #define MXC_S_PT_RATE_LENGTH_MODE_7_BIT ((uint32_t)(MXC_V_PT_RATE_LENGTH_MODE_7_BIT << MXC_F_PT_RATE_LENGTH_MODE_POS))
<> 144:ef7eb2e8f9f7 282 #define MXC_S_PT_RATE_LENGTH_MODE_8_BIT ((uint32_t)(MXC_V_PT_RATE_LENGTH_MODE_8_BIT << MXC_F_PT_RATE_LENGTH_MODE_POS))
<> 144:ef7eb2e8f9f7 283 #define MXC_S_PT_RATE_LENGTH_MODE_9_BIT ((uint32_t)(MXC_V_PT_RATE_LENGTH_MODE_9_BIT << MXC_F_PT_RATE_LENGTH_MODE_POS))
<> 144:ef7eb2e8f9f7 284 #define MXC_S_PT_RATE_LENGTH_MODE_10_BIT ((uint32_t)(MXC_V_PT_RATE_LENGTH_MODE_10_BIT << MXC_F_PT_RATE_LENGTH_MODE_POS))
<> 144:ef7eb2e8f9f7 285 #define MXC_S_PT_RATE_LENGTH_MODE_11_BIT ((uint32_t)(MXC_V_PT_RATE_LENGTH_MODE_11_BIT << MXC_F_PT_RATE_LENGTH_MODE_POS))
<> 144:ef7eb2e8f9f7 286 #define MXC_S_PT_RATE_LENGTH_MODE_12_BIT ((uint32_t)(MXC_V_PT_RATE_LENGTH_MODE_12_BIT << MXC_F_PT_RATE_LENGTH_MODE_POS))
<> 144:ef7eb2e8f9f7 287 #define MXC_S_PT_RATE_LENGTH_MODE_13_BIT ((uint32_t)(MXC_V_PT_RATE_LENGTH_MODE_13_BIT << MXC_F_PT_RATE_LENGTH_MODE_POS))
<> 144:ef7eb2e8f9f7 288 #define MXC_S_PT_RATE_LENGTH_MODE_14_BIT ((uint32_t)(MXC_V_PT_RATE_LENGTH_MODE_14_BIT << MXC_F_PT_RATE_LENGTH_MODE_POS))
<> 144:ef7eb2e8f9f7 289 #define MXC_S_PT_RATE_LENGTH_MODE_15_BIT ((uint32_t)(MXC_V_PT_RATE_LENGTH_MODE_15_BIT << MXC_F_PT_RATE_LENGTH_MODE_POS))
<> 144:ef7eb2e8f9f7 290 #define MXC_S_PT_RATE_LENGTH_MODE_16_BIT ((uint32_t)(MXC_V_PT_RATE_LENGTH_MODE_16_BIT << MXC_F_PT_RATE_LENGTH_MODE_POS))
<> 144:ef7eb2e8f9f7 291 #define MXC_S_PT_RATE_LENGTH_MODE_17_BIT ((uint32_t)(MXC_V_PT_RATE_LENGTH_MODE_17_BIT << MXC_F_PT_RATE_LENGTH_MODE_POS))
<> 144:ef7eb2e8f9f7 292 #define MXC_S_PT_RATE_LENGTH_MODE_18_BIT ((uint32_t)(MXC_V_PT_RATE_LENGTH_MODE_18_BIT << MXC_F_PT_RATE_LENGTH_MODE_POS))
<> 144:ef7eb2e8f9f7 293 #define MXC_S_PT_RATE_LENGTH_MODE_19_BIT ((uint32_t)(MXC_V_PT_RATE_LENGTH_MODE_19_BIT << MXC_F_PT_RATE_LENGTH_MODE_POS))
<> 144:ef7eb2e8f9f7 294 #define MXC_S_PT_RATE_LENGTH_MODE_20_BIT ((uint32_t)(MXC_V_PT_RATE_LENGTH_MODE_20_BIT << MXC_F_PT_RATE_LENGTH_MODE_POS))
<> 144:ef7eb2e8f9f7 295 #define MXC_S_PT_RATE_LENGTH_MODE_21_BIT ((uint32_t)(MXC_V_PT_RATE_LENGTH_MODE_21_BIT << MXC_F_PT_RATE_LENGTH_MODE_POS))
<> 144:ef7eb2e8f9f7 296 #define MXC_S_PT_RATE_LENGTH_MODE_22_BIT ((uint32_t)(MXC_V_PT_RATE_LENGTH_MODE_22_BIT << MXC_F_PT_RATE_LENGTH_MODE_POS))
<> 144:ef7eb2e8f9f7 297 #define MXC_S_PT_RATE_LENGTH_MODE_23_BIT ((uint32_t)(MXC_V_PT_RATE_LENGTH_MODE_23_BIT << MXC_F_PT_RATE_LENGTH_MODE_POS))
<> 144:ef7eb2e8f9f7 298 #define MXC_S_PT_RATE_LENGTH_MODE_24_BIT ((uint32_t)(MXC_V_PT_RATE_LENGTH_MODE_24_BIT << MXC_F_PT_RATE_LENGTH_MODE_POS))
<> 144:ef7eb2e8f9f7 299 #define MXC_S_PT_RATE_LENGTH_MODE_25_BIT ((uint32_t)(MXC_V_PT_RATE_LENGTH_MODE_25_BIT << MXC_F_PT_RATE_LENGTH_MODE_POS))
<> 144:ef7eb2e8f9f7 300 #define MXC_S_PT_RATE_LENGTH_MODE_26_BIT ((uint32_t)(MXC_V_PT_RATE_LENGTH_MODE_26_BIT << MXC_F_PT_RATE_LENGTH_MODE_POS))
<> 144:ef7eb2e8f9f7 301 #define MXC_S_PT_RATE_LENGTH_MODE_27_BIT ((uint32_t)(MXC_V_PT_RATE_LENGTH_MODE_27_BIT << MXC_F_PT_RATE_LENGTH_MODE_POS))
<> 144:ef7eb2e8f9f7 302 #define MXC_S_PT_RATE_LENGTH_MODE_28_BIT ((uint32_t)(MXC_V_PT_RATE_LENGTH_MODE_28_BIT << MXC_F_PT_RATE_LENGTH_MODE_POS))
<> 144:ef7eb2e8f9f7 303 #define MXC_S_PT_RATE_LENGTH_MODE_29_BIT ((uint32_t)(MXC_V_PT_RATE_LENGTH_MODE_29_BIT << MXC_F_PT_RATE_LENGTH_MODE_POS))
<> 144:ef7eb2e8f9f7 304 #define MXC_S_PT_RATE_LENGTH_MODE_30_BIT ((uint32_t)(MXC_V_PT_RATE_LENGTH_MODE_30_BIT << MXC_F_PT_RATE_LENGTH_MODE_POS))
<> 144:ef7eb2e8f9f7 305 #define MXC_S_PT_RATE_LENGTH_MODE_31_BIT ((uint32_t)(MXC_V_PT_RATE_LENGTH_MODE_31_BIT << MXC_F_PT_RATE_LENGTH_MODE_POS))
<> 144:ef7eb2e8f9f7 306
<> 144:ef7eb2e8f9f7 307
<> 144:ef7eb2e8f9f7 308
<> 144:ef7eb2e8f9f7 309 #ifdef __cplusplus
<> 144:ef7eb2e8f9f7 310 }
<> 144:ef7eb2e8f9f7 311 #endif
<> 144:ef7eb2e8f9f7 312
<> 144:ef7eb2e8f9f7 313 #endif /* _MXC_PT_REGS_H_ */
<> 144:ef7eb2e8f9f7 314