Everspin Technologies, Inc. / Mbed 2 deprecated MRAM_MR25H00-EVAL

Dependencies:   mbed

Committer:
utlinebacker
Date:
Wed Feb 18 18:42:21 2015 +0000
Revision:
0:e37acb3371f0
Child:
1:d840fdc82450
Everspin MRAM

Who changed what in which revision?

UserRevisionLine numberNew contents of line
utlinebacker 0:e37acb3371f0 1 /*
utlinebacker 0:e37acb3371f0 2 * Everspin Technologies - The MRAM Company
utlinebacker 0:e37acb3371f0 3 * MR10Q010-EVAL SHIELD
utlinebacker 0:e37acb3371f0 4 * MR10Q010CSCR - 1Mb MRAM (128Kx8), 40MHz SPI
utlinebacker 0:e37acb3371f0 5 */
utlinebacker 0:e37acb3371f0 6
utlinebacker 0:e37acb3371f0 7
utlinebacker 0:e37acb3371f0 8 #include "mbed.h"
utlinebacker 0:e37acb3371f0 9
utlinebacker 0:e37acb3371f0 10 #define SERIAL_BAUD 115200
utlinebacker 0:e37acb3371f0 11 #define SPI_FREQ 40000000
utlinebacker 0:e37acb3371f0 12
utlinebacker 0:e37acb3371f0 13 //SPI Mode Commands for MR10Q010
utlinebacker 0:e37acb3371f0 14 #define CMD_RDSR 0x05
utlinebacker 0:e37acb3371f0 15 #define CMD_WREN 0x06
utlinebacker 0:e37acb3371f0 16 #define CMD_WRDI 0x04
utlinebacker 0:e37acb3371f0 17 #define CMD_WRSR 0x01
utlinebacker 0:e37acb3371f0 18 #define CMD_READ 0x03
utlinebacker 0:e37acb3371f0 19 #define CMD_FREAD 0x0B
utlinebacker 0:e37acb3371f0 20 #define CMD_WRITE 0x02
utlinebacker 0:e37acb3371f0 21 #define CMD_SLEEP 0xB9
utlinebacker 0:e37acb3371f0 22 #define CMD_WAKE 0xAB
utlinebacker 0:e37acb3371f0 23 #define CMD_TDET 0x17
utlinebacker 0:e37acb3371f0 24 #define CMD_RDID 0x48
utlinebacker 0:e37acb3371f0 25
utlinebacker 0:e37acb3371f0 26 //pin setup for interfacing with the device
utlinebacker 0:e37acb3371f0 27 SPI MR10Q010(D11, D12, D13); // mosi, miso, sclk
utlinebacker 0:e37acb3371f0 28 DigitalOut SS(D10);
utlinebacker 0:e37acb3371f0 29 DigitalOut WP(D9);
utlinebacker 0:e37acb3371f0 30 DigitalOut HOLD(D8);
utlinebacker 0:e37acb3371f0 31
utlinebacker 0:e37acb3371f0 32 //create a serial object for output to the terminal
utlinebacker 0:e37acb3371f0 33 Serial pc(SERIAL_TX, SERIAL_RX);
utlinebacker 0:e37acb3371f0 34
utlinebacker 0:e37acb3371f0 35 char wrbuf[256] = {0};
utlinebacker 0:e37acb3371f0 36 char rdbuf[256] = {0};
utlinebacker 0:e37acb3371f0 37
utlinebacker 0:e37acb3371f0 38 //MR10Q010 read wrapper function
utlinebacker 0:e37acb3371f0 39 int mram_read (int addr, char *buf, int len)
utlinebacker 0:e37acb3371f0 40 {
utlinebacker 0:e37acb3371f0 41 int i;
utlinebacker 0:e37acb3371f0 42
utlinebacker 0:e37acb3371f0 43 SS=0;
utlinebacker 0:e37acb3371f0 44 MR10Q010.write(CMD_READ);
utlinebacker 0:e37acb3371f0 45 MR10Q010.write((addr >> 16) & 0xff);
utlinebacker 0:e37acb3371f0 46 MR10Q010.write((addr >> 8) & 0xff);
utlinebacker 0:e37acb3371f0 47 MR10Q010.write(addr & 0xff);
utlinebacker 0:e37acb3371f0 48
utlinebacker 0:e37acb3371f0 49 for (i = 0; i < len; i ++) {
utlinebacker 0:e37acb3371f0 50 rdbuf[i] = MR10Q010.write(0);
utlinebacker 0:e37acb3371f0 51 }
utlinebacker 0:e37acb3371f0 52
utlinebacker 0:e37acb3371f0 53 SS=1;
utlinebacker 0:e37acb3371f0 54 return 1;
utlinebacker 0:e37acb3371f0 55
utlinebacker 0:e37acb3371f0 56 }
utlinebacker 0:e37acb3371f0 57
utlinebacker 0:e37acb3371f0 58 //MR10Q010 write wrapper function
utlinebacker 0:e37acb3371f0 59 int mram_write (int addr, char *buf, int len)
utlinebacker 0:e37acb3371f0 60 {
utlinebacker 0:e37acb3371f0 61 int i;
utlinebacker 0:e37acb3371f0 62
utlinebacker 0:e37acb3371f0 63 SS=0;
utlinebacker 0:e37acb3371f0 64 MR10Q010.write(CMD_WRITE);
utlinebacker 0:e37acb3371f0 65 MR10Q010.write((addr >> 16) & 0xff);
utlinebacker 0:e37acb3371f0 66 MR10Q010.write((addr >> 8) & 0xff);
utlinebacker 0:e37acb3371f0 67 MR10Q010.write(addr & 0xff);
utlinebacker 0:e37acb3371f0 68
utlinebacker 0:e37acb3371f0 69 for (i = 0; i < len; i ++) {
utlinebacker 0:e37acb3371f0 70 MR10Q010.write(wrbuf[i]);
utlinebacker 0:e37acb3371f0 71 }
utlinebacker 0:e37acb3371f0 72
utlinebacker 0:e37acb3371f0 73 SS=1;
utlinebacker 0:e37acb3371f0 74 return 1;
utlinebacker 0:e37acb3371f0 75 }
utlinebacker 0:e37acb3371f0 76
utlinebacker 0:e37acb3371f0 77 //Enable writes
utlinebacker 0:e37acb3371f0 78 int mram_wren (void)
utlinebacker 0:e37acb3371f0 79 {
utlinebacker 0:e37acb3371f0 80
utlinebacker 0:e37acb3371f0 81 WP=1;
utlinebacker 0:e37acb3371f0 82
utlinebacker 0:e37acb3371f0 83 SS=0;
utlinebacker 0:e37acb3371f0 84 MR10Q010.write(CMD_WREN);
utlinebacker 0:e37acb3371f0 85 SS=1;
utlinebacker 0:e37acb3371f0 86
utlinebacker 0:e37acb3371f0 87 return 1;
utlinebacker 0:e37acb3371f0 88 }
utlinebacker 0:e37acb3371f0 89
utlinebacker 0:e37acb3371f0 90 //Disable writes
utlinebacker 0:e37acb3371f0 91 int mram_wrdi (void)
utlinebacker 0:e37acb3371f0 92 {
utlinebacker 0:e37acb3371f0 93
utlinebacker 0:e37acb3371f0 94 SS=0;
utlinebacker 0:e37acb3371f0 95 MR10Q010.write(CMD_WRDI);
utlinebacker 0:e37acb3371f0 96 SS=1;
utlinebacker 0:e37acb3371f0 97
utlinebacker 0:e37acb3371f0 98 WP=0;
utlinebacker 0:e37acb3371f0 99 return 1;
utlinebacker 0:e37acb3371f0 100 }
utlinebacker 0:e37acb3371f0 101
utlinebacker 0:e37acb3371f0 102
utlinebacker 0:e37acb3371f0 103
utlinebacker 0:e37acb3371f0 104 //main function showing basic mram function usage with a nvm performance test
utlinebacker 0:e37acb3371f0 105 int main()
utlinebacker 0:e37acb3371f0 106 {
utlinebacker 0:e37acb3371f0 107 int i,j;
utlinebacker 0:e37acb3371f0 108 int run_cnt = 0;
utlinebacker 0:e37acb3371f0 109 Timer t;
utlinebacker 0:e37acb3371f0 110
utlinebacker 0:e37acb3371f0 111 HOLD=1; //make sure HOLD is released
utlinebacker 0:e37acb3371f0 112
utlinebacker 0:e37acb3371f0 113 MR10Q010.frequency(SPI_FREQ); //setup SPI frequency
utlinebacker 0:e37acb3371f0 114 pc.baud(SERIAL_BAUD); //setup UART baud
utlinebacker 0:e37acb3371f0 115 memset(rdbuf,0,256); //init read buffer
utlinebacker 0:e37acb3371f0 116
utlinebacker 0:e37acb3371f0 117 pc.printf("\r\n\r\n");
utlinebacker 0:e37acb3371f0 118 pc.printf("================================================\r\n");
utlinebacker 0:e37acb3371f0 119 pc.printf("|| Everspin Technologies ||\r\n");
utlinebacker 0:e37acb3371f0 120 pc.printf("|| The MRAM Company ||\r\n");
utlinebacker 0:e37acb3371f0 121 pc.printf("================================================\r\n");
utlinebacker 0:e37acb3371f0 122 pc.printf("|| MR10Q010 mbed Example ||\r\n");
utlinebacker 0:e37acb3371f0 123 pc.printf("|| 1Mb MRAM, 40MHz SPI ||\r\n");
utlinebacker 0:e37acb3371f0 124 pc.printf("================================================\r\n");
utlinebacker 0:e37acb3371f0 125
utlinebacker 0:e37acb3371f0 126 //check the last word of the mem to see if this demo has ever been run on the mram... initialize if not.
utlinebacker 0:e37acb3371f0 127 mram_read(0x1FFFF, rdbuf, 1);
utlinebacker 0:e37acb3371f0 128 if(rdbuf[0] != 0xAA) {
utlinebacker 0:e37acb3371f0 129 mram_wren(); //Enable writes to MRAM
utlinebacker 0:e37acb3371f0 130 pc.printf("First time running... init MRAM!\r\n");
utlinebacker 0:e37acb3371f0 131 memset(wrbuf,0,256);
utlinebacker 0:e37acb3371f0 132 mram_write(0, wrbuf, 256);
utlinebacker 0:e37acb3371f0 133 wrbuf[0] = 0xAA;
utlinebacker 0:e37acb3371f0 134 mram_write(0x1FFFF, wrbuf, 1);
utlinebacker 0:e37acb3371f0 135 mram_wrdi();
utlinebacker 0:e37acb3371f0 136 }
utlinebacker 0:e37acb3371f0 137
utlinebacker 0:e37acb3371f0 138 while(1) {
utlinebacker 0:e37acb3371f0 139
utlinebacker 0:e37acb3371f0 140 mram_read(0, rdbuf, 256);
utlinebacker 0:e37acb3371f0 141 run_cnt = rdbuf[0] + 1;
utlinebacker 0:e37acb3371f0 142
utlinebacker 0:e37acb3371f0 143 pc.printf("MRAM Read: Show Test Count\r\n");
utlinebacker 0:e37acb3371f0 144
utlinebacker 0:e37acb3371f0 145 for (i = 0; i < 256; i ++) {
utlinebacker 0:e37acb3371f0 146 pc.printf(" %02x", rdbuf[i]);
utlinebacker 0:e37acb3371f0 147 if ((i & 0x0f) == 0x0f)
utlinebacker 0:e37acb3371f0 148 pc.printf("\r\n");
utlinebacker 0:e37acb3371f0 149 }
utlinebacker 0:e37acb3371f0 150
utlinebacker 0:e37acb3371f0 151 pc.printf("\r\nWrite/Read time for 1048576 bits @ 40MHz:\r\n\r\n");
utlinebacker 0:e37acb3371f0 152 mram_wren();
utlinebacker 0:e37acb3371f0 153 pc.printf("MRAM writing\r\n");
utlinebacker 0:e37acb3371f0 154 t.reset();
utlinebacker 0:e37acb3371f0 155 t.start();
utlinebacker 0:e37acb3371f0 156 for (i = 0; i < 0x20000; i += 256) {
utlinebacker 0:e37acb3371f0 157 for(j = 0; j < 256; j++) {
utlinebacker 0:e37acb3371f0 158 wrbuf[j] = run_cnt & 0xff;
utlinebacker 0:e37acb3371f0 159 }
utlinebacker 0:e37acb3371f0 160 mram_write(i, wrbuf, 256);
utlinebacker 0:e37acb3371f0 161 if ((i & 0x0fff) == 0) pc.printf(".");
utlinebacker 0:e37acb3371f0 162 }
utlinebacker 0:e37acb3371f0 163 t.stop();
utlinebacker 0:e37acb3371f0 164 pc.printf("\r\nTime: %f s Rate: %f KBytes/sec\r\n\r\n", t.read(), (float)0x20000 / 1024 / t.read());
utlinebacker 0:e37acb3371f0 165 mram_wrdi();
utlinebacker 0:e37acb3371f0 166
utlinebacker 0:e37acb3371f0 167 printf("MRAM reading (and error checking)\r\n");
utlinebacker 0:e37acb3371f0 168 t.reset();
utlinebacker 0:e37acb3371f0 169 t.start();
utlinebacker 0:e37acb3371f0 170 for (i = 0; i < 0x20000; i += 256) {
utlinebacker 0:e37acb3371f0 171 mram_read(i, rdbuf, 256);
utlinebacker 0:e37acb3371f0 172 for(j = 0; j < 256; j++) {
utlinebacker 0:e37acb3371f0 173 if (rdbuf[j] != (run_cnt & 0xff)) {
utlinebacker 0:e37acb3371f0 174 pc.printf("Error %d\r\n", i+j);
utlinebacker 0:e37acb3371f0 175 break;
utlinebacker 0:e37acb3371f0 176 }
utlinebacker 0:e37acb3371f0 177 }
utlinebacker 0:e37acb3371f0 178 if ((i & 0x0fff) == 0) pc.printf(".");
utlinebacker 0:e37acb3371f0 179 }
utlinebacker 0:e37acb3371f0 180 t.stop();
utlinebacker 0:e37acb3371f0 181 pc.printf("\r\nTime: %f s Rate: %f KBytes/sec\r\n\r\n", t.read(), 0x20000 / 1024 / t.read());
utlinebacker 0:e37acb3371f0 182
utlinebacker 0:e37acb3371f0 183 mram_wren();
utlinebacker 0:e37acb3371f0 184 wrbuf[0] = 0xAA; //rewrite init word
utlinebacker 0:e37acb3371f0 185 mram_write(0x1FFFF, wrbuf, 1);
utlinebacker 0:e37acb3371f0 186 memset(rdbuf, 0, 256);
utlinebacker 0:e37acb3371f0 187 mram_wrdi();
utlinebacker 0:e37acb3371f0 188
utlinebacker 0:e37acb3371f0 189 pc.printf("Press any key to run again...\r\n\r\n\r\n");
utlinebacker 0:e37acb3371f0 190
utlinebacker 0:e37acb3371f0 191 while(!pc.getc());
utlinebacker 0:e37acb3371f0 192
utlinebacker 0:e37acb3371f0 193 }
utlinebacker 0:e37acb3371f0 194
utlinebacker 0:e37acb3371f0 195 }