Engravity-CDU
C++ file for display control
Dependencies: 4DGL mbed ConfigFile
Fork of
4DGLtest
by 
Stephane ROCHON
keyboard.h@3:f7bce78b04c1, 2014-06-26 (annotated)
- Committer:
- WillemBraat
- Date:
- Thu Jun 26 11:41:45 2014 +0000
- Revision:
- 3:f7bce78b04c1
- Child:
- 9:311b6676272d
CDU Display code file
Who changed what in which revision?
| User | Revision | Line number | New contents of line |
|---|---|---|---|
| WillemBraat | 3:f7bce78b04c1 | 1 | /* Keyboard TCA8418 declarations */ |
| WillemBraat | 3:f7bce78b04c1 | 2 | |
| WillemBraat | 3:f7bce78b04c1 | 3 | |
| WillemBraat | 3:f7bce78b04c1 | 4 | const int CDU_KB_READ = 0x68; //initiate a READ |
| WillemBraat | 3:f7bce78b04c1 | 5 | const int CDU_KB_WRITE = 0x69; //initiate a WRITE |
| WillemBraat | 3:f7bce78b04c1 | 6 | |
| WillemBraat | 3:f7bce78b04c1 | 7 | /* TCA8418 hardware limits */ |
| WillemBraat | 3:f7bce78b04c1 | 8 | #define TCA8418_MAX_ROWS 8 |
| WillemBraat | 3:f7bce78b04c1 | 9 | #define TCA8418_MAX_COLS 10 |
| WillemBraat | 3:f7bce78b04c1 | 10 | |
| WillemBraat | 3:f7bce78b04c1 | 11 | /* TCA8418 register offsets */ |
| WillemBraat | 3:f7bce78b04c1 | 12 | #define REG_CFG 0x01 |
| WillemBraat | 3:f7bce78b04c1 | 13 | #define REG_INT_STAT 0x02 |
| WillemBraat | 3:f7bce78b04c1 | 14 | #define REG_KEY_LCK_EC 0x03 |
| WillemBraat | 3:f7bce78b04c1 | 15 | #define REG_KEY_EVENT_A 0x04 |
| WillemBraat | 3:f7bce78b04c1 | 16 | #define REG_KEY_EVENT_B 0x05 |
| WillemBraat | 3:f7bce78b04c1 | 17 | #define REG_KEY_EVENT_C 0x06 |
| WillemBraat | 3:f7bce78b04c1 | 18 | #define REG_KEY_EVENT_D 0x07 |
| WillemBraat | 3:f7bce78b04c1 | 19 | #define REG_KEY_EVENT_E 0x08 |
| WillemBraat | 3:f7bce78b04c1 | 20 | #define REG_KEY_EVENT_F 0x09 |
| WillemBraat | 3:f7bce78b04c1 | 21 | #define REG_KEY_EVENT_G 0x0A |
| WillemBraat | 3:f7bce78b04c1 | 22 | #define REG_KEY_EVENT_H 0x0B |
| WillemBraat | 3:f7bce78b04c1 | 23 | #define REG_KEY_EVENT_I 0x0C |
| WillemBraat | 3:f7bce78b04c1 | 24 | #define REG_KEY_EVENT_J 0x0D |
| WillemBraat | 3:f7bce78b04c1 | 25 | #define REG_KP_LCK_TIMER 0x0E |
| WillemBraat | 3:f7bce78b04c1 | 26 | #define REG_UNLOCK1 0x0F |
| WillemBraat | 3:f7bce78b04c1 | 27 | #define REG_UNLOCK2 0x10 |
| WillemBraat | 3:f7bce78b04c1 | 28 | #define REG_GPIO_INT_STAT1 0x11 |
| WillemBraat | 3:f7bce78b04c1 | 29 | #define REG_GPIO_INT_STAT2 0x12 |
| WillemBraat | 3:f7bce78b04c1 | 30 | #define REG_GPIO_INT_STAT3 0x13 |
| WillemBraat | 3:f7bce78b04c1 | 31 | #define REG_GPIO_DAT_STAT1 0x14 |
| WillemBraat | 3:f7bce78b04c1 | 32 | #define REG_GPIO_DAT_STAT2 0x15 |
| WillemBraat | 3:f7bce78b04c1 | 33 | #define REG_GPIO_DAT_STAT3 0x16 |
| WillemBraat | 3:f7bce78b04c1 | 34 | #define REG_GPIO_DAT_OUT1 0x17 |
| WillemBraat | 3:f7bce78b04c1 | 35 | #define REG_GPIO_DAT_OUT2 0x18 |
| WillemBraat | 3:f7bce78b04c1 | 36 | #define REG_GPIO_DAT_OUT3 0x19 |
| WillemBraat | 3:f7bce78b04c1 | 37 | #define REG_GPIO_INT_EN1 0x1A |
| WillemBraat | 3:f7bce78b04c1 | 38 | #define REG_GPIO_INT_EN2 0x1B |
| WillemBraat | 3:f7bce78b04c1 | 39 | #define REG_GPIO_INT_EN3 0x1C |
| WillemBraat | 3:f7bce78b04c1 | 40 | #define REG_KP_GPIO1 0x1D |
| WillemBraat | 3:f7bce78b04c1 | 41 | #define REG_KP_GPIO2 0x1E |
| WillemBraat | 3:f7bce78b04c1 | 42 | #define REG_KP_GPIO3 0x1F |
| WillemBraat | 3:f7bce78b04c1 | 43 | #define REG_GPI_EM1 0x20 |
| WillemBraat | 3:f7bce78b04c1 | 44 | #define REG_GPI_EM2 0x21 |
| WillemBraat | 3:f7bce78b04c1 | 45 | #define REG_GPI_EM3 0x22 |
| WillemBraat | 3:f7bce78b04c1 | 46 | #define REG_GPIO_DIR1 0x23 |
| WillemBraat | 3:f7bce78b04c1 | 47 | #define REG_GPIO_DIR2 0x24 |
| WillemBraat | 3:f7bce78b04c1 | 48 | #define REG_GPIO_DIR3 0x25 |
| WillemBraat | 3:f7bce78b04c1 | 49 | #define REG_GPIO_INT_LVL1 0x26 |
| WillemBraat | 3:f7bce78b04c1 | 50 | #define REG_GPIO_INT_LVL2 0x27 |
| WillemBraat | 3:f7bce78b04c1 | 51 | #define REG_GPIO_INT_LVL3 0x28 |
| WillemBraat | 3:f7bce78b04c1 | 52 | #define REG_DEBOUNCE_DIS1 0x29 |
| WillemBraat | 3:f7bce78b04c1 | 53 | #define REG_DEBOUNCE_DIS2 0x2A |
| WillemBraat | 3:f7bce78b04c1 | 54 | #define REG_DEBOUNCE_DIS3 0x2B |
| WillemBraat | 3:f7bce78b04c1 | 55 | #define REG_GPIO_PULL1 0x2C |
| WillemBraat | 3:f7bce78b04c1 | 56 | #define REG_GPIO_PULL2 0x2D |
| WillemBraat | 3:f7bce78b04c1 | 57 | #define REG_GPIO_PULL3 0x2E |
| WillemBraat | 3:f7bce78b04c1 | 58 | |
| WillemBraat | 3:f7bce78b04c1 | 59 | /* TCA8418 bit definitions */ |
| WillemBraat | 3:f7bce78b04c1 | 60 | #define CFG_AI BIT(7) |
| WillemBraat | 3:f7bce78b04c1 | 61 | #define CFG_GPI_E_CFG BIT(6) |
| WillemBraat | 3:f7bce78b04c1 | 62 | #define CFG_OVR_FLOW_M BIT(5) |
| WillemBraat | 3:f7bce78b04c1 | 63 | #define CFG_INT_CFG BIT(4) |
| WillemBraat | 3:f7bce78b04c1 | 64 | #define CFG_OVR_FLOW_IEN BIT(3) |
| WillemBraat | 3:f7bce78b04c1 | 65 | #define CFG_K_LCK_IEN BIT(2) |
| WillemBraat | 3:f7bce78b04c1 | 66 | #define CFG_GPI_IEN BIT(1) |
| WillemBraat | 3:f7bce78b04c1 | 67 | #define CFG_KE_IEN BIT(0) |
| WillemBraat | 3:f7bce78b04c1 | 68 | |
| WillemBraat | 3:f7bce78b04c1 | 69 | #define INT_STAT_CAD_INT BIT(4) |
| WillemBraat | 3:f7bce78b04c1 | 70 | #define INT_STAT_OVR_FLOW_INT BIT(3) |
| WillemBraat | 3:f7bce78b04c1 | 71 | #define INT_STAT_K_LCK_INT BIT(2) |
| WillemBraat | 3:f7bce78b04c1 | 72 | #define INT_STAT_GPI_INT BIT(1) |
| WillemBraat | 3:f7bce78b04c1 | 73 | #define INT_STAT_K_INT BIT(0) |
| WillemBraat | 3:f7bce78b04c1 | 74 | |
| WillemBraat | 3:f7bce78b04c1 | 75 | /* TCA8418 register masks */ |
| WillemBraat | 3:f7bce78b04c1 | 76 | #define KEY_LCK_EC_KEC 0x7 |
| WillemBraat | 3:f7bce78b04c1 | 77 | #define KEY_EVENT_CODE 0x7f |
| WillemBraat | 3:f7bce78b04c1 | 78 | #define KEY_EVENT_VALUE 0x80 |
| WillemBraat | 3:f7bce78b04c1 | 79 | |
| WillemBraat | 3:f7bce78b04c1 | 80 |