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Dependents:   cobaLCDJoyMotor_Thread odometry_omni_3roda_v3 odometry_omni_3roda_v1 odometry_omni_3roda_v2 ... more

targets/TARGET_NXP/TARGET_LPC11U6X/analogin_api.c@0:b74591d5ab33, 2017-12-11 (annotated)

Committer:
be_bryan
Date:
Mon Dec 11 17:54:04 2017 +0000
Revision:
0:b74591d5ab33
motor ++

Who changed what in which revision?

UserRevisionLine numberNew contents of line
be_bryan 0:b74591d5ab33 1 /* mbed Microcontroller Library
be_bryan 0:b74591d5ab33 2 * Copyright (c) 2006-2013 ARM Limited
be_bryan 0:b74591d5ab33 3 *
be_bryan 0:b74591d5ab33 4 * Licensed under the Apache License, Version 2.0 (the "License");
be_bryan 0:b74591d5ab33 5 * you may not use this file except in compliance with the License.
be_bryan 0:b74591d5ab33 6 * You may obtain a copy of the License at
be_bryan 0:b74591d5ab33 7 *
be_bryan 0:b74591d5ab33 8 * http://www.apache.org/licenses/LICENSE-2.0
be_bryan 0:b74591d5ab33 9 *
be_bryan 0:b74591d5ab33 10 * Unless required by applicable law or agreed to in writing, software
be_bryan 0:b74591d5ab33 11 * distributed under the License is distributed on an "AS IS" BASIS,
be_bryan 0:b74591d5ab33 12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
be_bryan 0:b74591d5ab33 13 * See the License for the specific language governing permissions and
be_bryan 0:b74591d5ab33 14 * limitations under the License.
be_bryan 0:b74591d5ab33 15 */
be_bryan 0:b74591d5ab33 16 #include "mbed_assert.h"
be_bryan 0:b74591d5ab33 17 #include "analogin_api.h"
be_bryan 0:b74591d5ab33 18 #include "cmsis.h"
be_bryan 0:b74591d5ab33 19 #include "pinmap.h"
be_bryan 0:b74591d5ab33 20 #include "mbed_error.h"
be_bryan 0:b74591d5ab33 21
be_bryan 0:b74591d5ab33 22 #if DEVICE_ANALOGIN
be_bryan 0:b74591d5ab33 23
be_bryan 0:b74591d5ab33 24 #define ANALOGIN_MEDIAN_FILTER 1
be_bryan 0:b74591d5ab33 25
be_bryan 0:b74591d5ab33 26 #define ADC_10BIT_RANGE 0x3FF
be_bryan 0:b74591d5ab33 27 #define ADC_12BIT_RANGE 0xFFF
be_bryan 0:b74591d5ab33 28 #define PDRUN_VALID_BITS 0x000025FFL
be_bryan 0:b74591d5ab33 29 #define PDRUN_RESERVED_ONE 0x0000C800L
be_bryan 0:b74591d5ab33 30
be_bryan 0:b74591d5ab33 31 #define ADC_RANGE ADC_12BIT_RANGE
be_bryan 0:b74591d5ab33 32
be_bryan 0:b74591d5ab33 33 static const PinMap PinMap_ADC[] = {
be_bryan 0:b74591d5ab33 34 {P1_9 , ADC_0, 3},
be_bryan 0:b74591d5ab33 35 {P0_23, ADC_1, 1},
be_bryan 0:b74591d5ab33 36 {P0_16, ADC_2, 1},
be_bryan 0:b74591d5ab33 37 {P0_15, ADC_3, 3},
be_bryan 0:b74591d5ab33 38 {P1_22, ADC_4, 3},
be_bryan 0:b74591d5ab33 39 {P1_3 , ADC_5, 4},
be_bryan 0:b74591d5ab33 40 {P0_14, ADC_6, 2},
be_bryan 0:b74591d5ab33 41 {P0_13, ADC_7, 2},
be_bryan 0:b74591d5ab33 42 {P0_12, ADC_8, 2},
be_bryan 0:b74591d5ab33 43 {P0_11, ADC_9, 2},
be_bryan 0:b74591d5ab33 44 {P1_29, ADC_10,4},
be_bryan 0:b74591d5ab33 45 {P0_22, ADC_11,1},
be_bryan 0:b74591d5ab33 46 {NC , NC ,0}
be_bryan 0:b74591d5ab33 47 };
be_bryan 0:b74591d5ab33 48
be_bryan 0:b74591d5ab33 49
be_bryan 0:b74591d5ab33 50 void analogin_init(analogin_t *obj, PinName pin) {
be_bryan 0:b74591d5ab33 51 volatile uint32_t tmp;
be_bryan 0:b74591d5ab33 52 obj->adc = (ADCName)pinmap_peripheral(pin, PinMap_ADC);
be_bryan 0:b74591d5ab33 53 MBED_ASSERT(obj->adc != (ADCName)NC);
be_bryan 0:b74591d5ab33 54
be_bryan 0:b74591d5ab33 55 pinmap_pinout(pin, PinMap_ADC);
be_bryan 0:b74591d5ab33 56
be_bryan 0:b74591d5ab33 57 __IO uint32_t *reg = (__IO uint32_t*)(LPC_IOCON_BASE + (pin & 0x1FF));
be_bryan 0:b74591d5ab33 58 // set pin to ADC mode
be_bryan 0:b74591d5ab33 59 *reg &= ~(1 << 7); // set ADMODE = 0 (analog mode)
be_bryan 0:b74591d5ab33 60
be_bryan 0:b74591d5ab33 61 // ADC Powered
be_bryan 0:b74591d5ab33 62 tmp = (LPC_SYSCON->PDRUNCFG & PDRUN_VALID_BITS);
be_bryan 0:b74591d5ab33 63 tmp &= ~((1 << 4) & PDRUN_VALID_BITS);
be_bryan 0:b74591d5ab33 64 LPC_SYSCON->PDRUNCFG = (tmp | PDRUN_RESERVED_ONE);
be_bryan 0:b74591d5ab33 65
be_bryan 0:b74591d5ab33 66 // Enable clock for ADC
be_bryan 0:b74591d5ab33 67 LPC_SYSCON->SYSAHBCLKCTRL |= (1 << 13);
be_bryan 0:b74591d5ab33 68
be_bryan 0:b74591d5ab33 69 // Determine the clock divider for a 500kHz ADC clock during calibration
be_bryan 0:b74591d5ab33 70 uint32_t clkdiv = (SystemCoreClock / 500000) - 1;
be_bryan 0:b74591d5ab33 71
be_bryan 0:b74591d5ab33 72 // Perform a self-calibration
be_bryan 0:b74591d5ab33 73 LPC_ADC->CTRL = (1UL << 30) | (clkdiv & 0xFF);
be_bryan 0:b74591d5ab33 74 while ((LPC_ADC->CTRL & (1UL << 30)) != 0);
be_bryan 0:b74591d5ab33 75
be_bryan 0:b74591d5ab33 76 // Sampling clock: SystemClock divided by 1
be_bryan 0:b74591d5ab33 77 LPC_ADC->CTRL = 0;
be_bryan 0:b74591d5ab33 78 }
be_bryan 0:b74591d5ab33 79
be_bryan 0:b74591d5ab33 80 static inline uint32_t adc_read(analogin_t *obj) {
be_bryan 0:b74591d5ab33 81
be_bryan 0:b74591d5ab33 82 // select channel
be_bryan 0:b74591d5ab33 83 LPC_ADC->SEQA_CTRL &= ~(0xFFF);
be_bryan 0:b74591d5ab33 84 LPC_ADC->SEQA_CTRL |= (1UL << obj->adc);
be_bryan 0:b74591d5ab33 85
be_bryan 0:b74591d5ab33 86 // start conversion, sequence enable with async mode
be_bryan 0:b74591d5ab33 87 LPC_ADC->SEQA_CTRL |= ((1UL << 26) | (1UL << 31) | (1UL << 19));
be_bryan 0:b74591d5ab33 88
be_bryan 0:b74591d5ab33 89 // Repeatedly get the sample data until DONE bit
be_bryan 0:b74591d5ab33 90 volatile uint32_t data;
be_bryan 0:b74591d5ab33 91 do {
be_bryan 0:b74591d5ab33 92 data = LPC_ADC->SEQA_GDAT;
be_bryan 0:b74591d5ab33 93 } while ((data & (1UL << 31)) == 0);
be_bryan 0:b74591d5ab33 94 data = LPC_ADC->DAT[obj->adc];
be_bryan 0:b74591d5ab33 95
be_bryan 0:b74591d5ab33 96 // Stop conversion
be_bryan 0:b74591d5ab33 97 LPC_ADC->SEQA_CTRL &= ~(1UL << 31);
be_bryan 0:b74591d5ab33 98
be_bryan 0:b74591d5ab33 99 return ((data >> 4) & ADC_RANGE);
be_bryan 0:b74591d5ab33 100 }
be_bryan 0:b74591d5ab33 101
be_bryan 0:b74591d5ab33 102 static inline void order(uint32_t *a, uint32_t *b) {
be_bryan 0:b74591d5ab33 103 if (*a > *b) {
be_bryan 0:b74591d5ab33 104 uint32_t t = *a;
be_bryan 0:b74591d5ab33 105 *a = *b;
be_bryan 0:b74591d5ab33 106 *b = t;
be_bryan 0:b74591d5ab33 107 }
be_bryan 0:b74591d5ab33 108 }
be_bryan 0:b74591d5ab33 109
be_bryan 0:b74591d5ab33 110 static inline uint32_t adc_read_u32(analogin_t *obj) {
be_bryan 0:b74591d5ab33 111 uint32_t value;
be_bryan 0:b74591d5ab33 112 #if ANALOGIN_MEDIAN_FILTER
be_bryan 0:b74591d5ab33 113 uint32_t v1 = adc_read(obj);
be_bryan 0:b74591d5ab33 114 uint32_t v2 = adc_read(obj);
be_bryan 0:b74591d5ab33 115 uint32_t v3 = adc_read(obj);
be_bryan 0:b74591d5ab33 116 order(&v1, &v2);
be_bryan 0:b74591d5ab33 117 order(&v2, &v3);
be_bryan 0:b74591d5ab33 118 order(&v1, &v2);
be_bryan 0:b74591d5ab33 119 value = v2;
be_bryan 0:b74591d5ab33 120 #else
be_bryan 0:b74591d5ab33 121 value = adc_read(obj);
be_bryan 0:b74591d5ab33 122 #endif
be_bryan 0:b74591d5ab33 123 return value;
be_bryan 0:b74591d5ab33 124 }
be_bryan 0:b74591d5ab33 125
be_bryan 0:b74591d5ab33 126 uint16_t analogin_read_u16(analogin_t *obj) {
be_bryan 0:b74591d5ab33 127 uint32_t value = adc_read_u32(obj);
be_bryan 0:b74591d5ab33 128 return (value << 4) | ((value >> 8) & 0x000F); // 12 bit
be_bryan 0:b74591d5ab33 129 }
be_bryan 0:b74591d5ab33 130
be_bryan 0:b74591d5ab33 131 float analogin_read(analogin_t *obj) {
be_bryan 0:b74591d5ab33 132 uint32_t value = adc_read_u32(obj);
be_bryan 0:b74591d5ab33 133 return (float)value * (1.0f / (float)ADC_RANGE);
be_bryan 0:b74591d5ab33 134 }
be_bryan 0:b74591d5ab33 135
be_bryan 0:b74591d5ab33 136 #endif