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targets/TARGET_NUVOTON/TARGET_M480/us_ticker.c@0:b74591d5ab33, 2017-12-11 (annotated)

Committer:
be_bryan
Date:
Mon Dec 11 17:54:04 2017 +0000
Revision:
0:b74591d5ab33
motor ++

Who changed what in which revision?

UserRevisionLine numberNew contents of line
be_bryan 0:b74591d5ab33 1 /* mbed Microcontroller Library
be_bryan 0:b74591d5ab33 2 * Copyright (c) 2015-2016 Nuvoton
be_bryan 0:b74591d5ab33 3 *
be_bryan 0:b74591d5ab33 4 * Licensed under the Apache License, Version 2.0 (the "License");
be_bryan 0:b74591d5ab33 5 * you may not use this file except in compliance with the License.
be_bryan 0:b74591d5ab33 6 * You may obtain a copy of the License at
be_bryan 0:b74591d5ab33 7 *
be_bryan 0:b74591d5ab33 8 * http://www.apache.org/licenses/LICENSE-2.0
be_bryan 0:b74591d5ab33 9 *
be_bryan 0:b74591d5ab33 10 * Unless required by applicable law or agreed to in writing, software
be_bryan 0:b74591d5ab33 11 * distributed under the License is distributed on an "AS IS" BASIS,
be_bryan 0:b74591d5ab33 12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
be_bryan 0:b74591d5ab33 13 * See the License for the specific language governing permissions and
be_bryan 0:b74591d5ab33 14 * limitations under the License.
be_bryan 0:b74591d5ab33 15 */
be_bryan 0:b74591d5ab33 16
be_bryan 0:b74591d5ab33 17 #include "us_ticker_api.h"
be_bryan 0:b74591d5ab33 18 #include "sleep_api.h"
be_bryan 0:b74591d5ab33 19 #include "mbed_assert.h"
be_bryan 0:b74591d5ab33 20 #include "nu_modutil.h"
be_bryan 0:b74591d5ab33 21 #include "nu_miscutil.h"
be_bryan 0:b74591d5ab33 22 #include "mbed_critical.h"
be_bryan 0:b74591d5ab33 23
be_bryan 0:b74591d5ab33 24 // us_ticker tick = us = timestamp
be_bryan 0:b74591d5ab33 25 #define US_PER_TICK 1
be_bryan 0:b74591d5ab33 26 #define US_PER_SEC (1000 * 1000)
be_bryan 0:b74591d5ab33 27
be_bryan 0:b74591d5ab33 28 #define TMR0HIRES_CLK_PER_SEC (1000 * 1000)
be_bryan 0:b74591d5ab33 29 #define TMR1HIRES_CLK_PER_SEC (1000 * 1000)
be_bryan 0:b74591d5ab33 30
be_bryan 0:b74591d5ab33 31 #define US_PER_TMR0HIRES_CLK (US_PER_SEC / TMR0HIRES_CLK_PER_SEC)
be_bryan 0:b74591d5ab33 32 #define US_PER_TMR1HIRES_CLK (US_PER_SEC / TMR1HIRES_CLK_PER_SEC)
be_bryan 0:b74591d5ab33 33
be_bryan 0:b74591d5ab33 34 #define US_PER_TMR0HIRES_INT (1000 * 1000 * 10)
be_bryan 0:b74591d5ab33 35 #define TMR0HIRES_CLK_PER_TMR0HIRES_INT ((uint32_t) ((uint64_t) US_PER_TMR0HIRES_INT * TMR0HIRES_CLK_PER_SEC / US_PER_SEC))
be_bryan 0:b74591d5ab33 36
be_bryan 0:b74591d5ab33 37
be_bryan 0:b74591d5ab33 38 static void tmr0_vec(void);
be_bryan 0:b74591d5ab33 39 static void tmr1_vec(void);
be_bryan 0:b74591d5ab33 40 static void us_ticker_arm_cd(void);
be_bryan 0:b74591d5ab33 41
be_bryan 0:b74591d5ab33 42 static int us_ticker_inited = 0;
be_bryan 0:b74591d5ab33 43 static volatile uint32_t counter_major = 0;
be_bryan 0:b74591d5ab33 44 static volatile uint32_t cd_major_minor_us = 0;
be_bryan 0:b74591d5ab33 45 static volatile uint32_t cd_minor_us = 0;
be_bryan 0:b74591d5ab33 46
be_bryan 0:b74591d5ab33 47 // NOTE: PCLK is set up in mbed_sdk_init(), invocation of which must be before C++ global object constructor. See init_api.c for details.
be_bryan 0:b74591d5ab33 48 // NOTE: Choose clock source of timer:
be_bryan 0:b74591d5ab33 49 // 1. HIRC: Be the most accurate but might cause unknown HardFault.
be_bryan 0:b74591d5ab33 50 // 2. HXT: Less accurate and cannot pass mbed-drivers test.
be_bryan 0:b74591d5ab33 51 // 3. PCLK(HXT): Less accurate but can pass mbed-drivers test.
be_bryan 0:b74591d5ab33 52 // NOTE: TIMER_0 for normal counter, TIMER_1 for countdown.
be_bryan 0:b74591d5ab33 53 static const struct nu_modinit_s timer0hires_modinit = {TIMER_0, TMR0_MODULE, CLK_CLKSEL1_TMR0SEL_PCLK0, 0, TMR0_RST, TMR0_IRQn, (void *) tmr0_vec};
be_bryan 0:b74591d5ab33 54 static const struct nu_modinit_s timer1hires_modinit = {TIMER_1, TMR1_MODULE, CLK_CLKSEL1_TMR1SEL_PCLK0, 0, TMR1_RST, TMR1_IRQn, (void *) tmr1_vec};
be_bryan 0:b74591d5ab33 55
be_bryan 0:b74591d5ab33 56 #define TMR_CMP_MIN 2
be_bryan 0:b74591d5ab33 57 #define TMR_CMP_MAX 0xFFFFFFu
be_bryan 0:b74591d5ab33 58
be_bryan 0:b74591d5ab33 59 void us_ticker_init(void)
be_bryan 0:b74591d5ab33 60 {
be_bryan 0:b74591d5ab33 61 if (us_ticker_inited) {
be_bryan 0:b74591d5ab33 62 return;
be_bryan 0:b74591d5ab33 63 }
be_bryan 0:b74591d5ab33 64
be_bryan 0:b74591d5ab33 65 counter_major = 0;
be_bryan 0:b74591d5ab33 66 cd_major_minor_us = 0;
be_bryan 0:b74591d5ab33 67 cd_minor_us = 0;
be_bryan 0:b74591d5ab33 68 us_ticker_inited = 1;
be_bryan 0:b74591d5ab33 69
be_bryan 0:b74591d5ab33 70 // Reset IP
be_bryan 0:b74591d5ab33 71 SYS_ResetModule(timer0hires_modinit.rsetidx);
be_bryan 0:b74591d5ab33 72 SYS_ResetModule(timer1hires_modinit.rsetidx);
be_bryan 0:b74591d5ab33 73
be_bryan 0:b74591d5ab33 74 // Select IP clock source
be_bryan 0:b74591d5ab33 75 CLK_SetModuleClock(timer0hires_modinit.clkidx, timer0hires_modinit.clksrc, timer0hires_modinit.clkdiv);
be_bryan 0:b74591d5ab33 76 CLK_SetModuleClock(timer1hires_modinit.clkidx, timer1hires_modinit.clksrc, timer1hires_modinit.clkdiv);
be_bryan 0:b74591d5ab33 77 // Enable IP clock
be_bryan 0:b74591d5ab33 78 CLK_EnableModuleClock(timer0hires_modinit.clkidx);
be_bryan 0:b74591d5ab33 79 CLK_EnableModuleClock(timer1hires_modinit.clkidx);
be_bryan 0:b74591d5ab33 80
be_bryan 0:b74591d5ab33 81 // Timer for normal counter
be_bryan 0:b74591d5ab33 82 uint32_t clk_timer0 = TIMER_GetModuleClock((TIMER_T *) NU_MODBASE(timer0hires_modinit.modname));
be_bryan 0:b74591d5ab33 83 uint32_t prescale_timer0 = clk_timer0 / TMR0HIRES_CLK_PER_SEC - 1;
be_bryan 0:b74591d5ab33 84 MBED_ASSERT((prescale_timer0 != (uint32_t) -1) && prescale_timer0 <= 127);
be_bryan 0:b74591d5ab33 85 MBED_ASSERT((clk_timer0 % TMR0HIRES_CLK_PER_SEC) == 0);
be_bryan 0:b74591d5ab33 86 uint32_t cmp_timer0 = TMR0HIRES_CLK_PER_TMR0HIRES_INT;
be_bryan 0:b74591d5ab33 87 MBED_ASSERT(cmp_timer0 >= TMR_CMP_MIN && cmp_timer0 <= TMR_CMP_MAX);
be_bryan 0:b74591d5ab33 88 // NOTE: TIMER_CTL_CNTDATEN_Msk exists in NUC472, but not in M451/M480. In M451/M480, TIMER_CNT is updated continuously by default.
be_bryan 0:b74591d5ab33 89 ((TIMER_T *) NU_MODBASE(timer0hires_modinit.modname))->CTL = TIMER_PERIODIC_MODE | prescale_timer0/* | TIMER_CTL_CNTDATEN_Msk*/;
be_bryan 0:b74591d5ab33 90 ((TIMER_T *) NU_MODBASE(timer0hires_modinit.modname))->CMP = cmp_timer0;
be_bryan 0:b74591d5ab33 91
be_bryan 0:b74591d5ab33 92 NVIC_SetVector(timer0hires_modinit.irq_n, (uint32_t) timer0hires_modinit.var);
be_bryan 0:b74591d5ab33 93 NVIC_SetVector(timer1hires_modinit.irq_n, (uint32_t) timer1hires_modinit.var);
be_bryan 0:b74591d5ab33 94
be_bryan 0:b74591d5ab33 95 NVIC_EnableIRQ(timer0hires_modinit.irq_n);
be_bryan 0:b74591d5ab33 96 NVIC_EnableIRQ(timer1hires_modinit.irq_n);
be_bryan 0:b74591d5ab33 97
be_bryan 0:b74591d5ab33 98 TIMER_EnableInt((TIMER_T *) NU_MODBASE(timer0hires_modinit.modname));
be_bryan 0:b74591d5ab33 99 TIMER_Start((TIMER_T *) NU_MODBASE(timer0hires_modinit.modname));
be_bryan 0:b74591d5ab33 100 }
be_bryan 0:b74591d5ab33 101
be_bryan 0:b74591d5ab33 102 uint32_t us_ticker_read()
be_bryan 0:b74591d5ab33 103 {
be_bryan 0:b74591d5ab33 104 if (! us_ticker_inited) {
be_bryan 0:b74591d5ab33 105 us_ticker_init();
be_bryan 0:b74591d5ab33 106 }
be_bryan 0:b74591d5ab33 107
be_bryan 0:b74591d5ab33 108 TIMER_T * timer0_base = (TIMER_T *) NU_MODBASE(timer0hires_modinit.modname);
be_bryan 0:b74591d5ab33 109
be_bryan 0:b74591d5ab33 110 do {
be_bryan 0:b74591d5ab33 111 uint32_t major_minor_us;
be_bryan 0:b74591d5ab33 112 uint32_t minor_us;
be_bryan 0:b74591d5ab33 113
be_bryan 0:b74591d5ab33 114 // NOTE: As TIMER_CNT = TIMER_CMP and counter_major has increased by one, TIMER_CNT doesn't change to 0 for one tick time.
be_bryan 0:b74591d5ab33 115 // NOTE: As TIMER_CNT = TIMER_CMP or TIMER_CNT = 0, counter_major (ISR) may not sync with TIMER_CNT. So skip and fetch stable one at the cost of 1 clock delay on this read.
be_bryan 0:b74591d5ab33 116 do {
be_bryan 0:b74591d5ab33 117 core_util_critical_section_enter();
be_bryan 0:b74591d5ab33 118
be_bryan 0:b74591d5ab33 119 // NOTE: Order of reading minor_us/carry here is significant.
be_bryan 0:b74591d5ab33 120 minor_us = TIMER_GetCounter(timer0_base) * US_PER_TMR0HIRES_CLK;
be_bryan 0:b74591d5ab33 121 uint32_t carry = (timer0_base->INTSTS & TIMER_INTSTS_TIF_Msk) ? 1 : 0;
be_bryan 0:b74591d5ab33 122 // When TIMER_CNT approaches TIMER_CMP and will wrap soon, we may get carry but TIMER_CNT not wrapped. Hanlde carefully carry == 1 && TIMER_CNT is near TIMER_CMP.
be_bryan 0:b74591d5ab33 123 if (carry && minor_us > (US_PER_TMR0HIRES_INT / 2)) {
be_bryan 0:b74591d5ab33 124 major_minor_us = (counter_major + 1) * US_PER_TMR0HIRES_INT;
be_bryan 0:b74591d5ab33 125 } else {
be_bryan 0:b74591d5ab33 126 major_minor_us = (counter_major + carry) * US_PER_TMR0HIRES_INT + minor_us;
be_bryan 0:b74591d5ab33 127 }
be_bryan 0:b74591d5ab33 128
be_bryan 0:b74591d5ab33 129 core_util_critical_section_exit();
be_bryan 0:b74591d5ab33 130 } while (minor_us == 0 || minor_us == US_PER_TMR0HIRES_INT);
be_bryan 0:b74591d5ab33 131
be_bryan 0:b74591d5ab33 132 return (major_minor_us / US_PER_TICK);
be_bryan 0:b74591d5ab33 133 } while (0);
be_bryan 0:b74591d5ab33 134 }
be_bryan 0:b74591d5ab33 135
be_bryan 0:b74591d5ab33 136 void us_ticker_disable_interrupt(void)
be_bryan 0:b74591d5ab33 137 {
be_bryan 0:b74591d5ab33 138 TIMER_DisableInt((TIMER_T *) NU_MODBASE(timer1hires_modinit.modname));
be_bryan 0:b74591d5ab33 139 }
be_bryan 0:b74591d5ab33 140
be_bryan 0:b74591d5ab33 141 void us_ticker_clear_interrupt(void)
be_bryan 0:b74591d5ab33 142 {
be_bryan 0:b74591d5ab33 143 TIMER_ClearIntFlag((TIMER_T *) NU_MODBASE(timer1hires_modinit.modname));
be_bryan 0:b74591d5ab33 144 }
be_bryan 0:b74591d5ab33 145
be_bryan 0:b74591d5ab33 146 void us_ticker_set_interrupt(timestamp_t timestamp)
be_bryan 0:b74591d5ab33 147 {
be_bryan 0:b74591d5ab33 148 TIMER_Stop((TIMER_T *) NU_MODBASE(timer1hires_modinit.modname));
be_bryan 0:b74591d5ab33 149
be_bryan 0:b74591d5ab33 150 uint32_t delta = timestamp - us_ticker_read();
be_bryan 0:b74591d5ab33 151 cd_major_minor_us = delta * US_PER_TICK;
be_bryan 0:b74591d5ab33 152 us_ticker_arm_cd();
be_bryan 0:b74591d5ab33 153 }
be_bryan 0:b74591d5ab33 154
be_bryan 0:b74591d5ab33 155 void us_ticker_fire_interrupt(void)
be_bryan 0:b74591d5ab33 156 {
be_bryan 0:b74591d5ab33 157 // NOTE: This event was in the past. Set the interrupt as pending, but don't process it here.
be_bryan 0:b74591d5ab33 158 // This prevents a recursive loop under heavy load which can lead to a stack overflow.
be_bryan 0:b74591d5ab33 159 cd_major_minor_us = cd_minor_us = 0;
be_bryan 0:b74591d5ab33 160 NVIC_SetPendingIRQ(timer1hires_modinit.irq_n);
be_bryan 0:b74591d5ab33 161 }
be_bryan 0:b74591d5ab33 162
be_bryan 0:b74591d5ab33 163 static void tmr0_vec(void)
be_bryan 0:b74591d5ab33 164 {
be_bryan 0:b74591d5ab33 165 TIMER_ClearIntFlag((TIMER_T *) NU_MODBASE(timer0hires_modinit.modname));
be_bryan 0:b74591d5ab33 166 counter_major ++;
be_bryan 0:b74591d5ab33 167 }
be_bryan 0:b74591d5ab33 168
be_bryan 0:b74591d5ab33 169 static void tmr1_vec(void)
be_bryan 0:b74591d5ab33 170 {
be_bryan 0:b74591d5ab33 171 TIMER_ClearIntFlag((TIMER_T *) NU_MODBASE(timer1hires_modinit.modname));
be_bryan 0:b74591d5ab33 172 cd_major_minor_us = (cd_major_minor_us > cd_minor_us) ? (cd_major_minor_us - cd_minor_us) : 0;
be_bryan 0:b74591d5ab33 173 if (cd_major_minor_us == 0) {
be_bryan 0:b74591d5ab33 174 // NOTE: us_ticker_set_interrupt() may get called in us_ticker_irq_handler();
be_bryan 0:b74591d5ab33 175 us_ticker_irq_handler();
be_bryan 0:b74591d5ab33 176 } else {
be_bryan 0:b74591d5ab33 177 us_ticker_arm_cd();
be_bryan 0:b74591d5ab33 178 }
be_bryan 0:b74591d5ab33 179 }
be_bryan 0:b74591d5ab33 180
be_bryan 0:b74591d5ab33 181 static void us_ticker_arm_cd(void)
be_bryan 0:b74591d5ab33 182 {
be_bryan 0:b74591d5ab33 183 TIMER_T * timer1_base = (TIMER_T *) NU_MODBASE(timer1hires_modinit.modname);
be_bryan 0:b74591d5ab33 184
be_bryan 0:b74591d5ab33 185 cd_minor_us = cd_major_minor_us;
be_bryan 0:b74591d5ab33 186
be_bryan 0:b74591d5ab33 187 // Reset 8-bit PSC counter, 24-bit up counter value and CNTEN bit
be_bryan 0:b74591d5ab33 188 // NUC472/M451: See TIMER_CTL_RSTCNT_Msk
be_bryan 0:b74591d5ab33 189 // M480
be_bryan 0:b74591d5ab33 190 timer1_base->CNT = 0;
be_bryan 0:b74591d5ab33 191 while (timer1_base->CNT & TIMER_CNT_RSTACT_Msk);
be_bryan 0:b74591d5ab33 192 // One-shot mode, Clock = 1 MHz
be_bryan 0:b74591d5ab33 193 uint32_t clk_timer1 = TIMER_GetModuleClock((TIMER_T *) NU_MODBASE(timer1hires_modinit.modname));
be_bryan 0:b74591d5ab33 194 uint32_t prescale_timer1 = clk_timer1 / TMR1HIRES_CLK_PER_SEC - 1;
be_bryan 0:b74591d5ab33 195 MBED_ASSERT((prescale_timer1 != (uint32_t) -1) && prescale_timer1 <= 127);
be_bryan 0:b74591d5ab33 196 MBED_ASSERT((clk_timer1 % TMR1HIRES_CLK_PER_SEC) == 0);
be_bryan 0:b74591d5ab33 197 // NOTE: TIMER_CTL_CNTDATEN_Msk exists in NUC472, but not in M451/M480. In M451/M480, TIMER_CNT is updated continuously by default.
be_bryan 0:b74591d5ab33 198 timer1_base->CTL &= ~(TIMER_CTL_OPMODE_Msk | TIMER_CTL_PSC_Msk/* | TIMER_CTL_CNTDATEN_Msk*/);
be_bryan 0:b74591d5ab33 199 timer1_base->CTL |= TIMER_ONESHOT_MODE | prescale_timer1/* | TIMER_CTL_CNTDATEN_Msk*/;
be_bryan 0:b74591d5ab33 200
be_bryan 0:b74591d5ab33 201 uint32_t cmp_timer1 = cd_minor_us / US_PER_TMR1HIRES_CLK;
be_bryan 0:b74591d5ab33 202 cmp_timer1 = NU_CLAMP(cmp_timer1, TMR_CMP_MIN, TMR_CMP_MAX);
be_bryan 0:b74591d5ab33 203 timer1_base->CMP = cmp_timer1;
be_bryan 0:b74591d5ab33 204
be_bryan 0:b74591d5ab33 205 TIMER_EnableInt(timer1_base);
be_bryan 0:b74591d5ab33 206 TIMER_Start(timer1_base);
be_bryan 0:b74591d5ab33 207 }